include/linux/gpio/driver.h

   1 #ifndef __LINUX_GPIO_DRIVER_H
   2 #define __LINUX_GPIO_DRIVER_H
   3
   4 #include <linux/types.h>
   5 #include <linux/module.h>
   6 #include <linux/irq.h>
   7 #include <linux/irqchip/chained_irq.h>
   8 #include <linux/irqdomain.h>
   9 #include <linux/lockdep.h>
  10 #include <linux/pinctrl/pinctrl.h>
  11
  12 struct device;
  13 struct gpio_desc;
  14 struct of_phandle_args;
  15 struct device_node;
  16 struct seq_file;
  17
  18 #ifdef CONFIG_GPIOLIB
  19
  20 /**
  21  * struct gpio_chip - abstract a GPIO controller
  22  * @label: for diagnostics
  23  * @dev: optional device providing the GPIOs
  24  * @cdev: class device used by sysfs interface (may be NULL)
  25  * @owner: helps prevent removal of modules exporting active GPIOs
  26  * @list: links gpio_chips together for traversal
  27  * @request: optional hook for chip-specific activation, such as
  28  *      enabling module power and clock; may sleep
  29  * @free: optional hook for chip-specific deactivation, such as
  30  *      disabling module power and clock; may sleep
  31  * @get_direction: returns direction for signal "offset", 0=out, 1=in,
  32  *      (same as GPIOF_DIR_XXX), or negative error
  33  * @direction_input: configures signal "offset" as input, or returns error
  34  * @direction_output: configures signal "offset" as output, or returns error
  35  * @get: returns value for signal "offset"; for output signals this
  36  *      returns either the value actually sensed, or zero
  37  * @set: assigns output value for signal "offset"
  38  * @set_multiple: assigns output values for multiple signals defined by "mask"
  39  * @set_debounce: optional hook for setting debounce time for specified gpio in
  40  *      interrupt triggered gpio chips
  41  * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
  42  *      implementation may not sleep
  43  * @dbg_show: optional routine to show contents in debugfs; default code
  44  *      will be used when this is omitted, but custom code can show extra
  45  *      state (such as pullup/pulldown configuration).
  46  * @base: identifies the first GPIO number handled by this chip;
  47  *      or, if negative during registration, requests dynamic ID allocation.
  48  *      DEPRECATION: providing anything non-negative and nailing the base
  49  *      offset of GPIO chips is deprecated. Please pass -1 as base to
  50  *      let gpiolib select the chip base in all possible cases. We want to
  51  *      get rid of the static GPIO number space in the long run.
  52  * @ngpio: the number of GPIOs handled by this controller; the last GPIO
  53  *      handled is (base + ngpio - 1).
  54  * @desc: array of ngpio descriptors. Private.
  55  * @names: if set, must be an array of strings to use as alternative
  56  *      names for the GPIOs in this chip. Any entry in the array
  57  *      may be NULL if there is no alias for the GPIO, however the
  58  *      array must be @ngpio entries long.  A name can include a single printk
  59  *      format specifier for an unsigned int.  It is substituted by the actual
  60  *      number of the gpio.
  61  * @can_sleep: flag must be set iff get()/set() methods sleep, as they
  62  *      must while accessing GPIO expander chips over I2C or SPI. This
  63  *      implies that if the chip supports IRQs, these IRQs need to be threaded
  64  *      as the chip access may sleep when e.g. reading out the IRQ status
  65  *      registers.
  66  * @irq_not_threaded: flag must be set if @can_sleep is set but the
  67  *      IRQs don't need to be threaded
  68  * @irqchip: GPIO IRQ chip impl, provided by GPIO driver
  69  * @irqdomain: Interrupt translation domain; responsible for mapping
  70  *      between GPIO hwirq number and linux irq number
  71  * @irq_base: first linux IRQ number assigned to GPIO IRQ chip (deprecated)
  72  * @irq_handler: the irq handler to use (often a predefined irq core function)
  73  *      for GPIO IRQs, provided by GPIO driver
  74  * @irq_default_type: default IRQ triggering type applied during GPIO driver
  75  *      initialization, provided by GPIO driver
  76  * @irq_parent: GPIO IRQ chip parent/bank linux irq number,
  77  *      provided by GPIO driver
  78  * @lock_key: per GPIO IRQ chip lockdep class
  79  *
  80  * A gpio_chip can help platforms abstract various sources of GPIOs so
  81  * they can all be accessed through a common programing interface.
  82  * Example sources would be SOC controllers, FPGAs, multifunction
  83  * chips, dedicated GPIO expanders, and so on.
  84  *
  85  * Each chip controls a number of signals, identified in method calls
  86  * by "offset" values in the range 0..(@ngpio - 1).  When those signals
  87  * are referenced through calls like gpio_get_value(gpio), the offset
  88  * is calculated by subtracting @base from the gpio number.
  89  */
  90 struct gpio_chip {
  91         const char              *label;
  92         struct device           *dev;
  93         struct device           *cdev;
  94         struct module           *owner;
  95         struct list_head        list;
  96
  97         int                     (*request)(struct gpio_chip *chip,
  98                                                 unsigned offset);
  99         void                    (*free)(struct gpio_chip *chip,
 100                                                 unsigned offset);
 101         int                     (*get_direction)(struct gpio_chip *chip,
 102                                                 unsigned offset);
 103         int                     (*direction_input)(struct gpio_chip *chip,
 104                                                 unsigned offset);
 105         int                     (*direction_output)(struct gpio_chip *chip,
 106                                                 unsigned offset, int value);
 107         int                     (*get)(struct gpio_chip *chip,
 108                                                 unsigned offset);
 109         void                    (*set)(struct gpio_chip *chip,
 110                                                 unsigned offset, int value);
 111         void                    (*set_multiple)(struct gpio_chip *chip,
 112                                                 unsigned long *mask,
 113                                                 unsigned long *bits);
 114         int                     (*set_debounce)(struct gpio_chip *chip,
 115                                                 unsigned offset,
 116                                                 unsigned debounce);
 117
 118         int                     (*to_irq)(struct gpio_chip *chip,
 119                                                 unsigned offset);
 120
 121         void                    (*dbg_show)(struct seq_file *s,
 122                                                 struct gpio_chip *chip);
 123         int                     base;
 124         u16                     ngpio;
 125         struct gpio_desc        *desc;
 126         const char              *const *names;
 127         bool                    can_sleep;
 128         bool                    irq_not_threaded;
 129
 130 #ifdef CONFIG_GPIOLIB_IRQCHIP
 131         /*
 132          * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
 133          * to handle IRQs for most practical cases.
 134          */
 135         struct irq_chip         *irqchip;
 136         struct irq_domain       *irqdomain;
 137         unsigned int            irq_base;
 138         irq_flow_handler_t      irq_handler;
 139         unsigned int            irq_default_type;
 140         int                     irq_parent;
 141         struct lock_class_key   *lock_key;
 142 #endif
 143
 144 #if defined(CONFIG_OF_GPIO)
 145         /*
 146          * If CONFIG_OF is enabled, then all GPIO controllers described in the
 147          * device tree automatically may have an OF translation
 148          */
 149         struct device_node *of_node;
 150         int of_gpio_n_cells;
 151         int (*of_xlate)(struct gpio_chip *gc,
 152                         const struct of_phandle_args *gpiospec, u32 *flags);
 153 #endif
 154 #ifdef CONFIG_PINCTRL
 155         /*
 156          * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
 157          * describe the actual pin range which they serve in an SoC. This
 158          * information would be used by pinctrl subsystem to configure
 159          * corresponding pins for gpio usage.
 160          */
 161         struct list_head pin_ranges;
 162 #endif
 163 };
 164
 165 extern const char *gpiochip_is_requested(struct gpio_chip *chip,
 166                         unsigned offset);
 167
 168 /* add/remove chips */
 169 extern int gpiochip_add(struct gpio_chip *chip);
 170 extern void gpiochip_remove(struct gpio_chip *chip);
 171 extern struct gpio_chip *gpiochip_find(void *data,
 172                               int (*match)(struct gpio_chip *chip, void *data));
 173
 174 /* lock/unlock as IRQ */
 175 int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
 176 void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
 177
 178 struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
 179
 180 #ifdef CONFIG_GPIOLIB_IRQCHIP
 181
 182 void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
 183                 struct irq_chip *irqchip,
 184                 int parent_irq,
 185                 irq_flow_handler_t parent_handler);
 186
 187 int _gpiochip_irqchip_add(struct gpio_chip *gpiochip,
 188                           struct irq_chip *irqchip,
 189                           unsigned int first_irq,
 190                           irq_flow_handler_t handler,
 191                           unsigned int type,
 192                           struct lock_class_key *lock_key);
 193
 194 #ifdef CONFIG_LOCKDEP
 195 #define gpiochip_irqchip_add(...)                               \
 196 (                                                               \
 197         ({                                                      \
 198                 static struct lock_class_key _key;              \
 199                 _gpiochip_irqchip_add(__VA_ARGS__, &_key);      \
 200         })                                                      \
 201 )
 202 #else
 203 #define gpiochip_irqchip_add(...)                               \
 204         _gpiochip_irqchip_add(__VA_ARGS__, NULL)
 205 #endif
 206
 207 #endif /* CONFIG_GPIOLIB_IRQCHIP */
 208
 209 #ifdef CONFIG_PINCTRL
 210
 211 /**
 212  * struct gpio_pin_range - pin range controlled by a gpio chip
 213  * @head: list for maintaining set of pin ranges, used internally
 214  * @pctldev: pinctrl device which handles corresponding pins
 215  * @range: actual range of pins controlled by a gpio controller
 216  */
 217
 218 struct gpio_pin_range {
 219         struct list_head node;
 220         struct pinctrl_dev *pctldev;
 221         struct pinctrl_gpio_range range;
 222 };
 223
 224 int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
 225                            unsigned int gpio_offset, unsigned int pin_offset,
 226                            unsigned int npins);
 227 int gpiochip_add_pingroup_range(struct gpio_chip *chip,
 228                         struct pinctrl_dev *pctldev,
 229                         unsigned int gpio_offset, const char *pin_group);
 230 void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
 231
 232 #else
 233
 234 static inline int
 235 gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
 236                        unsigned int gpio_offset, unsigned int pin_offset,
 237                        unsigned int npins)
 238 {
 239         return 0;
 240 }
 241 static inline int
 242 gpiochip_add_pingroup_range(struct gpio_chip *chip,
 243                         struct pinctrl_dev *pctldev,
 244                         unsigned int gpio_offset, const char *pin_group)
 245 {
 246         return 0;
 247 }
 248
 249 static inline void
 250 gpiochip_remove_pin_ranges(struct gpio_chip *chip)
 251 {
 252 }
 253
 254 #endif /* CONFIG_PINCTRL */
 255
 256 struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
 257                                             const char *label);
 258 void gpiochip_free_own_desc(struct gpio_desc *desc);
 259
 260 #else /* CONFIG_GPIOLIB */
 261
 262 static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
 263 {
 264         /* GPIO can never have been requested */
 265         WARN_ON(1);
 266         return ERR_PTR(-ENODEV);
 267 }
 268
 269 #endif /* CONFIG_GPIOLIB */
 270
 271 #endif