4 * linux/include/linux/ide.h
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
9 #include <linux/init.h>
10 #include <linux/ioport.h>
11 #include <linux/hdreg.h>
12 #include <linux/blkdev.h>
13 #include <linux/proc_fs.h>
14 #include <linux/interrupt.h>
15 #include <linux/bitops.h>
16 #include <linux/bio.h>
17 #include <linux/device.h>
18 #include <linux/pci.h>
19 #include <linux/completion.h>
20 #ifdef CONFIG_BLK_DEV_IDEACPI
21 #include <acpi/acpi.h>
23 #include <asm/byteorder.h>
24 #include <asm/system.h>
26 #include <asm/semaphore.h>
27 #include <asm/mutex.h>
29 #if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
30 # define SUPPORT_VLB_SYNC 0
32 # define SUPPORT_VLB_SYNC 1
36 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
40 #define IDE_NO_IRQ (-1)
42 typedef unsigned char byte
; /* used everywhere */
45 * Probably not wise to fiddle with these
47 #define ERROR_MAX 8 /* Max read/write errors per sector */
48 #define ERROR_RESET 3 /* Reset controller every 4th retry */
49 #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
54 #define IDE_TUNE_NOAUTO 2
55 #define IDE_TUNE_AUTO 1
56 #define IDE_TUNE_DEFAULT 0
62 #define DMA_PIO_RETRY 1 /* retrying in PIO */
64 #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
65 #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
68 * Definitions for accessing IDE controller registers
70 #define IDE_NR_PORTS (10)
72 #define IDE_DATA_OFFSET (0)
73 #define IDE_ERROR_OFFSET (1)
74 #define IDE_NSECTOR_OFFSET (2)
75 #define IDE_SECTOR_OFFSET (3)
76 #define IDE_LCYL_OFFSET (4)
77 #define IDE_HCYL_OFFSET (5)
78 #define IDE_SELECT_OFFSET (6)
79 #define IDE_STATUS_OFFSET (7)
80 #define IDE_CONTROL_OFFSET (8)
81 #define IDE_IRQ_OFFSET (9)
83 #define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
84 #define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
86 #define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
87 #define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
88 #define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
89 #define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
90 #define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
91 #define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
92 #define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
93 #define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
94 #define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
95 #define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
97 #define IDE_FEATURE_REG IDE_ERROR_REG
98 #define IDE_COMMAND_REG IDE_STATUS_REG
99 #define IDE_ALTSTATUS_REG IDE_CONTROL_REG
100 #define IDE_IREASON_REG IDE_NSECTOR_REG
101 #define IDE_BCOUNTL_REG IDE_LCYL_REG
102 #define IDE_BCOUNTH_REG IDE_HCYL_REG
104 #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
105 #define BAD_R_STAT (BUSY_STAT | ERR_STAT)
106 #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
107 #define BAD_STAT (BAD_R_STAT | DRQ_STAT)
108 #define DRIVE_READY (READY_STAT | SEEK_STAT)
110 #define BAD_CRC (ABRT_ERR | ICRC_ERR)
112 #define SATA_NR_PORTS (3) /* 16 possible ?? */
114 #define SATA_STATUS_OFFSET (0)
115 #define SATA_ERROR_OFFSET (1)
116 #define SATA_CONTROL_OFFSET (2)
119 * Our Physical Region Descriptor (PRD) table should be large enough
120 * to handle the biggest I/O request we are likely to see. Since requests
121 * can have no more than 256 sectors, and since the typical blocksize is
122 * two or more sectors, we could get by with a limit of 128 entries here for
123 * the usual worst case. Most requests seem to include some contiguous blocks,
124 * further reducing the number of table entries required.
126 * The driver reverts to PIO mode for individual requests that exceed
127 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
128 * 100% of all crazy scenarios here is not necessary.
130 * As it turns out though, we must allocate a full 4KB page for this,
131 * so the two PRD tables (ide0 & ide1) will each get half of that,
132 * allowing each to have about 256 entries (8 bytes each) from this.
135 #define PRD_ENTRIES 256
138 * Some more useful definitions
140 #define PARTN_BITS 6 /* number of minor dev bits for partitions */
141 #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
142 #define SECTOR_SIZE 512
143 #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
144 #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
147 * Timeouts for various operations:
149 #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
150 #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
151 #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
152 #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
153 #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
154 #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
157 * Check for an interrupt and acknowledge the interrupt status
160 typedef int (ide_ack_intr_t
)(struct hwif_s
*);
163 * hwif_chipset_t is used to keep track of the specific hardware
164 * chipset used by each IDE interface, if known.
166 enum { ide_unknown
, ide_generic
, ide_pci
,
167 ide_cmd640
, ide_dtc2278
, ide_ali14xx
,
168 ide_qd65xx
, ide_umc8672
, ide_ht6560b
,
169 ide_rz1000
, ide_trm290
,
170 ide_cmd646
, ide_cy82c693
, ide_4drives
,
171 ide_pmac
, ide_etrax100
, ide_acorn
,
172 ide_au1xxx
, ide_palm3710
, ide_forced
175 typedef u8 hwif_chipset_t
;
178 * Structure to hold all information about the location of this port
180 typedef struct hw_regs_s
{
181 unsigned long io_ports
[IDE_NR_PORTS
]; /* task file registers */
182 int irq
; /* our irq number */
183 ide_ack_intr_t
*ack_intr
; /* acknowledge interrupt */
184 hwif_chipset_t chipset
;
188 struct hwif_s
* ide_find_port(unsigned long);
189 void ide_init_port_data(struct hwif_s
*, unsigned int);
190 void ide_init_port_hw(struct hwif_s
*, hw_regs_t
*);
192 static inline void ide_std_init_ports(hw_regs_t
*hw
,
193 unsigned long io_addr
,
194 unsigned long ctl_addr
)
198 for (i
= IDE_DATA_OFFSET
; i
<= IDE_STATUS_OFFSET
; i
++)
199 hw
->io_ports
[i
] = io_addr
++;
201 hw
->io_ports
[IDE_CONTROL_OFFSET
] = ctl_addr
;
206 #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
208 #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
211 /* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
212 #ifndef IDE_ARCH_OBSOLETE_DEFAULTS
213 # define ide_default_io_base(index) (0)
214 # define ide_default_irq(base) (0)
215 # define ide_init_default_irq(base) (0)
218 #ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
219 static inline void ide_init_hwif_ports(hw_regs_t
*hw
,
220 unsigned long io_addr
,
221 unsigned long ctl_addr
,
225 ide_std_init_ports(hw
, io_addr
, ide_default_io_ctl(io_addr
));
227 ide_std_init_ports(hw
, io_addr
, ctl_addr
);
232 hw
->io_ports
[IDE_IRQ_OFFSET
] = 0;
235 if (ppc_ide_md
.ide_init_hwif
)
236 ppc_ide_md
.ide_init_hwif(hw
, io_addr
, ctl_addr
, irq
);
240 static inline void ide_init_hwif_ports(hw_regs_t
*hw
,
241 unsigned long io_addr
,
242 unsigned long ctl_addr
,
245 if (io_addr
|| ctl_addr
)
246 printk(KERN_WARNING
"%s: must not be called\n", __FUNCTION__
);
248 #endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
250 /* Currently only m68k, apus and m8xx need it */
251 #ifndef IDE_ARCH_ACK_INTR
252 # define ide_ack_intr(hwif) (1)
255 /* Currently only Atari needs it */
256 #ifndef IDE_ARCH_LOCK
257 # define ide_release_lock() do {} while (0)
258 # define ide_get_lock(hdlr, data) do {} while (0)
259 #endif /* IDE_ARCH_LOCK */
262 * Now for the data we need to maintain per-drive: ide_drive_t
265 #define ide_scsi 0x21
266 #define ide_disk 0x20
267 #define ide_optical 0x7
268 #define ide_cdrom 0x5
270 #define ide_floppy 0x0
273 * Special Driver Flags
275 * set_geometry : respecify drive geometry
276 * recalibrate : seek to cyl 0
277 * set_multmode : set multmode count
278 * set_tune : tune interface for drive
279 * serviced : service command
285 unsigned set_geometry
: 1;
286 unsigned recalibrate
: 1;
287 unsigned set_multmode
: 1;
288 unsigned set_tune
: 1;
289 unsigned serviced
: 1;
290 unsigned reserved
: 3;
295 * ATA-IDE Select Register, aka Device-Head
297 * head : always zeros here
298 * unit : drive select number: 0/1
300 * lba : using LBA instead of CHS
306 #if defined(__LITTLE_ENDIAN_BITFIELD)
312 #elif defined(__BIG_ENDIAN_BITFIELD)
319 #error "Please fix <asm/byteorder.h>"
322 } select_t
, ata_select_t
;
325 * Status returned from various ide_ functions
328 ide_stopped
, /* no drive operation was started */
329 ide_started
, /* a drive operation was started, handler was set */
333 struct ide_settings_s
;
335 #ifdef CONFIG_BLK_DEV_IDEACPI
336 struct ide_acpi_drive_link
;
337 struct ide_acpi_hwif_link
;
340 typedef struct ide_drive_s
{
341 char name
[4]; /* drive name, such as "hda" */
342 char driver_req
[10]; /* requests specific driver */
344 struct request_queue
*queue
; /* request queue */
346 struct request
*rq
; /* current request */
347 struct ide_drive_s
*next
; /* circular list of hwgroup drives */
348 void *driver_data
; /* extra driver data */
349 struct hd_driveid
*id
; /* drive model identification info */
350 #ifdef CONFIG_IDE_PROC_FS
351 struct proc_dir_entry
*proc
; /* /proc/ide/ directory entry */
352 struct ide_settings_s
*settings
;/* /proc/ide/ drive settings */
354 struct hwif_s
*hwif
; /* actually (ide_hwif_t *) */
356 unsigned long sleep
; /* sleep until this time */
357 unsigned long service_start
; /* time we started last request */
358 unsigned long service_time
; /* service time of last request */
359 unsigned long timeout
; /* max time to wait for irq */
361 special_t special
; /* special action flags */
362 select_t select
; /* basic drive/head select reg value */
364 u8 keep_settings
; /* restore settings after drive reset */
365 u8 using_dma
; /* disk is using dma for read/write */
366 u8 retry_pio
; /* retrying dma capable host in pio */
367 u8 state
; /* retry state */
368 u8 waiting_for_dma
; /* dma currently in progress */
369 u8 unmask
; /* okay to unmask other irqs */
370 u8 noflush
; /* don't attempt flushes */
371 u8 dsc_overlap
; /* DSC overlap */
372 u8 nice1
; /* give potential excess bandwidth */
374 unsigned present
: 1; /* drive is physically present */
375 unsigned dead
: 1; /* device ejected hint */
376 unsigned id_read
: 1; /* 1=id read from disk 0 = synthetic */
377 unsigned noprobe
: 1; /* from: hdx=noprobe */
378 unsigned removable
: 1; /* 1 if need to do check_media_change */
379 unsigned attach
: 1; /* needed for removable devices */
380 unsigned forced_geom
: 1; /* 1 if hdx=c,h,s was given at boot */
381 unsigned no_unmask
: 1; /* disallow setting unmask bit */
382 unsigned no_io_32bit
: 1; /* disallow enabling 32bit I/O */
383 unsigned atapi_overlap
: 1; /* ATAPI overlap (not supported) */
384 unsigned doorlocking
: 1; /* for removable only: door lock/unlock works */
385 unsigned nodma
: 1; /* disallow DMA */
386 unsigned autotune
: 2; /* 0=default, 1=autotune, 2=noautotune */
387 unsigned remap_0_to_1
: 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
388 unsigned blocked
: 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
389 unsigned vdma
: 1; /* 1=doing PIO over DMA 0=doing normal DMA */
390 unsigned scsi
: 1; /* 0=default, 1=ide-scsi emulation */
391 unsigned sleeping
: 1; /* 1=sleeping & sleep field valid */
392 unsigned post_reset
: 1;
393 unsigned udma33_warned
: 1;
395 u8 addressing
; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
396 u8 quirk_list
; /* considered quirky, set for a specific host */
397 u8 init_speed
; /* transfer rate set at boot */
398 u8 current_speed
; /* current transfer rate set */
399 u8 desired_speed
; /* desired transfer rate set */
400 u8 dn
; /* now wide spread use */
401 u8 wcache
; /* status of write cache */
402 u8 acoustic
; /* acoustic management */
403 u8 media
; /* disk, cdrom, tape, floppy, ... */
404 u8 ctl
; /* "normal" value for IDE_CONTROL_REG */
405 u8 ready_stat
; /* min status value for drive ready */
406 u8 mult_count
; /* current multiple sector setting */
407 u8 mult_req
; /* requested multiple sector setting */
408 u8 tune_req
; /* requested drive tuning setting */
409 u8 io_32bit
; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
410 u8 bad_wstat
; /* used for ignoring WRERR_STAT */
411 u8 nowerr
; /* used for ignoring WRERR_STAT */
412 u8 sect0
; /* offset of first sector for DM6:DDO */
413 u8 head
; /* "real" number of heads */
414 u8 sect
; /* "real" sectors per track */
415 u8 bios_head
; /* BIOS/fdisk/LILO number of heads */
416 u8 bios_sect
; /* BIOS/fdisk/LILO sectors per track */
418 unsigned int bios_cyl
; /* BIOS/fdisk/LILO number of cyls */
419 unsigned int cyl
; /* "real" number of cyls */
420 unsigned int drive_data
; /* used by set_pio_mode/selectproc */
421 unsigned int failures
; /* current failure count */
422 unsigned int max_failures
; /* maximum allowed failure count */
423 u64 probed_capacity
;/* initial reported media capacity (ide-cd only currently) */
425 u64 capacity64
; /* total number of sectors */
427 int lun
; /* logical unit */
428 int crc_count
; /* crc counter to reduce drive speed */
429 #ifdef CONFIG_BLK_DEV_IDEACPI
430 struct ide_acpi_drive_link
*acpidata
;
432 struct list_head list
;
433 struct device gendev
;
434 struct completion gendev_rel_comp
; /* to deal with device release() */
437 #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
439 #define IDE_CHIPSET_PCI_MASK \
440 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
441 #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
443 struct ide_port_info
;
445 typedef struct hwif_s
{
446 struct hwif_s
*next
; /* for linked-list in ide_hwgroup_t */
447 struct hwif_s
*mate
; /* other hwif from same PCI chip */
448 struct hwgroup_s
*hwgroup
; /* actually (ide_hwgroup_t *) */
449 struct proc_dir_entry
*proc
; /* /proc/ide/ directory entry */
451 char name
[6]; /* name of interface, eg. "ide0" */
453 /* task file registers for pata and sata */
454 unsigned long io_ports
[IDE_NR_PORTS
];
455 unsigned long sata_scr
[SATA_NR_PORTS
];
457 ide_drive_t drives
[MAX_DRIVES
]; /* drive info */
459 u8 major
; /* our major number */
460 u8 index
; /* 0 for ide0; 1 for ide1; ... */
461 u8 channel
; /* for dual-port chips: 0=primary, 1=secondary */
462 u8 bus_state
; /* power state of the IDE bus */
472 u8 cbl
; /* cable type */
474 hwif_chipset_t chipset
; /* sub-module for tuning.. */
478 const struct ide_port_info
*cds
; /* chipset device struct */
480 ide_ack_intr_t
*ack_intr
;
482 void (*rw_disk
)(ide_drive_t
*, struct request
*);
485 ide_hwif_ops_t
*hwifops
;
487 /* host specific initialization of devices on a port */
488 void (*port_init_devs
)(struct hwif_s
*);
489 /* routine to program host for PIO mode */
490 void (*set_pio_mode
)(ide_drive_t
*, const u8
);
491 /* routine to program host for DMA mode */
492 void (*set_dma_mode
)(ide_drive_t
*, const u8
);
493 /* tweaks hardware to select drive */
494 void (*selectproc
)(ide_drive_t
*);
495 /* chipset polling based on hba specifics */
496 int (*reset_poll
)(ide_drive_t
*);
497 /* chipset specific changes to default for device-hba resets */
498 void (*pre_reset
)(ide_drive_t
*);
499 /* routine to reset controller after a disk reset */
500 void (*resetproc
)(ide_drive_t
*);
501 /* special host masking for drive selection */
502 void (*maskproc
)(ide_drive_t
*, int);
503 /* check host's drive quirk list */
504 void (*quirkproc
)(ide_drive_t
*);
506 u8 (*mdma_filter
)(ide_drive_t
*);
507 u8 (*udma_filter
)(ide_drive_t
*);
509 u8 (*cable_detect
)(struct hwif_s
*);
511 void (*ata_input_data
)(ide_drive_t
*, void *, u32
);
512 void (*ata_output_data
)(ide_drive_t
*, void *, u32
);
514 void (*atapi_input_bytes
)(ide_drive_t
*, void *, u32
);
515 void (*atapi_output_bytes
)(ide_drive_t
*, void *, u32
);
517 void (*dma_host_set
)(ide_drive_t
*, int);
518 int (*dma_setup
)(ide_drive_t
*);
519 void (*dma_exec_cmd
)(ide_drive_t
*, u8
);
520 void (*dma_start
)(ide_drive_t
*);
521 int (*ide_dma_end
)(ide_drive_t
*drive
);
522 int (*ide_dma_test_irq
)(ide_drive_t
*drive
);
523 void (*ide_dma_clear_irq
)(ide_drive_t
*drive
);
524 void (*dma_lost_irq
)(ide_drive_t
*drive
);
525 void (*dma_timeout
)(ide_drive_t
*drive
);
527 void (*OUTB
)(u8 addr
, unsigned long port
);
528 void (*OUTBSYNC
)(ide_drive_t
*drive
, u8 addr
, unsigned long port
);
529 void (*OUTW
)(u16 addr
, unsigned long port
);
530 void (*OUTSW
)(unsigned long port
, void *addr
, u32 count
);
531 void (*OUTSL
)(unsigned long port
, void *addr
, u32 count
);
533 u8 (*INB
)(unsigned long port
);
534 u16 (*INW
)(unsigned long port
);
535 void (*INSW
)(unsigned long port
, void *addr
, u32 count
);
536 void (*INSL
)(unsigned long port
, void *addr
, u32 count
);
538 /* dma physical region descriptor table (cpu view) */
539 unsigned int *dmatable_cpu
;
540 /* dma physical region descriptor table (dma view) */
541 dma_addr_t dmatable_dma
;
542 /* Scatter-gather list used to build the above */
543 struct scatterlist
*sg_table
;
544 int sg_max_nents
; /* Maximum number of entries in it */
545 int sg_nents
; /* Current number of entries in it */
546 int sg_dma_direction
; /* dma transfer direction */
548 /* data phase of the active command (currently only valid for PIO/DMA) */
553 struct scatterlist
*cursg
;
554 unsigned int cursg_ofs
;
556 int rqsize
; /* max sectors per request */
557 int irq
; /* our irq number */
559 unsigned long dma_base
; /* base addr for dma ports */
560 unsigned long dma_command
; /* dma command register */
561 unsigned long dma_vendor1
; /* dma vendor 1 register */
562 unsigned long dma_status
; /* dma status register */
563 unsigned long dma_vendor3
; /* dma vendor 3 register */
564 unsigned long dma_prdtable
; /* actual prd table address */
566 unsigned long config_data
; /* for use by chipset-specific code */
567 unsigned long select_data
; /* for use by chipset-specific code */
569 unsigned long extra_base
; /* extra addr for dma ports */
570 unsigned extra_ports
; /* number of extra dma ports */
572 unsigned noprobe
: 1; /* don't probe for this interface */
573 unsigned present
: 1; /* this interface exists */
574 unsigned hold
: 1; /* this interface is always present */
575 unsigned serialized
: 1; /* serialized all channel operation */
576 unsigned sharing_irq
: 1; /* 1 = sharing irq with another hwif */
577 unsigned reset
: 1; /* reset after probe */
578 unsigned sg_mapped
: 1; /* sg_table and sg_nents are ready */
579 unsigned mmio
: 1; /* host uses MMIO */
580 unsigned straight8
: 1; /* Alan's straight 8 check */
582 struct device gendev
;
583 struct completion gendev_rel_comp
; /* To deal with device release() */
585 void *hwif_data
; /* extra hwif data */
589 #ifdef CONFIG_BLK_DEV_IDEACPI
590 struct ide_acpi_hwif_link
*acpidata
;
592 } ____cacheline_internodealigned_in_smp ide_hwif_t
;
595 * internal ide interrupt handler type
597 typedef ide_startstop_t (ide_handler_t
)(ide_drive_t
*);
598 typedef int (ide_expiry_t
)(ide_drive_t
*);
600 /* used by ide-cd, ide-floppy, etc. */
601 typedef void (xfer_func_t
)(ide_drive_t
*, void *, u32
);
603 typedef struct hwgroup_s
{
604 /* irq handler, if active */
605 ide_startstop_t (*handler
)(ide_drive_t
*);
607 /* BOOL: protects all fields below */
609 /* BOOL: wake us up on timer expiry */
610 unsigned int sleeping
: 1;
611 /* BOOL: polling active & poll_timeout field valid */
612 unsigned int polling
: 1;
613 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
614 unsigned int resetting
: 1;
618 /* ptr to current hwif in linked-list */
621 /* current request */
625 struct timer_list timer
;
626 /* timeout value during long polls */
627 unsigned long poll_timeout
;
628 /* queried upon timeouts */
629 int (*expiry
)(ide_drive_t
*);
635 typedef struct ide_driver_s ide_driver_t
;
637 extern struct mutex ide_setting_mtx
;
639 int set_io_32bit(ide_drive_t
*, int);
640 int set_pio_mode(ide_drive_t
*, int);
641 int set_using_dma(ide_drive_t
*, int);
643 #ifdef CONFIG_IDE_PROC_FS
645 * configurable drive settings
652 #define SETTING_READ (1 << 0)
653 #define SETTING_WRITE (1 << 1)
654 #define SETTING_RW (SETTING_READ | SETTING_WRITE)
656 typedef int (ide_procset_t
)(ide_drive_t
*, int);
657 typedef struct ide_settings_s
{
668 struct ide_settings_s
*next
;
671 int ide_add_setting(ide_drive_t
*, const char *, int, int, int, int, int, int, void *, ide_procset_t
*set
);
674 * /proc/ide interface
679 read_proc_t
*read_proc
;
680 write_proc_t
*write_proc
;
683 void proc_ide_create(void);
684 void proc_ide_destroy(void);
685 void ide_proc_register_port(ide_hwif_t
*);
686 void ide_proc_port_register_devices(ide_hwif_t
*);
687 void ide_proc_unregister_device(ide_drive_t
*);
688 void ide_proc_unregister_port(ide_hwif_t
*);
689 void ide_proc_register_driver(ide_drive_t
*, ide_driver_t
*);
690 void ide_proc_unregister_driver(ide_drive_t
*, ide_driver_t
*);
692 void ide_add_generic_settings(ide_drive_t
*);
694 read_proc_t proc_ide_read_capacity
;
695 read_proc_t proc_ide_read_geometry
;
697 #ifdef CONFIG_BLK_DEV_IDEPCI
698 void ide_pci_create_host_proc(const char *, get_info_t
*);
702 * Standard exit stuff:
704 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
713 *start = page + off; \
717 static inline void proc_ide_create(void) { ; }
718 static inline void proc_ide_destroy(void) { ; }
719 static inline void ide_proc_register_port(ide_hwif_t
*hwif
) { ; }
720 static inline void ide_proc_port_register_devices(ide_hwif_t
*hwif
) { ; }
721 static inline void ide_proc_unregister_device(ide_drive_t
*drive
) { ; }
722 static inline void ide_proc_unregister_port(ide_hwif_t
*hwif
) { ; }
723 static inline void ide_proc_register_driver(ide_drive_t
*drive
, ide_driver_t
*driver
) { ; }
724 static inline void ide_proc_unregister_driver(ide_drive_t
*drive
, ide_driver_t
*driver
) { ; }
725 static inline void ide_add_generic_settings(ide_drive_t
*drive
) { ; }
726 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
730 * Power Management step value (rq->pm->pm_step).
732 * The step value starts at 0 (ide_pm_state_start_suspend) for a
733 * suspend operation or 1000 (ide_pm_state_start_resume) for a
736 * For each step, the core calls the subdriver start_power_step() first.
738 * - ide_stopped : In this case, the core calls us back again unless
739 * step have been set to ide_power_state_completed.
740 * - ide_started : In this case, the channel is left busy until an
741 * async event (interrupt) occurs.
742 * Typically, start_power_step() will issue a taskfile request with
745 * Upon reception of the interrupt, the core will call complete_power_step()
746 * with the error code if any. This routine should update the step value
747 * and return. It should not start a new request. The core will call
748 * start_power_step for the new step value, unless step have been set to
749 * ide_power_state_completed.
751 * Subdrivers are expected to define their own additional power
752 * steps from 1..999 for suspend and from 1001..1999 for resume,
753 * other values are reserved for future use.
757 ide_pm_state_completed
= -1,
758 ide_pm_state_start_suspend
= 0,
759 ide_pm_state_start_resume
= 1000,
763 * Subdrivers support.
765 * The gendriver.owner field should be set to the module owner of this driver.
766 * The gendriver.name field should be set to the name of this driver
768 struct ide_driver_s
{
771 unsigned supports_dsc_overlap
: 1;
772 ide_startstop_t (*do_request
)(ide_drive_t
*, struct request
*, sector_t
);
773 int (*end_request
)(ide_drive_t
*, int, int);
774 ide_startstop_t (*error
)(ide_drive_t
*, struct request
*rq
, u8
, u8
);
775 ide_startstop_t (*abort
)(ide_drive_t
*, struct request
*rq
);
776 struct device_driver gen_driver
;
777 int (*probe
)(ide_drive_t
*);
778 void (*remove
)(ide_drive_t
*);
779 void (*resume
)(ide_drive_t
*);
780 void (*shutdown
)(ide_drive_t
*);
781 #ifdef CONFIG_IDE_PROC_FS
782 ide_proc_entry_t
*proc
;
786 #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
788 int generic_ide_ioctl(ide_drive_t
*, struct file
*, struct block_device
*, unsigned, unsigned long);
791 * ide_hwifs[] is the master data structure used to keep track
792 * of just about everything in ide.c. Whenever possible, routines
793 * should be using pointers to a drive (ide_drive_t *) or
794 * pointers to a hwif (ide_hwif_t *), rather than indexing this
795 * structure directly (the allocation/layout may change!).
799 extern ide_hwif_t ide_hwifs
[]; /* master data repository */
801 extern int noautodma
;
803 extern int ide_end_request (ide_drive_t
*drive
, int uptodate
, int nrsecs
);
804 int ide_end_dequeued_request(ide_drive_t
*drive
, struct request
*rq
,
805 int uptodate
, int nr_sectors
);
807 extern void ide_set_handler (ide_drive_t
*drive
, ide_handler_t
*handler
, unsigned int timeout
, ide_expiry_t
*expiry
);
809 void ide_execute_command(ide_drive_t
*, u8
, ide_handler_t
*, unsigned int,
812 ide_startstop_t
__ide_error(ide_drive_t
*, struct request
*, u8
, u8
);
814 ide_startstop_t
ide_error (ide_drive_t
*drive
, const char *msg
, byte stat
);
816 ide_startstop_t
__ide_abort(ide_drive_t
*, struct request
*);
818 extern ide_startstop_t
ide_abort(ide_drive_t
*, const char *);
820 extern void ide_fix_driveid(struct hd_driveid
*);
822 extern void ide_fixstring(u8
*, const int, const int);
824 int ide_wait_stat(ide_startstop_t
*, ide_drive_t
*, u8
, u8
, unsigned long);
826 extern ide_startstop_t
ide_do_reset (ide_drive_t
*);
828 extern void ide_init_drive_cmd (struct request
*rq
);
831 * "action" parameter type for ide_do_drive_cmd() below.
834 ide_wait
, /* insert rq at end of list, and wait for it */
835 ide_preempt
, /* insert rq in front of current request */
836 ide_head_wait
, /* insert rq in front of current request and wait for it */
837 ide_end
/* insert rq at end of list, but don't wait for it */
840 extern int ide_do_drive_cmd(ide_drive_t
*, struct request
*, ide_action_t
);
842 extern void ide_end_drive_cmd(ide_drive_t
*, u8
, u8
);
845 IDE_TFLAG_LBA48
= (1 << 0),
846 IDE_TFLAG_NO_SELECT_MASK
= (1 << 1),
847 IDE_TFLAG_FLAGGED
= (1 << 2),
848 IDE_TFLAG_OUT_DATA
= (1 << 3),
849 IDE_TFLAG_OUT_HOB_FEATURE
= (1 << 4),
850 IDE_TFLAG_OUT_HOB_NSECT
= (1 << 5),
851 IDE_TFLAG_OUT_HOB_LBAL
= (1 << 6),
852 IDE_TFLAG_OUT_HOB_LBAM
= (1 << 7),
853 IDE_TFLAG_OUT_HOB_LBAH
= (1 << 8),
854 IDE_TFLAG_OUT_HOB
= IDE_TFLAG_OUT_HOB_FEATURE
|
855 IDE_TFLAG_OUT_HOB_NSECT
|
856 IDE_TFLAG_OUT_HOB_LBAL
|
857 IDE_TFLAG_OUT_HOB_LBAM
|
858 IDE_TFLAG_OUT_HOB_LBAH
,
859 IDE_TFLAG_OUT_FEATURE
= (1 << 9),
860 IDE_TFLAG_OUT_NSECT
= (1 << 10),
861 IDE_TFLAG_OUT_LBAL
= (1 << 11),
862 IDE_TFLAG_OUT_LBAM
= (1 << 12),
863 IDE_TFLAG_OUT_LBAH
= (1 << 13),
864 IDE_TFLAG_OUT_TF
= IDE_TFLAG_OUT_FEATURE
|
865 IDE_TFLAG_OUT_NSECT
|
869 IDE_TFLAG_OUT_DEVICE
= (1 << 14),
870 IDE_TFLAG_WRITE
= (1 << 15),
871 IDE_TFLAG_FLAGGED_SET_IN_FLAGS
= (1 << 16),
872 IDE_TFLAG_IN_DATA
= (1 << 17),
873 IDE_TFLAG_CUSTOM_HANDLER
= (1 << 18),
874 IDE_TFLAG_DMA_PIO_FALLBACK
= (1 << 19),
875 IDE_TFLAG_IN_HOB_FEATURE
= (1 << 20),
876 IDE_TFLAG_IN_HOB_NSECT
= (1 << 21),
877 IDE_TFLAG_IN_HOB_LBAL
= (1 << 22),
878 IDE_TFLAG_IN_HOB_LBAM
= (1 << 23),
879 IDE_TFLAG_IN_HOB_LBAH
= (1 << 24),
880 IDE_TFLAG_IN_HOB_LBA
= IDE_TFLAG_IN_HOB_LBAL
|
881 IDE_TFLAG_IN_HOB_LBAM
|
882 IDE_TFLAG_IN_HOB_LBAH
,
883 IDE_TFLAG_IN_HOB
= IDE_TFLAG_IN_HOB_FEATURE
|
884 IDE_TFLAG_IN_HOB_NSECT
|
885 IDE_TFLAG_IN_HOB_LBA
,
886 IDE_TFLAG_IN_NSECT
= (1 << 25),
887 IDE_TFLAG_IN_LBAL
= (1 << 26),
888 IDE_TFLAG_IN_LBAM
= (1 << 27),
889 IDE_TFLAG_IN_LBAH
= (1 << 28),
890 IDE_TFLAG_IN_LBA
= IDE_TFLAG_IN_LBAL
|
893 IDE_TFLAG_IN_TF
= IDE_TFLAG_IN_NSECT
|
895 IDE_TFLAG_IN_DEVICE
= (1 << 29),
896 IDE_TFLAG_HOB
= IDE_TFLAG_OUT_HOB
|
898 IDE_TFLAG_TF
= IDE_TFLAG_OUT_TF
|
900 IDE_TFLAG_DEVICE
= IDE_TFLAG_OUT_DEVICE
|
902 /* force 16-bit I/O operations */
903 IDE_TFLAG_IO_16BIT
= (1 << 30),
904 /* ide_task_t was allocated using kmalloc() */
905 IDE_TFLAG_DYN
= (1 << 31),
908 struct ide_taskfile
{
909 u8 hob_data
; /* 0: high data byte (for TASKFILE IOCTL) */
911 u8 hob_feature
; /* 1-5: additional data to support LBA48 */
917 u8 data
; /* 6: low data byte (for TASKFILE IOCTL) */
920 u8 error
; /* read: error */
921 u8 feature
; /* write: feature */
924 u8 nsect
; /* 8: number of sectors */
925 u8 lbal
; /* 9: LBA low */
926 u8 lbam
; /* 10: LBA mid */
927 u8 lbah
; /* 11: LBA high */
929 u8 device
; /* 12: device select */
932 u8 status
; /*  read: status  */
933 u8 command
; /* write: command */
937 typedef struct ide_task_s
{
939 struct ide_taskfile tf
;
944 struct request
*rq
; /* copy of request */
945 void *special
; /* valid_t generally */
948 void ide_tf_load(ide_drive_t
*, ide_task_t
*);
949 void ide_tf_read(ide_drive_t
*, ide_task_t
*);
951 extern void SELECT_DRIVE(ide_drive_t
*);
952 extern void SELECT_MASK(ide_drive_t
*, int);
954 extern int drive_is_ready(ide_drive_t
*);
956 void ide_pktcmd_tf_load(ide_drive_t
*, u32
, u16
, u8
);
958 ide_startstop_t
do_rw_taskfile(ide_drive_t
*, ide_task_t
*);
960 void task_end_request(ide_drive_t
*, struct request
*, u8
);
962 int ide_raw_taskfile(ide_drive_t
*, ide_task_t
*, u8
*, u16
);
963 int ide_no_data_taskfile(ide_drive_t
*, ide_task_t
*);
965 int ide_taskfile_ioctl(ide_drive_t
*, unsigned int, unsigned long);
966 int ide_cmd_ioctl(ide_drive_t
*, unsigned int, unsigned long);
967 int ide_task_ioctl(ide_drive_t
*, unsigned int, unsigned long);
969 extern int system_bus_clock(void);
971 extern int ide_driveid_update(ide_drive_t
*);
972 extern int ide_config_drive_speed(ide_drive_t
*, u8
);
973 extern u8
eighty_ninty_three (ide_drive_t
*);
974 extern int taskfile_lib_get_identify(ide_drive_t
*drive
, u8
*);
976 extern int ide_wait_not_busy(ide_hwif_t
*hwif
, unsigned long timeout
);
978 extern void ide_stall_queue(ide_drive_t
*drive
, unsigned long timeout
);
980 extern int ide_spin_wait_hwgroup(ide_drive_t
*);
981 extern void ide_timer_expiry(unsigned long);
982 extern irqreturn_t
ide_intr(int irq
, void *dev_id
);
983 extern void do_ide_request(struct request_queue
*);
985 void ide_init_disk(struct gendisk
*, ide_drive_t
*);
987 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
988 extern int __ide_pci_register_driver(struct pci_driver
*driver
, struct module
*owner
, const char *mod_name
);
989 #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
991 #define ide_pci_register_driver(d) pci_register_driver(d)
994 void ide_pci_setup_ports(struct pci_dev
*, const struct ide_port_info
*, int, u8
*);
995 void ide_setup_pci_noise(struct pci_dev
*, const struct ide_port_info
*);
997 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
998 void ide_hwif_setup_dma(ide_hwif_t
*, const struct ide_port_info
*);
1000 static inline void ide_hwif_setup_dma(ide_hwif_t
*hwif
,
1001 const struct ide_port_info
*d
) { }
1004 extern void default_hwif_iops(ide_hwif_t
*);
1005 extern void default_hwif_mmiops(ide_hwif_t
*);
1006 extern void default_hwif_transport(ide_hwif_t
*);
1008 typedef struct ide_pci_enablebit_s
{
1009 u8 reg
; /* byte pci reg holding the enable-bit */
1010 u8 mask
; /* mask to isolate the enable-bit */
1011 u8 val
; /* value of masked reg when "enabled" */
1012 } ide_pci_enablebit_t
;
1015 /* Uses ISA control ports not PCI ones. */
1016 IDE_HFLAG_ISA_PORTS
= (1 << 0),
1017 /* single port device */
1018 IDE_HFLAG_SINGLE
= (1 << 1),
1019 /* don't use legacy PIO blacklist */
1020 IDE_HFLAG_PIO_NO_BLACKLIST
= (1 << 2),
1021 /* don't use conservative PIO "downgrade" */
1022 IDE_HFLAG_PIO_NO_DOWNGRADE
= (1 << 3),
1023 /* use PIO8/9 for prefetch off/on */
1024 IDE_HFLAG_ABUSE_PREFETCH
= (1 << 4),
1025 /* use PIO6/7 for fast-devsel off/on */
1026 IDE_HFLAG_ABUSE_FAST_DEVSEL
= (1 << 5),
1027 /* use 100-102 and 200-202 PIO values to set DMA modes */
1028 IDE_HFLAG_ABUSE_DMA_MODES
= (1 << 6),
1030 * keep DMA setting when programming PIO mode, may be used only
1031 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1033 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA
= (1 << 7),
1034 /* program host for the transfer mode after programming device */
1035 IDE_HFLAG_POST_SET_MODE
= (1 << 8),
1036 /* don't program host/device for the transfer mode ("smart" hosts) */
1037 IDE_HFLAG_NO_SET_MODE
= (1 << 9),
1038 /* trust BIOS for programming chipset/device for DMA */
1039 IDE_HFLAG_TRUST_BIOS_FOR_DMA
= (1 << 10),
1040 /* host uses VDMA (tied with IDE_HFLAG_CS5520 for now) */
1041 IDE_HFLAG_VDMA
= (1 << 11),
1042 /* ATAPI DMA is unsupported */
1043 IDE_HFLAG_NO_ATAPI_DMA
= (1 << 12),
1044 /* set if host is a "bootable" controller */
1045 IDE_HFLAG_BOOTABLE
= (1 << 13),
1046 /* host doesn't support DMA */
1047 IDE_HFLAG_NO_DMA
= (1 << 14),
1048 /* check if host is PCI IDE device before allowing DMA */
1049 IDE_HFLAG_NO_AUTODMA
= (1 << 15),
1050 /* don't autotune PIO */
1051 IDE_HFLAG_NO_AUTOTUNE
= (1 << 16),
1052 /* host is CS5510/CS5520 */
1053 IDE_HFLAG_CS5520
= IDE_HFLAG_VDMA
,
1055 IDE_HFLAG_NO_LBA48
= (1 << 17),
1057 IDE_HFLAG_NO_LBA48_DMA
= (1 << 18),
1058 /* data FIFO is cleared by an error */
1059 IDE_HFLAG_ERROR_STOPS_FIFO
= (1 << 19),
1060 /* serialize ports */
1061 IDE_HFLAG_SERIALIZE
= (1 << 20),
1062 /* use legacy IRQs */
1063 IDE_HFLAG_LEGACY_IRQS
= (1 << 21),
1064 /* force use of legacy IRQs */
1065 IDE_HFLAG_FORCE_LEGACY_IRQS
= (1 << 22),
1066 /* limit LBA48 requests to 256 sectors */
1067 IDE_HFLAG_RQSIZE_256
= (1 << 23),
1068 /* use 32-bit I/O ops */
1069 IDE_HFLAG_IO_32BIT
= (1 << 24),
1071 IDE_HFLAG_UNMASK_IRQS
= (1 << 25),
1072 IDE_HFLAG_ABUSE_SET_DMA_MODE
= (1 << 26),
1073 /* host is CY82C693 */
1074 IDE_HFLAG_CY82C693
= (1 << 27),
1075 /* force host out of "simplex" mode */
1076 IDE_HFLAG_CLEAR_SIMPLEX
= (1 << 28),
1077 /* DSC overlap is unsupported */
1078 IDE_HFLAG_NO_DSC
= (1 << 29),
1079 /* never use 32-bit I/O ops */
1080 IDE_HFLAG_NO_IO_32BIT
= (1 << 30),
1081 /* never unmask IRQs */
1082 IDE_HFLAG_NO_UNMASK_IRQS
= (1 << 31),
1085 #ifdef CONFIG_BLK_DEV_OFFBOARD
1086 # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1088 # define IDE_HFLAG_OFF_BOARD 0
1091 struct ide_port_info
{
1093 unsigned int (*init_chipset
)(struct pci_dev
*, const char *);
1094 void (*init_iops
)(ide_hwif_t
*);
1095 void (*init_hwif
)(ide_hwif_t
*);
1096 void (*init_dma
)(ide_hwif_t
*, unsigned long);
1097 ide_pci_enablebit_t enablebits
[2];
1098 hwif_chipset_t chipset
;
1107 int ide_setup_pci_device(struct pci_dev
*, const struct ide_port_info
*);
1108 int ide_setup_pci_devices(struct pci_dev
*, struct pci_dev
*, const struct ide_port_info
*);
1110 void ide_map_sg(ide_drive_t
*, struct request
*);
1111 void ide_init_sg_cmd(ide_drive_t
*, struct request
*);
1113 #define BAD_DMA_DRIVE 0
1114 #define GOOD_DMA_DRIVE 1
1116 struct drive_list_entry
{
1117 const char *id_model
;
1118 const char *id_firmware
;
1121 int ide_in_drive_list(struct hd_driveid
*, const struct drive_list_entry
*);
1123 #ifdef CONFIG_BLK_DEV_IDEDMA
1124 int __ide_dma_bad_drive(ide_drive_t
*);
1125 int ide_id_dma_bug(ide_drive_t
*);
1127 u8
ide_find_dma_mode(ide_drive_t
*, u8
);
1129 static inline u8
ide_max_dma_mode(ide_drive_t
*drive
)
1131 return ide_find_dma_mode(drive
, XFER_UDMA_6
);
1134 void ide_dma_off_quietly(ide_drive_t
*);
1135 void ide_dma_off(ide_drive_t
*);
1136 void ide_dma_on(ide_drive_t
*);
1137 int ide_set_dma(ide_drive_t
*);
1138 void ide_check_dma_crc(ide_drive_t
*);
1139 ide_startstop_t
ide_dma_intr(ide_drive_t
*);
1141 int ide_build_sglist(ide_drive_t
*, struct request
*);
1142 void ide_destroy_dmatable(ide_drive_t
*);
1144 #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1145 extern int ide_build_dmatable(ide_drive_t
*, struct request
*);
1146 extern int ide_release_dma(ide_hwif_t
*);
1147 extern void ide_setup_dma(ide_hwif_t
*, unsigned long);
1149 void ide_dma_host_set(ide_drive_t
*, int);
1150 extern int ide_dma_setup(ide_drive_t
*);
1151 extern void ide_dma_start(ide_drive_t
*);
1152 extern int __ide_dma_end(ide_drive_t
*);
1153 extern void ide_dma_lost_irq(ide_drive_t
*);
1154 extern void ide_dma_timeout(ide_drive_t
*);
1155 #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1158 static inline int ide_id_dma_bug(ide_drive_t
*drive
) { return 0; }
1159 static inline u8
ide_find_dma_mode(ide_drive_t
*drive
, u8 speed
) { return 0; }
1160 static inline u8
ide_max_dma_mode(ide_drive_t
*drive
) { return 0; }
1161 static inline void ide_dma_off_quietly(ide_drive_t
*drive
) { ; }
1162 static inline void ide_dma_off(ide_drive_t
*drive
) { ; }
1163 static inline void ide_dma_on(ide_drive_t
*drive
) { ; }
1164 static inline void ide_dma_verbose(ide_drive_t
*drive
) { ; }
1165 static inline int ide_set_dma(ide_drive_t
*drive
) { return 1; }
1166 static inline void ide_check_dma_crc(ide_drive_t
*drive
) { ; }
1167 #endif /* CONFIG_BLK_DEV_IDEDMA */
1169 #ifndef CONFIG_BLK_DEV_IDEDMA_SFF
1170 static inline void ide_release_dma(ide_hwif_t
*drive
) {;}
1173 #ifdef CONFIG_BLK_DEV_IDEACPI
1174 extern int ide_acpi_exec_tfs(ide_drive_t
*drive
);
1175 extern void ide_acpi_get_timing(ide_hwif_t
*hwif
);
1176 extern void ide_acpi_push_timing(ide_hwif_t
*hwif
);
1177 extern void ide_acpi_init(ide_hwif_t
*hwif
);
1178 void ide_acpi_port_init_devices(ide_hwif_t
*);
1179 extern void ide_acpi_set_state(ide_hwif_t
*hwif
, int on
);
1181 static inline int ide_acpi_exec_tfs(ide_drive_t
*drive
) { return 0; }
1182 static inline void ide_acpi_get_timing(ide_hwif_t
*hwif
) { ; }
1183 static inline void ide_acpi_push_timing(ide_hwif_t
*hwif
) { ; }
1184 static inline void ide_acpi_init(ide_hwif_t
*hwif
) { ; }
1185 static inline void ide_acpi_port_init_devices(ide_hwif_t
*hwif
) { ; }
1186 static inline void ide_acpi_set_state(ide_hwif_t
*hwif
, int on
) {}
1189 void ide_remove_port_from_hwgroup(ide_hwif_t
*);
1190 extern int ide_hwif_request_regions(ide_hwif_t
*hwif
);
1191 extern void ide_hwif_release_regions(ide_hwif_t
* hwif
);
1192 void ide_unregister(unsigned int, int, int);
1194 void ide_register_region(struct gendisk
*);
1195 void ide_unregister_region(struct gendisk
*);
1197 void ide_undecoded_slave(ide_drive_t
*);
1199 int ide_device_add_all(u8
*idx
, const struct ide_port_info
*);
1200 int ide_device_add(u8 idx
[4], const struct ide_port_info
*);
1201 void ide_port_unregister_devices(ide_hwif_t
*);
1202 void ide_port_scan(ide_hwif_t
*);
1204 static inline void *ide_get_hwifdata (ide_hwif_t
* hwif
)
1206 return hwif
->hwif_data
;
1209 static inline void ide_set_hwifdata (ide_hwif_t
* hwif
, void *data
)
1211 hwif
->hwif_data
= data
;
1214 const char *ide_xfer_verbose(u8 mode
);
1215 extern void ide_toggle_bounce(ide_drive_t
*drive
, int on
);
1216 extern int ide_set_xfer_rate(ide_drive_t
*drive
, u8 rate
);
1218 static inline int ide_dev_has_iordy(struct hd_driveid
*id
)
1220 return ((id
->field_valid
& 2) && (id
->capability
& 8)) ? 1 : 0;
1223 static inline int ide_dev_is_sata(struct hd_driveid
*id
)
1226 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1227 * verifying that word 80 by casting it to a signed type --
1228 * this trick allows us to filter out the reserved values of
1229 * 0x0000 and 0xffff along with the earlier ATA revisions...
1231 if (id
->hw_config
== 0 && (short)id
->major_rev_num
>= 0x0020)
1236 u64
ide_get_lba_addr(struct ide_taskfile
*, int);
1237 u8
ide_dump_status(ide_drive_t
*, const char *, u8
);
1239 typedef struct ide_pio_timings_s
{
1240 int setup_time
; /* Address setup (ns) minimum */
1241 int active_time
; /* Active pulse (ns) minimum */
1242 int cycle_time
; /* Cycle time (ns) minimum = */
1243 /* active + recovery (+ setup for some chips) */
1244 } ide_pio_timings_t
;
1246 unsigned int ide_pio_cycle_time(ide_drive_t
*, u8
);
1247 u8
ide_get_best_pio_mode(ide_drive_t
*, u8
, u8
);
1248 extern const ide_pio_timings_t ide_pio_timings
[6];
1250 int ide_set_pio_mode(ide_drive_t
*, u8
);
1251 int ide_set_dma_mode(ide_drive_t
*, u8
);
1253 void ide_set_pio(ide_drive_t
*, u8
);
1255 static inline void ide_set_max_pio(ide_drive_t
*drive
)
1257 ide_set_pio(drive
, 255);
1260 extern spinlock_t ide_lock
;
1261 extern struct mutex ide_cfg_mtx
;
1263 * Structure locking:
1265 * ide_cfg_mtx and ide_lock together protect changes to
1266 * ide_hwif_t->{next,hwgroup}
1269 * ide_hwgroup_t->busy: ide_lock
1270 * ide_hwgroup_t->hwif: ide_lock
1271 * ide_hwif_t->mate: constant, no locking
1272 * ide_drive_t->hwif: constant, no locking
1275 #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1277 extern struct bus_type ide_bus_type
;
1279 /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1280 #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1282 /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1283 #define ide_id_has_flush_cache_ext(id) \
1284 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1286 static inline void ide_dump_identify(u8
*id
)
1288 print_hex_dump(KERN_INFO
, "", DUMP_PREFIX_NONE
, 16, 2, id
, 512, 0);
1291 static inline int hwif_to_node(ide_hwif_t
*hwif
)
1293 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
1294 return hwif
->dev
? pcibus_to_node(dev
->bus
) : -1;
1297 static inline ide_drive_t
*ide_get_paired_drive(ide_drive_t
*drive
)
1299 ide_hwif_t
*hwif
= HWIF(drive
);
1301 return &hwif
->drives
[(drive
->dn
^ 1) & 1];
1304 static inline void ide_set_irq(ide_drive_t
*drive
, int on
)
1306 drive
->hwif
->OUTB(drive
->ctl
| (on
? 0 : 2), IDE_CONTROL_REG
);
1309 static inline u8
ide_read_status(ide_drive_t
*drive
)
1311 ide_hwif_t
*hwif
= drive
->hwif
;
1313 return hwif
->INB(hwif
->io_ports
[IDE_STATUS_OFFSET
]);
1316 static inline u8
ide_read_altstatus(ide_drive_t
*drive
)
1318 ide_hwif_t
*hwif
= drive
->hwif
;
1320 return hwif
->INB(hwif
->io_ports
[IDE_CONTROL_OFFSET
]);
1323 static inline u8
ide_read_error(ide_drive_t
*drive
)
1325 ide_hwif_t
*hwif
= drive
->hwif
;
1327 return hwif
->INB(hwif
->io_ports
[IDE_ERROR_OFFSET
]);