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ide: remove write-only ->sata_misc[] from ide_hwif_t
[deliverable/linux.git] / include / linux / ide.h
1 #ifndef _IDE_H
2 #define _IDE_H
3 /*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
9 #include <linux/init.h>
10 #include <linux/ioport.h>
11 #include <linux/hdreg.h>
12 #include <linux/blkdev.h>
13 #include <linux/proc_fs.h>
14 #include <linux/interrupt.h>
15 #include <linux/bitops.h>
16 #include <linux/bio.h>
17 #include <linux/device.h>
18 #include <linux/pci.h>
19 #include <linux/completion.h>
20 #ifdef CONFIG_BLK_DEV_IDEACPI
21 #include <acpi/acpi.h>
22 #endif
23 #include <asm/byteorder.h>
24 #include <asm/system.h>
25 #include <asm/io.h>
26 #include <asm/semaphore.h>
27 #include <asm/mutex.h>
28
29 #if defined(CRIS) || defined(FRV)
30 # define SUPPORT_VLB_SYNC 0
31 #else
32 # define SUPPORT_VLB_SYNC 1
33 #endif
34
35 /*
36 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
37 * number.
38 */
39
40 #define IDE_NO_IRQ (-1)
41
42 typedef unsigned char byte; /* used everywhere */
43
44 /*
45 * Probably not wise to fiddle with these
46 */
47 #define ERROR_MAX 8 /* Max read/write errors per sector */
48 #define ERROR_RESET 3 /* Reset controller every 4th retry */
49 #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
50
51 /*
52 * Tune flags
53 */
54 #define IDE_TUNE_NOAUTO 2
55 #define IDE_TUNE_AUTO 1
56 #define IDE_TUNE_DEFAULT 0
57
58 /*
59 * state flags
60 */
61
62 #define DMA_PIO_RETRY 1 /* retrying in PIO */
63
64 #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
65 #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
66
67 /*
68 * Definitions for accessing IDE controller registers
69 */
70 #define IDE_NR_PORTS (10)
71
72 #define IDE_DATA_OFFSET (0)
73 #define IDE_ERROR_OFFSET (1)
74 #define IDE_NSECTOR_OFFSET (2)
75 #define IDE_SECTOR_OFFSET (3)
76 #define IDE_LCYL_OFFSET (4)
77 #define IDE_HCYL_OFFSET (5)
78 #define IDE_SELECT_OFFSET (6)
79 #define IDE_STATUS_OFFSET (7)
80 #define IDE_CONTROL_OFFSET (8)
81 #define IDE_IRQ_OFFSET (9)
82
83 #define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
84 #define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
85
86 #define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
87 #define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
88 #define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
89 #define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
90 #define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
91 #define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
92 #define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
93 #define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
94 #define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
95 #define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
96
97 #define IDE_FEATURE_REG IDE_ERROR_REG
98 #define IDE_COMMAND_REG IDE_STATUS_REG
99 #define IDE_ALTSTATUS_REG IDE_CONTROL_REG
100 #define IDE_IREASON_REG IDE_NSECTOR_REG
101 #define IDE_BCOUNTL_REG IDE_LCYL_REG
102 #define IDE_BCOUNTH_REG IDE_HCYL_REG
103
104 #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
105 #define BAD_R_STAT (BUSY_STAT | ERR_STAT)
106 #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
107 #define BAD_STAT (BAD_R_STAT | DRQ_STAT)
108 #define DRIVE_READY (READY_STAT | SEEK_STAT)
109
110 #define BAD_CRC (ABRT_ERR | ICRC_ERR)
111
112 #define SATA_NR_PORTS (3) /* 16 possible ?? */
113
114 #define SATA_STATUS_OFFSET (0)
115 #define SATA_ERROR_OFFSET (1)
116 #define SATA_CONTROL_OFFSET (2)
117
118 /*
119 * Our Physical Region Descriptor (PRD) table should be large enough
120 * to handle the biggest I/O request we are likely to see. Since requests
121 * can have no more than 256 sectors, and since the typical blocksize is
122 * two or more sectors, we could get by with a limit of 128 entries here for
123 * the usual worst case. Most requests seem to include some contiguous blocks,
124 * further reducing the number of table entries required.
125 *
126 * The driver reverts to PIO mode for individual requests that exceed
127 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
128 * 100% of all crazy scenarios here is not necessary.
129 *
130 * As it turns out though, we must allocate a full 4KB page for this,
131 * so the two PRD tables (ide0 & ide1) will each get half of that,
132 * allowing each to have about 256 entries (8 bytes each) from this.
133 */
134 #define PRD_BYTES 8
135 #define PRD_ENTRIES 256
136
137 /*
138 * Some more useful definitions
139 */
140 #define PARTN_BITS 6 /* number of minor dev bits for partitions */
141 #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
142 #define SECTOR_SIZE 512
143 #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
144 #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
145
146 /*
147 * Timeouts for various operations:
148 */
149 #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
150 #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
151 #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
152 #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
153 #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
154 #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
155
156 /*
157 * Check for an interrupt and acknowledge the interrupt status
158 */
159 struct hwif_s;
160 typedef int (ide_ack_intr_t)(struct hwif_s *);
161
162 /*
163 * hwif_chipset_t is used to keep track of the specific hardware
164 * chipset used by each IDE interface, if known.
165 */
166 enum { ide_unknown, ide_generic, ide_pci,
167 ide_cmd640, ide_dtc2278, ide_ali14xx,
168 ide_qd65xx, ide_umc8672, ide_ht6560b,
169 ide_rz1000, ide_trm290,
170 ide_cmd646, ide_cy82c693, ide_4drives,
171 ide_pmac, ide_etrax100, ide_acorn,
172 ide_au1xxx, ide_palm3710, ide_forced
173 };
174
175 typedef u8 hwif_chipset_t;
176
177 /*
178 * Structure to hold all information about the location of this port
179 */
180 typedef struct hw_regs_s {
181 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
182 int irq; /* our irq number */
183 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
184 hwif_chipset_t chipset;
185 struct device *dev;
186 } hw_regs_t;
187
188 struct hwif_s * ide_find_port(unsigned long);
189 struct hwif_s *ide_deprecated_find_port(unsigned long);
190 void ide_init_port_data(struct hwif_s *, unsigned int);
191 void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
192
193 struct ide_drive_s;
194 int ide_register_hw(hw_regs_t *, void (*)(struct ide_drive_s *),
195 struct hwif_s **);
196
197 void ide_setup_ports( hw_regs_t *hw,
198 unsigned long base,
199 int *offsets,
200 unsigned long ctrl,
201 unsigned long intr,
202 ide_ack_intr_t *ack_intr,
203 #if 0
204 ide_io_ops_t *iops,
205 #endif
206 int irq);
207
208 static inline void ide_std_init_ports(hw_regs_t *hw,
209 unsigned long io_addr,
210 unsigned long ctl_addr)
211 {
212 unsigned int i;
213
214 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
215 hw->io_ports[i] = io_addr++;
216
217 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
218 }
219
220 #include <asm/ide.h>
221
222 #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
223 #undef MAX_HWIFS
224 #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
225 #endif
226
227 /* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
228 #ifndef IDE_ARCH_OBSOLETE_DEFAULTS
229 # define ide_default_io_base(index) (0)
230 # define ide_default_irq(base) (0)
231 # define ide_init_default_irq(base) (0)
232 #endif
233
234 #ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
235 static inline void ide_init_hwif_ports(hw_regs_t *hw,
236 unsigned long io_addr,
237 unsigned long ctl_addr,
238 int *irq)
239 {
240 if (!ctl_addr)
241 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
242 else
243 ide_std_init_ports(hw, io_addr, ctl_addr);
244
245 if (irq)
246 *irq = 0;
247
248 hw->io_ports[IDE_IRQ_OFFSET] = 0;
249
250 #ifdef CONFIG_PPC32
251 if (ppc_ide_md.ide_init_hwif)
252 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
253 #endif
254 }
255 #else
256 static inline void ide_init_hwif_ports(hw_regs_t *hw,
257 unsigned long io_addr,
258 unsigned long ctl_addr,
259 int *irq)
260 {
261 if (io_addr || ctl_addr)
262 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
263 }
264 #endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
265
266 /* Currently only m68k, apus and m8xx need it */
267 #ifndef IDE_ARCH_ACK_INTR
268 # define ide_ack_intr(hwif) (1)
269 #endif
270
271 /* Currently only Atari needs it */
272 #ifndef IDE_ARCH_LOCK
273 # define ide_release_lock() do {} while (0)
274 # define ide_get_lock(hdlr, data) do {} while (0)
275 #endif /* IDE_ARCH_LOCK */
276
277 /*
278 * Now for the data we need to maintain per-drive: ide_drive_t
279 */
280
281 #define ide_scsi 0x21
282 #define ide_disk 0x20
283 #define ide_optical 0x7
284 #define ide_cdrom 0x5
285 #define ide_tape 0x1
286 #define ide_floppy 0x0
287
288 /*
289 * Special Driver Flags
290 *
291 * set_geometry : respecify drive geometry
292 * recalibrate : seek to cyl 0
293 * set_multmode : set multmode count
294 * set_tune : tune interface for drive
295 * serviced : service command
296 * reserved : unused
297 */
298 typedef union {
299 unsigned all : 8;
300 struct {
301 unsigned set_geometry : 1;
302 unsigned recalibrate : 1;
303 unsigned set_multmode : 1;
304 unsigned set_tune : 1;
305 unsigned serviced : 1;
306 unsigned reserved : 3;
307 } b;
308 } special_t;
309
310 /*
311 * ATA-IDE Select Register, aka Device-Head
312 *
313 * head : always zeros here
314 * unit : drive select number: 0/1
315 * bit5 : always 1
316 * lba : using LBA instead of CHS
317 * bit7 : always 1
318 */
319 typedef union {
320 unsigned all : 8;
321 struct {
322 #if defined(__LITTLE_ENDIAN_BITFIELD)
323 unsigned head : 4;
324 unsigned unit : 1;
325 unsigned bit5 : 1;
326 unsigned lba : 1;
327 unsigned bit7 : 1;
328 #elif defined(__BIG_ENDIAN_BITFIELD)
329 unsigned bit7 : 1;
330 unsigned lba : 1;
331 unsigned bit5 : 1;
332 unsigned unit : 1;
333 unsigned head : 4;
334 #else
335 #error "Please fix <asm/byteorder.h>"
336 #endif
337 } b;
338 } select_t, ata_select_t;
339
340 /*
341 * Status returned from various ide_ functions
342 */
343 typedef enum {
344 ide_stopped, /* no drive operation was started */
345 ide_started, /* a drive operation was started, handler was set */
346 } ide_startstop_t;
347
348 struct ide_driver_s;
349 struct ide_settings_s;
350
351 #ifdef CONFIG_BLK_DEV_IDEACPI
352 struct ide_acpi_drive_link;
353 struct ide_acpi_hwif_link;
354 #endif
355
356 typedef struct ide_drive_s {
357 char name[4]; /* drive name, such as "hda" */
358 char driver_req[10]; /* requests specific driver */
359
360 struct request_queue *queue; /* request queue */
361
362 struct request *rq; /* current request */
363 struct ide_drive_s *next; /* circular list of hwgroup drives */
364 void *driver_data; /* extra driver data */
365 struct hd_driveid *id; /* drive model identification info */
366 #ifdef CONFIG_IDE_PROC_FS
367 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
368 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
369 #endif
370 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
371
372 unsigned long sleep; /* sleep until this time */
373 unsigned long service_start; /* time we started last request */
374 unsigned long service_time; /* service time of last request */
375 unsigned long timeout; /* max time to wait for irq */
376
377 special_t special; /* special action flags */
378 select_t select; /* basic drive/head select reg value */
379
380 u8 keep_settings; /* restore settings after drive reset */
381 u8 using_dma; /* disk is using dma for read/write */
382 u8 retry_pio; /* retrying dma capable host in pio */
383 u8 state; /* retry state */
384 u8 waiting_for_dma; /* dma currently in progress */
385 u8 unmask; /* okay to unmask other irqs */
386 u8 noflush; /* don't attempt flushes */
387 u8 dsc_overlap; /* DSC overlap */
388 u8 nice1; /* give potential excess bandwidth */
389
390 unsigned present : 1; /* drive is physically present */
391 unsigned dead : 1; /* device ejected hint */
392 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
393 unsigned noprobe : 1; /* from: hdx=noprobe */
394 unsigned removable : 1; /* 1 if need to do check_media_change */
395 unsigned attach : 1; /* needed for removable devices */
396 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
397 unsigned no_unmask : 1; /* disallow setting unmask bit */
398 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
399 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
400 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
401 unsigned nodma : 1; /* disallow DMA */
402 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
403 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
404 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
405 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
406 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
407 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
408 unsigned post_reset : 1;
409 unsigned udma33_warned : 1;
410
411 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
412 u8 quirk_list; /* considered quirky, set for a specific host */
413 u8 init_speed; /* transfer rate set at boot */
414 u8 current_speed; /* current transfer rate set */
415 u8 desired_speed; /* desired transfer rate set */
416 u8 dn; /* now wide spread use */
417 u8 wcache; /* status of write cache */
418 u8 acoustic; /* acoustic management */
419 u8 media; /* disk, cdrom, tape, floppy, ... */
420 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
421 u8 ready_stat; /* min status value for drive ready */
422 u8 mult_count; /* current multiple sector setting */
423 u8 mult_req; /* requested multiple sector setting */
424 u8 tune_req; /* requested drive tuning setting */
425 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
426 u8 bad_wstat; /* used for ignoring WRERR_STAT */
427 u8 nowerr; /* used for ignoring WRERR_STAT */
428 u8 sect0; /* offset of first sector for DM6:DDO */
429 u8 head; /* "real" number of heads */
430 u8 sect; /* "real" sectors per track */
431 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
432 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
433
434 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
435 unsigned int cyl; /* "real" number of cyls */
436 unsigned int drive_data; /* used by set_pio_mode/selectproc */
437 unsigned int failures; /* current failure count */
438 unsigned int max_failures; /* maximum allowed failure count */
439 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
440
441 u64 capacity64; /* total number of sectors */
442
443 int lun; /* logical unit */
444 int crc_count; /* crc counter to reduce drive speed */
445 #ifdef CONFIG_BLK_DEV_IDEACPI
446 struct ide_acpi_drive_link *acpidata;
447 #endif
448 struct list_head list;
449 struct device gendev;
450 struct completion gendev_rel_comp; /* to deal with device release() */
451 } ide_drive_t;
452
453 #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
454
455 #define IDE_CHIPSET_PCI_MASK \
456 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
457 #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
458
459 struct ide_port_info;
460
461 typedef struct hwif_s {
462 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
463 struct hwif_s *mate; /* other hwif from same PCI chip */
464 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
465 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
466
467 char name[6]; /* name of interface, eg. "ide0" */
468
469 /* task file registers for pata and sata */
470 unsigned long io_ports[IDE_NR_PORTS];
471 unsigned long sata_scr[SATA_NR_PORTS];
472
473 ide_drive_t drives[MAX_DRIVES]; /* drive info */
474
475 u8 major; /* our major number */
476 u8 index; /* 0 for ide0; 1 for ide1; ... */
477 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
478 u8 bus_state; /* power state of the IDE bus */
479
480 u32 host_flags;
481
482 u8 pio_mask;
483
484 u8 ultra_mask;
485 u8 mwdma_mask;
486 u8 swdma_mask;
487
488 u8 cbl; /* cable type */
489
490 hwif_chipset_t chipset; /* sub-module for tuning.. */
491
492 struct device *dev;
493
494 const struct ide_port_info *cds; /* chipset device struct */
495
496 ide_ack_intr_t *ack_intr;
497
498 void (*rw_disk)(ide_drive_t *, struct request *);
499
500 #if 0
501 ide_hwif_ops_t *hwifops;
502 #else
503 /* host specific initialization of devices on a port */
504 void (*port_init_devs)(struct hwif_s *);
505 /* routine to program host for PIO mode */
506 void (*set_pio_mode)(ide_drive_t *, const u8);
507 /* routine to program host for DMA mode */
508 void (*set_dma_mode)(ide_drive_t *, const u8);
509 /* tweaks hardware to select drive */
510 void (*selectproc)(ide_drive_t *);
511 /* chipset polling based on hba specifics */
512 int (*reset_poll)(ide_drive_t *);
513 /* chipset specific changes to default for device-hba resets */
514 void (*pre_reset)(ide_drive_t *);
515 /* routine to reset controller after a disk reset */
516 void (*resetproc)(ide_drive_t *);
517 /* special host masking for drive selection */
518 void (*maskproc)(ide_drive_t *, int);
519 /* check host's drive quirk list */
520 void (*quirkproc)(ide_drive_t *);
521 /* driver soft-power interface */
522 int (*busproc)(ide_drive_t *, int);
523 #endif
524 u8 (*mdma_filter)(ide_drive_t *);
525 u8 (*udma_filter)(ide_drive_t *);
526
527 u8 (*cable_detect)(struct hwif_s *);
528
529 void (*ata_input_data)(ide_drive_t *, void *, u32);
530 void (*ata_output_data)(ide_drive_t *, void *, u32);
531
532 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
533 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
534
535 void (*dma_host_set)(ide_drive_t *, int);
536 int (*dma_setup)(ide_drive_t *);
537 void (*dma_exec_cmd)(ide_drive_t *, u8);
538 void (*dma_start)(ide_drive_t *);
539 int (*ide_dma_end)(ide_drive_t *drive);
540 int (*ide_dma_test_irq)(ide_drive_t *drive);
541 void (*ide_dma_clear_irq)(ide_drive_t *drive);
542 void (*dma_lost_irq)(ide_drive_t *drive);
543 void (*dma_timeout)(ide_drive_t *drive);
544
545 void (*OUTB)(u8 addr, unsigned long port);
546 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
547 void (*OUTW)(u16 addr, unsigned long port);
548 void (*OUTSW)(unsigned long port, void *addr, u32 count);
549 void (*OUTSL)(unsigned long port, void *addr, u32 count);
550
551 u8 (*INB)(unsigned long port);
552 u16 (*INW)(unsigned long port);
553 void (*INSW)(unsigned long port, void *addr, u32 count);
554 void (*INSL)(unsigned long port, void *addr, u32 count);
555
556 /* dma physical region descriptor table (cpu view) */
557 unsigned int *dmatable_cpu;
558 /* dma physical region descriptor table (dma view) */
559 dma_addr_t dmatable_dma;
560 /* Scatter-gather list used to build the above */
561 struct scatterlist *sg_table;
562 int sg_max_nents; /* Maximum number of entries in it */
563 int sg_nents; /* Current number of entries in it */
564 int sg_dma_direction; /* dma transfer direction */
565
566 /* data phase of the active command (currently only valid for PIO/DMA) */
567 int data_phase;
568
569 unsigned int nsect;
570 unsigned int nleft;
571 struct scatterlist *cursg;
572 unsigned int cursg_ofs;
573
574 int rqsize; /* max sectors per request */
575 int irq; /* our irq number */
576
577 unsigned long dma_base; /* base addr for dma ports */
578 unsigned long dma_command; /* dma command register */
579 unsigned long dma_vendor1; /* dma vendor 1 register */
580 unsigned long dma_status; /* dma status register */
581 unsigned long dma_vendor3; /* dma vendor 3 register */
582 unsigned long dma_prdtable; /* actual prd table address */
583
584 unsigned long config_data; /* for use by chipset-specific code */
585 unsigned long select_data; /* for use by chipset-specific code */
586
587 unsigned long extra_base; /* extra addr for dma ports */
588 unsigned extra_ports; /* number of extra dma ports */
589
590 unsigned noprobe : 1; /* don't probe for this interface */
591 unsigned present : 1; /* this interface exists */
592 unsigned hold : 1; /* this interface is always present */
593 unsigned serialized : 1; /* serialized all channel operation */
594 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
595 unsigned reset : 1; /* reset after probe */
596 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
597 unsigned mmio : 1; /* host uses MMIO */
598 unsigned straight8 : 1; /* Alan's straight 8 check */
599
600 struct device gendev;
601 struct completion gendev_rel_comp; /* To deal with device release() */
602
603 void *hwif_data; /* extra hwif data */
604
605 unsigned dma;
606
607 #ifdef CONFIG_BLK_DEV_IDEACPI
608 struct ide_acpi_hwif_link *acpidata;
609 #endif
610 } ____cacheline_internodealigned_in_smp ide_hwif_t;
611
612 /*
613 * internal ide interrupt handler type
614 */
615 typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
616 typedef int (ide_expiry_t)(ide_drive_t *);
617
618 /* used by ide-cd, ide-floppy, etc. */
619 typedef void (xfer_func_t)(ide_drive_t *, void *, u32);
620
621 typedef struct hwgroup_s {
622 /* irq handler, if active */
623 ide_startstop_t (*handler)(ide_drive_t *);
624
625 /* BOOL: protects all fields below */
626 volatile int busy;
627 /* BOOL: wake us up on timer expiry */
628 unsigned int sleeping : 1;
629 /* BOOL: polling active & poll_timeout field valid */
630 unsigned int polling : 1;
631 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
632 unsigned int resetting : 1;
633
634 /* current drive */
635 ide_drive_t *drive;
636 /* ptr to current hwif in linked-list */
637 ide_hwif_t *hwif;
638
639 /* current request */
640 struct request *rq;
641
642 /* failsafe timer */
643 struct timer_list timer;
644 /* timeout value during long polls */
645 unsigned long poll_timeout;
646 /* queried upon timeouts */
647 int (*expiry)(ide_drive_t *);
648
649 int req_gen;
650 int req_gen_timer;
651 } ide_hwgroup_t;
652
653 typedef struct ide_driver_s ide_driver_t;
654
655 extern struct mutex ide_setting_mtx;
656
657 int set_io_32bit(ide_drive_t *, int);
658 int set_pio_mode(ide_drive_t *, int);
659 int set_using_dma(ide_drive_t *, int);
660
661 #ifdef CONFIG_IDE_PROC_FS
662 /*
663 * configurable drive settings
664 */
665
666 #define TYPE_INT 0
667 #define TYPE_BYTE 1
668 #define TYPE_SHORT 2
669
670 #define SETTING_READ (1 << 0)
671 #define SETTING_WRITE (1 << 1)
672 #define SETTING_RW (SETTING_READ | SETTING_WRITE)
673
674 typedef int (ide_procset_t)(ide_drive_t *, int);
675 typedef struct ide_settings_s {
676 char *name;
677 int rw;
678 int data_type;
679 int min;
680 int max;
681 int mul_factor;
682 int div_factor;
683 void *data;
684 ide_procset_t *set;
685 int auto_remove;
686 struct ide_settings_s *next;
687 } ide_settings_t;
688
689 int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
690
691 /*
692 * /proc/ide interface
693 */
694 typedef struct {
695 const char *name;
696 mode_t mode;
697 read_proc_t *read_proc;
698 write_proc_t *write_proc;
699 } ide_proc_entry_t;
700
701 void proc_ide_create(void);
702 void proc_ide_destroy(void);
703 void ide_proc_register_port(ide_hwif_t *);
704 void ide_proc_port_register_devices(ide_hwif_t *);
705 void ide_proc_unregister_port(ide_hwif_t *);
706 void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
707 void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
708
709 void ide_add_generic_settings(ide_drive_t *);
710
711 read_proc_t proc_ide_read_capacity;
712 read_proc_t proc_ide_read_geometry;
713
714 #ifdef CONFIG_BLK_DEV_IDEPCI
715 void ide_pci_create_host_proc(const char *, get_info_t *);
716 #endif
717
718 /*
719 * Standard exit stuff:
720 */
721 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
722 { \
723 len -= off; \
724 if (len < count) { \
725 *eof = 1; \
726 if (len <= 0) \
727 return 0; \
728 } else \
729 len = count; \
730 *start = page + off; \
731 return len; \
732 }
733 #else
734 static inline void proc_ide_create(void) { ; }
735 static inline void proc_ide_destroy(void) { ; }
736 static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
737 static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
738 static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
739 static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
740 static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
741 static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
742 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
743 #endif
744
745 /*
746 * Power Management step value (rq->pm->pm_step).
747 *
748 * The step value starts at 0 (ide_pm_state_start_suspend) for a
749 * suspend operation or 1000 (ide_pm_state_start_resume) for a
750 * resume operation.
751 *
752 * For each step, the core calls the subdriver start_power_step() first.
753 * This can return:
754 * - ide_stopped : In this case, the core calls us back again unless
755 * step have been set to ide_power_state_completed.
756 * - ide_started : In this case, the channel is left busy until an
757 * async event (interrupt) occurs.
758 * Typically, start_power_step() will issue a taskfile request with
759 * do_rw_taskfile().
760 *
761 * Upon reception of the interrupt, the core will call complete_power_step()
762 * with the error code if any. This routine should update the step value
763 * and return. It should not start a new request. The core will call
764 * start_power_step for the new step value, unless step have been set to
765 * ide_power_state_completed.
766 *
767 * Subdrivers are expected to define their own additional power
768 * steps from 1..999 for suspend and from 1001..1999 for resume,
769 * other values are reserved for future use.
770 */
771
772 enum {
773 ide_pm_state_completed = -1,
774 ide_pm_state_start_suspend = 0,
775 ide_pm_state_start_resume = 1000,
776 };
777
778 /*
779 * Subdrivers support.
780 *
781 * The gendriver.owner field should be set to the module owner of this driver.
782 * The gendriver.name field should be set to the name of this driver
783 */
784 struct ide_driver_s {
785 const char *version;
786 u8 media;
787 unsigned supports_dsc_overlap : 1;
788 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
789 int (*end_request)(ide_drive_t *, int, int);
790 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
791 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
792 struct device_driver gen_driver;
793 int (*probe)(ide_drive_t *);
794 void (*remove)(ide_drive_t *);
795 void (*resume)(ide_drive_t *);
796 void (*shutdown)(ide_drive_t *);
797 #ifdef CONFIG_IDE_PROC_FS
798 ide_proc_entry_t *proc;
799 #endif
800 };
801
802 #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
803
804 int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
805
806 /*
807 * ide_hwifs[] is the master data structure used to keep track
808 * of just about everything in ide.c. Whenever possible, routines
809 * should be using pointers to a drive (ide_drive_t *) or
810 * pointers to a hwif (ide_hwif_t *), rather than indexing this
811 * structure directly (the allocation/layout may change!).
812 *
813 */
814 #ifndef _IDE_C
815 extern ide_hwif_t ide_hwifs[]; /* master data repository */
816 #endif
817 extern int noautodma;
818
819 extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
820 int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
821 int uptodate, int nr_sectors);
822
823 extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
824
825 void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
826 ide_expiry_t *);
827
828 ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
829
830 ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
831
832 ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
833
834 extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
835
836 extern void ide_fix_driveid(struct hd_driveid *);
837
838 extern void ide_fixstring(u8 *, const int, const int);
839
840 int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
841
842 extern ide_startstop_t ide_do_reset (ide_drive_t *);
843
844 extern void ide_init_drive_cmd (struct request *rq);
845
846 /*
847 * "action" parameter type for ide_do_drive_cmd() below.
848 */
849 typedef enum {
850 ide_wait, /* insert rq at end of list, and wait for it */
851 ide_preempt, /* insert rq in front of current request */
852 ide_head_wait, /* insert rq in front of current request and wait for it */
853 ide_end /* insert rq at end of list, but don't wait for it */
854 } ide_action_t;
855
856 extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
857
858 extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
859
860 enum {
861 IDE_TFLAG_LBA48 = (1 << 0),
862 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
863 IDE_TFLAG_FLAGGED = (1 << 2),
864 IDE_TFLAG_OUT_DATA = (1 << 3),
865 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
866 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
867 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
868 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
869 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
870 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
871 IDE_TFLAG_OUT_HOB_NSECT |
872 IDE_TFLAG_OUT_HOB_LBAL |
873 IDE_TFLAG_OUT_HOB_LBAM |
874 IDE_TFLAG_OUT_HOB_LBAH,
875 IDE_TFLAG_OUT_FEATURE = (1 << 9),
876 IDE_TFLAG_OUT_NSECT = (1 << 10),
877 IDE_TFLAG_OUT_LBAL = (1 << 11),
878 IDE_TFLAG_OUT_LBAM = (1 << 12),
879 IDE_TFLAG_OUT_LBAH = (1 << 13),
880 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
881 IDE_TFLAG_OUT_NSECT |
882 IDE_TFLAG_OUT_LBAL |
883 IDE_TFLAG_OUT_LBAM |
884 IDE_TFLAG_OUT_LBAH,
885 IDE_TFLAG_OUT_DEVICE = (1 << 14),
886 IDE_TFLAG_WRITE = (1 << 15),
887 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
888 IDE_TFLAG_IN_DATA = (1 << 17),
889 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
890 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
891 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
892 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
893 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
894 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
895 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
896 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
897 IDE_TFLAG_IN_HOB_LBAM |
898 IDE_TFLAG_IN_HOB_LBAH,
899 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
900 IDE_TFLAG_IN_HOB_NSECT |
901 IDE_TFLAG_IN_HOB_LBA,
902 IDE_TFLAG_IN_NSECT = (1 << 25),
903 IDE_TFLAG_IN_LBAL = (1 << 26),
904 IDE_TFLAG_IN_LBAM = (1 << 27),
905 IDE_TFLAG_IN_LBAH = (1 << 28),
906 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
907 IDE_TFLAG_IN_LBAM |
908 IDE_TFLAG_IN_LBAH,
909 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
910 IDE_TFLAG_IN_LBA,
911 IDE_TFLAG_IN_DEVICE = (1 << 29),
912 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
913 IDE_TFLAG_IN_HOB,
914 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
915 IDE_TFLAG_IN_TF,
916 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
917 IDE_TFLAG_IN_DEVICE,
918 /* force 16-bit I/O operations */
919 IDE_TFLAG_IO_16BIT = (1 << 30),
920 };
921
922 struct ide_taskfile {
923 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
924
925 u8 hob_feature; /* 1-5: additional data to support LBA48 */
926 u8 hob_nsect;
927 u8 hob_lbal;
928 u8 hob_lbam;
929 u8 hob_lbah;
930
931 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
932
933 union { /*  7: */
934 u8 error; /* read: error */
935 u8 feature; /* write: feature */
936 };
937
938 u8 nsect; /* 8: number of sectors */
939 u8 lbal; /* 9: LBA low */
940 u8 lbam; /* 10: LBA mid */
941 u8 lbah; /* 11: LBA high */
942
943 u8 device; /* 12: device select */
944
945 union { /* 13: */
946 u8 status; /*  read: status  */
947 u8 command; /* write: command */
948 };
949 };
950
951 typedef struct ide_task_s {
952 union {
953 struct ide_taskfile tf;
954 u8 tf_array[14];
955 };
956 u32 tf_flags;
957 int data_phase;
958 struct request *rq; /* copy of request */
959 void *special; /* valid_t generally */
960 } ide_task_t;
961
962 void ide_tf_load(ide_drive_t *, ide_task_t *);
963 void ide_tf_read(ide_drive_t *, ide_task_t *);
964
965 extern void SELECT_DRIVE(ide_drive_t *);
966 extern void SELECT_MASK(ide_drive_t *, int);
967
968 extern int drive_is_ready(ide_drive_t *);
969
970 void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
971
972 ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
973
974 void task_end_request(ide_drive_t *, struct request *, u8);
975
976 int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
977 int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
978
979 int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
980 int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
981 int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
982
983 extern int system_bus_clock(void);
984
985 extern int ide_driveid_update(ide_drive_t *);
986 extern int ide_config_drive_speed(ide_drive_t *, u8);
987 extern u8 eighty_ninty_three (ide_drive_t *);
988 extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
989
990 extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
991
992 extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
993
994 extern int ide_spin_wait_hwgroup(ide_drive_t *);
995 extern void ide_timer_expiry(unsigned long);
996 extern irqreturn_t ide_intr(int irq, void *dev_id);
997 extern void do_ide_request(struct request_queue *);
998
999 void ide_init_disk(struct gendisk *, ide_drive_t *);
1000
1001 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1002 extern int ide_scan_direction;
1003 extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1004 #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
1005 #else
1006 #define ide_pci_register_driver(d) pci_register_driver(d)
1007 #endif
1008
1009 void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1010 void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1011
1012 /* FIXME: palm_bk3710 uses BLK_DEV_IDEDMA_PCI without BLK_DEV_IDEPCI! */
1013 #if defined(CONFIG_BLK_DEV_IDEPCI) && defined(CONFIG_BLK_DEV_IDEDMA_PCI)
1014 void ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
1015 #else
1016 static inline void ide_hwif_setup_dma(ide_hwif_t *hwif,
1017 const struct ide_port_info *d) { }
1018 #endif
1019
1020 extern void default_hwif_iops(ide_hwif_t *);
1021 extern void default_hwif_mmiops(ide_hwif_t *);
1022 extern void default_hwif_transport(ide_hwif_t *);
1023
1024 typedef struct ide_pci_enablebit_s {
1025 u8 reg; /* byte pci reg holding the enable-bit */
1026 u8 mask; /* mask to isolate the enable-bit */
1027 u8 val; /* value of masked reg when "enabled" */
1028 } ide_pci_enablebit_t;
1029
1030 enum {
1031 /* Uses ISA control ports not PCI ones. */
1032 IDE_HFLAG_ISA_PORTS = (1 << 0),
1033 /* single port device */
1034 IDE_HFLAG_SINGLE = (1 << 1),
1035 /* don't use legacy PIO blacklist */
1036 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1037 /* don't use conservative PIO "downgrade" */
1038 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
1039 /* use PIO8/9 for prefetch off/on */
1040 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1041 /* use PIO6/7 for fast-devsel off/on */
1042 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1043 /* use 100-102 and 200-202 PIO values to set DMA modes */
1044 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
1045 /*
1046 * keep DMA setting when programming PIO mode, may be used only
1047 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1048 */
1049 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
1050 /* program host for the transfer mode after programming device */
1051 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1052 /* don't program host/device for the transfer mode ("smart" hosts) */
1053 IDE_HFLAG_NO_SET_MODE = (1 << 9),
1054 /* trust BIOS for programming chipset/device for DMA */
1055 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1056 /* host uses VDMA (tied with IDE_HFLAG_CS5520 for now) */
1057 IDE_HFLAG_VDMA = (1 << 11),
1058 /* ATAPI DMA is unsupported */
1059 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
1060 /* set if host is a "bootable" controller */
1061 IDE_HFLAG_BOOTABLE = (1 << 13),
1062 /* host doesn't support DMA */
1063 IDE_HFLAG_NO_DMA = (1 << 14),
1064 /* check if host is PCI IDE device before allowing DMA */
1065 IDE_HFLAG_NO_AUTODMA = (1 << 15),
1066 /* don't autotune PIO */
1067 IDE_HFLAG_NO_AUTOTUNE = (1 << 16),
1068 /* host is CS5510/CS5520 */
1069 IDE_HFLAG_CS5520 = IDE_HFLAG_VDMA,
1070 /* no LBA48 */
1071 IDE_HFLAG_NO_LBA48 = (1 << 17),
1072 /* no LBA48 DMA */
1073 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
1074 /* data FIFO is cleared by an error */
1075 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1076 /* serialize ports */
1077 IDE_HFLAG_SERIALIZE = (1 << 20),
1078 /* use legacy IRQs */
1079 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
1080 /* force use of legacy IRQs */
1081 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
1082 /* limit LBA48 requests to 256 sectors */
1083 IDE_HFLAG_RQSIZE_256 = (1 << 23),
1084 /* use 32-bit I/O ops */
1085 IDE_HFLAG_IO_32BIT = (1 << 24),
1086 /* unmask IRQs */
1087 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1088 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
1089 /* host is CY82C693 */
1090 IDE_HFLAG_CY82C693 = (1 << 27),
1091 /* force host out of "simplex" mode */
1092 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
1093 /* DSC overlap is unsupported */
1094 IDE_HFLAG_NO_DSC = (1 << 29),
1095 /* never use 32-bit I/O ops */
1096 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1097 /* never unmask IRQs */
1098 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1099 };
1100
1101 #ifdef CONFIG_BLK_DEV_OFFBOARD
1102 # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1103 #else
1104 # define IDE_HFLAG_OFF_BOARD 0
1105 #endif
1106
1107 struct ide_port_info {
1108 char *name;
1109 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1110 void (*init_iops)(ide_hwif_t *);
1111 void (*init_hwif)(ide_hwif_t *);
1112 void (*init_dma)(ide_hwif_t *, unsigned long);
1113 ide_pci_enablebit_t enablebits[2];
1114 hwif_chipset_t chipset;
1115 u8 extra;
1116 u32 host_flags;
1117 u8 pio_mask;
1118 u8 swdma_mask;
1119 u8 mwdma_mask;
1120 u8 udma_mask;
1121 };
1122
1123 int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1124 int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1125
1126 void ide_map_sg(ide_drive_t *, struct request *);
1127 void ide_init_sg_cmd(ide_drive_t *, struct request *);
1128
1129 #define BAD_DMA_DRIVE 0
1130 #define GOOD_DMA_DRIVE 1
1131
1132 struct drive_list_entry {
1133 const char *id_model;
1134 const char *id_firmware;
1135 };
1136
1137 int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
1138
1139 #ifdef CONFIG_BLK_DEV_IDEDMA
1140 int __ide_dma_bad_drive(ide_drive_t *);
1141 int ide_id_dma_bug(ide_drive_t *);
1142
1143 u8 ide_find_dma_mode(ide_drive_t *, u8);
1144
1145 static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1146 {
1147 return ide_find_dma_mode(drive, XFER_UDMA_6);
1148 }
1149
1150 void ide_dma_off_quietly(ide_drive_t *);
1151 void ide_dma_off(ide_drive_t *);
1152 void ide_dma_on(ide_drive_t *);
1153 int ide_set_dma(ide_drive_t *);
1154 void ide_check_dma_crc(ide_drive_t *);
1155 ide_startstop_t ide_dma_intr(ide_drive_t *);
1156
1157 int ide_build_sglist(ide_drive_t *, struct request *);
1158 void ide_destroy_dmatable(ide_drive_t *);
1159
1160 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1161 extern int ide_build_dmatable(ide_drive_t *, struct request *);
1162 extern int ide_release_dma(ide_hwif_t *);
1163 extern void ide_setup_dma(ide_hwif_t *, unsigned long);
1164
1165 void ide_dma_host_set(ide_drive_t *, int);
1166 extern int ide_dma_setup(ide_drive_t *);
1167 extern void ide_dma_start(ide_drive_t *);
1168 extern int __ide_dma_end(ide_drive_t *);
1169 extern void ide_dma_lost_irq(ide_drive_t *);
1170 extern void ide_dma_timeout(ide_drive_t *);
1171 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1172
1173 #else
1174 static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
1175 static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1176 static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1177 static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
1178 static inline void ide_dma_off(ide_drive_t *drive) { ; }
1179 static inline void ide_dma_on(ide_drive_t *drive) { ; }
1180 static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
1181 static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1182 static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1183 #endif /* CONFIG_BLK_DEV_IDEDMA */
1184
1185 #ifndef CONFIG_BLK_DEV_IDEDMA_PCI
1186 static inline void ide_release_dma(ide_hwif_t *drive) {;}
1187 #endif
1188
1189 #ifdef CONFIG_BLK_DEV_IDEACPI
1190 extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1191 extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1192 extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1193 extern void ide_acpi_init(ide_hwif_t *hwif);
1194 void ide_acpi_port_init_devices(ide_hwif_t *);
1195 extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
1196 #else
1197 static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1198 static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1199 static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1200 static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
1201 static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
1202 static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1203 #endif
1204
1205 void ide_remove_port_from_hwgroup(ide_hwif_t *);
1206 extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1207 extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1208 void ide_unregister(unsigned int, int, int);
1209
1210 void ide_register_region(struct gendisk *);
1211 void ide_unregister_region(struct gendisk *);
1212
1213 void ide_undecoded_slave(ide_drive_t *);
1214
1215 int ide_device_add_all(u8 *idx, const struct ide_port_info *);
1216 int ide_device_add(u8 idx[4], const struct ide_port_info *);
1217
1218 static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1219 {
1220 return hwif->hwif_data;
1221 }
1222
1223 static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1224 {
1225 hwif->hwif_data = data;
1226 }
1227
1228 const char *ide_xfer_verbose(u8 mode);
1229 extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1230 extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1231
1232 static inline int ide_dev_has_iordy(struct hd_driveid *id)
1233 {
1234 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1235 }
1236
1237 static inline int ide_dev_is_sata(struct hd_driveid *id)
1238 {
1239 /*
1240 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1241 * verifying that word 80 by casting it to a signed type --
1242 * this trick allows us to filter out the reserved values of
1243 * 0x0000 and 0xffff along with the earlier ATA revisions...
1244 */
1245 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1246 return 1;
1247 return 0;
1248 }
1249
1250 u64 ide_get_lba_addr(struct ide_taskfile *, int);
1251 u8 ide_dump_status(ide_drive_t *, const char *, u8);
1252
1253 typedef struct ide_pio_timings_s {
1254 int setup_time; /* Address setup (ns) minimum */
1255 int active_time; /* Active pulse (ns) minimum */
1256 int cycle_time; /* Cycle time (ns) minimum = */
1257 /* active + recovery (+ setup for some chips) */
1258 } ide_pio_timings_t;
1259
1260 unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
1261 u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1262 extern const ide_pio_timings_t ide_pio_timings[6];
1263
1264 int ide_set_pio_mode(ide_drive_t *, u8);
1265 int ide_set_dma_mode(ide_drive_t *, u8);
1266
1267 void ide_set_pio(ide_drive_t *, u8);
1268
1269 static inline void ide_set_max_pio(ide_drive_t *drive)
1270 {
1271 ide_set_pio(drive, 255);
1272 }
1273
1274 extern spinlock_t ide_lock;
1275 extern struct mutex ide_cfg_mtx;
1276 /*
1277 * Structure locking:
1278 *
1279 * ide_cfg_mtx and ide_lock together protect changes to
1280 * ide_hwif_t->{next,hwgroup}
1281 * ide_drive_t->next
1282 *
1283 * ide_hwgroup_t->busy: ide_lock
1284 * ide_hwgroup_t->hwif: ide_lock
1285 * ide_hwif_t->mate: constant, no locking
1286 * ide_drive_t->hwif: constant, no locking
1287 */
1288
1289 #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1290
1291 extern struct bus_type ide_bus_type;
1292
1293 /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1294 #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1295
1296 /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1297 #define ide_id_has_flush_cache_ext(id) \
1298 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1299
1300 static inline void ide_dump_identify(u8 *id)
1301 {
1302 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1303 }
1304
1305 static inline int hwif_to_node(ide_hwif_t *hwif)
1306 {
1307 struct pci_dev *dev = to_pci_dev(hwif->dev);
1308 return dev ? pcibus_to_node(dev->bus) : -1;
1309 }
1310
1311 static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1312 {
1313 ide_hwif_t *hwif = HWIF(drive);
1314
1315 return &hwif->drives[(drive->dn ^ 1) & 1];
1316 }
1317
1318 static inline void ide_set_irq(ide_drive_t *drive, int on)
1319 {
1320 drive->hwif->OUTB(drive->ctl | (on ? 0 : 2), IDE_CONTROL_REG);
1321 }
1322
1323 #endif /* _IDE_H */
Linux kernel - Deliverables
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