4 * linux/include/linux/ide.h
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
9 #include <linux/init.h>
10 #include <linux/ioport.h>
11 #include <linux/hdreg.h>
12 #include <linux/blkdev.h>
13 #include <linux/proc_fs.h>
14 #include <linux/interrupt.h>
15 #include <linux/bitops.h>
16 #include <linux/bio.h>
17 #include <linux/device.h>
18 #include <linux/pci.h>
19 #include <linux/completion.h>
20 #ifdef CONFIG_BLK_DEV_IDEACPI
21 #include <acpi/acpi.h>
23 #include <asm/byteorder.h>
24 #include <asm/system.h>
26 #include <asm/mutex.h>
28 #if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
29 # define SUPPORT_VLB_SYNC 0
31 # define SUPPORT_VLB_SYNC 1
35 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
39 #define IDE_NO_IRQ (-1)
41 typedef unsigned char byte
; /* used everywhere */
44 * Probably not wise to fiddle with these
46 #define ERROR_MAX 8 /* Max read/write errors per sector */
47 #define ERROR_RESET 3 /* Reset controller every 4th retry */
48 #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
54 #define DMA_PIO_RETRY 1 /* retrying in PIO */
56 #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
57 #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
60 * Definitions for accessing IDE controller registers
62 #define IDE_NR_PORTS (10)
65 unsigned long data_addr
;
68 unsigned long error_addr
; /* read: error */
69 unsigned long feature_addr
; /* write: feature */
72 unsigned long nsect_addr
;
73 unsigned long lbal_addr
;
74 unsigned long lbam_addr
;
75 unsigned long lbah_addr
;
77 unsigned long device_addr
;
80 unsigned long status_addr
; /* read: status */
81 unsigned long command_addr
; /* write: command */
84 unsigned long ctl_addr
;
86 unsigned long irq_addr
;
89 #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
90 #define BAD_R_STAT (BUSY_STAT | ERR_STAT)
91 #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
92 #define BAD_STAT (BAD_R_STAT | DRQ_STAT)
93 #define DRIVE_READY (READY_STAT | SEEK_STAT)
95 #define BAD_CRC (ABRT_ERR | ICRC_ERR)
97 #define SATA_NR_PORTS (3) /* 16 possible ?? */
99 #define SATA_STATUS_OFFSET (0)
100 #define SATA_ERROR_OFFSET (1)
101 #define SATA_CONTROL_OFFSET (2)
104 * Our Physical Region Descriptor (PRD) table should be large enough
105 * to handle the biggest I/O request we are likely to see. Since requests
106 * can have no more than 256 sectors, and since the typical blocksize is
107 * two or more sectors, we could get by with a limit of 128 entries here for
108 * the usual worst case. Most requests seem to include some contiguous blocks,
109 * further reducing the number of table entries required.
111 * The driver reverts to PIO mode for individual requests that exceed
112 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
113 * 100% of all crazy scenarios here is not necessary.
115 * As it turns out though, we must allocate a full 4KB page for this,
116 * so the two PRD tables (ide0 & ide1) will each get half of that,
117 * allowing each to have about 256 entries (8 bytes each) from this.
120 #define PRD_ENTRIES 256
123 * Some more useful definitions
125 #define PARTN_BITS 6 /* number of minor dev bits for partitions */
126 #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
127 #define SECTOR_SIZE 512
128 #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
129 #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
132 * Timeouts for various operations:
134 #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
135 #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
136 #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
137 #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
138 #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
139 #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
142 * Op codes for special requests to be handled by ide_special_rq().
143 * Values should be in the range of 0x20 to 0x3f.
145 #define REQ_DRIVE_RESET 0x20
148 * Check for an interrupt and acknowledge the interrupt status
151 typedef int (ide_ack_intr_t
)(struct hwif_s
*);
154 * hwif_chipset_t is used to keep track of the specific hardware
155 * chipset used by each IDE interface, if known.
157 enum { ide_unknown
, ide_generic
, ide_pci
,
158 ide_cmd640
, ide_dtc2278
, ide_ali14xx
,
159 ide_qd65xx
, ide_umc8672
, ide_ht6560b
,
160 ide_rz1000
, ide_trm290
,
161 ide_cmd646
, ide_cy82c693
, ide_4drives
,
163 ide_au1xxx
, ide_palm3710
166 typedef u8 hwif_chipset_t
;
169 * Structure to hold all information about the location of this port
171 typedef struct hw_regs_s
{
173 struct ide_io_ports io_ports
;
174 unsigned long io_ports_array
[IDE_NR_PORTS
];
177 int irq
; /* our irq number */
178 ide_ack_intr_t
*ack_intr
; /* acknowledge interrupt */
179 hwif_chipset_t chipset
;
180 struct device
*dev
, *parent
;
183 void ide_init_port_data(struct hwif_s
*, unsigned int);
184 void ide_init_port_hw(struct hwif_s
*, hw_regs_t
*);
186 static inline void ide_std_init_ports(hw_regs_t
*hw
,
187 unsigned long io_addr
,
188 unsigned long ctl_addr
)
192 for (i
= 0; i
<= 7; i
++)
193 hw
->io_ports_array
[i
] = io_addr
++;
195 hw
->io_ports
.ctl_addr
= ctl_addr
;
198 /* for IDE PCI controllers in legacy mode, temporary */
199 static inline int __ide_default_irq(unsigned long base
)
203 case 0x1f0: return isa_irq_to_vector(14);
204 case 0x170: return isa_irq_to_vector(15);
206 case 0x1f0: return 14;
207 case 0x170: return 15;
215 #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
217 #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
220 /* Currently only m68k, apus and m8xx need it */
221 #ifndef IDE_ARCH_ACK_INTR
222 # define ide_ack_intr(hwif) (1)
225 /* Currently only Atari needs it */
226 #ifndef IDE_ARCH_LOCK
227 # define ide_release_lock() do {} while (0)
228 # define ide_get_lock(hdlr, data) do {} while (0)
229 #endif /* IDE_ARCH_LOCK */
232 * Now for the data we need to maintain per-drive: ide_drive_t
235 #define ide_scsi 0x21
236 #define ide_disk 0x20
237 #define ide_optical 0x7
238 #define ide_cdrom 0x5
240 #define ide_floppy 0x0
243 * Special Driver Flags
245 * set_geometry : respecify drive geometry
246 * recalibrate : seek to cyl 0
247 * set_multmode : set multmode count
248 * set_tune : tune interface for drive
249 * serviced : service command
255 unsigned set_geometry
: 1;
256 unsigned recalibrate
: 1;
257 unsigned set_multmode
: 1;
258 unsigned set_tune
: 1;
259 unsigned serviced
: 1;
260 unsigned reserved
: 3;
265 * ATA-IDE Select Register, aka Device-Head
267 * head : always zeros here
268 * unit : drive select number: 0/1
270 * lba : using LBA instead of CHS
276 #if defined(__LITTLE_ENDIAN_BITFIELD)
282 #elif defined(__BIG_ENDIAN_BITFIELD)
289 #error "Please fix <asm/byteorder.h>"
292 } select_t
, ata_select_t
;
295 * Status returned from various ide_ functions
298 ide_stopped
, /* no drive operation was started */
299 ide_started
, /* a drive operation was started, handler was set */
303 struct ide_settings_s
;
305 #ifdef CONFIG_BLK_DEV_IDEACPI
306 struct ide_acpi_drive_link
;
307 struct ide_acpi_hwif_link
;
310 typedef struct ide_drive_s
{
311 char name
[4]; /* drive name, such as "hda" */
312 char driver_req
[10]; /* requests specific driver */
314 struct request_queue
*queue
; /* request queue */
316 struct request
*rq
; /* current request */
317 struct ide_drive_s
*next
; /* circular list of hwgroup drives */
318 void *driver_data
; /* extra driver data */
319 struct hd_driveid
*id
; /* drive model identification info */
320 #ifdef CONFIG_IDE_PROC_FS
321 struct proc_dir_entry
*proc
; /* /proc/ide/ directory entry */
322 struct ide_settings_s
*settings
;/* /proc/ide/ drive settings */
324 struct hwif_s
*hwif
; /* actually (ide_hwif_t *) */
326 unsigned long sleep
; /* sleep until this time */
327 unsigned long service_start
; /* time we started last request */
328 unsigned long service_time
; /* service time of last request */
329 unsigned long timeout
; /* max time to wait for irq */
331 special_t special
; /* special action flags */
332 select_t select
; /* basic drive/head select reg value */
334 u8 keep_settings
; /* restore settings after drive reset */
335 u8 using_dma
; /* disk is using dma for read/write */
336 u8 retry_pio
; /* retrying dma capable host in pio */
337 u8 state
; /* retry state */
338 u8 waiting_for_dma
; /* dma currently in progress */
339 u8 unmask
; /* okay to unmask other irqs */
340 u8 noflush
; /* don't attempt flushes */
341 u8 dsc_overlap
; /* DSC overlap */
342 u8 nice1
; /* give potential excess bandwidth */
344 unsigned present
: 1; /* drive is physically present */
345 unsigned dead
: 1; /* device ejected hint */
346 unsigned id_read
: 1; /* 1=id read from disk 0 = synthetic */
347 unsigned noprobe
: 1; /* from: hdx=noprobe */
348 unsigned removable
: 1; /* 1 if need to do check_media_change */
349 unsigned attach
: 1; /* needed for removable devices */
350 unsigned forced_geom
: 1; /* 1 if hdx=c,h,s was given at boot */
351 unsigned no_unmask
: 1; /* disallow setting unmask bit */
352 unsigned no_io_32bit
: 1; /* disallow enabling 32bit I/O */
353 unsigned atapi_overlap
: 1; /* ATAPI overlap (not supported) */
354 unsigned doorlocking
: 1; /* for removable only: door lock/unlock works */
355 unsigned nodma
: 1; /* disallow DMA */
356 unsigned remap_0_to_1
: 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
357 unsigned blocked
: 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
358 unsigned vdma
: 1; /* 1=doing PIO over DMA 0=doing normal DMA */
359 unsigned scsi
: 1; /* 0=default, 1=ide-scsi emulation */
360 unsigned sleeping
: 1; /* 1=sleeping & sleep field valid */
361 unsigned post_reset
: 1;
362 unsigned udma33_warned
: 1;
364 u8 addressing
; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
365 u8 quirk_list
; /* considered quirky, set for a specific host */
366 u8 init_speed
; /* transfer rate set at boot */
367 u8 current_speed
; /* current transfer rate set */
368 u8 desired_speed
; /* desired transfer rate set */
369 u8 dn
; /* now wide spread use */
370 u8 wcache
; /* status of write cache */
371 u8 acoustic
; /* acoustic management */
372 u8 media
; /* disk, cdrom, tape, floppy, ... */
373 u8 ready_stat
; /* min status value for drive ready */
374 u8 mult_count
; /* current multiple sector setting */
375 u8 mult_req
; /* requested multiple sector setting */
376 u8 tune_req
; /* requested drive tuning setting */
377 u8 io_32bit
; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
378 u8 bad_wstat
; /* used for ignoring WRERR_STAT */
379 u8 nowerr
; /* used for ignoring WRERR_STAT */
380 u8 sect0
; /* offset of first sector for DM6:DDO */
381 u8 head
; /* "real" number of heads */
382 u8 sect
; /* "real" sectors per track */
383 u8 bios_head
; /* BIOS/fdisk/LILO number of heads */
384 u8 bios_sect
; /* BIOS/fdisk/LILO sectors per track */
386 unsigned int bios_cyl
; /* BIOS/fdisk/LILO number of cyls */
387 unsigned int cyl
; /* "real" number of cyls */
388 unsigned int drive_data
; /* used by set_pio_mode/selectproc */
389 unsigned int failures
; /* current failure count */
390 unsigned int max_failures
; /* maximum allowed failure count */
391 u64 probed_capacity
;/* initial reported media capacity (ide-cd only currently) */
393 u64 capacity64
; /* total number of sectors */
395 int lun
; /* logical unit */
396 int crc_count
; /* crc counter to reduce drive speed */
397 #ifdef CONFIG_BLK_DEV_IDEACPI
398 struct ide_acpi_drive_link
*acpidata
;
400 struct list_head list
;
401 struct device gendev
;
402 struct completion gendev_rel_comp
; /* to deal with device release() */
405 #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
407 #define IDE_CHIPSET_PCI_MASK \
408 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
409 #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
411 struct ide_port_info
;
413 struct ide_port_ops
{
414 /* host specific initialization of a device */
415 void (*init_dev
)(ide_drive_t
*);
416 /* routine to program host for PIO mode */
417 void (*set_pio_mode
)(ide_drive_t
*, const u8
);
418 /* routine to program host for DMA mode */
419 void (*set_dma_mode
)(ide_drive_t
*, const u8
);
420 /* tweaks hardware to select drive */
421 void (*selectproc
)(ide_drive_t
*);
422 /* chipset polling based on hba specifics */
423 int (*reset_poll
)(ide_drive_t
*);
424 /* chipset specific changes to default for device-hba resets */
425 void (*pre_reset
)(ide_drive_t
*);
426 /* routine to reset controller after a disk reset */
427 void (*resetproc
)(ide_drive_t
*);
428 /* special host masking for drive selection */
429 void (*maskproc
)(ide_drive_t
*, int);
430 /* check host's drive quirk list */
431 void (*quirkproc
)(ide_drive_t
*);
433 u8 (*mdma_filter
)(ide_drive_t
*);
434 u8 (*udma_filter
)(ide_drive_t
*);
436 u8 (*cable_detect
)(struct hwif_s
*);
440 void (*dma_host_set
)(struct ide_drive_s
*, int);
441 int (*dma_setup
)(struct ide_drive_s
*);
442 void (*dma_exec_cmd
)(struct ide_drive_s
*, u8
);
443 void (*dma_start
)(struct ide_drive_s
*);
444 int (*dma_end
)(struct ide_drive_s
*);
445 int (*dma_test_irq
)(struct ide_drive_s
*);
446 void (*dma_lost_irq
)(struct ide_drive_s
*);
447 void (*dma_timeout
)(struct ide_drive_s
*);
452 typedef struct hwif_s
{
453 struct hwif_s
*next
; /* for linked-list in ide_hwgroup_t */
454 struct hwif_s
*mate
; /* other hwif from same PCI chip */
455 struct hwgroup_s
*hwgroup
; /* actually (ide_hwgroup_t *) */
456 struct proc_dir_entry
*proc
; /* /proc/ide/ directory entry */
458 char name
[6]; /* name of interface, eg. "ide0" */
460 struct ide_io_ports io_ports
;
462 unsigned long sata_scr
[SATA_NR_PORTS
];
464 ide_drive_t drives
[MAX_DRIVES
]; /* drive info */
466 u8 major
; /* our major number */
467 u8 index
; /* 0 for ide0; 1 for ide1; ... */
468 u8 channel
; /* for dual-port chips: 0=primary, 1=secondary */
469 u8 bus_state
; /* power state of the IDE bus */
479 u8 cbl
; /* cable type */
481 hwif_chipset_t chipset
; /* sub-module for tuning.. */
485 ide_ack_intr_t
*ack_intr
;
487 void (*rw_disk
)(ide_drive_t
*, struct request
*);
489 const struct ide_port_ops
*port_ops
;
490 const struct ide_dma_ops
*dma_ops
;
492 u8 (*read_sff_dma_status
)(struct hwif_s
*);
494 void (*tf_load
)(ide_drive_t
*, struct ide_task_s
*);
495 void (*tf_read
)(ide_drive_t
*, struct ide_task_s
*);
497 void (*input_data
)(ide_drive_t
*, struct request
*, void *, unsigned);
498 void (*output_data
)(ide_drive_t
*, struct request
*, void *, unsigned);
500 void (*ide_dma_clear_irq
)(ide_drive_t
*drive
);
502 void (*OUTB
)(u8 addr
, unsigned long port
);
503 void (*OUTBSYNC
)(struct hwif_s
*hwif
, u8 addr
, unsigned long port
);
505 u8 (*INB
)(unsigned long port
);
507 /* dma physical region descriptor table (cpu view) */
508 unsigned int *dmatable_cpu
;
509 /* dma physical region descriptor table (dma view) */
510 dma_addr_t dmatable_dma
;
511 /* Scatter-gather list used to build the above */
512 struct scatterlist
*sg_table
;
513 int sg_max_nents
; /* Maximum number of entries in it */
514 int sg_nents
; /* Current number of entries in it */
515 int sg_dma_direction
; /* dma transfer direction */
517 /* data phase of the active command (currently only valid for PIO/DMA) */
522 struct scatterlist
*cursg
;
523 unsigned int cursg_ofs
;
525 int rqsize
; /* max sectors per request */
526 int irq
; /* our irq number */
528 unsigned long dma_base
; /* base addr for dma ports */
530 unsigned long config_data
; /* for use by chipset-specific code */
531 unsigned long select_data
; /* for use by chipset-specific code */
533 unsigned long extra_base
; /* extra addr for dma ports */
534 unsigned extra_ports
; /* number of extra dma ports */
536 unsigned present
: 1; /* this interface exists */
537 unsigned serialized
: 1; /* serialized all channel operation */
538 unsigned sharing_irq
: 1; /* 1 = sharing irq with another hwif */
539 unsigned sg_mapped
: 1; /* sg_table and sg_nents are ready */
541 struct device gendev
;
542 struct device
*portdev
;
544 struct completion gendev_rel_comp
; /* To deal with device release() */
546 void *hwif_data
; /* extra hwif data */
550 #ifdef CONFIG_BLK_DEV_IDEACPI
551 struct ide_acpi_hwif_link
*acpidata
;
553 } ____cacheline_internodealigned_in_smp ide_hwif_t
;
556 * internal ide interrupt handler type
558 typedef ide_startstop_t (ide_handler_t
)(ide_drive_t
*);
559 typedef int (ide_expiry_t
)(ide_drive_t
*);
561 /* used by ide-cd, ide-floppy, etc. */
562 typedef void (xfer_func_t
)(ide_drive_t
*, struct request
*rq
, void *, unsigned);
564 typedef struct hwgroup_s
{
565 /* irq handler, if active */
566 ide_startstop_t (*handler
)(ide_drive_t
*);
568 /* BOOL: protects all fields below */
570 /* BOOL: wake us up on timer expiry */
571 unsigned int sleeping
: 1;
572 /* BOOL: polling active & poll_timeout field valid */
573 unsigned int polling
: 1;
577 /* ptr to current hwif in linked-list */
580 /* current request */
584 struct timer_list timer
;
585 /* timeout value during long polls */
586 unsigned long poll_timeout
;
587 /* queried upon timeouts */
588 int (*expiry
)(ide_drive_t
*);
594 typedef struct ide_driver_s ide_driver_t
;
596 extern struct mutex ide_setting_mtx
;
598 int set_io_32bit(ide_drive_t
*, int);
599 int set_pio_mode(ide_drive_t
*, int);
600 int set_using_dma(ide_drive_t
*, int);
602 /* ATAPI packet command flags */
604 /* set when an error is considered normal - no retry (ide-tape) */
605 PC_FLAG_ABORT
= (1 << 0),
606 PC_FLAG_SUPPRESS_ERROR
= (1 << 1),
607 PC_FLAG_WAIT_FOR_DSC
= (1 << 2),
608 PC_FLAG_DMA_OK
= (1 << 3),
609 PC_FLAG_DMA_IN_PROGRESS
= (1 << 4),
610 PC_FLAG_DMA_ERROR
= (1 << 5),
611 PC_FLAG_WRITING
= (1 << 6),
612 /* command timed out */
613 PC_FLAG_TIMEDOUT
= (1 << 7),
614 PC_FLAG_ZIP_DRIVE
= (1 << 8),
615 PC_FLAG_DRQ_INTERRUPT
= (1 << 9),
618 struct ide_atapi_pc
{
619 /* actual packet bytes */
621 /* incremented on each retry */
625 /* bytes to transfer */
627 /* bytes actually transferred */
632 /* current buffer position */
635 /* missing/available data on the current buffer */
638 /* the corresponding request */
644 * those are more or less driver-specific and some of them are subject
645 * to change/removal later.
649 void (*callback
)(ide_drive_t
*);
652 struct idetape_bh
*bh
;
655 /* idescsi only for now */
656 struct scatterlist
*sg
;
659 struct scsi_cmnd
*scsi_cmd
;
660 void (*done
) (struct scsi_cmnd
*);
662 unsigned long timeout
;
665 #ifdef CONFIG_IDE_PROC_FS
667 * configurable drive settings
674 #define SETTING_READ (1 << 0)
675 #define SETTING_WRITE (1 << 1)
676 #define SETTING_RW (SETTING_READ | SETTING_WRITE)
678 typedef int (ide_procset_t
)(ide_drive_t
*, int);
679 typedef struct ide_settings_s
{
690 struct ide_settings_s
*next
;
693 int ide_add_setting(ide_drive_t
*, const char *, int, int, int, int, int, int, void *, ide_procset_t
*set
);
696 * /proc/ide interface
701 read_proc_t
*read_proc
;
702 write_proc_t
*write_proc
;
705 void proc_ide_create(void);
706 void proc_ide_destroy(void);
707 void ide_proc_register_port(ide_hwif_t
*);
708 void ide_proc_port_register_devices(ide_hwif_t
*);
709 void ide_proc_unregister_device(ide_drive_t
*);
710 void ide_proc_unregister_port(ide_hwif_t
*);
711 void ide_proc_register_driver(ide_drive_t
*, ide_driver_t
*);
712 void ide_proc_unregister_driver(ide_drive_t
*, ide_driver_t
*);
714 void ide_add_generic_settings(ide_drive_t
*);
716 read_proc_t proc_ide_read_capacity
;
717 read_proc_t proc_ide_read_geometry
;
720 * Standard exit stuff:
722 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
731 *start = page + off; \
735 static inline void proc_ide_create(void) { ; }
736 static inline void proc_ide_destroy(void) { ; }
737 static inline void ide_proc_register_port(ide_hwif_t
*hwif
) { ; }
738 static inline void ide_proc_port_register_devices(ide_hwif_t
*hwif
) { ; }
739 static inline void ide_proc_unregister_device(ide_drive_t
*drive
) { ; }
740 static inline void ide_proc_unregister_port(ide_hwif_t
*hwif
) { ; }
741 static inline void ide_proc_register_driver(ide_drive_t
*drive
, ide_driver_t
*driver
) { ; }
742 static inline void ide_proc_unregister_driver(ide_drive_t
*drive
, ide_driver_t
*driver
) { ; }
743 static inline void ide_add_generic_settings(ide_drive_t
*drive
) { ; }
744 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
748 * Power Management step value (rq->pm->pm_step).
750 * The step value starts at 0 (ide_pm_state_start_suspend) for a
751 * suspend operation or 1000 (ide_pm_state_start_resume) for a
754 * For each step, the core calls the subdriver start_power_step() first.
756 * - ide_stopped : In this case, the core calls us back again unless
757 * step have been set to ide_power_state_completed.
758 * - ide_started : In this case, the channel is left busy until an
759 * async event (interrupt) occurs.
760 * Typically, start_power_step() will issue a taskfile request with
763 * Upon reception of the interrupt, the core will call complete_power_step()
764 * with the error code if any. This routine should update the step value
765 * and return. It should not start a new request. The core will call
766 * start_power_step for the new step value, unless step have been set to
767 * ide_power_state_completed.
769 * Subdrivers are expected to define their own additional power
770 * steps from 1..999 for suspend and from 1001..1999 for resume,
771 * other values are reserved for future use.
775 ide_pm_state_completed
= -1,
776 ide_pm_state_start_suspend
= 0,
777 ide_pm_state_start_resume
= 1000,
781 * Subdrivers support.
783 * The gendriver.owner field should be set to the module owner of this driver.
784 * The gendriver.name field should be set to the name of this driver
786 struct ide_driver_s
{
789 unsigned supports_dsc_overlap
: 1;
790 ide_startstop_t (*do_request
)(ide_drive_t
*, struct request
*, sector_t
);
791 int (*end_request
)(ide_drive_t
*, int, int);
792 ide_startstop_t (*error
)(ide_drive_t
*, struct request
*rq
, u8
, u8
);
793 struct device_driver gen_driver
;
794 int (*probe
)(ide_drive_t
*);
795 void (*remove
)(ide_drive_t
*);
796 void (*resume
)(ide_drive_t
*);
797 void (*shutdown
)(ide_drive_t
*);
798 #ifdef CONFIG_IDE_PROC_FS
799 ide_proc_entry_t
*proc
;
803 #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
805 int generic_ide_ioctl(ide_drive_t
*, struct file
*, struct block_device
*, unsigned, unsigned long);
807 extern int ide_vlb_clk
;
808 extern int ide_pci_clk
;
810 ide_hwif_t
*ide_find_port_slot(const struct ide_port_info
*);
812 static inline ide_hwif_t
*ide_find_port(void)
814 return ide_find_port_slot(NULL
);
817 extern int ide_end_request (ide_drive_t
*drive
, int uptodate
, int nrsecs
);
818 int ide_end_dequeued_request(ide_drive_t
*drive
, struct request
*rq
,
819 int uptodate
, int nr_sectors
);
821 extern void ide_set_handler (ide_drive_t
*drive
, ide_handler_t
*handler
, unsigned int timeout
, ide_expiry_t
*expiry
);
823 void ide_execute_command(ide_drive_t
*, u8
, ide_handler_t
*, unsigned int,
826 void ide_execute_pkt_cmd(ide_drive_t
*);
828 void ide_pad_transfer(ide_drive_t
*, int, int);
830 ide_startstop_t
__ide_error(ide_drive_t
*, struct request
*, u8
, u8
);
832 ide_startstop_t
ide_error (ide_drive_t
*drive
, const char *msg
, byte stat
);
834 extern void ide_fix_driveid(struct hd_driveid
*);
836 extern void ide_fixstring(u8
*, const int, const int);
838 int ide_wait_stat(ide_startstop_t
*, ide_drive_t
*, u8
, u8
, unsigned long);
840 extern ide_startstop_t
ide_do_reset (ide_drive_t
*);
842 extern void ide_do_drive_cmd(ide_drive_t
*, struct request
*);
844 extern void ide_end_drive_cmd(ide_drive_t
*, u8
, u8
);
847 IDE_TFLAG_LBA48
= (1 << 0),
848 IDE_TFLAG_FLAGGED
= (1 << 2),
849 IDE_TFLAG_OUT_DATA
= (1 << 3),
850 IDE_TFLAG_OUT_HOB_FEATURE
= (1 << 4),
851 IDE_TFLAG_OUT_HOB_NSECT
= (1 << 5),
852 IDE_TFLAG_OUT_HOB_LBAL
= (1 << 6),
853 IDE_TFLAG_OUT_HOB_LBAM
= (1 << 7),
854 IDE_TFLAG_OUT_HOB_LBAH
= (1 << 8),
855 IDE_TFLAG_OUT_HOB
= IDE_TFLAG_OUT_HOB_FEATURE
|
856 IDE_TFLAG_OUT_HOB_NSECT
|
857 IDE_TFLAG_OUT_HOB_LBAL
|
858 IDE_TFLAG_OUT_HOB_LBAM
|
859 IDE_TFLAG_OUT_HOB_LBAH
,
860 IDE_TFLAG_OUT_FEATURE
= (1 << 9),
861 IDE_TFLAG_OUT_NSECT
= (1 << 10),
862 IDE_TFLAG_OUT_LBAL
= (1 << 11),
863 IDE_TFLAG_OUT_LBAM
= (1 << 12),
864 IDE_TFLAG_OUT_LBAH
= (1 << 13),
865 IDE_TFLAG_OUT_TF
= IDE_TFLAG_OUT_FEATURE
|
866 IDE_TFLAG_OUT_NSECT
|
870 IDE_TFLAG_OUT_DEVICE
= (1 << 14),
871 IDE_TFLAG_WRITE
= (1 << 15),
872 IDE_TFLAG_FLAGGED_SET_IN_FLAGS
= (1 << 16),
873 IDE_TFLAG_IN_DATA
= (1 << 17),
874 IDE_TFLAG_CUSTOM_HANDLER
= (1 << 18),
875 IDE_TFLAG_DMA_PIO_FALLBACK
= (1 << 19),
876 IDE_TFLAG_IN_HOB_FEATURE
= (1 << 20),
877 IDE_TFLAG_IN_HOB_NSECT
= (1 << 21),
878 IDE_TFLAG_IN_HOB_LBAL
= (1 << 22),
879 IDE_TFLAG_IN_HOB_LBAM
= (1 << 23),
880 IDE_TFLAG_IN_HOB_LBAH
= (1 << 24),
881 IDE_TFLAG_IN_HOB_LBA
= IDE_TFLAG_IN_HOB_LBAL
|
882 IDE_TFLAG_IN_HOB_LBAM
|
883 IDE_TFLAG_IN_HOB_LBAH
,
884 IDE_TFLAG_IN_HOB
= IDE_TFLAG_IN_HOB_FEATURE
|
885 IDE_TFLAG_IN_HOB_NSECT
|
886 IDE_TFLAG_IN_HOB_LBA
,
887 IDE_TFLAG_IN_NSECT
= (1 << 25),
888 IDE_TFLAG_IN_LBAL
= (1 << 26),
889 IDE_TFLAG_IN_LBAM
= (1 << 27),
890 IDE_TFLAG_IN_LBAH
= (1 << 28),
891 IDE_TFLAG_IN_LBA
= IDE_TFLAG_IN_LBAL
|
894 IDE_TFLAG_IN_TF
= IDE_TFLAG_IN_NSECT
|
896 IDE_TFLAG_IN_DEVICE
= (1 << 29),
897 IDE_TFLAG_HOB
= IDE_TFLAG_OUT_HOB
|
899 IDE_TFLAG_TF
= IDE_TFLAG_OUT_TF
|
901 IDE_TFLAG_DEVICE
= IDE_TFLAG_OUT_DEVICE
|
903 /* force 16-bit I/O operations */
904 IDE_TFLAG_IO_16BIT
= (1 << 30),
905 /* ide_task_t was allocated using kmalloc() */
906 IDE_TFLAG_DYN
= (1 << 31),
909 struct ide_taskfile
{
910 u8 hob_data
; /* 0: high data byte (for TASKFILE IOCTL) */
912 u8 hob_feature
; /* 1-5: additional data to support LBA48 */
918 u8 data
; /* 6: low data byte (for TASKFILE IOCTL) */
921 u8 error
; /* read: error */
922 u8 feature
; /* write: feature */
925 u8 nsect
; /* 8: number of sectors */
926 u8 lbal
; /* 9: LBA low */
927 u8 lbam
; /* 10: LBA mid */
928 u8 lbah
; /* 11: LBA high */
930 u8 device
; /* 12: device select */
933 u8 status
; /* read: status */
934 u8 command
; /* write: command */
938 typedef struct ide_task_s
{
940 struct ide_taskfile tf
;
945 struct request
*rq
; /* copy of request */
946 void *special
; /* valid_t generally */
949 void ide_tf_dump(const char *, struct ide_taskfile
*);
951 extern void SELECT_DRIVE(ide_drive_t
*);
952 void SELECT_MASK(ide_drive_t
*, int);
954 extern int drive_is_ready(ide_drive_t
*);
956 void ide_pktcmd_tf_load(ide_drive_t
*, u32
, u16
, u8
);
958 ide_startstop_t
ide_pc_intr(ide_drive_t
*drive
, struct ide_atapi_pc
*pc
,
959 ide_handler_t
*handler
, unsigned int timeout
, ide_expiry_t
*expiry
,
960 void (*update_buffers
)(ide_drive_t
*, struct ide_atapi_pc
*),
961 void (*retry_pc
)(ide_drive_t
*), void (*dsc_handle
)(ide_drive_t
*),
962 void (*io_buffers
)(ide_drive_t
*, struct ide_atapi_pc
*, unsigned int,
964 ide_startstop_t
ide_transfer_pc(ide_drive_t
*, struct ide_atapi_pc
*,
965 ide_handler_t
*, unsigned int, ide_expiry_t
*);
966 ide_startstop_t
ide_issue_pc(ide_drive_t
*, struct ide_atapi_pc
*,
967 ide_handler_t
*, unsigned int, ide_expiry_t
*);
969 ide_startstop_t
do_rw_taskfile(ide_drive_t
*, ide_task_t
*);
971 void task_end_request(ide_drive_t
*, struct request
*, u8
);
973 int ide_raw_taskfile(ide_drive_t
*, ide_task_t
*, u8
*, u16
);
974 int ide_no_data_taskfile(ide_drive_t
*, ide_task_t
*);
976 int ide_taskfile_ioctl(ide_drive_t
*, unsigned int, unsigned long);
977 int ide_cmd_ioctl(ide_drive_t
*, unsigned int, unsigned long);
978 int ide_task_ioctl(ide_drive_t
*, unsigned int, unsigned long);
980 extern int ide_driveid_update(ide_drive_t
*);
981 extern int ide_config_drive_speed(ide_drive_t
*, u8
);
982 extern u8
eighty_ninty_three (ide_drive_t
*);
983 extern int taskfile_lib_get_identify(ide_drive_t
*drive
, u8
*);
985 extern int ide_wait_not_busy(ide_hwif_t
*hwif
, unsigned long timeout
);
987 extern void ide_stall_queue(ide_drive_t
*drive
, unsigned long timeout
);
989 extern int ide_spin_wait_hwgroup(ide_drive_t
*);
990 extern void ide_timer_expiry(unsigned long);
991 extern irqreturn_t
ide_intr(int irq
, void *dev_id
);
992 extern void do_ide_request(struct request_queue
*);
994 void ide_init_disk(struct gendisk
*, ide_drive_t
*);
996 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
997 extern int __ide_pci_register_driver(struct pci_driver
*driver
, struct module
*owner
, const char *mod_name
);
998 #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
1000 #define ide_pci_register_driver(d) pci_register_driver(d)
1003 void ide_pci_setup_ports(struct pci_dev
*, const struct ide_port_info
*, int,
1004 u8
*, hw_regs_t
*, hw_regs_t
**);
1005 void ide_setup_pci_noise(struct pci_dev
*, const struct ide_port_info
*);
1007 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1008 int ide_pci_set_master(struct pci_dev
*, const char *);
1009 unsigned long ide_pci_dma_base(ide_hwif_t
*, const struct ide_port_info
*);
1010 extern const struct ide_dma_ops sff_dma_ops
;
1011 int ide_pci_check_simplex(ide_hwif_t
*, const struct ide_port_info
*);
1012 int ide_hwif_setup_dma(ide_hwif_t
*, const struct ide_port_info
*);
1014 static inline int ide_hwif_setup_dma(ide_hwif_t
*hwif
,
1015 const struct ide_port_info
*d
)
1021 extern void default_hwif_iops(ide_hwif_t
*);
1022 extern void default_hwif_mmiops(ide_hwif_t
*);
1023 extern void default_hwif_transport(ide_hwif_t
*);
1025 typedef struct ide_pci_enablebit_s
{
1026 u8 reg
; /* byte pci reg holding the enable-bit */
1027 u8 mask
; /* mask to isolate the enable-bit */
1028 u8 val
; /* value of masked reg when "enabled" */
1029 } ide_pci_enablebit_t
;
1032 /* Uses ISA control ports not PCI ones. */
1033 IDE_HFLAG_ISA_PORTS
= (1 << 0),
1034 /* single port device */
1035 IDE_HFLAG_SINGLE
= (1 << 1),
1036 /* don't use legacy PIO blacklist */
1037 IDE_HFLAG_PIO_NO_BLACKLIST
= (1 << 2),
1038 /* set for the second port of QD65xx */
1039 IDE_HFLAG_QD_2ND_PORT
= (1 << 3),
1040 /* use PIO8/9 for prefetch off/on */
1041 IDE_HFLAG_ABUSE_PREFETCH
= (1 << 4),
1042 /* use PIO6/7 for fast-devsel off/on */
1043 IDE_HFLAG_ABUSE_FAST_DEVSEL
= (1 << 5),
1044 /* use 100-102 and 200-202 PIO values to set DMA modes */
1045 IDE_HFLAG_ABUSE_DMA_MODES
= (1 << 6),
1047 * keep DMA setting when programming PIO mode, may be used only
1048 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1050 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA
= (1 << 7),
1051 /* program host for the transfer mode after programming device */
1052 IDE_HFLAG_POST_SET_MODE
= (1 << 8),
1053 /* don't program host/device for the transfer mode ("smart" hosts) */
1054 IDE_HFLAG_NO_SET_MODE
= (1 << 9),
1055 /* trust BIOS for programming chipset/device for DMA */
1056 IDE_HFLAG_TRUST_BIOS_FOR_DMA
= (1 << 10),
1057 /* host is CS5510/CS5520 */
1058 IDE_HFLAG_CS5520
= (1 << 11),
1059 /* ATAPI DMA is unsupported */
1060 IDE_HFLAG_NO_ATAPI_DMA
= (1 << 12),
1061 /* set if host is a "non-bootable" controller */
1062 IDE_HFLAG_NON_BOOTABLE
= (1 << 13),
1063 /* host doesn't support DMA */
1064 IDE_HFLAG_NO_DMA
= (1 << 14),
1065 /* check if host is PCI IDE device before allowing DMA */
1066 IDE_HFLAG_NO_AUTODMA
= (1 << 15),
1067 /* host uses MMIO */
1068 IDE_HFLAG_MMIO
= (1 << 16),
1070 IDE_HFLAG_NO_LBA48
= (1 << 17),
1072 IDE_HFLAG_NO_LBA48_DMA
= (1 << 18),
1073 /* data FIFO is cleared by an error */
1074 IDE_HFLAG_ERROR_STOPS_FIFO
= (1 << 19),
1075 /* serialize ports */
1076 IDE_HFLAG_SERIALIZE
= (1 << 20),
1077 /* use legacy IRQs */
1078 IDE_HFLAG_LEGACY_IRQS
= (1 << 21),
1079 /* force use of legacy IRQs */
1080 IDE_HFLAG_FORCE_LEGACY_IRQS
= (1 << 22),
1081 /* limit LBA48 requests to 256 sectors */
1082 IDE_HFLAG_RQSIZE_256
= (1 << 23),
1083 /* use 32-bit I/O ops */
1084 IDE_HFLAG_IO_32BIT
= (1 << 24),
1086 IDE_HFLAG_UNMASK_IRQS
= (1 << 25),
1087 IDE_HFLAG_ABUSE_SET_DMA_MODE
= (1 << 26),
1088 /* serialize ports if DMA is possible (for sl82c105) */
1089 IDE_HFLAG_SERIALIZE_DMA
= (1 << 27),
1090 /* force host out of "simplex" mode */
1091 IDE_HFLAG_CLEAR_SIMPLEX
= (1 << 28),
1092 /* DSC overlap is unsupported */
1093 IDE_HFLAG_NO_DSC
= (1 << 29),
1094 /* never use 32-bit I/O ops */
1095 IDE_HFLAG_NO_IO_32BIT
= (1 << 30),
1096 /* never unmask IRQs */
1097 IDE_HFLAG_NO_UNMASK_IRQS
= (1 << 31),
1098 /* host uses VDMA (disabled for now) */
1102 #ifdef CONFIG_BLK_DEV_OFFBOARD
1103 # define IDE_HFLAG_OFF_BOARD 0
1105 # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
1108 struct ide_port_info
{
1110 unsigned int (*init_chipset
)(struct pci_dev
*, const char *);
1111 void (*init_iops
)(ide_hwif_t
*);
1112 void (*init_hwif
)(ide_hwif_t
*);
1113 int (*init_dma
)(ide_hwif_t
*,
1114 const struct ide_port_info
*);
1116 const struct ide_port_ops
*port_ops
;
1117 const struct ide_dma_ops
*dma_ops
;
1119 ide_pci_enablebit_t enablebits
[2];
1120 hwif_chipset_t chipset
;
1128 int ide_setup_pci_device(struct pci_dev
*, const struct ide_port_info
*);
1129 int ide_setup_pci_devices(struct pci_dev
*, struct pci_dev
*, const struct ide_port_info
*);
1131 void ide_map_sg(ide_drive_t
*, struct request
*);
1132 void ide_init_sg_cmd(ide_drive_t
*, struct request
*);
1134 #define BAD_DMA_DRIVE 0
1135 #define GOOD_DMA_DRIVE 1
1137 struct drive_list_entry
{
1138 const char *id_model
;
1139 const char *id_firmware
;
1142 int ide_in_drive_list(struct hd_driveid
*, const struct drive_list_entry
*);
1144 #ifdef CONFIG_BLK_DEV_IDEDMA
1145 int __ide_dma_bad_drive(ide_drive_t
*);
1146 int ide_id_dma_bug(ide_drive_t
*);
1148 u8
ide_find_dma_mode(ide_drive_t
*, u8
);
1150 static inline u8
ide_max_dma_mode(ide_drive_t
*drive
)
1152 return ide_find_dma_mode(drive
, XFER_UDMA_6
);
1155 void ide_dma_off_quietly(ide_drive_t
*);
1156 void ide_dma_off(ide_drive_t
*);
1157 void ide_dma_on(ide_drive_t
*);
1158 int ide_set_dma(ide_drive_t
*);
1159 void ide_check_dma_crc(ide_drive_t
*);
1160 ide_startstop_t
ide_dma_intr(ide_drive_t
*);
1162 int ide_build_sglist(ide_drive_t
*, struct request
*);
1163 void ide_destroy_dmatable(ide_drive_t
*);
1165 #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1166 extern int ide_build_dmatable(ide_drive_t
*, struct request
*);
1167 int ide_allocate_dma_engine(ide_hwif_t
*);
1168 void ide_release_dma_engine(ide_hwif_t
*);
1170 void ide_dma_host_set(ide_drive_t
*, int);
1171 extern int ide_dma_setup(ide_drive_t
*);
1172 void ide_dma_exec_cmd(ide_drive_t
*, u8
);
1173 extern void ide_dma_start(ide_drive_t
*);
1174 extern int __ide_dma_end(ide_drive_t
*);
1175 int ide_dma_test_irq(ide_drive_t
*);
1176 extern void ide_dma_lost_irq(ide_drive_t
*);
1177 extern void ide_dma_timeout(ide_drive_t
*);
1178 #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1181 static inline int ide_id_dma_bug(ide_drive_t
*drive
) { return 0; }
1182 static inline u8
ide_find_dma_mode(ide_drive_t
*drive
, u8 speed
) { return 0; }
1183 static inline u8
ide_max_dma_mode(ide_drive_t
*drive
) { return 0; }
1184 static inline void ide_dma_off_quietly(ide_drive_t
*drive
) { ; }
1185 static inline void ide_dma_off(ide_drive_t
*drive
) { ; }
1186 static inline void ide_dma_on(ide_drive_t
*drive
) { ; }
1187 static inline void ide_dma_verbose(ide_drive_t
*drive
) { ; }
1188 static inline int ide_set_dma(ide_drive_t
*drive
) { return 1; }
1189 static inline void ide_check_dma_crc(ide_drive_t
*drive
) { ; }
1190 #endif /* CONFIG_BLK_DEV_IDEDMA */
1192 #ifndef CONFIG_BLK_DEV_IDEDMA_SFF
1193 static inline void ide_release_dma_engine(ide_hwif_t
*hwif
) { ; }
1196 #ifdef CONFIG_BLK_DEV_IDEACPI
1197 extern int ide_acpi_exec_tfs(ide_drive_t
*drive
);
1198 extern void ide_acpi_get_timing(ide_hwif_t
*hwif
);
1199 extern void ide_acpi_push_timing(ide_hwif_t
*hwif
);
1200 extern void ide_acpi_init(ide_hwif_t
*hwif
);
1201 void ide_acpi_port_init_devices(ide_hwif_t
*);
1202 extern void ide_acpi_set_state(ide_hwif_t
*hwif
, int on
);
1204 static inline int ide_acpi_exec_tfs(ide_drive_t
*drive
) { return 0; }
1205 static inline void ide_acpi_get_timing(ide_hwif_t
*hwif
) { ; }
1206 static inline void ide_acpi_push_timing(ide_hwif_t
*hwif
) { ; }
1207 static inline void ide_acpi_init(ide_hwif_t
*hwif
) { ; }
1208 static inline void ide_acpi_port_init_devices(ide_hwif_t
*hwif
) { ; }
1209 static inline void ide_acpi_set_state(ide_hwif_t
*hwif
, int on
) {}
1212 void ide_remove_port_from_hwgroup(ide_hwif_t
*);
1213 void ide_unregister(ide_hwif_t
*);
1215 void ide_register_region(struct gendisk
*);
1216 void ide_unregister_region(struct gendisk
*);
1218 void ide_undecoded_slave(ide_drive_t
*);
1220 void ide_port_apply_params(ide_hwif_t
*);
1222 int ide_device_add_all(u8
*, const struct ide_port_info
*, hw_regs_t
**);
1223 int ide_device_add(u8
*, const struct ide_port_info
*, hw_regs_t
**);
1224 int ide_legacy_device_add(const struct ide_port_info
*, unsigned long);
1225 void ide_port_unregister_devices(ide_hwif_t
*);
1226 void ide_port_scan(ide_hwif_t
*);
1228 static inline void *ide_get_hwifdata (ide_hwif_t
* hwif
)
1230 return hwif
->hwif_data
;
1233 static inline void ide_set_hwifdata (ide_hwif_t
* hwif
, void *data
)
1235 hwif
->hwif_data
= data
;
1238 const char *ide_xfer_verbose(u8 mode
);
1239 extern void ide_toggle_bounce(ide_drive_t
*drive
, int on
);
1240 extern int ide_set_xfer_rate(ide_drive_t
*drive
, u8 rate
);
1242 static inline int ide_dev_has_iordy(struct hd_driveid
*id
)
1244 return ((id
->field_valid
& 2) && (id
->capability
& 8)) ? 1 : 0;
1247 static inline int ide_dev_is_sata(struct hd_driveid
*id
)
1250 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1251 * verifying that word 80 by casting it to a signed type --
1252 * this trick allows us to filter out the reserved values of
1253 * 0x0000 and 0xffff along with the earlier ATA revisions...
1255 if (id
->hw_config
== 0 && (short)id
->major_rev_num
>= 0x0020)
1260 u64
ide_get_lba_addr(struct ide_taskfile
*, int);
1261 u8
ide_dump_status(ide_drive_t
*, const char *, u8
);
1266 u16 act8b
; /* t2 for 8-bit io */
1267 u16 rec8b
; /* t2i for 8-bit io */
1268 u16 cyc8b
; /* t0 for 8-bit io */
1269 u16 active
; /* t2 or tD */
1270 u16 recover
; /* t2i or tK */
1272 u16 udma
; /* t2CYCTYP/2 */
1276 IDE_TIMING_SETUP
= (1 << 0),
1277 IDE_TIMING_ACT8B
= (1 << 1),
1278 IDE_TIMING_REC8B
= (1 << 2),
1279 IDE_TIMING_CYC8B
= (1 << 3),
1280 IDE_TIMING_8BIT
= IDE_TIMING_ACT8B
| IDE_TIMING_REC8B
|
1282 IDE_TIMING_ACTIVE
= (1 << 4),
1283 IDE_TIMING_RECOVER
= (1 << 5),
1284 IDE_TIMING_CYCLE
= (1 << 6),
1285 IDE_TIMING_UDMA
= (1 << 7),
1286 IDE_TIMING_ALL
= IDE_TIMING_SETUP
| IDE_TIMING_8BIT
|
1287 IDE_TIMING_ACTIVE
| IDE_TIMING_RECOVER
|
1288 IDE_TIMING_CYCLE
| IDE_TIMING_UDMA
,
1291 struct ide_timing
*ide_timing_find_mode(u8
);
1292 u16
ide_pio_cycle_time(ide_drive_t
*, u8
);
1293 void ide_timing_merge(struct ide_timing
*, struct ide_timing
*,
1294 struct ide_timing
*, unsigned int);
1295 int ide_timing_compute(ide_drive_t
*, u8
, struct ide_timing
*, int, int);
1297 int ide_scan_pio_blacklist(char *);
1299 u8
ide_get_best_pio_mode(ide_drive_t
*, u8
, u8
);
1301 int ide_set_pio_mode(ide_drive_t
*, u8
);
1302 int ide_set_dma_mode(ide_drive_t
*, u8
);
1304 void ide_set_pio(ide_drive_t
*, u8
);
1306 static inline void ide_set_max_pio(ide_drive_t
*drive
)
1308 ide_set_pio(drive
, 255);
1311 extern spinlock_t ide_lock
;
1312 extern struct mutex ide_cfg_mtx
;
1314 * Structure locking:
1316 * ide_cfg_mtx and ide_lock together protect changes to
1317 * ide_hwif_t->{next,hwgroup}
1320 * ide_hwgroup_t->busy: ide_lock
1321 * ide_hwgroup_t->hwif: ide_lock
1322 * ide_hwif_t->mate: constant, no locking
1323 * ide_drive_t->hwif: constant, no locking
1326 #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1328 extern struct bus_type ide_bus_type
;
1329 extern struct class *ide_port_class
;
1331 /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1332 #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1334 /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1335 #define ide_id_has_flush_cache_ext(id) \
1336 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1338 static inline void ide_dump_identify(u8
*id
)
1340 print_hex_dump(KERN_INFO
, "", DUMP_PREFIX_NONE
, 16, 2, id
, 512, 0);
1343 static inline int hwif_to_node(ide_hwif_t
*hwif
)
1345 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
1346 return hwif
->dev
? pcibus_to_node(dev
->bus
) : -1;
1349 static inline ide_drive_t
*ide_get_paired_drive(ide_drive_t
*drive
)
1351 ide_hwif_t
*hwif
= HWIF(drive
);
1353 return &hwif
->drives
[(drive
->dn
^ 1) & 1];
1356 static inline void ide_set_irq(ide_drive_t
*drive
, int on
)
1358 ide_hwif_t
*hwif
= drive
->hwif
;
1360 hwif
->OUTBSYNC(hwif
, ATA_DEVCTL_OBS
| (on
? 0 : 2),
1361 hwif
->io_ports
.ctl_addr
);
1364 static inline u8
ide_read_status(ide_drive_t
*drive
)
1366 ide_hwif_t
*hwif
= drive
->hwif
;
1368 return hwif
->INB(hwif
->io_ports
.status_addr
);
1371 static inline u8
ide_read_altstatus(ide_drive_t
*drive
)
1373 ide_hwif_t
*hwif
= drive
->hwif
;
1375 return hwif
->INB(hwif
->io_ports
.ctl_addr
);
1378 static inline u8
ide_read_error(ide_drive_t
*drive
)
1380 ide_hwif_t
*hwif
= drive
->hwif
;
1382 return hwif
->INB(hwif
->io_ports
.error_addr
);