include/linux/mbus.h

   1 /*
   2  * Marvell MBUS common definitions.
   3  *
   4  * Copyright (C) 2008 Marvell Semiconductor
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2.  This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10
  11 #ifndef __LINUX_MBUS_H
  12 #define __LINUX_MBUS_H
  13
  14 struct resource;
  15
  16 struct mbus_dram_target_info
  17 {
  18         /*
  19          * The 4-bit MBUS target ID of the DRAM controller.
  20          */
  21         u8              mbus_dram_target_id;
  22
  23         /*
  24          * The base address, size, and MBUS attribute ID for each
  25          * of the possible DRAM chip selects.  Peripherals are
  26          * required to support at least 4 decode windows.
  27          */
  28         int             num_cs;
  29         struct mbus_dram_window {
  30                 u8      cs_index;
  31                 u8      mbus_attr;
  32                 u32     base;
  33                 u32     size;
  34         } cs[4];
  35 };
  36
  37 /* Flags for PCI/PCIe address decoding regions */
  38 #define MVEBU_MBUS_PCI_IO  0x1
  39 #define MVEBU_MBUS_PCI_MEM 0x2
  40 #define MVEBU_MBUS_PCI_WA  0x3
  41
  42 /*
  43  * Magic value that explicits that we don't need a remapping-capable
  44  * address decoding window.
  45  */
  46 #define MVEBU_MBUS_NO_REMAP (0xffffffff)
  47
  48 /* Maximum size of a mbus window name */
  49 #define MVEBU_MBUS_MAX_WINNAME_SZ 32
  50
  51 /*
  52  * The Marvell mbus is to be found only on SOCs from the Orion family
  53  * at the moment.  Provide a dummy stub for other architectures.
  54  */
  55 #ifdef CONFIG_PLAT_ORION
  56 extern const struct mbus_dram_target_info *mv_mbus_dram_info(void);
  57 #else
  58 static inline const struct mbus_dram_target_info *mv_mbus_dram_info(void)
  59 {
  60         return NULL;
  61 }
  62 #endif
  63
  64 void mvebu_mbus_get_pcie_mem_aperture(struct resource *res);
  65 void mvebu_mbus_get_pcie_io_aperture(struct resource *res);
  66 int mvebu_mbus_add_window_remap_by_id(unsigned int target,
  67                                       unsigned int attribute,
  68                                       phys_addr_t base, size_t size,
  69                                       phys_addr_t remap);
  70 int mvebu_mbus_add_window_by_id(unsigned int target, unsigned int attribute,
  71                                 phys_addr_t base, size_t size);
  72 int mvebu_mbus_del_window(phys_addr_t base, size_t size);
  73 int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base,
  74                     size_t mbus_size, phys_addr_t sdram_phys_base,
  75                     size_t sdram_size);
  76 int mvebu_mbus_dt_init(void);
  77
  78 #endif /* __LINUX_MBUS_H */