include/linux/mfd/samsung/irq.h

   1 /* irq.h
   2  *
   3  * Copyright (c) 2012 Samsung Electronics Co., Ltd
   4  *              http://www.samsung.com
   5  *
   6  *  This program is free software; you can redistribute  it and/or modify it
   7  *  under  the terms of  the GNU General  Public License as published by the
   8  *  Free Software Foundation;  either version 2 of the  License, or (at your
   9  *  option) any later version.
  10  *
  11  */
  12
  13 #ifndef __LINUX_MFD_SEC_IRQ_H
  14 #define __LINUX_MFD_SEC_IRQ_H
  15
  16 enum s5m8767_irq {
  17         S5M8767_IRQ_PWRR,
  18         S5M8767_IRQ_PWRF,
  19         S5M8767_IRQ_PWR1S,
  20         S5M8767_IRQ_JIGR,
  21         S5M8767_IRQ_JIGF,
  22         S5M8767_IRQ_LOWBAT2,
  23         S5M8767_IRQ_LOWBAT1,
  24
  25         S5M8767_IRQ_MRB,
  26         S5M8767_IRQ_DVSOK2,
  27         S5M8767_IRQ_DVSOK3,
  28         S5M8767_IRQ_DVSOK4,
  29
  30         S5M8767_IRQ_RTC60S,
  31         S5M8767_IRQ_RTCA1,
  32         S5M8767_IRQ_RTCA2,
  33         S5M8767_IRQ_SMPL,
  34         S5M8767_IRQ_RTC1S,
  35         S5M8767_IRQ_WTSR,
  36
  37         S5M8767_IRQ_NR,
  38 };
  39
  40 #define S5M8767_IRQ_PWRR_MASK           (1 << 0)
  41 #define S5M8767_IRQ_PWRF_MASK           (1 << 1)
  42 #define S5M8767_IRQ_PWR1S_MASK          (1 << 3)
  43 #define S5M8767_IRQ_JIGR_MASK           (1 << 4)
  44 #define S5M8767_IRQ_JIGF_MASK           (1 << 5)
  45 #define S5M8767_IRQ_LOWBAT2_MASK        (1 << 6)
  46 #define S5M8767_IRQ_LOWBAT1_MASK        (1 << 7)
  47
  48 #define S5M8767_IRQ_MRB_MASK            (1 << 2)
  49 #define S5M8767_IRQ_DVSOK2_MASK         (1 << 3)
  50 #define S5M8767_IRQ_DVSOK3_MASK         (1 << 4)
  51 #define S5M8767_IRQ_DVSOK4_MASK         (1 << 5)
  52
  53 #define S5M8767_IRQ_RTC60S_MASK         (1 << 0)
  54 #define S5M8767_IRQ_RTCA1_MASK          (1 << 1)
  55 #define S5M8767_IRQ_RTCA2_MASK          (1 << 2)
  56 #define S5M8767_IRQ_SMPL_MASK           (1 << 3)
  57 #define S5M8767_IRQ_RTC1S_MASK          (1 << 4)
  58 #define S5M8767_IRQ_WTSR_MASK           (1 << 5)
  59
  60 enum s5m8763_irq {
  61         S5M8763_IRQ_DCINF,
  62         S5M8763_IRQ_DCINR,
  63         S5M8763_IRQ_JIGF,
  64         S5M8763_IRQ_JIGR,
  65         S5M8763_IRQ_PWRONF,
  66         S5M8763_IRQ_PWRONR,
  67
  68         S5M8763_IRQ_WTSREVNT,
  69         S5M8763_IRQ_SMPLEVNT,
  70         S5M8763_IRQ_ALARM1,
  71         S5M8763_IRQ_ALARM0,
  72
  73         S5M8763_IRQ_ONKEY1S,
  74         S5M8763_IRQ_TOPOFFR,
  75         S5M8763_IRQ_DCINOVPR,
  76         S5M8763_IRQ_CHGRSTF,
  77         S5M8763_IRQ_DONER,
  78         S5M8763_IRQ_CHGFAULT,
  79
  80         S5M8763_IRQ_LOBAT1,
  81         S5M8763_IRQ_LOBAT2,
  82
  83         S5M8763_IRQ_NR,
  84 };
  85
  86 #define S5M8763_IRQ_DCINF_MASK          (1 << 2)
  87 #define S5M8763_IRQ_DCINR_MASK          (1 << 3)
  88 #define S5M8763_IRQ_JIGF_MASK           (1 << 4)
  89 #define S5M8763_IRQ_JIGR_MASK           (1 << 5)
  90 #define S5M8763_IRQ_PWRONF_MASK         (1 << 6)
  91 #define S5M8763_IRQ_PWRONR_MASK         (1 << 7)
  92
  93 #define S5M8763_IRQ_WTSREVNT_MASK       (1 << 0)
  94 #define S5M8763_IRQ_SMPLEVNT_MASK       (1 << 1)
  95 #define S5M8763_IRQ_ALARM1_MASK         (1 << 2)
  96 #define S5M8763_IRQ_ALARM0_MASK         (1 << 3)
  97
  98 #define S5M8763_IRQ_ONKEY1S_MASK        (1 << 0)
  99 #define S5M8763_IRQ_TOPOFFR_MASK        (1 << 2)
 100 #define S5M8763_IRQ_DCINOVPR_MASK       (1 << 3)
 101 #define S5M8763_IRQ_CHGRSTF_MASK        (1 << 4)
 102 #define S5M8763_IRQ_DONER_MASK          (1 << 5)
 103 #define S5M8763_IRQ_CHGFAULT_MASK       (1 << 7)
 104
 105 #define S5M8763_IRQ_LOBAT1_MASK         (1 << 0)
 106 #define S5M8763_IRQ_LOBAT2_MASK         (1 << 1)
 107
 108 #define S5M8763_ENRAMP                  (1 << 4)
 109
 110 #endif /*  __LINUX_MFD_SEC_IRQ_H */