Merge branch 'picoxcell/timer' into next/timer
[deliverable/linux.git] / include / linux / mfd / tmio.h
1 #ifndef MFD_TMIO_H
2 #define MFD_TMIO_H
3
4 #include <linux/device.h>
5 #include <linux/fb.h>
6 #include <linux/io.h>
7 #include <linux/jiffies.h>
8 #include <linux/platform_device.h>
9 #include <linux/pm_runtime.h>
10
11 #define tmio_ioread8(addr) readb(addr)
12 #define tmio_ioread16(addr) readw(addr)
13 #define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
14 #define tmio_ioread32(addr) \
15 (((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16))
16
17 #define tmio_iowrite8(val, addr) writeb((val), (addr))
18 #define tmio_iowrite16(val, addr) writew((val), (addr))
19 #define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
20 #define tmio_iowrite32(val, addr) \
21 do { \
22 writew((val), (addr)); \
23 writew((val) >> 16, (addr) + 2); \
24 } while (0)
25
26 #define CNF_CMD 0x04
27 #define CNF_CTL_BASE 0x10
28 #define CNF_INT_PIN 0x3d
29 #define CNF_STOP_CLK_CTL 0x40
30 #define CNF_GCLK_CTL 0x41
31 #define CNF_SD_CLK_MODE 0x42
32 #define CNF_PIN_STATUS 0x44
33 #define CNF_PWR_CTL_1 0x48
34 #define CNF_PWR_CTL_2 0x49
35 #define CNF_PWR_CTL_3 0x4a
36 #define CNF_CARD_DETECT_MODE 0x4c
37 #define CNF_SD_SLOT 0x50
38 #define CNF_EXT_GCLK_CTL_1 0xf0
39 #define CNF_EXT_GCLK_CTL_2 0xf1
40 #define CNF_EXT_GCLK_CTL_3 0xf9
41 #define CNF_SD_LED_EN_1 0xfa
42 #define CNF_SD_LED_EN_2 0xfe
43
44 #define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
45
46 #define sd_config_write8(base, shift, reg, val) \
47 tmio_iowrite8((val), (base) + ((reg) << (shift)))
48 #define sd_config_write16(base, shift, reg, val) \
49 tmio_iowrite16((val), (base) + ((reg) << (shift)))
50 #define sd_config_write32(base, shift, reg, val) \
51 do { \
52 tmio_iowrite16((val), (base) + ((reg) << (shift))); \
53 tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \
54 } while (0)
55
56 /* tmio MMC platform flags */
57 #define TMIO_MMC_WRPROTECT_DISABLE (1 << 0)
58 /*
59 * Some controllers can support a 2-byte block size when the bus width
60 * is configured in 4-bit mode.
61 */
62 #define TMIO_MMC_BLKSZ_2BYTES (1 << 1)
63 /*
64 * Some controllers can support SDIO IRQ signalling.
65 */
66 #define TMIO_MMC_SDIO_IRQ (1 << 2)
67 /*
68 * Some platforms can detect card insertion events with controller powered
69 * down, using a GPIO IRQ, in which case they have to fill in cd_irq, cd_gpio,
70 * and cd_flags fields of struct tmio_mmc_data.
71 */
72 #define TMIO_MMC_HAS_COLD_CD (1 << 3)
73 /*
74 * Some controllers require waiting for the SD bus to become
75 * idle before writing to some registers.
76 */
77 #define TMIO_MMC_HAS_IDLE_WAIT (1 << 4)
78 /*
79 * A GPIO is used for card hotplug detection. We need an extra flag for this,
80 * because 0 is a valid GPIO number too, and requiring users to specify
81 * cd_gpio < 0 to disable GPIO hotplug would break backwards compatibility.
82 */
83 #define TMIO_MMC_USE_GPIO_CD (1 << 5)
84
85 int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
86 int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
87 void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
88 void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state);
89
90 struct tmio_mmc_dma {
91 void *chan_priv_tx;
92 void *chan_priv_rx;
93 int alignment_shift;
94 };
95
96 struct tmio_mmc_host;
97
98 /*
99 * data for the MMC controller
100 */
101 struct tmio_mmc_data {
102 unsigned int hclk;
103 unsigned long capabilities;
104 unsigned long flags;
105 u32 ocr_mask; /* available voltages */
106 struct tmio_mmc_dma *dma;
107 struct device *dev;
108 unsigned int cd_gpio;
109 void (*set_pwr)(struct platform_device *host, int state);
110 void (*set_clk_div)(struct platform_device *host, int state);
111 int (*get_cd)(struct platform_device *host);
112 int (*write16_hook)(struct tmio_mmc_host *host, int addr);
113 };
114
115 /*
116 * This function is deprecated and will be removed soon. Please, convert your
117 * platform to use drivers/mmc/core/cd-gpio.c
118 */
119 #include <linux/mmc/host.h>
120 static inline void tmio_mmc_cd_wakeup(struct tmio_mmc_data *pdata)
121 {
122 if (pdata)
123 mmc_detect_change(dev_get_drvdata(pdata->dev),
124 msecs_to_jiffies(100));
125 }
126
127 /*
128 * data for the NAND controller
129 */
130 struct tmio_nand_data {
131 struct nand_bbt_descr *badblock_pattern;
132 struct mtd_partition *partition;
133 unsigned int num_partitions;
134 };
135
136 #define FBIO_TMIO_ACC_WRITE 0x7C639300
137 #define FBIO_TMIO_ACC_SYNC 0x7C639301
138
139 struct tmio_fb_data {
140 int (*lcd_set_power)(struct platform_device *fb_dev,
141 bool on);
142 int (*lcd_mode)(struct platform_device *fb_dev,
143 const struct fb_videomode *mode);
144 int num_modes;
145 struct fb_videomode *modes;
146
147 /* in mm: size of screen */
148 int height;
149 int width;
150 };
151
152
153 #endif
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