5428ba120d78cfd917a9be7ff1f90bc48d9b4307
[deliverable/linux.git] / include / linux / perf_counter.h
1 /*
2 * Performance counters:
3 *
4 * Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
5 * Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
6 *
7 * Data type definitions, declarations, prototypes.
8 *
9 * Started by: Thomas Gleixner and Ingo Molnar
10 *
11 * For licencing details see kernel-base/COPYING
12 */
13 #ifndef _LINUX_PERF_COUNTER_H
14 #define _LINUX_PERF_COUNTER_H
15
16 #include <linux/types.h>
17 #include <linux/ioctl.h>
18 #include <asm/byteorder.h>
19
20 /*
21 * User-space ABI bits:
22 */
23
24 /*
25 * hw_event.type
26 */
27 enum perf_event_types {
28 PERF_TYPE_HARDWARE = 0,
29 PERF_TYPE_SOFTWARE = 1,
30 PERF_TYPE_TRACEPOINT = 2,
31
32 /*
33 * available TYPE space, raw is the max value.
34 */
35
36 PERF_TYPE_RAW = 128,
37 };
38
39 /*
40 * Generalized performance counter event types, used by the hw_event.event_id
41 * parameter of the sys_perf_counter_open() syscall:
42 */
43 enum hw_event_ids {
44 /*
45 * Common hardware events, generalized by the kernel:
46 */
47 PERF_COUNT_CPU_CYCLES = 0,
48 PERF_COUNT_INSTRUCTIONS = 1,
49 PERF_COUNT_CACHE_REFERENCES = 2,
50 PERF_COUNT_CACHE_MISSES = 3,
51 PERF_COUNT_BRANCH_INSTRUCTIONS = 4,
52 PERF_COUNT_BRANCH_MISSES = 5,
53 PERF_COUNT_BUS_CYCLES = 6,
54
55 PERF_HW_EVENTS_MAX = 7,
56 };
57
58 /*
59 * Special "software" counters provided by the kernel, even if the hardware
60 * does not support performance counters. These counters measure various
61 * physical and sw events of the kernel (and allow the profiling of them as
62 * well):
63 */
64 enum sw_event_ids {
65 PERF_COUNT_CPU_CLOCK = 0,
66 PERF_COUNT_TASK_CLOCK = 1,
67 PERF_COUNT_PAGE_FAULTS = 2,
68 PERF_COUNT_CONTEXT_SWITCHES = 3,
69 PERF_COUNT_CPU_MIGRATIONS = 4,
70 PERF_COUNT_PAGE_FAULTS_MIN = 5,
71 PERF_COUNT_PAGE_FAULTS_MAJ = 6,
72
73 PERF_SW_EVENTS_MAX = 7,
74 };
75
76 #define __PERF_COUNTER_MASK(name) \
77 (((1ULL << PERF_COUNTER_##name##_BITS) - 1) << \
78 PERF_COUNTER_##name##_SHIFT)
79
80 #define PERF_COUNTER_RAW_BITS 1
81 #define PERF_COUNTER_RAW_SHIFT 63
82 #define PERF_COUNTER_RAW_MASK __PERF_COUNTER_MASK(RAW)
83
84 #define PERF_COUNTER_CONFIG_BITS 63
85 #define PERF_COUNTER_CONFIG_SHIFT 0
86 #define PERF_COUNTER_CONFIG_MASK __PERF_COUNTER_MASK(CONFIG)
87
88 #define PERF_COUNTER_TYPE_BITS 7
89 #define PERF_COUNTER_TYPE_SHIFT 56
90 #define PERF_COUNTER_TYPE_MASK __PERF_COUNTER_MASK(TYPE)
91
92 #define PERF_COUNTER_EVENT_BITS 56
93 #define PERF_COUNTER_EVENT_SHIFT 0
94 #define PERF_COUNTER_EVENT_MASK __PERF_COUNTER_MASK(EVENT)
95
96 /*
97 * Bits that can be set in hw_event.record_type to request information
98 * in the overflow packets.
99 */
100 enum perf_counter_record_format {
101 PERF_RECORD_IP = 1U << 0,
102 PERF_RECORD_TID = 1U << 1,
103 PERF_RECORD_GROUP = 1U << 2,
104 PERF_RECORD_CALLCHAIN = 1U << 3,
105 };
106
107 /*
108 * Bits that can be set in hw_event.read_format to request that
109 * reads on the counter should return the indicated quantities,
110 * in increasing order of bit value, after the counter value.
111 */
112 enum perf_counter_read_format {
113 PERF_FORMAT_TOTAL_TIME_ENABLED = 1,
114 PERF_FORMAT_TOTAL_TIME_RUNNING = 2,
115 };
116
117 /*
118 * Hardware event to monitor via a performance monitoring counter:
119 */
120 struct perf_counter_hw_event {
121 /*
122 * The MSB of the config word signifies if the rest contains cpu
123 * specific (raw) counter configuration data, if unset, the next
124 * 7 bits are an event type and the rest of the bits are the event
125 * identifier.
126 */
127 __u64 config;
128
129 __u64 irq_period;
130 __u32 record_type;
131 __u32 read_format;
132
133 __u64 disabled : 1, /* off by default */
134 nmi : 1, /* NMI sampling */
135 inherit : 1, /* children inherit it */
136 pinned : 1, /* must always be on PMU */
137 exclusive : 1, /* only group on PMU */
138 exclude_user : 1, /* don't count user */
139 exclude_kernel : 1, /* ditto kernel */
140 exclude_hv : 1, /* ditto hypervisor */
141 exclude_idle : 1, /* don't count when idle */
142 mmap : 1, /* include mmap data */
143 munmap : 1, /* include munmap data */
144
145 __reserved_1 : 53;
146
147 __u32 extra_config_len;
148 __u32 wakeup_events; /* wakeup every n events */
149
150 __u64 __reserved_2;
151 __u64 __reserved_3;
152 };
153
154 /*
155 * Ioctls that can be done on a perf counter fd:
156 */
157 #define PERF_COUNTER_IOC_ENABLE _IO('$', 0)
158 #define PERF_COUNTER_IOC_DISABLE _IO('$', 1)
159
160 /*
161 * Structure of the page that can be mapped via mmap
162 */
163 struct perf_counter_mmap_page {
164 __u32 version; /* version number of this structure */
165 __u32 compat_version; /* lowest version this is compat with */
166
167 /*
168 * Bits needed to read the hw counters in user-space.
169 *
170 * The index and offset should be read atomically using the seqlock:
171 *
172 * __u32 seq, index;
173 * __s64 offset;
174 *
175 * again:
176 * rmb();
177 * seq = pc->lock;
178 *
179 * if (unlikely(seq & 1)) {
180 * cpu_relax();
181 * goto again;
182 * }
183 *
184 * index = pc->index;
185 * offset = pc->offset;
186 *
187 * rmb();
188 * if (pc->lock != seq)
189 * goto again;
190 *
191 * After this, index contains architecture specific counter index + 1,
192 * so that 0 means unavailable, offset contains the value to be added
193 * to the result of the raw timer read to obtain this counter's value.
194 */
195 __u32 lock; /* seqlock for synchronization */
196 __u32 index; /* hardware counter identifier */
197 __s64 offset; /* add to hardware counter value */
198
199 /*
200 * Control data for the mmap() data buffer.
201 *
202 * User-space reading this value should issue an rmb(), on SMP capable
203 * platforms, after reading this value -- see perf_counter_wakeup().
204 */
205 __u32 data_head; /* head in the data section */
206 };
207
208 struct perf_event_header {
209 __u32 type;
210 __u32 size;
211 };
212
213 enum perf_event_type {
214
215 PERF_EVENT_MMAP = 1,
216 PERF_EVENT_MUNMAP = 2,
217
218 /*
219 * Half the event type space is reserved for the counter overflow
220 * bitfields, as found in hw_event.record_type.
221 *
222 * These events will have types of the form:
223 * PERF_EVENT_COUNTER_OVERFLOW { | __PERF_EVENT_* } *
224 */
225 PERF_EVENT_COUNTER_OVERFLOW = 1UL << 31,
226 __PERF_EVENT_IP = PERF_RECORD_IP,
227 __PERF_EVENT_TID = PERF_RECORD_TID,
228 __PERF_EVENT_GROUP = PERF_RECORD_GROUP,
229 __PERF_EVENT_CALLCHAIN = PERF_RECORD_CALLCHAIN,
230 };
231
232 #ifdef __KERNEL__
233 /*
234 * Kernel-internal data types and definitions:
235 */
236
237 #ifdef CONFIG_PERF_COUNTERS
238 # include <asm/perf_counter.h>
239 #endif
240
241 #include <linux/list.h>
242 #include <linux/mutex.h>
243 #include <linux/rculist.h>
244 #include <linux/rcupdate.h>
245 #include <linux/spinlock.h>
246 #include <linux/hrtimer.h>
247 #include <asm/atomic.h>
248
249 struct task_struct;
250
251 static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event)
252 {
253 return hw_event->config & PERF_COUNTER_RAW_MASK;
254 }
255
256 static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event)
257 {
258 return hw_event->config & PERF_COUNTER_CONFIG_MASK;
259 }
260
261 static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event)
262 {
263 return (hw_event->config & PERF_COUNTER_TYPE_MASK) >>
264 PERF_COUNTER_TYPE_SHIFT;
265 }
266
267 static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event)
268 {
269 return hw_event->config & PERF_COUNTER_EVENT_MASK;
270 }
271
272 /**
273 * struct hw_perf_counter - performance counter hardware details:
274 */
275 struct hw_perf_counter {
276 #ifdef CONFIG_PERF_COUNTERS
277 union {
278 struct { /* hardware */
279 u64 config;
280 unsigned long config_base;
281 unsigned long counter_base;
282 int nmi;
283 unsigned int idx;
284 };
285 union { /* software */
286 atomic64_t count;
287 struct hrtimer hrtimer;
288 };
289 };
290 atomic64_t prev_count;
291 u64 irq_period;
292 atomic64_t period_left;
293 #endif
294 };
295
296 struct perf_counter;
297
298 /**
299 * struct hw_perf_counter_ops - performance counter hw ops
300 */
301 struct hw_perf_counter_ops {
302 int (*enable) (struct perf_counter *counter);
303 void (*disable) (struct perf_counter *counter);
304 void (*read) (struct perf_counter *counter);
305 };
306
307 /**
308 * enum perf_counter_active_state - the states of a counter
309 */
310 enum perf_counter_active_state {
311 PERF_COUNTER_STATE_ERROR = -2,
312 PERF_COUNTER_STATE_OFF = -1,
313 PERF_COUNTER_STATE_INACTIVE = 0,
314 PERF_COUNTER_STATE_ACTIVE = 1,
315 };
316
317 struct file;
318
319 struct perf_mmap_data {
320 struct rcu_head rcu_head;
321 int nr_pages;
322 atomic_t wakeup;
323 atomic_t head;
324 atomic_t events;
325 struct perf_counter_mmap_page *user_page;
326 void *data_pages[0];
327 };
328
329 struct perf_wakeup_entry {
330 struct perf_wakeup_entry *next;
331 };
332
333 /**
334 * struct perf_counter - performance counter kernel representation:
335 */
336 struct perf_counter {
337 #ifdef CONFIG_PERF_COUNTERS
338 struct list_head list_entry;
339 struct list_head event_entry;
340 struct list_head sibling_list;
341 int nr_siblings;
342 struct perf_counter *group_leader;
343 const struct hw_perf_counter_ops *hw_ops;
344
345 enum perf_counter_active_state state;
346 enum perf_counter_active_state prev_state;
347 atomic64_t count;
348
349 /*
350 * These are the total time in nanoseconds that the counter
351 * has been enabled (i.e. eligible to run, and the task has
352 * been scheduled in, if this is a per-task counter)
353 * and running (scheduled onto the CPU), respectively.
354 *
355 * They are computed from tstamp_enabled, tstamp_running and
356 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
357 */
358 u64 total_time_enabled;
359 u64 total_time_running;
360
361 /*
362 * These are timestamps used for computing total_time_enabled
363 * and total_time_running when the counter is in INACTIVE or
364 * ACTIVE state, measured in nanoseconds from an arbitrary point
365 * in time.
366 * tstamp_enabled: the notional time when the counter was enabled
367 * tstamp_running: the notional time when the counter was scheduled on
368 * tstamp_stopped: in INACTIVE state, the notional time when the
369 * counter was scheduled off.
370 */
371 u64 tstamp_enabled;
372 u64 tstamp_running;
373 u64 tstamp_stopped;
374
375 struct perf_counter_hw_event hw_event;
376 struct hw_perf_counter hw;
377
378 struct perf_counter_context *ctx;
379 struct task_struct *task;
380 struct file *filp;
381
382 struct perf_counter *parent;
383 struct list_head child_list;
384
385 /*
386 * These accumulate total time (in nanoseconds) that children
387 * counters have been enabled and running, respectively.
388 */
389 atomic64_t child_total_time_enabled;
390 atomic64_t child_total_time_running;
391
392 /*
393 * Protect attach/detach and child_list:
394 */
395 struct mutex mutex;
396
397 int oncpu;
398 int cpu;
399
400 /* mmap bits */
401 struct mutex mmap_mutex;
402 atomic_t mmap_count;
403 struct perf_mmap_data *data;
404
405 /* poll related */
406 wait_queue_head_t waitq;
407 /* optional: for NMIs */
408 struct perf_wakeup_entry wakeup;
409
410 void (*destroy)(struct perf_counter *);
411 struct rcu_head rcu_head;
412 #endif
413 };
414
415 /**
416 * struct perf_counter_context - counter context structure
417 *
418 * Used as a container for task counters and CPU counters as well:
419 */
420 struct perf_counter_context {
421 #ifdef CONFIG_PERF_COUNTERS
422 /*
423 * Protect the states of the counters in the list,
424 * nr_active, and the list:
425 */
426 spinlock_t lock;
427 /*
428 * Protect the list of counters. Locking either mutex or lock
429 * is sufficient to ensure the list doesn't change; to change
430 * the list you need to lock both the mutex and the spinlock.
431 */
432 struct mutex mutex;
433
434 struct list_head counter_list;
435 struct list_head event_list;
436 int nr_counters;
437 int nr_active;
438 int is_active;
439 struct task_struct *task;
440
441 /*
442 * time_now is the current time in nanoseconds since an arbitrary
443 * point in the past. For per-task counters, this is based on the
444 * task clock, and for per-cpu counters it is based on the cpu clock.
445 * time_lost is an offset from the task/cpu clock, used to make it
446 * appear that time only passes while the context is scheduled in.
447 */
448 u64 time_now;
449 u64 time_lost;
450 #endif
451 };
452
453 /**
454 * struct perf_counter_cpu_context - per cpu counter context structure
455 */
456 struct perf_cpu_context {
457 struct perf_counter_context ctx;
458 struct perf_counter_context *task_ctx;
459 int active_oncpu;
460 int max_pertask;
461 int exclusive;
462
463 /*
464 * Recursion avoidance:
465 *
466 * task, softirq, irq, nmi context
467 */
468 int recursion[4];
469 };
470
471 /*
472 * Set by architecture code:
473 */
474 extern int perf_max_counters;
475
476 #ifdef CONFIG_PERF_COUNTERS
477 extern const struct hw_perf_counter_ops *
478 hw_perf_counter_init(struct perf_counter *counter);
479
480 extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
481 extern void perf_counter_task_sched_out(struct task_struct *task, int cpu);
482 extern void perf_counter_task_tick(struct task_struct *task, int cpu);
483 extern void perf_counter_init_task(struct task_struct *child);
484 extern void perf_counter_exit_task(struct task_struct *child);
485 extern void perf_counter_do_pending(void);
486 extern void perf_counter_print_debug(void);
487 extern void perf_counter_unthrottle(void);
488 extern u64 hw_perf_save_disable(void);
489 extern void hw_perf_restore(u64 ctrl);
490 extern int perf_counter_task_disable(void);
491 extern int perf_counter_task_enable(void);
492 extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
493 struct perf_cpu_context *cpuctx,
494 struct perf_counter_context *ctx, int cpu);
495 extern void perf_counter_update_userpage(struct perf_counter *counter);
496
497 extern void perf_counter_output(struct perf_counter *counter,
498 int nmi, struct pt_regs *regs);
499 /*
500 * Return 1 for a software counter, 0 for a hardware counter
501 */
502 static inline int is_software_counter(struct perf_counter *counter)
503 {
504 return !perf_event_raw(&counter->hw_event) &&
505 perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE;
506 }
507
508 extern void perf_swcounter_event(u32, u64, int, struct pt_regs *);
509
510 extern void perf_counter_mmap(unsigned long addr, unsigned long len,
511 unsigned long pgoff, struct file *file);
512
513 extern void perf_counter_munmap(unsigned long addr, unsigned long len,
514 unsigned long pgoff, struct file *file);
515
516 #define MAX_STACK_DEPTH 255
517
518 struct perf_callchain_entry {
519 u64 nr;
520 u64 ip[MAX_STACK_DEPTH];
521 };
522
523 extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);
524
525 #else
526 static inline void
527 perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
528 static inline void
529 perf_counter_task_sched_out(struct task_struct *task, int cpu) { }
530 static inline void
531 perf_counter_task_tick(struct task_struct *task, int cpu) { }
532 static inline void perf_counter_init_task(struct task_struct *child) { }
533 static inline void perf_counter_exit_task(struct task_struct *child) { }
534 static inline void perf_counter_do_pending(void) { }
535 static inline void perf_counter_print_debug(void) { }
536 static inline void perf_counter_unthrottle(void) { }
537 static inline void hw_perf_restore(u64 ctrl) { }
538 static inline u64 hw_perf_save_disable(void) { return 0; }
539 static inline int perf_counter_task_disable(void) { return -EINVAL; }
540 static inline int perf_counter_task_enable(void) { return -EINVAL; }
541
542 static inline void
543 perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs) { }
544
545
546 static inline void
547 perf_counter_mmap(unsigned long addr, unsigned long len,
548 unsigned long pgoff, struct file *file) { }
549
550 static inline void
551 perf_counter_munmap(unsigned long addr, unsigned long len,
552 unsigned long pgoff, struct file *file) { }
553
554 #endif
555
556 #endif /* __KERNEL__ */
557 #endif /* _LINUX_PERF_COUNTER_H */
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