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[deliverable/linux.git] / include / linux / phy.h
1 /*
2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16 #ifndef __PHY_H
17 #define __PHY_H
18
19 #include <linux/spinlock.h>
20 #include <linux/ethtool.h>
21 #include <linux/mii.h>
22 #include <linux/timer.h>
23 #include <linux/workqueue.h>
24 #include <linux/mod_devicetable.h>
25
26 #include <linux/atomic.h>
27
28 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
29 SUPPORTED_TP | \
30 SUPPORTED_MII)
31
32 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
33 SUPPORTED_10baseT_Full)
34
35 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
36 SUPPORTED_100baseT_Full)
37
38 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
39 SUPPORTED_1000baseT_Full)
40
41 #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
42 PHY_100BT_FEATURES | \
43 PHY_DEFAULT_FEATURES)
44
45 #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
46 PHY_1000BT_FEATURES)
47
48
49 /*
50 * Set phydev->irq to PHY_POLL if interrupts are not supported,
51 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
52 * the attached driver handles the interrupt
53 */
54 #define PHY_POLL -1
55 #define PHY_IGNORE_INTERRUPT -2
56
57 #define PHY_HAS_INTERRUPT 0x00000001
58 #define PHY_HAS_MAGICANEG 0x00000002
59 #define PHY_IS_INTERNAL 0x00000004
60
61 /* Interface Mode definitions */
62 typedef enum {
63 PHY_INTERFACE_MODE_NA,
64 PHY_INTERFACE_MODE_MII,
65 PHY_INTERFACE_MODE_GMII,
66 PHY_INTERFACE_MODE_SGMII,
67 PHY_INTERFACE_MODE_TBI,
68 PHY_INTERFACE_MODE_REVMII,
69 PHY_INTERFACE_MODE_RMII,
70 PHY_INTERFACE_MODE_RGMII,
71 PHY_INTERFACE_MODE_RGMII_ID,
72 PHY_INTERFACE_MODE_RGMII_RXID,
73 PHY_INTERFACE_MODE_RGMII_TXID,
74 PHY_INTERFACE_MODE_RTBI,
75 PHY_INTERFACE_MODE_SMII,
76 PHY_INTERFACE_MODE_XGMII,
77 PHY_INTERFACE_MODE_MOCA,
78 PHY_INTERFACE_MODE_QSGMII,
79 PHY_INTERFACE_MODE_MAX,
80 } phy_interface_t;
81
82 /**
83 * It maps 'enum phy_interface_t' found in include/linux/phy.h
84 * into the device tree binding of 'phy-mode', so that Ethernet
85 * device driver can get phy interface from device tree.
86 */
87 static inline const char *phy_modes(phy_interface_t interface)
88 {
89 switch (interface) {
90 case PHY_INTERFACE_MODE_NA:
91 return "";
92 case PHY_INTERFACE_MODE_MII:
93 return "mii";
94 case PHY_INTERFACE_MODE_GMII:
95 return "gmii";
96 case PHY_INTERFACE_MODE_SGMII:
97 return "sgmii";
98 case PHY_INTERFACE_MODE_TBI:
99 return "tbi";
100 case PHY_INTERFACE_MODE_REVMII:
101 return "rev-mii";
102 case PHY_INTERFACE_MODE_RMII:
103 return "rmii";
104 case PHY_INTERFACE_MODE_RGMII:
105 return "rgmii";
106 case PHY_INTERFACE_MODE_RGMII_ID:
107 return "rgmii-id";
108 case PHY_INTERFACE_MODE_RGMII_RXID:
109 return "rgmii-rxid";
110 case PHY_INTERFACE_MODE_RGMII_TXID:
111 return "rgmii-txid";
112 case PHY_INTERFACE_MODE_RTBI:
113 return "rtbi";
114 case PHY_INTERFACE_MODE_SMII:
115 return "smii";
116 case PHY_INTERFACE_MODE_XGMII:
117 return "xgmii";
118 case PHY_INTERFACE_MODE_MOCA:
119 return "moca";
120 case PHY_INTERFACE_MODE_QSGMII:
121 return "qsgmii";
122 default:
123 return "unknown";
124 }
125 }
126
127
128 #define PHY_INIT_TIMEOUT 100000
129 #define PHY_STATE_TIME 1
130 #define PHY_FORCE_TIMEOUT 10
131 #define PHY_AN_TIMEOUT 10
132
133 #define PHY_MAX_ADDR 32
134
135 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
136 #define PHY_ID_FMT "%s:%02x"
137
138 /*
139 * Need to be a little smaller than phydev->dev.bus_id to leave room
140 * for the ":%02x"
141 */
142 #define MII_BUS_ID_SIZE (20 - 3)
143
144 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
145 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
146 #define MII_ADDR_C45 (1<<30)
147
148 struct device;
149 struct sk_buff;
150
151 /*
152 * The Bus class for PHYs. Devices which provide access to
153 * PHYs should register using this structure
154 */
155 struct mii_bus {
156 const char *name;
157 char id[MII_BUS_ID_SIZE];
158 void *priv;
159 int (*read)(struct mii_bus *bus, int phy_id, int regnum);
160 int (*write)(struct mii_bus *bus, int phy_id, int regnum, u16 val);
161 int (*reset)(struct mii_bus *bus);
162
163 /*
164 * A lock to ensure that only one thing can read/write
165 * the MDIO bus at a time
166 */
167 struct mutex mdio_lock;
168
169 struct device *parent;
170 enum {
171 MDIOBUS_ALLOCATED = 1,
172 MDIOBUS_REGISTERED,
173 MDIOBUS_UNREGISTERED,
174 MDIOBUS_RELEASED,
175 } state;
176 struct device dev;
177
178 /* list of all PHYs on bus */
179 struct phy_device *phy_map[PHY_MAX_ADDR];
180
181 /* PHY addresses to be ignored when probing */
182 u32 phy_mask;
183
184 /*
185 * Pointer to an array of interrupts, each PHY's
186 * interrupt at the index matching its address
187 */
188 int *irq;
189 };
190 #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
191
192 struct mii_bus *mdiobus_alloc_size(size_t);
193 static inline struct mii_bus *mdiobus_alloc(void)
194 {
195 return mdiobus_alloc_size(0);
196 }
197
198 int mdiobus_register(struct mii_bus *bus);
199 void mdiobus_unregister(struct mii_bus *bus);
200 void mdiobus_free(struct mii_bus *bus);
201 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
202 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
203 {
204 return devm_mdiobus_alloc_size(dev, 0);
205 }
206
207 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
208 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
209 int mdiobus_read(struct mii_bus *bus, int addr, u32 regnum);
210 int mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val);
211
212
213 #define PHY_INTERRUPT_DISABLED 0x0
214 #define PHY_INTERRUPT_ENABLED 0x80000000
215
216 /* PHY state machine states:
217 *
218 * DOWN: PHY device and driver are not ready for anything. probe
219 * should be called if and only if the PHY is in this state,
220 * given that the PHY device exists.
221 * - PHY driver probe function will, depending on the PHY, set
222 * the state to STARTING or READY
223 *
224 * STARTING: PHY device is coming up, and the ethernet driver is
225 * not ready. PHY drivers may set this in the probe function.
226 * If they do, they are responsible for making sure the state is
227 * eventually set to indicate whether the PHY is UP or READY,
228 * depending on the state when the PHY is done starting up.
229 * - PHY driver will set the state to READY
230 * - start will set the state to PENDING
231 *
232 * READY: PHY is ready to send and receive packets, but the
233 * controller is not. By default, PHYs which do not implement
234 * probe will be set to this state by phy_probe(). If the PHY
235 * driver knows the PHY is ready, and the PHY state is STARTING,
236 * then it sets this STATE.
237 * - start will set the state to UP
238 *
239 * PENDING: PHY device is coming up, but the ethernet driver is
240 * ready. phy_start will set this state if the PHY state is
241 * STARTING.
242 * - PHY driver will set the state to UP when the PHY is ready
243 *
244 * UP: The PHY and attached device are ready to do work.
245 * Interrupts should be started here.
246 * - timer moves to AN
247 *
248 * AN: The PHY is currently negotiating the link state. Link is
249 * therefore down for now. phy_timer will set this state when it
250 * detects the state is UP. config_aneg will set this state
251 * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
252 * - If autonegotiation finishes, but there's no link, it sets
253 * the state to NOLINK.
254 * - If aneg finishes with link, it sets the state to RUNNING,
255 * and calls adjust_link
256 * - If autonegotiation did not finish after an arbitrary amount
257 * of time, autonegotiation should be tried again if the PHY
258 * supports "magic" autonegotiation (back to AN)
259 * - If it didn't finish, and no magic_aneg, move to FORCING.
260 *
261 * NOLINK: PHY is up, but not currently plugged in.
262 * - If the timer notes that the link comes back, we move to RUNNING
263 * - config_aneg moves to AN
264 * - phy_stop moves to HALTED
265 *
266 * FORCING: PHY is being configured with forced settings
267 * - if link is up, move to RUNNING
268 * - If link is down, we drop to the next highest setting, and
269 * retry (FORCING) after a timeout
270 * - phy_stop moves to HALTED
271 *
272 * RUNNING: PHY is currently up, running, and possibly sending
273 * and/or receiving packets
274 * - timer will set CHANGELINK if we're polling (this ensures the
275 * link state is polled every other cycle of this state machine,
276 * which makes it every other second)
277 * - irq will set CHANGELINK
278 * - config_aneg will set AN
279 * - phy_stop moves to HALTED
280 *
281 * CHANGELINK: PHY experienced a change in link state
282 * - timer moves to RUNNING if link
283 * - timer moves to NOLINK if the link is down
284 * - phy_stop moves to HALTED
285 *
286 * HALTED: PHY is up, but no polling or interrupts are done. Or
287 * PHY is in an error state.
288 *
289 * - phy_start moves to RESUMING
290 *
291 * RESUMING: PHY was halted, but now wants to run again.
292 * - If we are forcing, or aneg is done, timer moves to RUNNING
293 * - If aneg is not done, timer moves to AN
294 * - phy_stop moves to HALTED
295 */
296 enum phy_state {
297 PHY_DOWN = 0,
298 PHY_STARTING,
299 PHY_READY,
300 PHY_PENDING,
301 PHY_UP,
302 PHY_AN,
303 PHY_RUNNING,
304 PHY_NOLINK,
305 PHY_FORCING,
306 PHY_CHANGELINK,
307 PHY_HALTED,
308 PHY_RESUMING
309 };
310
311 /**
312 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
313 * @devices_in_package: Bit vector of devices present.
314 * @device_ids: The device identifer for each present device.
315 */
316 struct phy_c45_device_ids {
317 u32 devices_in_package;
318 u32 device_ids[8];
319 };
320
321 /* phy_device: An instance of a PHY
322 *
323 * drv: Pointer to the driver for this PHY instance
324 * bus: Pointer to the bus this PHY is on
325 * dev: driver model device structure for this PHY
326 * phy_id: UID for this device found during discovery
327 * c45_ids: 802.3-c45 Device Identifers if is_c45.
328 * is_c45: Set to true if this phy uses clause 45 addressing.
329 * is_internal: Set to true if this phy is internal to a MAC.
330 * state: state of the PHY for management purposes
331 * dev_flags: Device-specific flags used by the PHY driver.
332 * addr: Bus address of PHY
333 * link_timeout: The number of timer firings to wait before the
334 * giving up on the current attempt at acquiring a link
335 * irq: IRQ number of the PHY's interrupt (-1 if none)
336 * phy_timer: The timer for handling the state machine
337 * phy_queue: A work_queue for the interrupt
338 * attached_dev: The attached enet driver's device instance ptr
339 * adjust_link: Callback for the enet controller to respond to
340 * changes in the link state.
341 *
342 * speed, duplex, pause, supported, advertising, lp_advertising,
343 * and autoneg are used like in mii_if_info
344 *
345 * interrupts currently only supports enabled or disabled,
346 * but could be changed in the future to support enabling
347 * and disabling specific interrupts
348 *
349 * Contains some infrastructure for polling and interrupt
350 * handling, as well as handling shifts in PHY hardware state
351 */
352 struct phy_device {
353 /* Information about the PHY type */
354 /* And management functions */
355 struct phy_driver *drv;
356
357 struct mii_bus *bus;
358
359 struct device dev;
360
361 u32 phy_id;
362
363 struct phy_c45_device_ids c45_ids;
364 bool is_c45;
365 bool is_internal;
366 bool has_fixups;
367
368 enum phy_state state;
369
370 u32 dev_flags;
371
372 phy_interface_t interface;
373
374 /* Bus address of the PHY (0-31) */
375 int addr;
376
377 /*
378 * forced speed & duplex (no autoneg)
379 * partner speed & duplex & pause (autoneg)
380 */
381 int speed;
382 int duplex;
383 int pause;
384 int asym_pause;
385
386 /* The most recently read link state */
387 int link;
388
389 /* Enabled Interrupts */
390 u32 interrupts;
391
392 /* Union of PHY and Attached devices' supported modes */
393 /* See mii.h for more info */
394 u32 supported;
395 u32 advertising;
396 u32 lp_advertising;
397
398 int autoneg;
399
400 int link_timeout;
401
402 /*
403 * Interrupt number for this PHY
404 * -1 means no interrupt
405 */
406 int irq;
407
408 /* private data pointer */
409 /* For use by PHYs to maintain extra state */
410 void *priv;
411
412 /* Interrupt and Polling infrastructure */
413 struct work_struct phy_queue;
414 struct delayed_work state_queue;
415 atomic_t irq_disable;
416
417 struct mutex lock;
418
419 struct net_device *attached_dev;
420
421 void (*adjust_link)(struct net_device *dev);
422 };
423 #define to_phy_device(d) container_of(d, struct phy_device, dev)
424
425 /* struct phy_driver: Driver structure for a particular PHY type
426 *
427 * phy_id: The result of reading the UID registers of this PHY
428 * type, and ANDing them with the phy_id_mask. This driver
429 * only works for PHYs with IDs which match this field
430 * name: The friendly name of this PHY type
431 * phy_id_mask: Defines the important bits of the phy_id
432 * features: A list of features (speed, duplex, etc) supported
433 * by this PHY
434 * flags: A bitfield defining certain other features this PHY
435 * supports (like interrupts)
436 *
437 * The drivers must implement config_aneg and read_status. All
438 * other functions are optional. Note that none of these
439 * functions should be called from interrupt time. The goal is
440 * for the bus read/write functions to be able to block when the
441 * bus transaction is happening, and be freed up by an interrupt
442 * (The MPC85xx has this ability, though it is not currently
443 * supported in the driver).
444 */
445 struct phy_driver {
446 u32 phy_id;
447 char *name;
448 unsigned int phy_id_mask;
449 u32 features;
450 u32 flags;
451
452 /*
453 * Called to issue a PHY software reset
454 */
455 int (*soft_reset)(struct phy_device *phydev);
456
457 /*
458 * Called to initialize the PHY,
459 * including after a reset
460 */
461 int (*config_init)(struct phy_device *phydev);
462
463 /*
464 * Called during discovery. Used to set
465 * up device-specific structures, if any
466 */
467 int (*probe)(struct phy_device *phydev);
468
469 /* PHY Power Management */
470 int (*suspend)(struct phy_device *phydev);
471 int (*resume)(struct phy_device *phydev);
472
473 /*
474 * Configures the advertisement and resets
475 * autonegotiation if phydev->autoneg is on,
476 * forces the speed to the current settings in phydev
477 * if phydev->autoneg is off
478 */
479 int (*config_aneg)(struct phy_device *phydev);
480
481 /* Determines the auto negotiation result */
482 int (*aneg_done)(struct phy_device *phydev);
483
484 /* Determines the negotiated speed and duplex */
485 int (*read_status)(struct phy_device *phydev);
486
487 /* Clears any pending interrupts */
488 int (*ack_interrupt)(struct phy_device *phydev);
489
490 /* Enables or disables interrupts */
491 int (*config_intr)(struct phy_device *phydev);
492
493 /*
494 * Checks if the PHY generated an interrupt.
495 * For multi-PHY devices with shared PHY interrupt pin
496 */
497 int (*did_interrupt)(struct phy_device *phydev);
498
499 /* Clears up any memory if needed */
500 void (*remove)(struct phy_device *phydev);
501
502 /* Returns true if this is a suitable driver for the given
503 * phydev. If NULL, matching is based on phy_id and
504 * phy_id_mask.
505 */
506 int (*match_phy_device)(struct phy_device *phydev);
507
508 /* Handles ethtool queries for hardware time stamping. */
509 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
510
511 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
512 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
513
514 /*
515 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
516 * the phy driver promises to deliver it using netif_rx() as
517 * soon as a timestamp becomes available. One of the
518 * PTP_CLASS_ values is passed in 'type'. The function must
519 * return true if the skb is accepted for delivery.
520 */
521 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
522
523 /*
524 * Requests a Tx timestamp for 'skb'. The phy driver promises
525 * to deliver it using skb_complete_tx_timestamp() as soon as a
526 * timestamp becomes available. One of the PTP_CLASS_ values
527 * is passed in 'type'.
528 */
529 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
530
531 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
532 * enable Wake on LAN, so set_wol is provided to be called in the
533 * ethernet driver's set_wol function. */
534 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
535
536 /* See set_wol, but for checking whether Wake on LAN is enabled. */
537 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
538
539 /*
540 * Called to inform a PHY device driver when the core is about to
541 * change the link state. This callback is supposed to be used as
542 * fixup hook for drivers that need to take action when the link
543 * state changes. Drivers are by no means allowed to mess with the
544 * PHY device structure in their implementations.
545 */
546 void (*link_change_notify)(struct phy_device *dev);
547
548 /* A function provided by a phy specific driver to override the
549 * the PHY driver framework support for reading a MMD register
550 * from the PHY. If not supported, return -1. This function is
551 * optional for PHY specific drivers, if not provided then the
552 * default MMD read function is used by the PHY framework.
553 */
554 int (*read_mmd_indirect)(struct phy_device *dev, int ptrad,
555 int devnum, int regnum);
556
557 /* A function provided by a phy specific driver to override the
558 * the PHY driver framework support for writing a MMD register
559 * from the PHY. This function is optional for PHY specific drivers,
560 * if not provided then the default MMD read function is used by
561 * the PHY framework.
562 */
563 void (*write_mmd_indirect)(struct phy_device *dev, int ptrad,
564 int devnum, int regnum, u32 val);
565
566 struct device_driver driver;
567 };
568 #define to_phy_driver(d) container_of(d, struct phy_driver, driver)
569
570 #define PHY_ANY_ID "MATCH ANY PHY"
571 #define PHY_ANY_UID 0xffffffff
572
573 /* A Structure for boards to register fixups with the PHY Lib */
574 struct phy_fixup {
575 struct list_head list;
576 char bus_id[20];
577 u32 phy_uid;
578 u32 phy_uid_mask;
579 int (*run)(struct phy_device *phydev);
580 };
581
582 /**
583 * phy_read_mmd - Convenience function for reading a register
584 * from an MMD on a given PHY.
585 * @phydev: The phy_device struct
586 * @devad: The MMD to read from
587 * @regnum: The register on the MMD to read
588 *
589 * Same rules as for phy_read();
590 */
591 static inline int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
592 {
593 if (!phydev->is_c45)
594 return -EOPNOTSUPP;
595
596 return mdiobus_read(phydev->bus, phydev->addr,
597 MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff));
598 }
599
600 /**
601 * phy_read_mmd_indirect - reads data from the MMD registers
602 * @phydev: The PHY device bus
603 * @prtad: MMD Address
604 * @devad: MMD DEVAD
605 * @addr: PHY address on the MII bus
606 *
607 * Description: it reads data from the MMD registers (clause 22 to access to
608 * clause 45) of the specified phy address.
609 */
610 int phy_read_mmd_indirect(struct phy_device *phydev, int prtad,
611 int devad, int addr);
612
613 /**
614 * phy_read - Convenience function for reading a given PHY register
615 * @phydev: the phy_device struct
616 * @regnum: register number to read
617 *
618 * NOTE: MUST NOT be called from interrupt context,
619 * because the bus read/write functions may wait for an interrupt
620 * to conclude the operation.
621 */
622 static inline int phy_read(struct phy_device *phydev, u32 regnum)
623 {
624 return mdiobus_read(phydev->bus, phydev->addr, regnum);
625 }
626
627 /**
628 * phy_write - Convenience function for writing a given PHY register
629 * @phydev: the phy_device struct
630 * @regnum: register number to write
631 * @val: value to write to @regnum
632 *
633 * NOTE: MUST NOT be called from interrupt context,
634 * because the bus read/write functions may wait for an interrupt
635 * to conclude the operation.
636 */
637 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
638 {
639 return mdiobus_write(phydev->bus, phydev->addr, regnum, val);
640 }
641
642 /**
643 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
644 * @phydev: the phy_device struct
645 *
646 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
647 * PHY_IGNORE_INTERRUPT
648 */
649 static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
650 {
651 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
652 }
653
654 /**
655 * phy_is_internal - Convenience function for testing if a PHY is internal
656 * @phydev: the phy_device struct
657 */
658 static inline bool phy_is_internal(struct phy_device *phydev)
659 {
660 return phydev->is_internal;
661 }
662
663 /**
664 * phy_write_mmd - Convenience function for writing a register
665 * on an MMD on a given PHY.
666 * @phydev: The phy_device struct
667 * @devad: The MMD to read from
668 * @regnum: The register on the MMD to read
669 * @val: value to write to @regnum
670 *
671 * Same rules as for phy_write();
672 */
673 static inline int phy_write_mmd(struct phy_device *phydev, int devad,
674 u32 regnum, u16 val)
675 {
676 if (!phydev->is_c45)
677 return -EOPNOTSUPP;
678
679 regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff);
680
681 return mdiobus_write(phydev->bus, phydev->addr, regnum, val);
682 }
683
684 /**
685 * phy_write_mmd_indirect - writes data to the MMD registers
686 * @phydev: The PHY device
687 * @prtad: MMD Address
688 * @devad: MMD DEVAD
689 * @addr: PHY address on the MII bus
690 * @data: data to write in the MMD register
691 *
692 * Description: Write data from the MMD registers of the specified
693 * phy address.
694 */
695 void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
696 int devad, int addr, u32 data);
697
698 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
699 bool is_c45,
700 struct phy_c45_device_ids *c45_ids);
701 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
702 int phy_device_register(struct phy_device *phy);
703 int phy_init_hw(struct phy_device *phydev);
704 int phy_suspend(struct phy_device *phydev);
705 int phy_resume(struct phy_device *phydev);
706 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
707 phy_interface_t interface);
708 struct phy_device *phy_find_first(struct mii_bus *bus);
709 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
710 u32 flags, phy_interface_t interface);
711 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
712 void (*handler)(struct net_device *),
713 phy_interface_t interface);
714 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
715 void (*handler)(struct net_device *),
716 phy_interface_t interface);
717 void phy_disconnect(struct phy_device *phydev);
718 void phy_detach(struct phy_device *phydev);
719 void phy_start(struct phy_device *phydev);
720 void phy_stop(struct phy_device *phydev);
721 int phy_start_aneg(struct phy_device *phydev);
722
723 int phy_stop_interrupts(struct phy_device *phydev);
724
725 static inline int phy_read_status(struct phy_device *phydev)
726 {
727 return phydev->drv->read_status(phydev);
728 }
729
730 int genphy_config_init(struct phy_device *phydev);
731 int genphy_setup_forced(struct phy_device *phydev);
732 int genphy_restart_aneg(struct phy_device *phydev);
733 int genphy_config_aneg(struct phy_device *phydev);
734 int genphy_aneg_done(struct phy_device *phydev);
735 int genphy_update_link(struct phy_device *phydev);
736 int genphy_read_status(struct phy_device *phydev);
737 int genphy_suspend(struct phy_device *phydev);
738 int genphy_resume(struct phy_device *phydev);
739 int genphy_soft_reset(struct phy_device *phydev);
740 void phy_driver_unregister(struct phy_driver *drv);
741 void phy_drivers_unregister(struct phy_driver *drv, int n);
742 int phy_driver_register(struct phy_driver *new_driver);
743 int phy_drivers_register(struct phy_driver *new_driver, int n);
744 void phy_state_machine(struct work_struct *work);
745 void phy_change(struct work_struct *work);
746 void phy_mac_interrupt(struct phy_device *phydev, int new_link);
747 void phy_start_machine(struct phy_device *phydev);
748 void phy_stop_machine(struct phy_device *phydev);
749 int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
750 int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd);
751 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
752 int phy_start_interrupts(struct phy_device *phydev);
753 void phy_print_status(struct phy_device *phydev);
754 void phy_device_free(struct phy_device *phydev);
755
756 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
757 int (*run)(struct phy_device *));
758 int phy_register_fixup_for_id(const char *bus_id,
759 int (*run)(struct phy_device *));
760 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
761 int (*run)(struct phy_device *));
762
763 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
764 int phy_get_eee_err(struct phy_device *phydev);
765 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
766 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
767 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
768 void phy_ethtool_get_wol(struct phy_device *phydev,
769 struct ethtool_wolinfo *wol);
770
771 int __init mdio_bus_init(void);
772 void mdio_bus_exit(void);
773
774 extern struct bus_type mdio_bus_type;
775 #endif /* __PHY_H */
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