regmap: Add support for padding between register and address
[deliverable/linux.git] / include / linux / regmap.h
1 #ifndef __LINUX_REGMAP_H
2 #define __LINUX_REGMAP_H
3
4 /*
5 * Register map access API
6 *
7 * Copyright 2011 Wolfson Microelectronics plc
8 *
9 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 #include <linux/device.h>
17 #include <linux/list.h>
18
19 struct module;
20 struct i2c_client;
21 struct spi_device;
22
23 /* An enum of all the supported cache types */
24 enum regcache_type {
25 REGCACHE_NONE,
26 REGCACHE_RBTREE,
27 REGCACHE_COMPRESSED
28 };
29
30 /**
31 * Default value for a register. We use an array of structs rather
32 * than a simple array as many modern devices have very sparse
33 * register maps.
34 *
35 * @reg: Register address.
36 * @def: Register default value.
37 */
38 struct reg_default {
39 unsigned int reg;
40 unsigned int def;
41 };
42
43 /**
44 * Configuration for the register map of a device.
45 *
46 * @reg_bits: Number of bits in a register address, mandatory.
47 * @pad_bits: Number of bits of padding between register and value.
48 * @val_bits: Number of bits in a register value, mandatory.
49 *
50 * @writeable_reg: Optional callback returning true if the register
51 * can be written to.
52 * @readable_reg: Optional callback returning true if the register
53 * can be read from.
54 * @volatile_reg: Optional callback returning true if the register
55 * value can't be cached.
56 * @precious_reg: Optional callback returning true if the rgister
57 * should not be read outside of a call from the driver
58 * (eg, a clear on read interrupt status register).
59 *
60 * @max_register: Optional, specifies the maximum valid register index.
61 * @reg_defaults: Power on reset values for registers (for use with
62 * register cache support).
63 * @num_reg_defaults: Number of elements in reg_defaults.
64 *
65 * @read_flag_mask: Mask to be set in the top byte of the register when doing
66 * a read.
67 * @write_flag_mask: Mask to be set in the top byte of the register when doing
68 * a write. If both read_flag_mask and write_flag_mask are
69 * empty the regmap_bus default masks are used.
70 *
71 * @cache_type: The actual cache type.
72 * @reg_defaults_raw: Power on reset values for registers (for use with
73 * register cache support).
74 * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
75 */
76 struct regmap_config {
77 int reg_bits;
78 int pad_bits;
79 int val_bits;
80
81 bool (*writeable_reg)(struct device *dev, unsigned int reg);
82 bool (*readable_reg)(struct device *dev, unsigned int reg);
83 bool (*volatile_reg)(struct device *dev, unsigned int reg);
84 bool (*precious_reg)(struct device *dev, unsigned int reg);
85
86 unsigned int max_register;
87 const struct reg_default *reg_defaults;
88 unsigned int num_reg_defaults;
89 enum regcache_type cache_type;
90 const void *reg_defaults_raw;
91 unsigned int num_reg_defaults_raw;
92
93 u8 read_flag_mask;
94 u8 write_flag_mask;
95 };
96
97 typedef int (*regmap_hw_write)(struct device *dev, const void *data,
98 size_t count);
99 typedef int (*regmap_hw_gather_write)(struct device *dev,
100 const void *reg, size_t reg_len,
101 const void *val, size_t val_len);
102 typedef int (*regmap_hw_read)(struct device *dev,
103 const void *reg_buf, size_t reg_size,
104 void *val_buf, size_t val_size);
105
106 /**
107 * Description of a hardware bus for the register map infrastructure.
108 *
109 * @write: Write operation.
110 * @gather_write: Write operation with split register/value, return -ENOTSUPP
111 * if not implemented on a given device.
112 * @read: Read operation. Data is returned in the buffer used to transmit
113 * data.
114 * @read_flag_mask: Mask to be set in the top byte of the register when doing
115 * a read.
116 */
117 struct regmap_bus {
118 regmap_hw_write write;
119 regmap_hw_gather_write gather_write;
120 regmap_hw_read read;
121 u8 read_flag_mask;
122 };
123
124 struct regmap *regmap_init(struct device *dev,
125 const struct regmap_bus *bus,
126 const struct regmap_config *config);
127 struct regmap *regmap_init_i2c(struct i2c_client *i2c,
128 const struct regmap_config *config);
129 struct regmap *regmap_init_spi(struct spi_device *dev,
130 const struct regmap_config *config);
131
132 void regmap_exit(struct regmap *map);
133 int regmap_reinit_cache(struct regmap *map,
134 const struct regmap_config *config);
135 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
136 int regmap_raw_write(struct regmap *map, unsigned int reg,
137 const void *val, size_t val_len);
138 int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
139 int regmap_raw_read(struct regmap *map, unsigned int reg,
140 void *val, size_t val_len);
141 int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
142 size_t val_count);
143 int regmap_update_bits(struct regmap *map, unsigned int reg,
144 unsigned int mask, unsigned int val);
145 int regmap_update_bits_check(struct regmap *map, unsigned int reg,
146 unsigned int mask, unsigned int val,
147 bool *change);
148
149 int regcache_sync(struct regmap *map);
150 void regcache_cache_only(struct regmap *map, bool enable);
151 void regcache_cache_bypass(struct regmap *map, bool enable);
152 void regcache_mark_dirty(struct regmap *map);
153
154 /**
155 * Description of an IRQ for the generic regmap irq_chip.
156 *
157 * @reg_offset: Offset of the status/mask register within the bank
158 * @mask: Mask used to flag/control the register.
159 */
160 struct regmap_irq {
161 unsigned int reg_offset;
162 unsigned int mask;
163 };
164
165 /**
166 * Description of a generic regmap irq_chip. This is not intended to
167 * handle every possible interrupt controller, but it should handle a
168 * substantial proportion of those that are found in the wild.
169 *
170 * @name: Descriptive name for IRQ controller.
171 *
172 * @status_base: Base status register address.
173 * @mask_base: Base mask register address.
174 * @ack_base: Base ack address. If zero then the chip is clear on read.
175 *
176 * @num_regs: Number of registers in each control bank.
177 * @irqs: Descriptors for individual IRQs. Interrupt numbers are
178 * assigned based on the index in the array of the interrupt.
179 * @num_irqs: Number of descriptors.
180 */
181 struct regmap_irq_chip {
182 const char *name;
183
184 unsigned int status_base;
185 unsigned int mask_base;
186 unsigned int ack_base;
187
188 int num_regs;
189
190 const struct regmap_irq *irqs;
191 int num_irqs;
192 };
193
194 struct regmap_irq_chip_data;
195
196 int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
197 int irq_base, struct regmap_irq_chip *chip,
198 struct regmap_irq_chip_data **data);
199 void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
200 int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
201
202 #endif
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