include/linux/serial_core.h

   1 /*
   2  *  linux/drivers/char/serial_core.h
   3  *
   4  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #ifndef LINUX_SERIAL_CORE_H
  21 #define LINUX_SERIAL_CORE_H
  22
  23 #include <linux/serial.h>
  24
  25 /*
  26  * The type definitions.  These are from Ted Ts'o's serial.h
  27  */
  28 #define PORT_UNKNOWN    0
  29 #define PORT_8250       1
  30 #define PORT_16450      2
  31 #define PORT_16550      3
  32 #define PORT_16550A     4
  33 #define PORT_CIRRUS     5
  34 #define PORT_16650      6
  35 #define PORT_16650V2    7
  36 #define PORT_16750      8
  37 #define PORT_STARTECH   9
  38 #define PORT_16C950     10
  39 #define PORT_16654      11
  40 #define PORT_16850      12
  41 #define PORT_RSA        13
  42 #define PORT_NS16550A   14
  43 #define PORT_XSCALE     15
  44 #define PORT_RM9000     16      /* PMC-Sierra RM9xxx internal UART */
  45 #define PORT_OCTEON     17      /* Cavium OCTEON internal UART */
  46 #define PORT_AR7        18      /* Texas Instruments AR7 internal UART */
  47 #define PORT_MAX_8250   18      /* max port ID */
  48
  49 /*
  50  * ARM specific type numbers.  These are not currently guaranteed
  51  * to be implemented, and will change in the future.  These are
  52  * separate so any additions to the old serial.c that occur before
  53  * we are merged can be easily merged here.
  54  */
  55 #define PORT_PXA        31
  56 #define PORT_AMBA       32
  57 #define PORT_CLPS711X   33
  58 #define PORT_SA1100     34
  59 #define PORT_UART00     35
  60 #define PORT_21285      37
  61
  62 /* Sparc type numbers.  */
  63 #define PORT_SUNZILOG   38
  64 #define PORT_SUNSAB     39
  65
  66 /* DEC */
  67 #define PORT_DZ         46
  68 #define PORT_ZS         47
  69
  70 /* Parisc type numbers. */
  71 #define PORT_MUX        48
  72
  73 /* Atmel AT91 / AT32 SoC */
  74 #define PORT_ATMEL      49
  75
  76 /* Macintosh Zilog type numbers */
  77 #define PORT_MAC_ZILOG  50      /* m68k : not yet implemented */
  78 #define PORT_PMAC_ZILOG 51
  79
  80 /* SH-SCI */
  81 #define PORT_SCI        52
  82 #define PORT_SCIF       53
  83 #define PORT_IRDA       54
  84
  85 /* Samsung S3C2410 SoC and derivatives thereof */
  86 #define PORT_S3C2410    55
  87
  88 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
  89 #define PORT_IP22ZILOG  56
  90
  91 /* Sharp LH7a40x -- an ARM9 SoC series */
  92 #define PORT_LH7A40X    57
  93
  94 /* PPC CPM type number */
  95 #define PORT_CPM        58
  96
  97 /* MPC52xx type numbers */
  98 #define PORT_MPC52xx    59
  99
 100 /* IBM icom */
 101 #define PORT_ICOM       60
 102
 103 /* Samsung S3C2440 SoC */
 104 #define PORT_S3C2440    61
 105
 106 /* Motorola i.MX SoC */
 107 #define PORT_IMX        62
 108
 109 /* Marvell MPSC */
 110 #define PORT_MPSC       63
 111
 112 /* TXX9 type number */
 113 #define PORT_TXX9       64
 114
 115 /* NEC VR4100 series SIU/DSIU */
 116 #define PORT_VR41XX_SIU         65
 117 #define PORT_VR41XX_DSIU        66
 118
 119 /* Samsung S3C2400 SoC */
 120 #define PORT_S3C2400    67
 121
 122 /* M32R SIO */
 123 #define PORT_M32R_SIO   68
 124
 125 /*Digi jsm */
 126 #define PORT_JSM        69
 127
 128 #define PORT_PNX8XXX    70
 129
 130 /* Hilscher netx */
 131 #define PORT_NETX       71
 132
 133 /* SUN4V Hypervisor Console */
 134 #define PORT_SUNHV      72
 135
 136 #define PORT_S3C2412    73
 137
 138 /* Xilinx uartlite */
 139 #define PORT_UARTLITE   74
 140
 141 /* Blackfin bf5xx */
 142 #define PORT_BFIN       75
 143
 144 /* Micrel KS8695 */
 145 #define PORT_KS8695     76
 146
 147 /* Broadcom SB1250, etc. SOC */
 148 #define PORT_SB1250_DUART       77
 149
 150 /* Freescale ColdFire */
 151 #define PORT_MCF        78
 152
 153 /* Blackfin SPORT */
 154 #define PORT_BFIN_SPORT         79
 155
 156 /* MN10300 on-chip UART numbers */
 157 #define PORT_MN10300            80
 158 #define PORT_MN10300_CTS        81
 159
 160 #define PORT_SC26XX     82
 161
 162 /* SH-SCI */
 163 #define PORT_SCIFA      83
 164
 165 #define PORT_S3C6400    84
 166
 167 /* NWPSERIAL */
 168 #define PORT_NWPSERIAL  85
 169
 170 /* MAX3100 */
 171 #define PORT_MAX3100    86
 172
 173 /* Timberdale UART */
 174 #define PORT_TIMBUART   87
 175
 176 /* Qualcomm MSM SoCs */
 177 #define PORT_MSM        88
 178
 179 /* BCM63xx family SoCs */
 180 #define PORT_BCM63XX    89
 181
 182 /* Aeroflex Gaisler GRLIB APBUART */
 183 #define PORT_APBUART    90
 184
 185 /* Altera UARTs */
 186 #define PORT_ALTERA_JTAGUART    91
 187 #define PORT_ALTERA_UART        92
 188
 189 /* MAX3107 */
 190 #define PORT_MAX3107    94
 191
 192 /* High Speed UART for Medfield */
 193 #define PORT_MFD        95
 194
 195 #ifdef __KERNEL__
 196
 197 #include <linux/compiler.h>
 198 #include <linux/interrupt.h>
 199 #include <linux/circ_buf.h>
 200 #include <linux/spinlock.h>
 201 #include <linux/sched.h>
 202 #include <linux/tty.h>
 203 #include <linux/mutex.h>
 204 #include <linux/sysrq.h>
 205
 206 struct uart_port;
 207 struct serial_struct;
 208 struct device;
 209
 210 /*
 211  * This structure describes all the operations that can be
 212  * done on the physical hardware.
 213  */
 214 struct uart_ops {
 215         unsigned int    (*tx_empty)(struct uart_port *);
 216         void            (*set_mctrl)(struct uart_port *, unsigned int mctrl);
 217         unsigned int    (*get_mctrl)(struct uart_port *);
 218         void            (*stop_tx)(struct uart_port *);
 219         void            (*start_tx)(struct uart_port *);
 220         void            (*send_xchar)(struct uart_port *, char ch);
 221         void            (*stop_rx)(struct uart_port *);
 222         void            (*enable_ms)(struct uart_port *);
 223         void            (*break_ctl)(struct uart_port *, int ctl);
 224         int             (*startup)(struct uart_port *);
 225         void            (*shutdown)(struct uart_port *);
 226         void            (*flush_buffer)(struct uart_port *);
 227         void            (*set_termios)(struct uart_port *, struct ktermios *new,
 228                                        struct ktermios *old);
 229         void            (*set_ldisc)(struct uart_port *, int new);
 230         void            (*pm)(struct uart_port *, unsigned int state,
 231                               unsigned int oldstate);
 232         int             (*set_wake)(struct uart_port *, unsigned int state);
 233
 234         /*
 235          * Return a string describing the type of the port
 236          */
 237         const char *(*type)(struct uart_port *);
 238
 239         /*
 240          * Release IO and memory resources used by the port.
 241          * This includes iounmap if necessary.
 242          */
 243         void            (*release_port)(struct uart_port *);
 244
 245         /*
 246          * Request IO and memory resources used by the port.
 247          * This includes iomapping the port if necessary.
 248          */
 249         int             (*request_port)(struct uart_port *);
 250         void            (*config_port)(struct uart_port *, int);
 251         int             (*verify_port)(struct uart_port *, struct serial_struct *);
 252         int             (*ioctl)(struct uart_port *, unsigned int, unsigned long);
 253 #ifdef CONFIG_CONSOLE_POLL
 254         void    (*poll_put_char)(struct uart_port *, unsigned char);
 255         int             (*poll_get_char)(struct uart_port *);
 256 #endif
 257 };
 258
 259 #define NO_POLL_CHAR            0x00ff0000
 260 #define UART_CONFIG_TYPE        (1 << 0)
 261 #define UART_CONFIG_IRQ         (1 << 1)
 262
 263 struct uart_icount {
 264         __u32   cts;
 265         __u32   dsr;
 266         __u32   rng;
 267         __u32   dcd;
 268         __u32   rx;
 269         __u32   tx;
 270         __u32   frame;
 271         __u32   overrun;
 272         __u32   parity;
 273         __u32   brk;
 274         __u32   buf_overrun;
 275 };
 276
 277 typedef unsigned int __bitwise__ upf_t;
 278
 279 struct uart_port {
 280         spinlock_t              lock;                   /* port lock */
 281         unsigned long           iobase;                 /* in/out[bwl] */
 282         unsigned char __iomem   *membase;               /* read/write[bwl] */
 283         unsigned int            (*serial_in)(struct uart_port *, int);
 284         void                    (*serial_out)(struct uart_port *, int, int);
 285         void                    (*set_termios)(struct uart_port *,
 286                                                struct ktermios *new,
 287                                                struct ktermios *old);
 288         unsigned int            irq;                    /* irq number */
 289         unsigned long           irqflags;               /* irq flags  */
 290         unsigned int            uartclk;                /* base uart clock */
 291         unsigned int            fifosize;               /* tx fifo size */
 292         unsigned char           x_char;                 /* xon/xoff char */
 293         unsigned char           regshift;               /* reg offset shift */
 294         unsigned char           iotype;                 /* io access style */
 295         unsigned char           unused1;
 296
 297 #define UPIO_PORT               (0)
 298 #define UPIO_HUB6               (1)
 299 #define UPIO_MEM                (2)
 300 #define UPIO_MEM32              (3)
 301 #define UPIO_AU                 (4)                     /* Au1x00 type IO */
 302 #define UPIO_TSI                (5)                     /* Tsi108/109 type IO */
 303 #define UPIO_DWAPB              (6)                     /* DesignWare APB UART */
 304 #define UPIO_RM9000             (7)                     /* RM9000 type IO */
 305
 306         unsigned int            read_status_mask;       /* driver specific */
 307         unsigned int            ignore_status_mask;     /* driver specific */
 308         struct uart_state       *state;                 /* pointer to parent state */
 309         struct uart_icount      icount;                 /* statistics */
 310
 311         struct console          *cons;                  /* struct console, if any */
 312 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
 313         unsigned long           sysrq;                  /* sysrq timeout */
 314 #endif
 315
 316         upf_t                   flags;
 317
 318 #define UPF_FOURPORT            ((__force upf_t) (1 << 1))
 319 #define UPF_SAK                 ((__force upf_t) (1 << 2))
 320 #define UPF_SPD_MASK            ((__force upf_t) (0x1030))
 321 #define UPF_SPD_HI              ((__force upf_t) (0x0010))
 322 #define UPF_SPD_VHI             ((__force upf_t) (0x0020))
 323 #define UPF_SPD_CUST            ((__force upf_t) (0x0030))
 324 #define UPF_SPD_SHI             ((__force upf_t) (0x1000))
 325 #define UPF_SPD_WARP            ((__force upf_t) (0x1010))
 326 #define UPF_SKIP_TEST           ((__force upf_t) (1 << 6))
 327 #define UPF_AUTO_IRQ            ((__force upf_t) (1 << 7))
 328 #define UPF_HARDPPS_CD          ((__force upf_t) (1 << 11))
 329 #define UPF_LOW_LATENCY         ((__force upf_t) (1 << 13))
 330 #define UPF_BUGGY_UART          ((__force upf_t) (1 << 14))
 331 #define UPF_NO_TXEN_TEST        ((__force upf_t) (1 << 15))
 332 #define UPF_MAGIC_MULTIPLIER    ((__force upf_t) (1 << 16))
 333 #define UPF_CONS_FLOW           ((__force upf_t) (1 << 23))
 334 #define UPF_SHARE_IRQ           ((__force upf_t) (1 << 24))
 335 /* The exact UART type is known and should not be probed.  */
 336 #define UPF_FIXED_TYPE          ((__force upf_t) (1 << 27))
 337 #define UPF_BOOT_AUTOCONF       ((__force upf_t) (1 << 28))
 338 #define UPF_FIXED_PORT          ((__force upf_t) (1 << 29))
 339 #define UPF_DEAD                ((__force upf_t) (1 << 30))
 340 #define UPF_IOREMAP             ((__force upf_t) (1 << 31))
 341
 342 #define UPF_CHANGE_MASK         ((__force upf_t) (0x17fff))
 343 #define UPF_USR_MASK            ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
 344
 345         unsigned int            mctrl;                  /* current modem ctrl settings */
 346         unsigned int            timeout;                /* character-based timeout */
 347         unsigned int            type;                   /* port type */
 348         const struct uart_ops   *ops;
 349         unsigned int            custom_divisor;
 350         unsigned int            line;                   /* port index */
 351         resource_size_t         mapbase;                /* for ioremap */
 352         struct device           *dev;                   /* parent device */
 353         unsigned char           hub6;                   /* this should be in the 8250 driver */
 354         unsigned char           suspended;
 355         unsigned char           unused[2];
 356         void                    *private_data;          /* generic platform data pointer */
 357 };
 358
 359 /*
 360  * This is the state information which is persistent across opens.
 361  */
 362 struct uart_state {
 363         struct tty_port         port;
 364
 365         int                     pm_state;
 366         struct circ_buf         xmit;
 367
 368         struct tasklet_struct   tlet;
 369         struct uart_port        *uart_port;
 370 };
 371
 372 #define UART_XMIT_SIZE  PAGE_SIZE
 373
 374
 375 /* number of characters left in xmit buffer before we ask for more */
 376 #define WAKEUP_CHARS            256
 377
 378 struct module;
 379 struct tty_driver;
 380
 381 struct uart_driver {
 382         struct module           *owner;
 383         const char              *driver_name;
 384         const char              *dev_name;
 385         int                      major;
 386         int                      minor;
 387         int                      nr;
 388         struct console          *cons;
 389
 390         /*
 391          * these are private; the low level driver should not
 392          * touch these; they should be initialised to NULL
 393          */
 394         struct uart_state       *state;
 395         struct tty_driver       *tty_driver;
 396 };
 397
 398 void uart_write_wakeup(struct uart_port *port);
 399
 400 /*
 401  * Baud rate helpers.
 402  */
 403 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
 404                          unsigned int baud);
 405 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
 406                                 struct ktermios *old, unsigned int min,
 407                                 unsigned int max);
 408 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
 409
 410 /*
 411  * Console helpers.
 412  */
 413 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
 414                                    struct console *c);
 415 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
 416                         int *flow);
 417 int uart_set_options(struct uart_port *port, struct console *co, int baud,
 418                      int parity, int bits, int flow);
 419 struct tty_driver *uart_console_device(struct console *co, int *index);
 420 void uart_console_write(struct uart_port *port, const char *s,
 421                         unsigned int count,
 422                         void (*putchar)(struct uart_port *, int));
 423
 424 /*
 425  * Port/driver registration/removal
 426  */
 427 int uart_register_driver(struct uart_driver *uart);
 428 void uart_unregister_driver(struct uart_driver *uart);
 429 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
 430 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
 431 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
 432
 433 /*
 434  * Power Management
 435  */
 436 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
 437 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
 438
 439 #define uart_circ_empty(circ)           ((circ)->head == (circ)->tail)
 440 #define uart_circ_clear(circ)           ((circ)->head = (circ)->tail = 0)
 441
 442 #define uart_circ_chars_pending(circ)   \
 443         (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
 444
 445 #define uart_circ_chars_free(circ)      \
 446         (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
 447
 448 static inline int uart_tx_stopped(struct uart_port *port)
 449 {
 450         struct tty_struct *tty = port->state->port.tty;
 451         if(tty->stopped || tty->hw_stopped)
 452                 return 1;
 453         return 0;
 454 }
 455
 456 /*
 457  * The following are helper functions for the low level drivers.
 458  */
 459 static inline int
 460 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
 461 {
 462 #ifdef SUPPORT_SYSRQ
 463         if (port->sysrq) {
 464                 if (ch && time_before(jiffies, port->sysrq)) {
 465                         handle_sysrq(ch, port->state->port.tty);
 466                         port->sysrq = 0;
 467                         return 1;
 468                 }
 469                 port->sysrq = 0;
 470         }
 471 #endif
 472         return 0;
 473 }
 474 #ifndef SUPPORT_SYSRQ
 475 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
 476 #endif
 477
 478 /*
 479  * We do the SysRQ and SAK checking like this...
 480  */
 481 static inline int uart_handle_break(struct uart_port *port)
 482 {
 483         struct uart_state *state = port->state;
 484 #ifdef SUPPORT_SYSRQ
 485         if (port->cons && port->cons->index == port->line) {
 486                 if (!port->sysrq) {
 487                         port->sysrq = jiffies + HZ*5;
 488                         return 1;
 489                 }
 490                 port->sysrq = 0;
 491         }
 492 #endif
 493         if (port->flags & UPF_SAK)
 494                 do_SAK(state->port.tty);
 495         return 0;
 496 }
 497
 498 /**
 499  *      uart_handle_dcd_change - handle a change of carrier detect state
 500  *      @uport: uart_port structure for the open port
 501  *      @status: new carrier detect status, nonzero if active
 502  */
 503 static inline void
 504 uart_handle_dcd_change(struct uart_port *uport, unsigned int status)
 505 {
 506         struct uart_state *state = uport->state;
 507         struct tty_port *port = &state->port;
 508         struct tty_ldisc *ld = tty_ldisc_ref(port->tty);
 509         struct timespec ts;
 510
 511         if (ld && ld->ops->dcd_change)
 512                 getnstimeofday(&ts);
 513
 514         uport->icount.dcd++;
 515 #ifdef CONFIG_HARD_PPS
 516         if ((uport->flags & UPF_HARDPPS_CD) && status)
 517                 hardpps();
 518 #endif
 519
 520         if (port->flags & ASYNC_CHECK_CD) {
 521                 if (status)
 522                         wake_up_interruptible(&port->open_wait);
 523                 else if (port->tty)
 524                         tty_hangup(port->tty);
 525         }
 526
 527         if (ld && ld->ops->dcd_change)
 528                 ld->ops->dcd_change(port->tty, status, &ts);
 529         if (ld)
 530                 tty_ldisc_deref(ld);
 531 }
 532
 533 /**
 534  *      uart_handle_cts_change - handle a change of clear-to-send state
 535  *      @uport: uart_port structure for the open port
 536  *      @status: new clear to send status, nonzero if active
 537  */
 538 static inline void
 539 uart_handle_cts_change(struct uart_port *uport, unsigned int status)
 540 {
 541         struct tty_port *port = &uport->state->port;
 542         struct tty_struct *tty = port->tty;
 543
 544         uport->icount.cts++;
 545
 546         if (port->flags & ASYNC_CTS_FLOW) {
 547                 if (tty->hw_stopped) {
 548                         if (status) {
 549                                 tty->hw_stopped = 0;
 550                                 uport->ops->start_tx(uport);
 551                                 uart_write_wakeup(uport);
 552                         }
 553                 } else {
 554                         if (!status) {
 555                                 tty->hw_stopped = 1;
 556                                 uport->ops->stop_tx(uport);
 557                         }
 558                 }
 559         }
 560 }
 561
 562 #include <linux/tty_flip.h>
 563
 564 static inline void
 565 uart_insert_char(struct uart_port *port, unsigned int status,
 566                  unsigned int overrun, unsigned int ch, unsigned int flag)
 567 {
 568         struct tty_struct *tty = port->state->port.tty;
 569
 570         if ((status & port->ignore_status_mask & ~overrun) == 0)
 571                 tty_insert_flip_char(tty, ch, flag);
 572
 573         /*
 574          * Overrun is special.  Since it's reported immediately,
 575          * it doesn't affect the current character.
 576          */
 577         if (status & ~port->ignore_status_mask & overrun)
 578                 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 579 }
 580
 581 /*
 582  *      UART_ENABLE_MS - determine if port should enable modem status irqs
 583  */
 584 #define UART_ENABLE_MS(port,cflag)      ((port)->flags & UPF_HARDPPS_CD || \
 585                                          (cflag) & CRTSCTS || \
 586                                          !((cflag) & CLOCAL))
 587
 588 #endif
 589
 590 #endif /* LINUX_SERIAL_CORE_H */