827672136646a1be0d32e84003c3f5eaf0a32907
[deliverable/linux.git] / include / linux / serial_core.h
1 /*
2 * linux/drivers/char/serial_core.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20 #ifndef LINUX_SERIAL_CORE_H
21 #define LINUX_SERIAL_CORE_H
22
23 /*
24 * The type definitions. These are from Ted Ts'o's serial.h
25 */
26 #define PORT_UNKNOWN 0
27 #define PORT_8250 1
28 #define PORT_16450 2
29 #define PORT_16550 3
30 #define PORT_16550A 4
31 #define PORT_CIRRUS 5
32 #define PORT_16650 6
33 #define PORT_16650V2 7
34 #define PORT_16750 8
35 #define PORT_STARTECH 9
36 #define PORT_16C950 10
37 #define PORT_16654 11
38 #define PORT_16850 12
39 #define PORT_RSA 13
40 #define PORT_NS16550A 14
41 #define PORT_XSCALE 15
42 #define PORT_MAX_8250 15 /* max port ID */
43
44 /*
45 * ARM specific type numbers. These are not currently guaranteed
46 * to be implemented, and will change in the future. These are
47 * separate so any additions to the old serial.c that occur before
48 * we are merged can be easily merged here.
49 */
50 #define PORT_PXA 31
51 #define PORT_AMBA 32
52 #define PORT_CLPS711X 33
53 #define PORT_SA1100 34
54 #define PORT_UART00 35
55 #define PORT_21285 37
56
57 /* Sparc type numbers. */
58 #define PORT_SUNZILOG 38
59 #define PORT_SUNSAB 39
60
61 /* NEC v850. */
62 #define PORT_V850E_UART 40
63
64 /* DZ */
65 #define PORT_DZ 47
66
67 /* Parisc type numbers. */
68 #define PORT_MUX 48
69
70 /* Atmel AT91 / AT32 SoC */
71 #define PORT_ATMEL 49
72
73 /* Macintosh Zilog type numbers */
74 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
75 #define PORT_PMAC_ZILOG 51
76
77 /* SH-SCI */
78 #define PORT_SCI 52
79 #define PORT_SCIF 53
80 #define PORT_IRDA 54
81
82 /* Samsung S3C2410 SoC and derivatives thereof */
83 #define PORT_S3C2410 55
84
85 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
86 #define PORT_IP22ZILOG 56
87
88 /* Sharp LH7a40x -- an ARM9 SoC series */
89 #define PORT_LH7A40X 57
90
91 /* PPC CPM type number */
92 #define PORT_CPM 58
93
94 /* MPC52xx type numbers */
95 #define PORT_MPC52xx 59
96
97 /* IBM icom */
98 #define PORT_ICOM 60
99
100 /* Samsung S3C2440 SoC */
101 #define PORT_S3C2440 61
102
103 /* Motorola i.MX SoC */
104 #define PORT_IMX 62
105
106 /* Marvell MPSC */
107 #define PORT_MPSC 63
108
109 /* TXX9 type number */
110 #define PORT_TXX9 64
111
112 /* NEC VR4100 series SIU/DSIU */
113 #define PORT_VR41XX_SIU 65
114 #define PORT_VR41XX_DSIU 66
115
116 /* Samsung S3C2400 SoC */
117 #define PORT_S3C2400 67
118
119 /* M32R SIO */
120 #define PORT_M32R_SIO 68
121
122 /*Digi jsm */
123 #define PORT_JSM 69
124
125 #define PORT_IP3106 70
126
127 /* Hilscher netx */
128 #define PORT_NETX 71
129
130 /* SUN4V Hypervisor Console */
131 #define PORT_SUNHV 72
132
133 #define PORT_S3C2412 73
134
135 /* Xilinx uartlite */
136 #define PORT_UARTLITE 74
137
138 #ifdef __KERNEL__
139
140 #include <linux/compiler.h>
141 #include <linux/interrupt.h>
142 #include <linux/circ_buf.h>
143 #include <linux/spinlock.h>
144 #include <linux/sched.h>
145 #include <linux/tty.h>
146 #include <linux/mutex.h>
147
148 struct uart_port;
149 struct uart_info;
150 struct serial_struct;
151 struct device;
152
153 /*
154 * This structure describes all the operations that can be
155 * done on the physical hardware.
156 */
157 struct uart_ops {
158 unsigned int (*tx_empty)(struct uart_port *);
159 void (*set_mctrl)(struct uart_port *, unsigned int mctrl);
160 unsigned int (*get_mctrl)(struct uart_port *);
161 void (*stop_tx)(struct uart_port *);
162 void (*start_tx)(struct uart_port *);
163 void (*send_xchar)(struct uart_port *, char ch);
164 void (*stop_rx)(struct uart_port *);
165 void (*enable_ms)(struct uart_port *);
166 void (*break_ctl)(struct uart_port *, int ctl);
167 int (*startup)(struct uart_port *);
168 void (*shutdown)(struct uart_port *);
169 void (*set_termios)(struct uart_port *, struct termios *new,
170 struct termios *old);
171 void (*pm)(struct uart_port *, unsigned int state,
172 unsigned int oldstate);
173 int (*set_wake)(struct uart_port *, unsigned int state);
174
175 /*
176 * Return a string describing the type of the port
177 */
178 const char *(*type)(struct uart_port *);
179
180 /*
181 * Release IO and memory resources used by the port.
182 * This includes iounmap if necessary.
183 */
184 void (*release_port)(struct uart_port *);
185
186 /*
187 * Request IO and memory resources used by the port.
188 * This includes iomapping the port if necessary.
189 */
190 int (*request_port)(struct uart_port *);
191 void (*config_port)(struct uart_port *, int);
192 int (*verify_port)(struct uart_port *, struct serial_struct *);
193 int (*ioctl)(struct uart_port *, unsigned int, unsigned long);
194 };
195
196 #define UART_CONFIG_TYPE (1 << 0)
197 #define UART_CONFIG_IRQ (1 << 1)
198
199 struct uart_icount {
200 __u32 cts;
201 __u32 dsr;
202 __u32 rng;
203 __u32 dcd;
204 __u32 rx;
205 __u32 tx;
206 __u32 frame;
207 __u32 overrun;
208 __u32 parity;
209 __u32 brk;
210 __u32 buf_overrun;
211 };
212
213 typedef unsigned int __bitwise__ upf_t;
214
215 struct uart_port {
216 spinlock_t lock; /* port lock */
217 unsigned int iobase; /* in/out[bwl] */
218 unsigned char __iomem *membase; /* read/write[bwl] */
219 unsigned int irq; /* irq number */
220 unsigned int uartclk; /* base uart clock */
221 unsigned int fifosize; /* tx fifo size */
222 unsigned char x_char; /* xon/xoff char */
223 unsigned char regshift; /* reg offset shift */
224 unsigned char iotype; /* io access style */
225 unsigned char unused1;
226
227 #define UPIO_PORT (0)
228 #define UPIO_HUB6 (1)
229 #define UPIO_MEM (2)
230 #define UPIO_MEM32 (3)
231 #define UPIO_AU (4) /* Au1x00 type IO */
232 #define UPIO_TSI (5) /* Tsi108/109 type IO */
233
234 unsigned int read_status_mask; /* driver specific */
235 unsigned int ignore_status_mask; /* driver specific */
236 struct uart_info *info; /* pointer to parent info */
237 struct uart_icount icount; /* statistics */
238
239 struct console *cons; /* struct console, if any */
240 #ifdef CONFIG_SERIAL_CORE_CONSOLE
241 unsigned long sysrq; /* sysrq timeout */
242 #endif
243
244 upf_t flags;
245
246 #define UPF_FOURPORT ((__force upf_t) (1 << 1))
247 #define UPF_SAK ((__force upf_t) (1 << 2))
248 #define UPF_SPD_MASK ((__force upf_t) (0x1030))
249 #define UPF_SPD_HI ((__force upf_t) (0x0010))
250 #define UPF_SPD_VHI ((__force upf_t) (0x0020))
251 #define UPF_SPD_CUST ((__force upf_t) (0x0030))
252 #define UPF_SPD_SHI ((__force upf_t) (0x1000))
253 #define UPF_SPD_WARP ((__force upf_t) (0x1010))
254 #define UPF_SKIP_TEST ((__force upf_t) (1 << 6))
255 #define UPF_AUTO_IRQ ((__force upf_t) (1 << 7))
256 #define UPF_HARDPPS_CD ((__force upf_t) (1 << 11))
257 #define UPF_LOW_LATENCY ((__force upf_t) (1 << 13))
258 #define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
259 #define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
260 #define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
261 #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
262 #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
263 #define UPF_DEAD ((__force upf_t) (1 << 30))
264 #define UPF_IOREMAP ((__force upf_t) (1 << 31))
265
266 #define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
267 #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
268
269 unsigned int mctrl; /* current modem ctrl settings */
270 unsigned int timeout; /* character-based timeout */
271 unsigned int type; /* port type */
272 const struct uart_ops *ops;
273 unsigned int custom_divisor;
274 unsigned int line; /* port index */
275 unsigned long mapbase; /* for ioremap */
276 struct device *dev; /* parent device */
277 unsigned char hub6; /* this should be in the 8250 driver */
278 unsigned char unused[3];
279 };
280
281 /*
282 * This is the state information which is persistent across opens.
283 * The low level driver must not to touch any elements contained
284 * within.
285 */
286 struct uart_state {
287 unsigned int close_delay; /* msec */
288 unsigned int closing_wait; /* msec */
289
290 #define USF_CLOSING_WAIT_INF (0)
291 #define USF_CLOSING_WAIT_NONE (~0U)
292
293 int count;
294 int pm_state;
295 struct uart_info *info;
296 struct uart_port *port;
297
298 struct mutex mutex;
299 };
300
301 #define UART_XMIT_SIZE PAGE_SIZE
302
303 typedef unsigned int __bitwise__ uif_t;
304
305 /*
306 * This is the state information which is only valid when the port
307 * is open; it may be freed by the core driver once the device has
308 * been closed. Either the low level driver or the core can modify
309 * stuff here.
310 */
311 struct uart_info {
312 struct tty_struct *tty;
313 struct circ_buf xmit;
314 uif_t flags;
315
316 /*
317 * Definitions for info->flags. These are _private_ to serial_core, and
318 * are specific to this structure. They may be queried by low level drivers.
319 */
320 #define UIF_CHECK_CD ((__force uif_t) (1 << 25))
321 #define UIF_CTS_FLOW ((__force uif_t) (1 << 26))
322 #define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29))
323 #define UIF_INITIALIZED ((__force uif_t) (1 << 31))
324 #define UIF_SUSPENDED ((__force uif_t) (1 << 30))
325
326 int blocked_open;
327
328 struct tasklet_struct tlet;
329
330 wait_queue_head_t open_wait;
331 wait_queue_head_t delta_msr_wait;
332 };
333
334 /* number of characters left in xmit buffer before we ask for more */
335 #define WAKEUP_CHARS 256
336
337 struct module;
338 struct tty_driver;
339
340 struct uart_driver {
341 struct module *owner;
342 const char *driver_name;
343 const char *dev_name;
344 int major;
345 int minor;
346 int nr;
347 struct console *cons;
348
349 /*
350 * these are private; the low level driver should not
351 * touch these; they should be initialised to NULL
352 */
353 struct uart_state *state;
354 struct tty_driver *tty_driver;
355 };
356
357 void uart_write_wakeup(struct uart_port *port);
358
359 /*
360 * Baud rate helpers.
361 */
362 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
363 unsigned int baud);
364 unsigned int uart_get_baud_rate(struct uart_port *port, struct termios *termios,
365 struct termios *old, unsigned int min,
366 unsigned int max);
367 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
368
369 /*
370 * Console helpers.
371 */
372 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
373 struct console *c);
374 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
375 int *flow);
376 int uart_set_options(struct uart_port *port, struct console *co, int baud,
377 int parity, int bits, int flow);
378 struct tty_driver *uart_console_device(struct console *co, int *index);
379 void uart_console_write(struct uart_port *port, const char *s,
380 unsigned int count,
381 void (*putchar)(struct uart_port *, int));
382
383 /*
384 * Port/driver registration/removal
385 */
386 int uart_register_driver(struct uart_driver *uart);
387 void uart_unregister_driver(struct uart_driver *uart);
388 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
389 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
390 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
391
392 /*
393 * Power Management
394 */
395 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
396 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
397
398 #define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
399 #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0)
400
401 #define uart_circ_chars_pending(circ) \
402 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
403
404 #define uart_circ_chars_free(circ) \
405 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
406
407 #define uart_tx_stopped(port) \
408 ((port)->info->tty->stopped || (port)->info->tty->hw_stopped)
409
410 /*
411 * The following are helper functions for the low level drivers.
412 */
413 static inline int
414 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
415 {
416 #ifdef SUPPORT_SYSRQ
417 if (port->sysrq) {
418 if (ch && time_before(jiffies, port->sysrq)) {
419 handle_sysrq(ch, port->info->tty);
420 port->sysrq = 0;
421 return 1;
422 }
423 port->sysrq = 0;
424 }
425 #endif
426 return 0;
427 }
428 #ifndef SUPPORT_SYSRQ
429 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
430 #endif
431
432 /*
433 * We do the SysRQ and SAK checking like this...
434 */
435 static inline int uart_handle_break(struct uart_port *port)
436 {
437 struct uart_info *info = port->info;
438 #ifdef SUPPORT_SYSRQ
439 if (port->cons && port->cons->index == port->line) {
440 if (!port->sysrq) {
441 port->sysrq = jiffies + HZ*5;
442 return 1;
443 }
444 port->sysrq = 0;
445 }
446 #endif
447 if (port->flags & UPF_SAK)
448 do_SAK(info->tty);
449 return 0;
450 }
451
452 /**
453 * uart_handle_dcd_change - handle a change of carrier detect state
454 * @port: uart_port structure for the open port
455 * @status: new carrier detect status, nonzero if active
456 */
457 static inline void
458 uart_handle_dcd_change(struct uart_port *port, unsigned int status)
459 {
460 struct uart_info *info = port->info;
461
462 port->icount.dcd++;
463
464 #ifdef CONFIG_HARD_PPS
465 if ((port->flags & UPF_HARDPPS_CD) && status)
466 hardpps();
467 #endif
468
469 if (info->flags & UIF_CHECK_CD) {
470 if (status)
471 wake_up_interruptible(&info->open_wait);
472 else if (info->tty)
473 tty_hangup(info->tty);
474 }
475 }
476
477 /**
478 * uart_handle_cts_change - handle a change of clear-to-send state
479 * @port: uart_port structure for the open port
480 * @status: new clear to send status, nonzero if active
481 */
482 static inline void
483 uart_handle_cts_change(struct uart_port *port, unsigned int status)
484 {
485 struct uart_info *info = port->info;
486 struct tty_struct *tty = info->tty;
487
488 port->icount.cts++;
489
490 if (info->flags & UIF_CTS_FLOW) {
491 if (tty->hw_stopped) {
492 if (status) {
493 tty->hw_stopped = 0;
494 port->ops->start_tx(port);
495 uart_write_wakeup(port);
496 }
497 } else {
498 if (!status) {
499 tty->hw_stopped = 1;
500 port->ops->stop_tx(port);
501 }
502 }
503 }
504 }
505
506 #include <linux/tty_flip.h>
507
508 static inline void
509 uart_insert_char(struct uart_port *port, unsigned int status,
510 unsigned int overrun, unsigned int ch, unsigned int flag)
511 {
512 struct tty_struct *tty = port->info->tty;
513
514 if ((status & port->ignore_status_mask & ~overrun) == 0)
515 tty_insert_flip_char(tty, ch, flag);
516
517 /*
518 * Overrun is special. Since it's reported immediately,
519 * it doesn't affect the current character.
520 */
521 if (status & ~port->ignore_status_mask & overrun)
522 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
523 }
524
525 /*
526 * UART_ENABLE_MS - determine if port should enable modem status irqs
527 */
528 #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \
529 (cflag) & CRTSCTS || \
530 !((cflag) & CLOCAL))
531
532 #endif
533
534 #endif /* LINUX_SERIAL_CORE_H */
This page took 0.055853 seconds and 4 git commands to generate.