fd11d4d5a5711164677ee5448131ad008d106e51
[deliverable/linux.git] / include / linux / serial_core.h
1 /*
2 * linux/drivers/char/serial_core.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20 #ifndef LINUX_SERIAL_CORE_H
21 #define LINUX_SERIAL_CORE_H
22
23 /*
24 * The type definitions. These are from Ted Ts'o's serial.h
25 */
26 #define PORT_UNKNOWN 0
27 #define PORT_8250 1
28 #define PORT_16450 2
29 #define PORT_16550 3
30 #define PORT_16550A 4
31 #define PORT_CIRRUS 5
32 #define PORT_16650 6
33 #define PORT_16650V2 7
34 #define PORT_16750 8
35 #define PORT_STARTECH 9
36 #define PORT_16C950 10
37 #define PORT_16654 11
38 #define PORT_16850 12
39 #define PORT_RSA 13
40 #define PORT_NS16550A 14
41 #define PORT_XSCALE 15
42 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
43 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
44 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
45 #define PORT_MAX_8250 18 /* max port ID */
46
47 /*
48 * ARM specific type numbers. These are not currently guaranteed
49 * to be implemented, and will change in the future. These are
50 * separate so any additions to the old serial.c that occur before
51 * we are merged can be easily merged here.
52 */
53 #define PORT_PXA 31
54 #define PORT_AMBA 32
55 #define PORT_CLPS711X 33
56 #define PORT_SA1100 34
57 #define PORT_UART00 35
58 #define PORT_21285 37
59
60 /* Sparc type numbers. */
61 #define PORT_SUNZILOG 38
62 #define PORT_SUNSAB 39
63
64 /* DEC */
65 #define PORT_DZ 46
66 #define PORT_ZS 47
67
68 /* Parisc type numbers. */
69 #define PORT_MUX 48
70
71 /* Atmel AT91 / AT32 SoC */
72 #define PORT_ATMEL 49
73
74 /* Macintosh Zilog type numbers */
75 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
76 #define PORT_PMAC_ZILOG 51
77
78 /* SH-SCI */
79 #define PORT_SCI 52
80 #define PORT_SCIF 53
81 #define PORT_IRDA 54
82
83 /* Samsung S3C2410 SoC and derivatives thereof */
84 #define PORT_S3C2410 55
85
86 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
87 #define PORT_IP22ZILOG 56
88
89 /* Sharp LH7a40x -- an ARM9 SoC series */
90 #define PORT_LH7A40X 57
91
92 /* PPC CPM type number */
93 #define PORT_CPM 58
94
95 /* MPC52xx type numbers */
96 #define PORT_MPC52xx 59
97
98 /* IBM icom */
99 #define PORT_ICOM 60
100
101 /* Samsung S3C2440 SoC */
102 #define PORT_S3C2440 61
103
104 /* Motorola i.MX SoC */
105 #define PORT_IMX 62
106
107 /* Marvell MPSC */
108 #define PORT_MPSC 63
109
110 /* TXX9 type number */
111 #define PORT_TXX9 64
112
113 /* NEC VR4100 series SIU/DSIU */
114 #define PORT_VR41XX_SIU 65
115 #define PORT_VR41XX_DSIU 66
116
117 /* Samsung S3C2400 SoC */
118 #define PORT_S3C2400 67
119
120 /* M32R SIO */
121 #define PORT_M32R_SIO 68
122
123 /*Digi jsm */
124 #define PORT_JSM 69
125
126 #define PORT_PNX8XXX 70
127
128 /* Hilscher netx */
129 #define PORT_NETX 71
130
131 /* SUN4V Hypervisor Console */
132 #define PORT_SUNHV 72
133
134 #define PORT_S3C2412 73
135
136 /* Xilinx uartlite */
137 #define PORT_UARTLITE 74
138
139 /* Blackfin bf5xx */
140 #define PORT_BFIN 75
141
142 /* Micrel KS8695 */
143 #define PORT_KS8695 76
144
145 /* Broadcom SB1250, etc. SOC */
146 #define PORT_SB1250_DUART 77
147
148 /* Freescale ColdFire */
149 #define PORT_MCF 78
150
151 /* Blackfin SPORT */
152 #define PORT_BFIN_SPORT 79
153
154 /* MN10300 on-chip UART numbers */
155 #define PORT_MN10300 80
156 #define PORT_MN10300_CTS 81
157
158 #define PORT_SC26XX 82
159
160 /* SH-SCI */
161 #define PORT_SCIFA 83
162
163 #define PORT_S3C6400 84
164
165 /* NWPSERIAL */
166 #define PORT_NWPSERIAL 85
167
168 /* MAX3100 */
169 #define PORT_MAX3100 86
170
171 /* Timberdale UART */
172 #define PORT_TIMBUART 87
173
174 /* Qualcomm MSM SoCs */
175 #define PORT_MSM 88
176
177 #ifdef __KERNEL__
178
179 #include <linux/compiler.h>
180 #include <linux/interrupt.h>
181 #include <linux/circ_buf.h>
182 #include <linux/spinlock.h>
183 #include <linux/sched.h>
184 #include <linux/tty.h>
185 #include <linux/mutex.h>
186 #include <linux/sysrq.h>
187
188 struct uart_port;
189 struct serial_struct;
190 struct device;
191
192 /*
193 * This structure describes all the operations that can be
194 * done on the physical hardware.
195 */
196 struct uart_ops {
197 unsigned int (*tx_empty)(struct uart_port *);
198 void (*set_mctrl)(struct uart_port *, unsigned int mctrl);
199 unsigned int (*get_mctrl)(struct uart_port *);
200 void (*stop_tx)(struct uart_port *);
201 void (*start_tx)(struct uart_port *);
202 void (*send_xchar)(struct uart_port *, char ch);
203 void (*stop_rx)(struct uart_port *);
204 void (*enable_ms)(struct uart_port *);
205 void (*break_ctl)(struct uart_port *, int ctl);
206 int (*startup)(struct uart_port *);
207 void (*shutdown)(struct uart_port *);
208 void (*flush_buffer)(struct uart_port *);
209 void (*set_termios)(struct uart_port *, struct ktermios *new,
210 struct ktermios *old);
211 void (*set_ldisc)(struct uart_port *);
212 void (*pm)(struct uart_port *, unsigned int state,
213 unsigned int oldstate);
214 int (*set_wake)(struct uart_port *, unsigned int state);
215
216 /*
217 * Return a string describing the type of the port
218 */
219 const char *(*type)(struct uart_port *);
220
221 /*
222 * Release IO and memory resources used by the port.
223 * This includes iounmap if necessary.
224 */
225 void (*release_port)(struct uart_port *);
226
227 /*
228 * Request IO and memory resources used by the port.
229 * This includes iomapping the port if necessary.
230 */
231 int (*request_port)(struct uart_port *);
232 void (*config_port)(struct uart_port *, int);
233 int (*verify_port)(struct uart_port *, struct serial_struct *);
234 int (*ioctl)(struct uart_port *, unsigned int, unsigned long);
235 #ifdef CONFIG_CONSOLE_POLL
236 void (*poll_put_char)(struct uart_port *, unsigned char);
237 int (*poll_get_char)(struct uart_port *);
238 #endif
239 };
240
241 #define UART_CONFIG_TYPE (1 << 0)
242 #define UART_CONFIG_IRQ (1 << 1)
243
244 struct uart_icount {
245 __u32 cts;
246 __u32 dsr;
247 __u32 rng;
248 __u32 dcd;
249 __u32 rx;
250 __u32 tx;
251 __u32 frame;
252 __u32 overrun;
253 __u32 parity;
254 __u32 brk;
255 __u32 buf_overrun;
256 };
257
258 typedef unsigned int __bitwise__ upf_t;
259
260 struct uart_port {
261 spinlock_t lock; /* port lock */
262 unsigned long iobase; /* in/out[bwl] */
263 unsigned char __iomem *membase; /* read/write[bwl] */
264 unsigned int (*serial_in)(struct uart_port *, int);
265 void (*serial_out)(struct uart_port *, int, int);
266 unsigned int irq; /* irq number */
267 unsigned long irqflags; /* irq flags */
268 unsigned int uartclk; /* base uart clock */
269 unsigned int fifosize; /* tx fifo size */
270 unsigned char x_char; /* xon/xoff char */
271 unsigned char regshift; /* reg offset shift */
272 unsigned char iotype; /* io access style */
273 unsigned char unused1;
274
275 #define UPIO_PORT (0)
276 #define UPIO_HUB6 (1)
277 #define UPIO_MEM (2)
278 #define UPIO_MEM32 (3)
279 #define UPIO_AU (4) /* Au1x00 type IO */
280 #define UPIO_TSI (5) /* Tsi108/109 type IO */
281 #define UPIO_DWAPB (6) /* DesignWare APB UART */
282 #define UPIO_RM9000 (7) /* RM9000 type IO */
283
284 unsigned int read_status_mask; /* driver specific */
285 unsigned int ignore_status_mask; /* driver specific */
286 struct uart_state *state; /* pointer to parent state */
287 struct uart_icount icount; /* statistics */
288
289 struct console *cons; /* struct console, if any */
290 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
291 unsigned long sysrq; /* sysrq timeout */
292 #endif
293
294 upf_t flags;
295
296 #define UPF_FOURPORT ((__force upf_t) (1 << 1))
297 #define UPF_SAK ((__force upf_t) (1 << 2))
298 #define UPF_SPD_MASK ((__force upf_t) (0x1030))
299 #define UPF_SPD_HI ((__force upf_t) (0x0010))
300 #define UPF_SPD_VHI ((__force upf_t) (0x0020))
301 #define UPF_SPD_CUST ((__force upf_t) (0x0030))
302 #define UPF_SPD_SHI ((__force upf_t) (0x1000))
303 #define UPF_SPD_WARP ((__force upf_t) (0x1010))
304 #define UPF_SKIP_TEST ((__force upf_t) (1 << 6))
305 #define UPF_AUTO_IRQ ((__force upf_t) (1 << 7))
306 #define UPF_HARDPPS_CD ((__force upf_t) (1 << 11))
307 #define UPF_LOW_LATENCY ((__force upf_t) (1 << 13))
308 #define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
309 #define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15))
310 #define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
311 #define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
312 #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
313 /* The exact UART type is known and should not be probed. */
314 #define UPF_FIXED_TYPE ((__force upf_t) (1 << 27))
315 #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
316 #define UPF_FIXED_PORT ((__force upf_t) (1 << 29))
317 #define UPF_DEAD ((__force upf_t) (1 << 30))
318 #define UPF_IOREMAP ((__force upf_t) (1 << 31))
319
320 #define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
321 #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
322
323 unsigned int mctrl; /* current modem ctrl settings */
324 unsigned int timeout; /* character-based timeout */
325 unsigned int type; /* port type */
326 const struct uart_ops *ops;
327 unsigned int custom_divisor;
328 unsigned int line; /* port index */
329 resource_size_t mapbase; /* for ioremap */
330 struct device *dev; /* parent device */
331 unsigned char hub6; /* this should be in the 8250 driver */
332 unsigned char suspended;
333 unsigned char unused[2];
334 void *private_data; /* generic platform data pointer */
335 };
336
337 /*
338 * This is the state information which is only valid when the port
339 * is open; it may be cleared the core driver once the device has
340 * been closed. Either the low level driver or the core can modify
341 * stuff here.
342 */
343 typedef unsigned int __bitwise__ uif_t;
344
345
346 /*
347 * This is the state information which is persistent across opens.
348 * The low level driver must not to touch any elements contained
349 * within.
350 */
351 struct uart_state {
352 struct tty_port port;
353
354 #define USF_CLOSING_WAIT_INF (0)
355 #define USF_CLOSING_WAIT_NONE (~0U)
356
357 int count;
358 int pm_state;
359 struct circ_buf xmit;
360 uif_t flags;
361
362 /*
363 * Definitions for info->flags. These are _private_ to serial_core, and
364 * are specific to this structure. They may be queried by low level drivers.
365 *
366 * FIXME: use the ASY_ definitions
367 */
368 #define UIF_CHECK_CD ((__force uif_t) (1 << 25))
369 #define UIF_CTS_FLOW ((__force uif_t) (1 << 26))
370 #define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29))
371 #define UIF_INITIALIZED ((__force uif_t) (1 << 31))
372 #define UIF_SUSPENDED ((__force uif_t) (1 << 30))
373
374 struct tasklet_struct tlet;
375 wait_queue_head_t delta_msr_wait;
376 struct uart_port *uart_port;
377
378 struct mutex mutex;
379 };
380
381 #define UART_XMIT_SIZE PAGE_SIZE
382
383
384 /* number of characters left in xmit buffer before we ask for more */
385 #define WAKEUP_CHARS 256
386
387 struct module;
388 struct tty_driver;
389
390 struct uart_driver {
391 struct module *owner;
392 const char *driver_name;
393 const char *dev_name;
394 int major;
395 int minor;
396 int nr;
397 struct console *cons;
398
399 /*
400 * these are private; the low level driver should not
401 * touch these; they should be initialised to NULL
402 */
403 struct uart_state *state;
404 struct tty_driver *tty_driver;
405 };
406
407 void uart_write_wakeup(struct uart_port *port);
408
409 /*
410 * Baud rate helpers.
411 */
412 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
413 unsigned int baud);
414 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
415 struct ktermios *old, unsigned int min,
416 unsigned int max);
417 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
418
419 /*
420 * Console helpers.
421 */
422 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
423 struct console *c);
424 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
425 int *flow);
426 int uart_set_options(struct uart_port *port, struct console *co, int baud,
427 int parity, int bits, int flow);
428 struct tty_driver *uart_console_device(struct console *co, int *index);
429 void uart_console_write(struct uart_port *port, const char *s,
430 unsigned int count,
431 void (*putchar)(struct uart_port *, int));
432
433 /*
434 * Port/driver registration/removal
435 */
436 int uart_register_driver(struct uart_driver *uart);
437 void uart_unregister_driver(struct uart_driver *uart);
438 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
439 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
440 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
441
442 /*
443 * Power Management
444 */
445 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
446 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
447
448 #define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
449 #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0)
450
451 #define uart_circ_chars_pending(circ) \
452 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
453
454 #define uart_circ_chars_free(circ) \
455 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
456
457 static inline int uart_tx_stopped(struct uart_port *port)
458 {
459 struct tty_struct *tty = port->state->port.tty;
460 if(tty->stopped || tty->hw_stopped)
461 return 1;
462 return 0;
463 }
464
465 /*
466 * The following are helper functions for the low level drivers.
467 */
468 static inline int
469 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
470 {
471 #ifdef SUPPORT_SYSRQ
472 if (port->sysrq) {
473 if (ch && time_before(jiffies, port->sysrq)) {
474 handle_sysrq(ch, port->state->port.tty);
475 port->sysrq = 0;
476 return 1;
477 }
478 port->sysrq = 0;
479 }
480 #endif
481 return 0;
482 }
483 #ifndef SUPPORT_SYSRQ
484 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
485 #endif
486
487 /*
488 * We do the SysRQ and SAK checking like this...
489 */
490 static inline int uart_handle_break(struct uart_port *port)
491 {
492 struct uart_state *state = port->state;
493 #ifdef SUPPORT_SYSRQ
494 if (port->cons && port->cons->index == port->line) {
495 if (!port->sysrq) {
496 port->sysrq = jiffies + HZ*5;
497 return 1;
498 }
499 port->sysrq = 0;
500 }
501 #endif
502 if (port->flags & UPF_SAK)
503 do_SAK(state->port.tty);
504 return 0;
505 }
506
507 /**
508 * uart_handle_dcd_change - handle a change of carrier detect state
509 * @port: uart_port structure for the open port
510 * @status: new carrier detect status, nonzero if active
511 */
512 static inline void
513 uart_handle_dcd_change(struct uart_port *port, unsigned int status)
514 {
515 struct uart_state *state = port->state;
516
517 port->icount.dcd++;
518
519 #ifdef CONFIG_HARD_PPS
520 if ((port->flags & UPF_HARDPPS_CD) && status)
521 hardpps();
522 #endif
523
524 if (state->flags & UIF_CHECK_CD) {
525 if (status)
526 wake_up_interruptible(&state->port.open_wait);
527 else if (state->port.tty)
528 tty_hangup(state->port.tty);
529 }
530 }
531
532 /**
533 * uart_handle_cts_change - handle a change of clear-to-send state
534 * @port: uart_port structure for the open port
535 * @status: new clear to send status, nonzero if active
536 */
537 static inline void
538 uart_handle_cts_change(struct uart_port *port, unsigned int status)
539 {
540 struct uart_state *state = port->state;
541 struct tty_struct *tty = state->port.tty;
542
543 port->icount.cts++;
544
545 if (state->flags & UIF_CTS_FLOW) {
546 if (tty->hw_stopped) {
547 if (status) {
548 tty->hw_stopped = 0;
549 port->ops->start_tx(port);
550 uart_write_wakeup(port);
551 }
552 } else {
553 if (!status) {
554 tty->hw_stopped = 1;
555 port->ops->stop_tx(port);
556 }
557 }
558 }
559 }
560
561 #include <linux/tty_flip.h>
562
563 static inline void
564 uart_insert_char(struct uart_port *port, unsigned int status,
565 unsigned int overrun, unsigned int ch, unsigned int flag)
566 {
567 struct tty_struct *tty = port->state->port.tty;
568
569 if ((status & port->ignore_status_mask & ~overrun) == 0)
570 tty_insert_flip_char(tty, ch, flag);
571
572 /*
573 * Overrun is special. Since it's reported immediately,
574 * it doesn't affect the current character.
575 */
576 if (status & ~port->ignore_status_mask & overrun)
577 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
578 }
579
580 /*
581 * UART_ENABLE_MS - determine if port should enable modem status irqs
582 */
583 #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \
584 (cflag) & CRTSCTS || \
585 !((cflag) & CLOCAL))
586
587 #endif
588
589 #endif /* LINUX_SERIAL_CORE_H */
This page took 0.043603 seconds and 4 git commands to generate.