2 * Header for the new SH dmaengine driver
4 * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
13 #include <linux/list.h>
14 #include <linux/dmaengine.h>
16 /* Used by slave DMA clients to request DMA to/from a specific peripheral */
17 struct sh_dmae_slave
{
18 unsigned int slave_id
; /* Set by the platform */
19 struct device
*dma_dev
; /* Set by the platform */
20 struct sh_dmae_slave_config
*config
; /* Set by the driver */
24 u32 sar
; /* SAR / source address */
25 u32 dar
; /* DAR / destination address */
26 u32 tcr
; /* TCR / transfer count */
30 struct sh_dmae_regs hw
;
31 struct list_head node
;
32 struct dma_async_tx_descriptor async_tx
;
33 enum dma_data_direction direction
;
39 struct sh_dmae_slave_config
{
40 unsigned int slave_id
;
46 struct sh_dmae_channel
{
49 unsigned int dmars_bit
;
52 struct sh_dmae_pdata
{
53 struct sh_dmae_slave_config
*slave
;
55 struct sh_dmae_channel
*channel
;
57 unsigned int ts_low_shift
;
58 unsigned int ts_low_mask
;
59 unsigned int ts_high_shift
;
60 unsigned int ts_high_mask
;
61 unsigned int *ts_shift
;
73 /* DMAOR definitions */
74 #define DMAOR_AE 0x00000004
75 #define DMAOR_NMIF 0x00000002
76 #define DMAOR_DME 0x00000001
78 /* Definitions for the SuperH DMAC */
79 #define REQ_L 0x00000000
80 #define REQ_E 0x00080000
81 #define RACK_H 0x00000000
82 #define RACK_L 0x00040000
83 #define ACK_R 0x00000000
84 #define ACK_W 0x00020000
85 #define ACK_H 0x00000000
86 #define ACK_L 0x00010000
87 #define DM_INC 0x00004000
88 #define DM_DEC 0x00008000
89 #define DM_FIX 0x0000c000
90 #define SM_INC 0x00001000
91 #define SM_DEC 0x00002000
92 #define SM_FIX 0x00003000
93 #define RS_IN 0x00000200
94 #define RS_OUT 0x00000300
95 #define TS_BLK 0x00000040
96 #define TM_BUR 0x00000020
97 #define CHCR_DE 0x00000001
98 #define CHCR_TE 0x00000002
99 #define CHCR_IE 0x00000004