2 * SuperH Pin Function Controller Support
4 * Copyright (c) 2008 Magnus Damm
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
14 #include <asm-generic/gpio.h>
16 typedef unsigned short pinmux_enum_t
;
17 typedef unsigned short pinmux_flag_t
;
19 #define PINMUX_TYPE_NONE 0
20 #define PINMUX_TYPE_FUNCTION 1
21 #define PINMUX_TYPE_GPIO 2
22 #define PINMUX_TYPE_OUTPUT 3
23 #define PINMUX_TYPE_INPUT 4
24 #define PINMUX_TYPE_INPUT_PULLUP 5
25 #define PINMUX_TYPE_INPUT_PULLDOWN 6
27 #define PINMUX_FLAG_TYPE (0x7)
29 #define PINMUX_FLAG_DBIT_SHIFT 5
30 #define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT)
31 #define PINMUX_FLAG_DREG_SHIFT 10
32 #define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT)
35 pinmux_enum_t enum_id
;
39 #define PINMUX_GPIO(gpio, data_or_mark) [gpio] = { data_or_mark }
40 #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
42 struct pinmux_cfg_reg
{
43 unsigned long reg
, reg_width
, field_width
;
45 pinmux_enum_t
*enum_ids
;
46 unsigned long *var_field_width
;
49 #define PINMUX_CFG_REG(name, r, r_width, f_width) \
50 .reg = r, .reg_width = r_width, .field_width = f_width, \
51 .cnt = (unsigned long [r_width / f_width]) {}, \
52 .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)])
54 #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
55 .reg = r, .reg_width = r_width, \
56 .cnt = (unsigned long [r_width]) {}, \
57 .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \
58 .enum_ids = (pinmux_enum_t [])
60 struct pinmux_data_reg
{
61 unsigned long reg
, reg_width
, reg_shadow
;
62 pinmux_enum_t
*enum_ids
;
63 void __iomem
*mapped_reg
;
66 #define PINMUX_DATA_REG(name, r, r_width) \
67 .reg = r, .reg_width = r_width, \
68 .enum_ids = (pinmux_enum_t [r_width]) \
72 pinmux_enum_t
*enum_ids
;
75 #define PINMUX_IRQ(irq_nr, ids...) \
76 { .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } } \
92 pinmux_enum_t reserved_id
;
93 struct pinmux_range data
;
94 struct pinmux_range input
;
95 struct pinmux_range input_pd
;
96 struct pinmux_range input_pu
;
97 struct pinmux_range output
;
98 struct pinmux_range mark
;
99 struct pinmux_range function
;
101 unsigned first_gpio
, last_gpio
;
103 struct pinmux_gpio
*gpios
;
104 struct pinmux_cfg_reg
*cfg_regs
;
105 struct pinmux_data_reg
*data_regs
;
107 pinmux_enum_t
*gpio_data
;
108 unsigned int gpio_data_size
;
110 struct pinmux_irq
*gpio_irq
;
111 unsigned int gpio_irq_size
;
115 struct resource
*resource
;
116 unsigned int num_resources
;
117 struct pfc_window
*window
;
119 unsigned long unlock_reg
;
122 /* XXX compat for now */
123 #define pinmux_info sh_pfc
125 /* drivers/sh/pfc-gpio.c */
126 int sh_pfc_register_gpiochip(struct sh_pfc
*pfc
);
128 /* drivers/sh/pfc.c */
129 int register_sh_pfc(struct sh_pfc
*pfc
);
131 int sh_pfc_read_bit(struct pinmux_data_reg
*dr
, unsigned long in_pos
);
132 void sh_pfc_write_bit(struct pinmux_data_reg
*dr
, unsigned long in_pos
,
133 unsigned long value
);
134 int sh_pfc_get_data_reg(struct sh_pfc
*pfc
, unsigned gpio
,
135 struct pinmux_data_reg
**drp
, int *bitp
);
136 int sh_pfc_gpio_to_enum(struct sh_pfc
*pfc
, unsigned gpio
, int pos
,
137 pinmux_enum_t
*enum_idp
);
138 int sh_pfc_config_gpio(struct sh_pfc
*pfc
, unsigned gpio
, int pinmux_type
,
140 int sh_pfc_set_direction(struct sh_pfc
*pfc
, unsigned gpio
,
141 int new_pinmux_type
);
144 static inline int register_pinmux(struct pinmux_info
*pip
)
146 struct sh_pfc
*pfc
= pip
;
147 return register_sh_pfc(pfc
);
150 enum { GPIO_CFG_DRYRUN
, GPIO_CFG_REQ
, GPIO_CFG_FREE
};
152 /* helper macro for port */
153 #define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
155 #define PORT_10(fn, pfx, sfx) \
156 PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
157 PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
158 PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
159 PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
160 PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
162 #define PORT_90(fn, pfx, sfx) \
163 PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \
164 PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \
165 PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \
166 PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \
167 PORT_10(fn, pfx##9, sfx)
169 #define _PORT_ALL(pfx, sfx) pfx##_##sfx
170 #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
171 #define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str)
172 #define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
173 #define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
175 /* helper macro for pinmux_enum_t */
176 #define PORT_DATA_I(nr) \
177 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
179 #define PORT_DATA_I_PD(nr) \
180 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
181 PORT##nr##_IN, PORT##nr##_IN_PD)
183 #define PORT_DATA_I_PU(nr) \
184 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
185 PORT##nr##_IN, PORT##nr##_IN_PU)
187 #define PORT_DATA_I_PU_PD(nr) \
188 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
189 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
191 #define PORT_DATA_O(nr) \
192 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
194 #define PORT_DATA_IO(nr) \
195 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
198 #define PORT_DATA_IO_PD(nr) \
199 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
200 PORT##nr##_IN, PORT##nr##_IN_PD)
202 #define PORT_DATA_IO_PU(nr) \
203 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
204 PORT##nr##_IN, PORT##nr##_IN_PU)
206 #define PORT_DATA_IO_PU_PD(nr) \
207 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
208 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
210 /* helper macro for top 4 bits in PORTnCR */
211 #define _PCRH(in, in_pd, in_pu, out) \
217 #define PORTCR(nr, reg) \
219 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
220 _PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
221 PORT##nr##_IN_PU, PORT##nr##_OUT), \
222 PORT##nr##_FN0, PORT##nr##_FN1, \
223 PORT##nr##_FN2, PORT##nr##_FN3, \
224 PORT##nr##_FN4, PORT##nr##_FN5, \
225 PORT##nr##_FN6, PORT##nr##_FN7 } \
228 #endif /* __SH_PFC_H */