include/linux/sh_pfc.h

   1 /*
   2  * SuperH Pin Function Controller Support
   3  *
   4  * Copyright (c) 2008 Magnus Damm
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #ifndef __SH_PFC_H
  12 #define __SH_PFC_H
  13
  14 #include <asm-generic/gpio.h>
  15
  16 typedef unsigned short pinmux_enum_t;
  17 typedef unsigned short pinmux_flag_t;
  18
  19 enum {
  20         PINMUX_TYPE_NONE,
  21
  22         PINMUX_TYPE_FUNCTION,
  23         PINMUX_TYPE_GPIO,
  24         PINMUX_TYPE_OUTPUT,
  25         PINMUX_TYPE_INPUT,
  26         PINMUX_TYPE_INPUT_PULLUP,
  27         PINMUX_TYPE_INPUT_PULLDOWN,
  28
  29         PINMUX_FLAG_TYPE,       /* must be last */
  30 };
  31
  32 #define PINMUX_FLAG_DBIT_SHIFT      5
  33 #define PINMUX_FLAG_DBIT            (0x1f << PINMUX_FLAG_DBIT_SHIFT)
  34 #define PINMUX_FLAG_DREG_SHIFT      10
  35 #define PINMUX_FLAG_DREG            (0x3f << PINMUX_FLAG_DREG_SHIFT)
  36
  37 struct pinmux_gpio {
  38         pinmux_enum_t enum_id;
  39         pinmux_flag_t flags;
  40 };
  41
  42 #define PINMUX_GPIO(gpio, data_or_mark) \
  43         [gpio] = { .enum_id = data_or_mark, .flags = PINMUX_TYPE_NONE }
  44
  45 #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
  46
  47 struct pinmux_cfg_reg {
  48         unsigned long reg, reg_width, field_width;
  49         unsigned long *cnt;
  50         pinmux_enum_t *enum_ids;
  51         unsigned long *var_field_width;
  52 };
  53
  54 #define PINMUX_CFG_REG(name, r, r_width, f_width) \
  55         .reg = r, .reg_width = r_width, .field_width = f_width,         \
  56         .cnt = (unsigned long [r_width / f_width]) {}, \
  57         .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)])
  58
  59 #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
  60         .reg = r, .reg_width = r_width, \
  61         .cnt = (unsigned long [r_width]) {}, \
  62         .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \
  63         .enum_ids = (pinmux_enum_t [])
  64
  65 struct pinmux_data_reg {
  66         unsigned long reg, reg_width, reg_shadow;
  67         pinmux_enum_t *enum_ids;
  68         void __iomem *mapped_reg;
  69 };
  70
  71 #define PINMUX_DATA_REG(name, r, r_width) \
  72         .reg = r, .reg_width = r_width, \
  73         .enum_ids = (pinmux_enum_t [r_width]) \
  74
  75 struct pinmux_irq {
  76         int irq;
  77         pinmux_enum_t *enum_ids;
  78 };
  79
  80 #define PINMUX_IRQ(irq_nr, ids...)                         \
  81         { .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } }    \
  82
  83 struct pinmux_range {
  84         pinmux_enum_t begin;
  85         pinmux_enum_t end;
  86         pinmux_enum_t force;
  87 };
  88
  89 struct pfc_window {
  90         phys_addr_t phys;
  91         void __iomem *virt;
  92         unsigned long size;
  93 };
  94
  95 struct sh_pfc {
  96         char *name;
  97         pinmux_enum_t reserved_id;
  98         struct pinmux_range data;
  99         struct pinmux_range input;
 100         struct pinmux_range input_pd;
 101         struct pinmux_range input_pu;
 102         struct pinmux_range output;
 103         struct pinmux_range mark;
 104         struct pinmux_range function;
 105
 106         unsigned first_gpio, last_gpio;
 107
 108         struct pinmux_gpio *gpios;
 109         struct pinmux_cfg_reg *cfg_regs;
 110         struct pinmux_data_reg *data_regs;
 111
 112         pinmux_enum_t *gpio_data;
 113         unsigned int gpio_data_size;
 114
 115         struct pinmux_irq *gpio_irq;
 116         unsigned int gpio_irq_size;
 117
 118         spinlock_t lock;
 119
 120         struct resource *resource;
 121         unsigned int num_resources;
 122         struct pfc_window *window;
 123
 124         unsigned long unlock_reg;
 125 };
 126
 127 /* XXX compat for now */
 128 #define pinmux_info sh_pfc
 129
 130 /* drivers/sh/pfc/gpio.c */
 131 int sh_pfc_register_gpiochip(struct sh_pfc *pfc);
 132
 133 /* drivers/sh/pfc/core.c */
 134 int register_sh_pfc(struct sh_pfc *pfc);
 135
 136 int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos);
 137 void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
 138                       unsigned long value);
 139 int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
 140                         struct pinmux_data_reg **drp, int *bitp);
 141 int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
 142                         pinmux_enum_t *enum_idp);
 143 int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
 144                        int cfg_mode);
 145 int sh_pfc_set_direction(struct sh_pfc *pfc, unsigned gpio,
 146                          int new_pinmux_type);
 147
 148 /* xxx */
 149 static inline int register_pinmux(struct pinmux_info *pip)
 150 {
 151         struct sh_pfc *pfc = pip;
 152         return register_sh_pfc(pfc);
 153 }
 154
 155 enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
 156
 157 /* helper macro for port */
 158 #define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
 159
 160 #define PORT_10(fn, pfx, sfx) \
 161         PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx),       \
 162         PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx),       \
 163         PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx),       \
 164         PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx),       \
 165         PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
 166
 167 #define PORT_90(fn, pfx, sfx) \
 168         PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx),     \
 169         PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx),     \
 170         PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx),     \
 171         PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx),     \
 172         PORT_10(fn, pfx##9, sfx)
 173
 174 #define _PORT_ALL(pfx, sfx) pfx##_##sfx
 175 #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
 176 #define PORT_ALL(str)   CPU_ALL_PORT(_PORT_ALL, PORT, str)
 177 #define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
 178 #define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
 179
 180 /* helper macro for pinmux_enum_t */
 181 #define PORT_DATA_I(nr) \
 182         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
 183
 184 #define PORT_DATA_I_PD(nr)      \
 185         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
 186                     PORT##nr##_IN, PORT##nr##_IN_PD)
 187
 188 #define PORT_DATA_I_PU(nr)      \
 189         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
 190                     PORT##nr##_IN, PORT##nr##_IN_PU)
 191
 192 #define PORT_DATA_I_PU_PD(nr)   \
 193         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,                    \
 194                     PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
 195
 196 #define PORT_DATA_O(nr)         \
 197         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
 198
 199 #define PORT_DATA_IO(nr)        \
 200         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 201                     PORT##nr##_IN)
 202
 203 #define PORT_DATA_IO_PD(nr)     \
 204         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 205                     PORT##nr##_IN, PORT##nr##_IN_PD)
 206
 207 #define PORT_DATA_IO_PU(nr)     \
 208         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 209                     PORT##nr##_IN, PORT##nr##_IN_PU)
 210
 211 #define PORT_DATA_IO_PU_PD(nr)  \
 212         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 213                     PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
 214
 215 /* helper macro for top 4 bits in PORTnCR */
 216 #define _PCRH(in, in_pd, in_pu, out)    \
 217         0, (out), (in), 0,              \
 218         0, 0, 0, 0,                     \
 219         0, 0, (in_pd), 0,               \
 220         0, 0, (in_pu), 0
 221
 222 #define PORTCR(nr, reg)                                                 \
 223         {                                                               \
 224                 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {             \
 225                         _PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,          \
 226                               PORT##nr##_IN_PU, PORT##nr##_OUT),        \
 227                                 PORT##nr##_FN0, PORT##nr##_FN1,         \
 228                                 PORT##nr##_FN2, PORT##nr##_FN3,         \
 229                                 PORT##nr##_FN4, PORT##nr##_FN5,         \
 230                                 PORT##nr##_FN6, PORT##nr##_FN7 }        \
 231         }
 232
 233 #endif /* __SH_PFC_H */