2 * include/media/si476x.h -- Common definitions for si476x driver
4 * Copyright (C) 2012 Innovative Converged Devices(ICD)
5 * Copyright (C) 2013 Andrey Smirnov
7 * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
23 #include <linux/types.h>
24 #include <linux/videodev2.h>
28 /* It is possible to select one of the four adresses using pins A0
30 #define SI476X_I2C_ADDR_1 0x60
31 #define SI476X_I2C_ADDR_2 0x61
32 #define SI476X_I2C_ADDR_3 0x62
33 #define SI476X_I2C_ADDR_4 0x63
35 enum si476x_iqclk_config
{
36 SI476X_IQCLK_NOOP
= 0,
37 SI476X_IQCLK_TRISTATE
= 1,
40 enum si476x_iqfs_config
{
42 SI476X_IQFS_TRISTATE
= 1,
45 enum si476x_iout_config
{
47 SI476X_IOUT_TRISTATE
= 1,
48 SI476X_IOUT_OUTPUT
= 22,
50 enum si476x_qout_config
{
52 SI476X_QOUT_TRISTATE
= 1,
53 SI476X_QOUT_OUTPUT
= 22,
56 enum si476x_dclk_config
{
58 SI476X_DCLK_TRISTATE
= 1,
59 SI476X_DCLK_DAUDIO
= 10,
62 enum si476x_dfs_config
{
64 SI476X_DFS_TRISTATE
= 1,
65 SI476X_DFS_DAUDIO
= 10,
68 enum si476x_dout_config
{
70 SI476X_DOUT_TRISTATE
= 1,
71 SI476X_DOUT_I2S_OUTPUT
= 12,
72 SI476X_DOUT_I2S_INPUT
= 13,
75 enum si476x_xout_config
{
77 SI476X_XOUT_TRISTATE
= 1,
78 SI476X_XOUT_I2S_INPUT
= 13,
79 SI476X_XOUT_MODE_SELECT
= 23,
83 enum si476x_icin_config
{
85 SI476X_ICIN_TRISTATE
= 1,
86 SI476X_ICIN_GPO1_HIGH
= 2,
87 SI476X_ICIN_GPO1_LOW
= 3,
88 SI476X_ICIN_IC_LINK
= 30,
91 enum si476x_icip_config
{
93 SI476X_ICIP_TRISTATE
= 1,
94 SI476X_ICIP_GPO2_HIGH
= 2,
95 SI476X_ICIP_GPO2_LOW
= 3,
96 SI476X_ICIP_IC_LINK
= 30,
99 enum si476x_icon_config
{
100 SI476X_ICON_NOOP
= 0,
101 SI476X_ICON_TRISTATE
= 1,
102 SI476X_ICON_I2S
= 10,
103 SI476X_ICON_IC_LINK
= 30,
106 enum si476x_icop_config
{
107 SI476X_ICOP_NOOP
= 0,
108 SI476X_ICOP_TRISTATE
= 1,
109 SI476X_ICOP_I2S
= 10,
110 SI476X_ICOP_IC_LINK
= 30,
114 enum si476x_lrout_config
{
115 SI476X_LROUT_NOOP
= 0,
116 SI476X_LROUT_TRISTATE
= 1,
117 SI476X_LROUT_AUDIO
= 2,
118 SI476X_LROUT_MPX
= 3,
122 enum si476x_intb_config
{
123 SI476X_INTB_NOOP
= 0,
124 SI476X_INTB_TRISTATE
= 1,
125 SI476X_INTB_DAUDIO
= 10,
126 SI476X_INTB_IRQ
= 40,
129 enum si476x_a1_config
{
131 SI476X_A1_TRISTATE
= 1,
135 enum si476x_part_revisions
{
136 SI476X_REVISION_A10
= 0,
137 SI476X_REVISION_A20
= 1,
138 SI476X_REVISION_A30
= 2,
141 struct si476x_pinmux
{
142 enum si476x_dclk_config dclk
;
143 enum si476x_dfs_config dfs
;
144 enum si476x_dout_config dout
;
145 enum si476x_xout_config xout
;
147 enum si476x_iqclk_config iqclk
;
148 enum si476x_iqfs_config iqfs
;
149 enum si476x_iout_config iout
;
150 enum si476x_qout_config qout
;
152 enum si476x_icin_config icin
;
153 enum si476x_icip_config icip
;
154 enum si476x_icon_config icon
;
155 enum si476x_icop_config icop
;
157 enum si476x_lrout_config lrout
;
159 enum si476x_intb_config intb
;
160 enum si476x_a1_config a1
;
164 * enum si476x_phase_diversity_mode - possbile phase diversity modes
165 * for SI4764/5/6/7 chips.
167 * @SI476X_PHDIV_DISABLED: Phase diversity feature is
169 * @SI476X_PHDIV_PRIMARY_COMBINING: Tuner works as a primary tuner
170 * in combination with a
172 * @SI476X_PHDIV_PRIMARY_ANTENNA: Tuner works as a primary tuner
173 * using only its own antenna.
174 * @SI476X_PHDIV_SECONDARY_ANTENNA: Tuner works as a primary tuner
175 * usning seconary tuner's antenna.
176 * @SI476X_PHDIV_SECONDARY_COMBINING: Tuner works as a secondary
177 * tuner in combination with the
180 enum si476x_phase_diversity_mode
{
181 SI476X_PHDIV_DISABLED
= 0,
182 SI476X_PHDIV_PRIMARY_COMBINING
= 1,
183 SI476X_PHDIV_PRIMARY_ANTENNA
= 2,
184 SI476X_PHDIV_SECONDARY_ANTENNA
= 3,
185 SI476X_PHDIV_SECONDARY_COMBINING
= 5,
188 enum si476x_ibias6x
{
189 SI476X_IBIAS6X_OTHER
= 0,
190 SI476X_IBIAS6X_RCVR1_NON_4MHZ_CLK
= 1,
194 SI476X_XSTART_MULTIPLE_TUNER
= 0x11,
195 SI476X_XSTART_NORMAL
= 0x77,
199 SI476X_FREQ_4_MHZ
= 0,
200 SI476X_FREQ_37P209375_MHZ
= 1,
201 SI476X_FREQ_36P4_MHZ
= 2,
202 SI476X_FREQ_37P8_MHZ
= 3,
206 SI476X_XMODE_CRYSTAL_RCVR1
= 1,
207 SI476X_XMODE_EXT_CLOCK
= 2,
208 SI476X_XMODE_CRYSTAL_RCVR2_3
= 3,
211 enum si476x_xbiashc
{
212 SI476X_XBIASHC_SINGLE_RECEIVER
= 0,
213 SI476X_XBIASHC_MULTIPLE_RECEIVER
= 1,
217 SI476X_XBIAS_RCVR2_3
= 0,
218 SI476X_XBIAS_4MHZ_RCVR1
= 3,
219 SI476X_XBIAS_RCVR1
= 7,
223 SI476X_FUNC_BOOTLOADER
= 0,
224 SI476X_FUNC_FM_RECEIVER
= 1,
225 SI476X_FUNC_AM_RECEIVER
= 2,
226 SI476X_FUNC_WB_RECEIVER
= 3,
231 * @xcload: Selects the amount of additional on-chip capacitance to
232 * be connected between XTAL1 and gnd and between XTAL2 and
233 * GND. One half of the capacitance value shown here is the
234 * additional load capacitance presented to the xtal. The
235 * minimum step size is 0.277 pF. Recommended value is 0x28
236 * but it will be layout dependent. Range is 0–0x3F i.e.
238 * @ctsien: enable CTSINT(interrupt request when CTS condition
240 * @intsel: when set A1 pin becomes the interrupt pin; otherwise,
241 * INTB is the interrupt pin
242 * @func: selects the boot function of the device. I.e.
243 * SI476X_BOOTLOADER - Boot loader
244 * SI476X_FM_RECEIVER - FM receiver
245 * SI476X_AM_RECEIVER - AM receiver
246 * SI476X_WB_RECEIVER - Weatherband receiver
247 * @freq: oscillator's crystal frequency:
248 * SI476X_XTAL_37P209375_MHZ - 37.209375 Mhz
249 * SI476X_XTAL_36P4_MHZ - 36.4 Mhz
250 * SI476X_XTAL_37P8_MHZ - 37.8 Mhz
252 struct si476x_power_up_args
{
253 enum si476x_ibias6x ibias6x
;
254 enum si476x_xstart xstart
;
257 enum si476x_xbiashc xbiashc
;
258 enum si476x_xbias xbias
;
259 enum si476x_func func
;
260 enum si476x_freq freq
;
261 enum si476x_xmode xmode
;
265 enum si476x_ctrl_id
{
266 V4L2_CID_SI476X_RSSI_THRESHOLD
= (V4L2_CID_USER_SI476X_BASE
+ 1),
267 V4L2_CID_SI476X_SNR_THRESHOLD
= (V4L2_CID_USER_SI476X_BASE
+ 2),
268 V4L2_CID_SI476X_MAX_TUNE_ERROR
= (V4L2_CID_USER_SI476X_BASE
+ 3),
269 V4L2_CID_SI476X_HARMONICS_COUNT
= (V4L2_CID_USER_SI476X_BASE
+ 4),
270 V4L2_CID_SI476X_DIVERSITY_MODE
= (V4L2_CID_USER_SI476X_BASE
+ 5),
271 V4L2_CID_SI476X_INTERCHIP_LINK
= (V4L2_CID_USER_SI476X_BASE
+ 6),
275 * Platform dependent definition
277 struct si476x_platform_data
{
278 int gpio_reset
; /* < 0 if not used */
280 struct si476x_power_up_args power_up_parameters
;
281 enum si476x_phase_diversity_mode diversity_mode
;
283 struct si476x_pinmux pinmux
;
287 * struct si476x_rsq_status - structure containing received signal
289 * @multhint: Multipath Detect High.
290 * true - Indicatedes that the value is below
291 * FM_RSQ_MULTIPATH_HIGH_THRESHOLD
292 * false - Indicatedes that the value is above
293 * FM_RSQ_MULTIPATH_HIGH_THRESHOLD
294 * @multlint: Multipath Detect Low.
295 * true - Indicatedes that the value is below
296 * FM_RSQ_MULTIPATH_LOW_THRESHOLD
297 * false - Indicatedes that the value is above
298 * FM_RSQ_MULTIPATH_LOW_THRESHOLD
299 * @snrhint: SNR Detect High.
300 * true - Indicatedes that the value is below
301 * FM_RSQ_SNR_HIGH_THRESHOLD
302 * false - Indicatedes that the value is above
303 * FM_RSQ_SNR_HIGH_THRESHOLD
304 * @snrlint: SNR Detect Low.
305 * true - Indicatedes that the value is below
306 * FM_RSQ_SNR_LOW_THRESHOLD
307 * false - Indicatedes that the value is above
308 * FM_RSQ_SNR_LOW_THRESHOLD
309 * @rssihint: RSSI Detect High.
310 * true - Indicatedes that the value is below
311 * FM_RSQ_RSSI_HIGH_THRESHOLD
312 * false - Indicatedes that the value is above
313 * FM_RSQ_RSSI_HIGH_THRESHOLD
314 * @rssilint: RSSI Detect Low.
315 * true - Indicatedes that the value is below
316 * FM_RSQ_RSSI_LOW_THRESHOLD
317 * false - Indicatedes that the value is above
318 * FM_RSQ_RSSI_LOW_THRESHOLD
320 * Set if seek command hits the band limit or wrapped to
321 * the original frequency.
322 * @snr_ready: SNR measurement in progress.
323 * @rssiready: RSSI measurement in progress.
324 * @afcrl: Set if FREQOFF >= MAX_TUNE_ERROR
325 * @valid: Set if the channel is valid
326 * rssi < FM_VALID_RSSI_THRESHOLD
327 * snr < FM_VALID_SNR_THRESHOLD
328 * tune_error < FM_VALID_MAX_TUNE_ERROR
329 * @readfreq: Current tuned frequency.
330 * @freqoff: Signed frequency offset.
331 * @rssi: Received Signal Strength Indicator(dBuV).
332 * @snr: RF SNR Indicator(dB).
334 * @hassi: Low/High side Adjacent(100 kHz) Channel Strength Indicator
335 * @mult: Multipath indicator
336 * @dev: Who knows? But values may vary.
337 * @readantcap: Antenna tuning capacity value.
338 * @assi: Adjacent Channel(+/- 200kHz) Strength Indicator
339 * @usn: Ultrasonic Noise Inticator in -DBFS
341 struct si476x_rsq_status_report
{
342 __u8 multhint
, multlint
;
343 __u8 snrhint
, snrlint
;
344 __u8 rssihint
, rssilint
;
372 * si476x_acf_status_report - ACF report results
374 * @blend_int: If set, indicates that stereo separation has crossed
375 * below the blend threshold as set by FM_ACF_BLEND_THRESHOLD
376 * @hblend_int: If set, indicates that HiBlend cutoff frequency is
377 * lower than threshold as set by FM_ACF_HBLEND_THRESHOLD
378 * @hicut_int: If set, indicates that HiCut cutoff frequency is lower
379 * than the threshold set by ACF_
382 struct si476x_acf_status_report
{
398 SI476X_FMAGC_10K_OHM
= 0,
399 SI476X_FMAGC_800_OHM
= 1,
400 SI476X_FMAGC_400_OHM
= 2,
401 SI476X_FMAGC_200_OHM
= 4,
402 SI476X_FMAGC_100_OHM
= 8,
403 SI476X_FMAGC_50_OHM
= 16,
404 SI476X_FMAGC_25_OHM
= 32,
405 SI476X_FMAGC_12P5_OHM
= 64,
406 SI476X_FMAGC_6P25_OHM
= 128,
409 struct si476x_agc_status_report
{
420 struct si476x_rds_blockcount_report
{