10b009d7a62e72fc230bcbad9b093d6e4fd7be9f
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2002-11-19 Klee Dienes <kdienes@apple.com>
2
3 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
4 fields.
5 (h8_opcodes). Modify initializer and initializer macros to no
6 longer initialize the removed fields.
7
8 2002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
9
10 * tic4x.h (c4x_insts): Fixed LDHI constraint
11
12 2002-11-18 Klee Dienes <kdienes@apple.com>
13
14 * h8300.h (h8_opcode): Remove 'length' field.
15 (h8_opcodes): Mark as 'const' (both the declaration and
16 definition). Modify initializer and initializer macros to no
17 longer initialize the length field.
18
19 2002-11-18 Klee Dienes <kdienes@apple.com>
20
21 * arc.h (arc_ext_opcodes): Declare as extern.
22 (arc_ext_operands): Declare as extern.
23 * i860.h (i860_opcodes): Declare as const.
24
25 2002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
26
27 * tic4x.h: File reordering. Added enhanced opcodes.
28
29 2002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
30
31 * tic4x.h: Major rewrite of entire file. Define instruction
32 classes, and put each instruction into a class.
33
34 2002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
35
36 * tic4x.h: Added new opcodes and corrected some bugs. Add support
37 for new DSP types.
38
39 2002-10-14 Alan Modra <amodra@bigpond.net.au>
40
41 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
42
43 2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
44 Ken Raeburn <raeburn@cygnus.com>
45 Aldy Hernandez <aldyh@redhat.com>
46 Eric Christopher <echristo@redhat.com>
47 Richard Sandiford <rsandifo@redhat.com>
48
49 * mips.h: Update comment for new opcodes.
50 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
51 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
52 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
53 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
54 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
55 Don't match CPU_R4111 with INSN_4100.
56
57 2002-08-19 Elena Zannoni <ezannoni@redhat.com>
58
59 From matthew green <mrg@redhat.com>
60
61 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
62 instructions.
63 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
64 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
65 e500x2 Integer select, branch locking, performance monitor,
66 cache locking and machine check APUs, respectively.
67 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
68 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
69
70 2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
71
72 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
73 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
74 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
75 memory banks.
76 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
77
78 2002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
79
80 * mips.h (INSN_MIPS16): New define.
81
82 2002-07-08 Alan Modra <amodra@bigpond.net.au>
83
84 * i386.h: Remove IgnoreSize from movsx and movzx.
85
86 2002-06-08 Alan Modra <amodra@bigpond.net.au>
87
88 * a29k.h: Replace CONST with const.
89 (CONST): Don't define.
90 * convex.h: Replace CONST with const.
91 (CONST): Don't define.
92 * dlx.h: Replace CONST with const.
93 * or32.h (CONST): Don't define.
94
95 2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
96
97 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
98 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
99 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
100 (INSN_MDMX): New constants, for MDMX support.
101 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
102
103 2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
104
105 * dlx.h: New file.
106
107 2002-05-25 Alan Modra <amodra@bigpond.net.au>
108
109 * ia64.h: Use #include "" instead of <> for local header files.
110 * sparc.h: Likewise.
111
112 2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
113
114 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
115
116 2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
117
118 * h8300.h: Corrected defs of all control regs
119 and eepmov instr.
120
121 2002-04-11 Alan Modra <amodra@bigpond.net.au>
122
123 * i386.h: Add intel mode cmpsd and movsd.
124 Put them before SSE2 insns, so that rep prefix works.
125
126 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
127
128 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
129 instructions.
130 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
131 may be passed along with the ISA bitmask.
132
133 2002-03-05 Paul Koning <pkoning@equallogic.com>
134
135 * pdp11.h: Add format codes for float instruction formats.
136
137 2002-02-25 Alan Modra <amodra@bigpond.net.au>
138
139 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
140
141 Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
142
143 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
144
145 Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
146
147 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
148 (xchg): Fix.
149 (in, out): Disable 64bit operands.
150 (call, jmp): Avoid REX prefixes.
151 (jcxz): Prohibit in 64bit mode
152 (jrcxz, loop): Add 64bit variants.
153 (movq): Fix patterns.
154 (movmskps, pextrw, pinstrw): Add 64bit variants.
155
156 2002-01-31 Ivan Guzvinec <ivang@opencores.org>
157
158 * or32.h: New file.
159
160 2002-01-22 Graydon Hoare <graydon@redhat.com>
161
162 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
163 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
164
165 2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
166
167 * h8300.h: Comment typo fix.
168
169 2002-01-03 matthew green <mrg@redhat.com>
170
171 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
172 (PPC_OPCODE_BOOKE64): Likewise.
173
174 Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
175
176 * hppa.h (call, ret): Move to end of table.
177 (addb, addib): PA2.0 variants should have been PA2.0W.
178 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
179 happy.
180 (fldw, fldd, fstw, fstd, bb): Likewise.
181 (short loads/stores): Tweak format specifier slightly to keep
182 disassembler happy.
183 (indexed loads/stores): Likewise.
184 (absolute loads/stores): Likewise.
185
186 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
187
188 * d10v.h (OPERAND_NOSP): New macro.
189
190 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
191
192 * d10v.h (OPERAND_SP): New macro.
193
194 2001-11-15 Alan Modra <amodra@bigpond.net.au>
195
196 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
197
198 2001-11-11 Timothy Wall <twall@alum.mit.edu>
199
200 * tic54x.h: Revise opcode layout; don't really need a separate
201 structure for parallel opcodes.
202
203 2001-11-13 Zack Weinberg <zack@codesourcery.com>
204 Alan Modra <amodra@bigpond.net.au>
205
206 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
207 accept WordReg.
208
209 2001-11-04 Chris Demetriou <cgd@broadcom.com>
210
211 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
212
213 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
214
215 * mmix.h: New file.
216
217 2001-10-18 Chris Demetriou <cgd@broadcom.com>
218
219 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
220 of the expression, to make source code merging easier.
221
222 2001-10-17 Chris Demetriou <cgd@broadcom.com>
223
224 * mips.h: Sort coprocessor instruction argument characters
225 in comment, add a few more words of description for "H".
226
227 2001-10-17 Chris Demetriou <cgd@broadcom.com>
228
229 * mips.h (INSN_SB1): New cpu-specific instruction bit.
230 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
231 if cpu is CPU_SB1.
232
233 2001-10-17 matthew green <mrg@redhat.com>
234
235 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
236
237 2001-10-12 matthew green <mrg@redhat.com>
238
239 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
240 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
241 instructions, respectively.
242
243 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
244
245 * v850.h: Remove spurious comment.
246
247 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
248
249 * h8300.h: Fix compile time warning messages
250
251 2001-09-04 Richard Henderson <rth@redhat.com>
252
253 * alpha.h (struct alpha_operand): Pack elements into bitfields.
254
255 2001-08-31 Eric Christopher <echristo@redhat.com>
256
257 * mips.h: Remove CPU_MIPS32_4K.
258
259 2001-08-27 Torbjorn Granlund <tege@swox.com>
260
261 * ppc.h (PPC_OPERAND_DS): Define.
262
263 2001-08-25 Andreas Jaeger <aj@suse.de>
264
265 * d30v.h: Fix declaration of reg_name_cnt.
266
267 * d10v.h: Fix declaration of d10v_reg_name_cnt.
268
269 * arc.h: Add prototypes from opcodes/arc-opc.c.
270
271 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
272
273 * mips.h (INSN_10000): Define.
274 (OPCODE_IS_MEMBER): Check for INSN_10000.
275
276 2001-08-10 Alan Modra <amodra@one.net.au>
277
278 * ppc.h: Revert 2001-08-08.
279
280 2001-08-10 Richard Sandiford <rsandifo@redhat.com>
281
282 * mips.h (INSN_GP32): Remove.
283 (OPCODE_IS_MEMBER): Remove gp32 parameter.
284 (M_MOVE): New macro identifier.
285
286 2001-08-08 Alan Modra <amodra@one.net.au>
287
288 1999-10-25 Torbjorn Granlund <tege@swox.com>
289 * ppc.h (struct powerpc_operand): New field `reloc'.
290
291 2001-08-01 Aldy Hernandez <aldyh@redhat.com>
292
293 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
294
295 2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
296
297 * cgen.h (CGEN_INSN): Add regex support.
298 (build_insn_regex): Declare.
299
300 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
301
302 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
303 (cgen_cpu_desc): Ditto.
304
305 2001-07-07 Ben Elliston <bje@redhat.com>
306
307 * m88k.h: Clean up and reformat. Remove unused code.
308
309 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
310
311 * cgen.h (cgen_keyword): Add nonalpha_chars field.
312
313 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
314
315 * mips.h (CPU_R12000): Define.
316
317 2001-05-23 John Healy <jhealy@redhat.com>
318
319 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
320
321 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
322
323 * mips.h (INSN_ISA_MASK): Define.
324
325 2001-05-12 Alan Modra <amodra@one.net.au>
326
327 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
328 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
329 and use InvMem as these insns must have register operands.
330
331 2001-05-04 Alan Modra <amodra@one.net.au>
332
333 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
334 and pextrw to swap reg/rm assignments.
335
336 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
337
338 * cris.h (enum cris_insn_version_usage): Correct comment for
339 cris_ver_v3p.
340
341 2001-03-24 Alan Modra <alan@linuxcare.com.au>
342
343 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
344 Add InvMem to first operand of "maskmovdqu".
345
346 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
347
348 * cris.h (ADD_PC_INCR_OPCODE): New macro.
349
350 2001-03-21 Kazu Hirata <kazu@hxi.com>
351
352 * h8300.h: Fix formatting.
353
354 2001-03-22 Alan Modra <alan@linuxcare.com.au>
355
356 * i386.h (i386_optab): Add paddq, psubq.
357
358 2001-03-19 Alan Modra <alan@linuxcare.com.au>
359
360 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
361
362 2001-02-28 Igor Shevlyakov <igor@windriver.com>
363
364 * m68k.h: new defines for Coldfire V4. Update mcf to know
365 about mcf5407.
366
367 2001-02-18 lars brinkhoff <lars@nocrew.org>
368
369 * pdp11.h: New file.
370
371 2001-02-12 Jan Hubicka <jh@suse.cz>
372
373 * i386.h (i386_optab): SSE integer converison instructions have
374 64bit versions on x86-64.
375
376 2001-02-10 Nick Clifton <nickc@redhat.com>
377
378 * mips.h: Remove extraneous whitespace. Formating change to allow
379 for future contribution.
380
381 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
382
383 * s390.h: New file.
384
385 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
386
387 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
388 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
389 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
390
391 2001-01-24 Karsten Keil <kkeil@suse.de>
392
393 * i386.h (i386_optab): Fix swapgs
394
395 2001-01-14 Alan Modra <alan@linuxcare.com.au>
396
397 * hppa.h: Describe new '<' and '>' operand types, and tidy
398 existing comments.
399 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
400 Remove duplicate "ldw j(s,b),x". Sort some entries.
401
402 2001-01-13 Jan Hubicka <jh@suse.cz>
403
404 * i386.h (i386_optab): Fix pusha and ret templates.
405
406 2001-01-11 Peter Targett <peter.targett@arccores.com>
407
408 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
409 definitions for masking cpu type.
410 (arc_ext_operand_value) New structure for storing extended
411 operands.
412 (ARC_OPERAND_*) Flags for operand values.
413
414 2001-01-10 Jan Hubicka <jh@suse.cz>
415
416 * i386.h (pinsrw): Add.
417 (pshufw): Remove.
418 (cvttpd2dq): Fix operands.
419 (cvttps2dq): Likewise.
420 (movq2q): Rename to movdq2q.
421
422 2001-01-10 Richard Schaal <richard.schaal@intel.com>
423
424 * i386.h: Correct movnti instruction.
425
426 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
427
428 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
429 of operands (unsigned char or unsigned short).
430 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
431 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
432
433 2001-01-05 Jan Hubicka <jh@suse.cz>
434
435 * i386.h (i386_optab): Make [sml]fence template to use immext field.
436
437 2001-01-03 Jan Hubicka <jh@suse.cz>
438
439 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
440 introduced by Pentium4
441
442 2000-12-30 Jan Hubicka <jh@suse.cz>
443
444 * i386.h (i386_optab): Add "rex*" instructions;
445 add swapgs; disable jmp/call far direct instructions for
446 64bit mode; add syscall and sysret; disable registers for 0xc6
447 template. Add 'q' suffixes to extendable instructions, disable
448 obsolete instructions, add new sign/zero extension ones.
449 (i386_regtab): Add extended registers.
450 (*Suf): Add No_qSuf.
451 (q_Suf, wlq_Suf, bwlq_Suf): New.
452
453 2000-12-20 Jan Hubicka <jh@suse.cz>
454
455 * i386.h (i386_optab): Replace "Imm" with "EncImm".
456 (i386_regtab): Add flags field.
457
458 2000-12-12 Nick Clifton <nickc@redhat.com>
459
460 * mips.h: Fix formatting.
461
462 2000-12-01 Chris Demetriou <cgd@sibyte.com>
463
464 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
465 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
466 OP_*_SYSCALL definitions.
467 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
468 19 bit wait codes.
469 (MIPS operand specifier comments): Remove 'm', add 'U' and
470 'J', and update the meaning of 'B' so that it's more general.
471
472 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
473 INSN_ISA5): Renumber, redefine to mean the ISA at which the
474 instruction was added.
475 (INSN_ISA32): New constant.
476 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
477 Renumber to avoid new and/or renumbered INSN_* constants.
478 (INSN_MIPS32): Delete.
479 (ISA_UNKNOWN): New constant to indicate unknown ISA.
480 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
481 ISA_MIPS32): New constants, defined to be the mask of INSN_*
482 constants available at that ISA level.
483 (CPU_UNKNOWN): New constant to indicate unknown CPU.
484 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
485 define it with a unique value.
486 (OPCODE_IS_MEMBER): Update for new ISA membership-related
487 constant meanings.
488
489 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
490 definitions.
491
492 * mips.h (CPU_SB1): New constant.
493
494 2000-10-20 Jakub Jelinek <jakub@redhat.com>
495
496 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
497 Note that '3' is used for siam operand.
498
499 2000-09-22 Jim Wilson <wilson@cygnus.com>
500
501 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
502
503 2000-09-13 Anders Norlander <anorland@acc.umu.se>
504
505 * mips.h: Use defines instead of hard-coded processor numbers.
506 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
507 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
508 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
509 CPU_4KC, CPU_4KM, CPU_4KP): Define..
510 (OPCODE_IS_MEMBER): Use new defines.
511 (OP_MASK_SEL, OP_SH_SEL): Define.
512 (OP_MASK_CODE20, OP_SH_CODE20): Define.
513 Add 'P' to used characters.
514 Use 'H' for coprocessor select field.
515 Use 'm' for 20 bit breakpoint code.
516 Document new arg characters and add to used characters.
517 (INSN_MIPS32): New define for MIPS32 extensions.
518 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
519
520 2000-09-05 Alan Modra <alan@linuxcare.com.au>
521
522 * hppa.h: Mention cz completer.
523
524 2000-08-16 Jim Wilson <wilson@cygnus.com>
525
526 * ia64.h (IA64_OPCODE_POSTINC): New.
527
528 2000-08-15 H.J. Lu <hjl@gnu.org>
529
530 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
531 IgnoreSize change.
532
533 2000-08-08 Jason Eckhardt <jle@cygnus.com>
534
535 * i860.h: Small formatting adjustments.
536
537 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
538
539 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
540 Move related opcodes closer to each other.
541 Minor changes in comments, list undefined opcodes.
542
543 2000-07-26 Dave Brolley <brolley@redhat.com>
544
545 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
546
547 2000-07-22 Jason Eckhardt <jle@cygnus.com>
548
549 * i860.h (btne, bte, bla): Changed these opcodes
550 to use sbroff ('r') instead of split16 ('s').
551 (J, K, L, M): New operand types for 16-bit aligned fields.
552 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
553 use I, J, K, L, M instead of just I.
554 (T, U): New operand types for split 16-bit aligned fields.
555 (st.x): Changed these opcodes to use S, T, U instead of just S.
556 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
557 exist on the i860.
558 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
559 (pfeq.ss, pfeq.dd): New opcodes.
560 (st.s): Fixed incorrect mask bits.
561 (fmlow): Fixed incorrect mask bits.
562 (fzchkl, pfzchkl): Fixed incorrect mask bits.
563 (faddz, pfaddz): Fixed incorrect mask bits.
564 (form, pform): Fixed incorrect mask bits.
565 (pfld.l): Fixed incorrect mask bits.
566 (fst.q): Fixed incorrect mask bits.
567 (all floating point opcodes): Fixed incorrect mask bits for
568 handling of dual bit.
569
570 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
571
572 cris.h: New file.
573
574 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
575
576 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
577 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
578 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
579 (AVR_ISA_M83): Define for ATmega83, ATmega85.
580 (espm): Remove, because ESPM removed in databook update.
581 (eicall, eijmp): Move to the end of opcode table.
582
583 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
584
585 * m68hc11.h: New file for support of Motorola 68hc11.
586
587 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
588
589 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
590
591 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
592
593 * avr.h: New file with AVR opcodes.
594
595 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
596
597 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
598
599 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
600
601 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
602
603 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
604
605 * i386.h: Use sl_FP, not sl_Suf for fild.
606
607 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
608
609 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
610 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
611 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
612 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
613
614 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
615
616 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
617
618 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
619 Alexander Sokolov <robocop@netlink.ru>
620
621 * i386.h (i386_optab): Add cpu_flags for all instructions.
622
623 2000-05-13 Alan Modra <alan@linuxcare.com.au>
624
625 From Gavin Romig-Koch <gavin@cygnus.com>
626 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
627
628 2000-05-04 Timothy Wall <twall@cygnus.com>
629
630 * tic54x.h: New.
631
632 2000-05-03 J.T. Conklin <jtc@redback.com>
633
634 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
635 (PPC_OPERAND_VR): New operand flag for vector registers.
636
637 2000-05-01 Kazu Hirata <kazu@hxi.com>
638
639 * h8300.h (EOP): Add missing initializer.
640
641 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
642
643 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
644 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
645 New operand types l,y,&,fe,fE,fx added to support above forms.
646 (pa_opcodes): Replaced usage of 'x' as source/target for
647 floating point double-word loads/stores with 'fx'.
648
649 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
650 David Mosberger <davidm@hpl.hp.com>
651 Timothy Wall <twall@cygnus.com>
652 Jim Wilson <wilson@cygnus.com>
653
654 * ia64.h: New file.
655
656 2000-03-27 Nick Clifton <nickc@cygnus.com>
657
658 * d30v.h (SHORT_A1): Fix value.
659 (SHORT_AR): Renumber so that it is at the end of the list of short
660 instructions, not the end of the list of long instructions.
661
662 2000-03-26 Alan Modra <alan@linuxcare.com>
663
664 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
665 problem isn't really specific to Unixware.
666 (OLDGCC_COMPAT): Define.
667 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
668 destination %st(0).
669 Fix lots of comments.
670
671 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
672
673 * d30v.h:
674 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
675 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
676 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
677 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
678 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
679 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
680 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
681
682 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
683
684 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
685 fistpd without suffix.
686
687 2000-02-24 Nick Clifton <nickc@cygnus.com>
688
689 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
690 'signed_overflow_ok_p'.
691 Delete prototypes for cgen_set_flags() and cgen_get_flags().
692
693 2000-02-24 Andrew Haley <aph@cygnus.com>
694
695 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
696 (CGEN_CPU_TABLE): flags: new field.
697 Add prototypes for new functions.
698
699 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
700
701 * i386.h: Add some more UNIXWARE_COMPAT comments.
702
703 2000-02-23 Linas Vepstas <linas@linas.org>
704
705 * i370.h: New file.
706
707 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
708
709 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
710 cannot be combined in parallel with ADD/SUBppp.
711
712 2000-02-22 Andrew Haley <aph@cygnus.com>
713
714 * mips.h: (OPCODE_IS_MEMBER): Add comment.
715
716 1999-12-30 Andrew Haley <aph@cygnus.com>
717
718 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
719 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
720 insns.
721
722 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
723
724 * i386.h: Qualify intel mode far call and jmp with x_Suf.
725
726 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
727
728 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
729 indirect jumps and calls. Add FF/3 call for intel mode.
730
731 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
732
733 * mn10300.h: Add new operand types. Add new instruction formats.
734
735 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
736
737 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
738 instruction.
739
740 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
741
742 * mips.h (INSN_ISA5): New.
743
744 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
745
746 * mips.h (OPCODE_IS_MEMBER): New.
747
748 1999-10-29 Nick Clifton <nickc@cygnus.com>
749
750 * d30v.h (SHORT_AR): Define.
751
752 1999-10-18 Michael Meissner <meissner@cygnus.com>
753
754 * alpha.h (alpha_num_opcodes): Convert to unsigned.
755 (alpha_num_operands): Ditto.
756
757 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
758
759 * hppa.h (pa_opcodes): Add load and store cache control to
760 instructions. Add ordered access load and store.
761
762 * hppa.h (pa_opcode): Add new entries for addb and addib.
763
764 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
765
766 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
767
768 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
769
770 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
771
772 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
773
774 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
775 and "be" using completer prefixes.
776
777 * hppa.h (pa_opcodes): Add initializers to silence compiler.
778
779 * hppa.h: Update comments about character usage.
780
781 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
782
783 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
784 up the new fstw & bve instructions.
785
786 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
787
788 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
789 instructions.
790
791 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
792
793 * hppa.h (pa_opcodes): Add long offset double word load/store
794 instructions.
795
796 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
797 stores.
798
799 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
800
801 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
802
803 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
804
805 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
806
807 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
808
809 * hppa.h (pa_opcodes): Add support for "b,l".
810
811 * hppa.h (pa_opcodes): Add support for "b,gate".
812
813 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
814
815 * hppa.h (pa_opcodes): Use 'fX' for first register operand
816 in xmpyu.
817
818 * hppa.h (pa_opcodes): Fix mask for probe and probei.
819
820 * hppa.h (pa_opcodes): Fix mask for depwi.
821
822 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
823
824 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
825 an explicit output argument.
826
827 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
828
829 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
830 Add a few PA2.0 loads and store variants.
831
832 1999-09-04 Steve Chamberlain <sac@pobox.com>
833
834 * pj.h: New file.
835
836 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
837
838 * i386.h (i386_regtab): Move %st to top of table, and split off
839 other fp reg entries.
840 (i386_float_regtab): To here.
841
842 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
843
844 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
845 by 'f'.
846
847 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
848 Add supporting args.
849
850 * hppa.h: Document new completers and args.
851 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
852 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
853 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
854 pmenb and pmdis.
855
856 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
857 hshr, hsub, mixh, mixw, permh.
858
859 * hppa.h (pa_opcodes): Change completers in instructions to
860 use 'c' prefix.
861
862 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
863 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
864
865 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
866 fnegabs to use 'I' instead of 'F'.
867
868 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
869
870 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
871 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
872 Alphabetically sort PIII insns.
873
874 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
875
876 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
877
878 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
879
880 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
881 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
882
883 * hppa.h: Document 64 bit condition completers.
884
885 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
886
887 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
888
889 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
890
891 * i386.h (i386_optab): Add DefaultSize modifier to all insns
892 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
893 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
894
895 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
896 Jeff Law <law@cygnus.com>
897
898 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
899
900 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
901
902 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
903 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
904
905 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
906
907 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
908
909 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
910
911 * hppa.h (struct pa_opcode): Add new field "flags".
912 (FLAGS_STRICT): Define.
913
914 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
915 Jeff Law <law@cygnus.com>
916
917 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
918
919 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
920
921 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
922
923 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
924 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
925 flag to fcomi and friends.
926
927 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
928
929 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
930 integer logical instructions.
931
932 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
933
934 * m68k.h: Document new formats `E', `G', `H' and new places `N',
935 `n', `o'.
936
937 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
938 and new places `m', `M', `h'.
939
940 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
941
942 * hppa.h (pa_opcodes): Add several processor specific system
943 instructions.
944
945 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
946
947 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
948 "addb", and "addib" to be used by the disassembler.
949
950 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
951
952 * i386.h (ReverseModrm): Remove all occurences.
953 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
954 movmskps, pextrw, pmovmskb, maskmovq.
955 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
956 ignore the data size prefix.
957
958 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
959 Mostly stolen from Doug Ledford <dledford@redhat.com>
960
961 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
962
963 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
964
965 1999-04-14 Doug Evans <devans@casey.cygnus.com>
966
967 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
968 (CGEN_ATTR_TYPE): Update.
969 (CGEN_ATTR_MASK): Number booleans starting at 0.
970 (CGEN_ATTR_VALUE): Update.
971 (CGEN_INSN_ATTR): Update.
972
973 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
974
975 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
976 instructions.
977
978 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
979
980 * hppa.h (bb, bvb): Tweak opcode/mask.
981
982
983 1999-03-22 Doug Evans <devans@casey.cygnus.com>
984
985 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
986 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
987 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
988 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
989 Delete member max_insn_size.
990 (enum cgen_cpu_open_arg): New enum.
991 (cpu_open): Update prototype.
992 (cpu_open_1): Declare.
993 (cgen_set_cpu): Delete.
994
995 1999-03-11 Doug Evans <devans@casey.cygnus.com>
996
997 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
998 (CGEN_OPERAND_NIL): New macro.
999 (CGEN_OPERAND): New member `type'.
1000 (@arch@_cgen_operand_table): Delete decl.
1001 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1002 (CGEN_OPERAND_TABLE): New struct.
1003 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1004 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1005 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1006 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1007 {get,set}_{int,vma}_operand.
1008 (@arch@_cgen_cpu_open): New arg `isa'.
1009 (cgen_set_cpu): Ditto.
1010
1011 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1012
1013 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1014
1015 1999-02-25 Doug Evans <devans@casey.cygnus.com>
1016
1017 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1018 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1019 enum cgen_hw_type.
1020 (CGEN_HW_TABLE): New struct.
1021 (hw_table): Delete declaration.
1022 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1023 to table entry to enum.
1024 (CGEN_OPINST): Ditto.
1025 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1026
1027 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1028
1029 * alpha.h (AXP_OPCODE_EV6): New.
1030 (AXP_OPCODE_NOPAL): Include it.
1031
1032 1999-02-09 Doug Evans <devans@casey.cygnus.com>
1033
1034 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1035 All uses updated. New members int_insn_p, max_insn_size,
1036 parse_operand,insert_operand,extract_operand,print_operand,
1037 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1038 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1039 extract_handlers,print_handlers.
1040 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1041 (CGEN_ATTR_BOOL_OFFSET): New macro.
1042 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1043 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1044 (cgen_opcode_handler): Renamed from cgen_base.
1045 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1046 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1047 all uses updated.
1048 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1049 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1050 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1051 (CGEN_OPCODE,CGEN_IBASE): New types.
1052 (CGEN_INSN): Rewrite.
1053 (CGEN_{ASM,DIS}_HASH*): Delete.
1054 (init_opcode_table,init_ibld_table): Declare.
1055 (CGEN_INSN_ATTR): New type.
1056
1057 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
1058
1059 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1060 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1061 Change *Suf definitions to include x and d suffixes.
1062 (movsx): Use w_Suf and b_Suf.
1063 (movzx): Likewise.
1064 (movs): Use bwld_Suf.
1065 (fld): Change ordering. Use sld_FP.
1066 (fild): Add Intel Syntax equivalent of fildq.
1067 (fst): Use sld_FP.
1068 (fist): Use sld_FP.
1069 (fstp): Use sld_FP. Add x_FP version.
1070 (fistp): LLongMem version for Intel Syntax.
1071 (fcom, fcomp): Use sld_FP.
1072 (fadd, fiadd, fsub): Use sld_FP.
1073 (fsubr): Use sld_FP.
1074 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1075
1076 1999-01-27 Doug Evans <devans@casey.cygnus.com>
1077
1078 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1079 CGEN_MODE_UINT.
1080
1081 1999-01-16 Jeffrey A Law (law@cygnus.com)
1082
1083 * hppa.h (bv): Fix mask.
1084
1085 1999-01-05 Doug Evans <devans@casey.cygnus.com>
1086
1087 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1088 (CGEN_ATTR): Use it.
1089 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1090 (CGEN_ATTR_TABLE): New member dfault.
1091
1092 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1093
1094 * mips.h (MIPS16_INSN_BRANCH): New.
1095
1096 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1097
1098 The following is part of a change made by Edith Epstein
1099 <eepstein@sophia.cygnus.com> as part of a project to merge in
1100 changes by HP; HP did not create ChangeLog entries.
1101
1102 * hppa.h (completer_chars): list of chars to not put a space
1103 after.
1104
1105 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1106
1107 * i386.h (i386_optab): Permit w suffix on processor control and
1108 status word instructions.
1109
1110 1998-11-30 Doug Evans <devans@casey.cygnus.com>
1111
1112 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1113 (struct cgen_keyword_entry): Ditto.
1114 (struct cgen_operand): Ditto.
1115 (CGEN_IFLD): New typedef, with associated access macros.
1116 (CGEN_IFMT): New typedef, with associated access macros.
1117 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1118 (CGEN_IVALUE): New typedef.
1119 (struct cgen_insn): Delete const on syntax,attrs members.
1120 `format' now points to format data. Type of `value' is now
1121 CGEN_IVALUE.
1122 (struct cgen_opcode_table): New member ifld_table.
1123
1124 1998-11-18 Doug Evans <devans@casey.cygnus.com>
1125
1126 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1127 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1128 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1129 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1130 (cgen_opcode_table): Update type of dis_hash fn.
1131 (extract_operand): Update type of `insn_value' arg.
1132
1133 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1134
1135 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1136
1137 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1138
1139 * mips.h (INSN_MULT): Added.
1140
1141 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1142
1143 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1144
1145 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1146
1147 * cgen.h (CGEN_INSN_INT): New typedef.
1148 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1149 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1150 (CGEN_INSN_BYTES_PTR): New typedef.
1151 (CGEN_EXTRACT_INFO): New typedef.
1152 (cgen_insert_fn,cgen_extract_fn): Update.
1153 (cgen_opcode_table): New member `insn_endian'.
1154 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1155 (insert_operand,extract_operand): Update.
1156 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1157
1158 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1159
1160 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1161 (struct CGEN_HW_ENTRY): New member `attrs'.
1162 (CGEN_HW_ATTR): New macro.
1163 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1164 (CGEN_INSN_INVALID_P): New macro.
1165
1166 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1167
1168 * hppa.h: Add "fid".
1169
1170 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1171
1172 From Robert Andrew Dale <rob@nb.net>
1173 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1174 (AMD_3DNOW_OPCODE): Define.
1175
1176 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1177
1178 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1179
1180 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1181
1182 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1183
1184 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1185
1186 Move all global state data into opcode table struct, and treat
1187 opcode table as something that is "opened/closed".
1188 * cgen.h (CGEN_OPCODE_DESC): New type.
1189 (all fns): New first arg of opcode table descriptor.
1190 (cgen_set_parse_operand_fn): Add prototype.
1191 (cgen_current_machine,cgen_current_endian): Delete.
1192 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1193 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1194 dis_hash_table,dis_hash_table_entries.
1195 (opcode_open,opcode_close): Add prototypes.
1196
1197 * cgen.h (cgen_insn): New element `cdx'.
1198
1199 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1200
1201 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1202
1203 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1204
1205 * mn10300.h: Add "no_match_operands" field for instructions.
1206 (MN10300_MAX_OPERANDS): Define.
1207
1208 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1209
1210 * cgen.h (cgen_macro_insn_count): Declare.
1211
1212 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1213
1214 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1215 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1216 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1217 set_{int,vma}_operand.
1218
1219 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1220
1221 * mn10300.h: Add "machine" field for instructions.
1222 (MN103, AM30): Define machine types.
1223
1224 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1225
1226 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1227
1228 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1229
1230 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1231
1232 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1233
1234 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1235 and ud2b.
1236 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1237 those that happen to be implemented on pentiums.
1238
1239 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1240
1241 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1242 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1243 with Size16|IgnoreSize or Size32|IgnoreSize.
1244
1245 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1246
1247 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1248 (REPE): Rename to REPE_PREFIX_OPCODE.
1249 (i386_regtab_end): Remove.
1250 (i386_prefixtab, i386_prefixtab_end): Remove.
1251 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1252 of md_begin.
1253 (MAX_OPCODE_SIZE): Define.
1254 (i386_optab_end): Remove.
1255 (sl_Suf): Define.
1256 (sl_FP): Use sl_Suf.
1257
1258 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1259 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1260 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1261 data32, dword, and adword prefixes.
1262 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1263 regs.
1264
1265 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1266
1267 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1268
1269 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1270 register operands, because this is a common idiom. Flag them with
1271 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1272 fdivrp because gcc erroneously generates them. Also flag with a
1273 warning.
1274
1275 * i386.h: Add suffix modifiers to most insns, and tighter operand
1276 checks in some cases. Fix a number of UnixWare compatibility
1277 issues with float insns. Merge some floating point opcodes, using
1278 new FloatMF modifier.
1279 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1280 consistency.
1281
1282 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1283 IgnoreDataSize where appropriate.
1284
1285 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1286
1287 * i386.h: (one_byte_segment_defaults): Remove.
1288 (two_byte_segment_defaults): Remove.
1289 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1290
1291 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1292
1293 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1294 (cgen_hw_lookup_by_num): Declare.
1295
1296 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1297
1298 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1299 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1300
1301 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1302
1303 * cgen.h (cgen_asm_init_parse): Delete.
1304 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1305 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1306
1307 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1308
1309 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1310 (cgen_asm_finish_insn): Update prototype.
1311 (cgen_insn): New members num, data.
1312 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1313 dis_hash, dis_hash_table_size moved to ...
1314 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1315 All uses updated. New members asm_hash_p, dis_hash_p.
1316 (CGEN_MINSN_EXPANSION): New struct.
1317 (cgen_expand_macro_insn): Declare.
1318 (cgen_macro_insn_count): Declare.
1319 (get_insn_operands): Update prototype.
1320 (lookup_get_insn_operands): Declare.
1321
1322 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1323
1324 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1325 regKludge. Add operands types for string instructions.
1326
1327 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1328
1329 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1330 table.
1331
1332 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1333
1334 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1335 for `gettext'.
1336
1337 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1338
1339 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1340 Add IsString flag to string instructions.
1341 (IS_STRING): Don't define.
1342 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1343 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1344 (SS_PREFIX_OPCODE): Define.
1345
1346 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1347
1348 * i386.h: Revert March 24 patch; no more LinearAddress.
1349
1350 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1351
1352 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1353 instructions, and instead add FWait opcode modifier. Add short
1354 form of fldenv and fstenv.
1355 (FWAIT_OPCODE): Define.
1356
1357 * i386.h (i386_optab): Change second operand constraint of `mov
1358 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1359 allow legal instructions such as `movl %gs,%esi'
1360
1361 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1362
1363 * h8300.h: Various changes to fully bracket initializers.
1364
1365 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1366
1367 * i386.h: Set LinearAddress for lidt and lgdt.
1368
1369 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1370
1371 * cgen.h (CGEN_BOOL_ATTR): New macro.
1372
1373 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1374
1375 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1376
1377 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1378
1379 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1380 (cgen_insn): Record syntax and format entries here, rather than
1381 separately.
1382
1383 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1384
1385 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1386
1387 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1388
1389 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1390 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1391 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1392
1393 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1394
1395 * cgen.h (lookup_insn): New argument alias_p.
1396
1397 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1398
1399 Fix rac to accept only a0:
1400 * d10v.h (OPERAND_ACC): Split into:
1401 (OPERAND_ACC0, OPERAND_ACC1) .
1402 (OPERAND_GPR): Define.
1403
1404 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1405
1406 * cgen.h (CGEN_FIELDS): Define here.
1407 (CGEN_HW_ENTRY): New member `type'.
1408 (hw_list): Delete decl.
1409 (enum cgen_mode): Declare.
1410 (CGEN_OPERAND): New member `hw'.
1411 (enum cgen_operand_instance_type): Declare.
1412 (CGEN_OPERAND_INSTANCE): New type.
1413 (CGEN_INSN): New member `operands'.
1414 (CGEN_OPCODE_DATA): Make hw_list const.
1415 (get_insn_operands,lookup_insn): Add prototypes for.
1416
1417 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1418
1419 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1420 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1421 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1422 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1423
1424 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1425
1426 * cgen.h: Correct typo in comment end marker.
1427
1428 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1429
1430 * tic30.h: New file.
1431
1432 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1433
1434 * cgen.h: Add prototypes for cgen_save_fixups(),
1435 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1436 of cgen_asm_finish_insn() to return a char *.
1437
1438 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1439
1440 * cgen.h: Formatting changes to improve readability.
1441
1442 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1443
1444 * cgen.h (*): Clean up pass over `struct foo' usage.
1445 (CGEN_ATTR): Make unsigned char.
1446 (CGEN_ATTR_TYPE): Update.
1447 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1448 (cgen_base): Move member `attrs' to cgen_insn.
1449 (CGEN_KEYWORD): New member `null_entry'.
1450 (CGEN_{SYNTAX,FORMAT}): New types.
1451 (cgen_insn): Format and syntax separated from each other.
1452
1453 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1454
1455 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1456 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1457 flags_{used,set} long.
1458 (d30v_operand): Make flags field long.
1459
1460 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1461
1462 * m68k.h: Fix comment describing operand types.
1463
1464 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1465
1466 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1467 everything else after down.
1468
1469 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1470
1471 * d10v.h (OPERAND_FLAG): Split into:
1472 (OPERAND_FFLAG, OPERAND_CFLAG) .
1473
1474 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1475
1476 * mips.h (struct mips_opcode): Changed comments to reflect new
1477 field usage.
1478
1479 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1480
1481 * mips.h: Added to comments a quick-ref list of all assigned
1482 operand type characters.
1483 (OP_{MASK,SH}_PERFREG): New macros.
1484
1485 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1486
1487 * sparc.h: Add '_' and '/' for v9a asr's.
1488 Patch from David Miller <davem@vger.rutgers.edu>
1489
1490 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1491
1492 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1493 area are not available in the base model (H8/300).
1494
1495 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1496
1497 * m68k.h: Remove documentation of ` operand specifier.
1498
1499 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1500
1501 * m68k.h: Document q and v operand specifiers.
1502
1503 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1504
1505 * v850.h (struct v850_opcode): Add processors field.
1506 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1507 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1508 (PROCESSOR_V850EA): New bit constants.
1509
1510 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1511
1512 Merge changes from Martin Hunt:
1513
1514 * d30v.h: Allow up to 64 control registers. Add
1515 SHORT_A5S format.
1516
1517 * d30v.h (LONG_Db): New form for delayed branches.
1518
1519 * d30v.h: (LONG_Db): New form for repeati.
1520
1521 * d30v.h (SHORT_D2B): New form.
1522
1523 * d30v.h (SHORT_A2): New form.
1524
1525 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1526 registers are used. Needed for VLIW optimization.
1527
1528 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1529
1530 * cgen.h: Move assembler interface section
1531 up so cgen_parse_operand_result is defined for cgen_parse_address.
1532 (cgen_parse_address): Update prototype.
1533
1534 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1535
1536 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1537
1538 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1539
1540 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1541 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1542 <paubert@iram.es>.
1543
1544 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1545 <paubert@iram.es>.
1546
1547 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1548 <paubert@iram.es>.
1549
1550 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1551 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1552
1553 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1554
1555 * v850.h (V850_NOT_R0): New flag.
1556
1557 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1558
1559 * v850.h (struct v850_opcode): Remove flags field.
1560
1561 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1562
1563 * v850.h (struct v850_opcode): Add flags field.
1564 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1565 fields.
1566 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1567 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1568
1569 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1570
1571 * arc.h: New file.
1572
1573 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1574
1575 * sparc.h (sparc_opcodes): Declare as const.
1576
1577 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1578
1579 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1580 uses single or double precision floating point resources.
1581 (INSN_NO_ISA, INSN_ISA1): Define.
1582 (cpu specific INSN macros): Tweak into bitmasks outside the range
1583 of INSN_ISA field.
1584
1585 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1586
1587 * i386.h: Fix pand opcode.
1588
1589 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1590
1591 * mips.h: Widen INSN_ISA and move it to a more convenient
1592 bit position. Add INSN_3900.
1593
1594 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1595
1596 * mips.h (struct mips_opcode): added new field membership.
1597
1598 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1599
1600 * i386.h (movd): only Reg32 is allowed.
1601
1602 * i386.h: add fcomp and ud2. From Wayne Scott
1603 <wscott@ichips.intel.com>.
1604
1605 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1606
1607 * i386.h: Add MMX instructions.
1608
1609 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1610
1611 * i386.h: Remove W modifier from conditional move instructions.
1612
1613 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1614
1615 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1616 with no arguments to match that generated by the UnixWare
1617 assembler.
1618
1619 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1620
1621 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1622 (cgen_parse_operand_fn): Declare.
1623 (cgen_init_parse_operand): Declare.
1624 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1625 new argument `want'.
1626 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1627 (enum cgen_parse_operand_type): New enum.
1628
1629 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1630
1631 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1632
1633 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1634
1635 * cgen.h: New file.
1636
1637 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1638
1639 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1640 fdivrp.
1641
1642 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1643
1644 * v850.h (extract): Make unsigned.
1645
1646 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1647
1648 * i386.h: Add iclr.
1649
1650 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1651
1652 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1653 take a direction bit.
1654
1655 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1656
1657 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1658
1659 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1660
1661 * sparc.h: Include <ansidecl.h>. Update function declarations to
1662 use prototypes, and to use const when appropriate.
1663
1664 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1665
1666 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1667
1668 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1669
1670 * d10v.h: Change pre_defined_registers to
1671 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1672
1673 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1674
1675 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1676 Change mips_opcodes from const array to a pointer,
1677 and change bfd_mips_num_opcodes from const int to int,
1678 so that we can increase the size of the mips opcodes table
1679 dynamically.
1680
1681 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1682
1683 * d30v.h (FLAG_X): Remove unused flag.
1684
1685 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1686
1687 * d30v.h: New file.
1688
1689 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1690
1691 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1692 (PDS_VALUE): Macro to access value field of predefined symbols.
1693 (tic80_next_predefined_symbol): Add prototype.
1694
1695 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1696
1697 * tic80.h (tic80_symbol_to_value): Change prototype to match
1698 change in function, added class parameter.
1699
1700 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1701
1702 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1703 endmask fields, which are somewhat weird in that 0 and 32 are
1704 treated exactly the same.
1705
1706 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1707
1708 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1709 rather than a constant that is 2**X. Reorder them to put bits for
1710 operands that have symbolic names in the upper bits, so they can
1711 be packed into an int where the lower bits contain the value that
1712 corresponds to that symbolic name.
1713 (predefined_symbo): Add struct.
1714 (tic80_predefined_symbols): Declare array of translations.
1715 (tic80_num_predefined_symbols): Declare size of that array.
1716 (tic80_value_to_symbol): Declare function.
1717 (tic80_symbol_to_value): Declare function.
1718
1719 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1720
1721 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1722
1723 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1724
1725 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1726 be the destination register.
1727
1728 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1729
1730 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1731 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1732 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1733 that the opcode can have two vector instructions in a single
1734 32 bit word and we have to encode/decode both.
1735
1736 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1737
1738 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1739 TIC80_OPERAND_RELATIVE for PC relative.
1740 (TIC80_OPERAND_BASEREL): New flag bit for register
1741 base relative.
1742
1743 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1744
1745 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1746
1747 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1748
1749 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1750 ":s" modifier for scaling.
1751
1752 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1753
1754 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1755 (TIC80_OPERAND_M_LI): Ditto
1756
1757 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1758
1759 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1760 (TIC80_OPERAND_CC): New define for condition code operand.
1761 (TIC80_OPERAND_CR): New define for control register operand.
1762
1763 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1764
1765 * tic80.h (struct tic80_opcode): Name changed.
1766 (struct tic80_opcode): Remove format field.
1767 (struct tic80_operand): Add insertion and extraction functions.
1768 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1769 correct ones.
1770 (FMT_*): Ditto.
1771
1772 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1773
1774 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1775 type IV instruction offsets.
1776
1777 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1778
1779 * tic80.h: New file.
1780
1781 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1782
1783 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1784
1785 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1786
1787 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1788 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1789 * v850.h: Fix comment, v850_operand not powerpc_operand.
1790
1791 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1792
1793 * mn10200.h: Flesh out structures and definitions needed by
1794 the mn10200 assembler & disassembler.
1795
1796 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1797
1798 * mips.h: Add mips16 definitions.
1799
1800 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1801
1802 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1803
1804 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1805
1806 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1807 (MN10300_OPERAND_MEMADDR): Define.
1808
1809 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1810
1811 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1812
1813 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1814
1815 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1816
1817 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1818
1819 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1820
1821 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1822
1823 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1824
1825 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1826
1827 * alpha.h: Don't include "bfd.h"; private relocation types are now
1828 negative to minimize problems with shared libraries. Organize
1829 instruction subsets by AMASK extensions and PALcode
1830 implementation.
1831 (struct alpha_operand): Move flags slot for better packing.
1832
1833 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1834
1835 * v850.h (V850_OPERAND_RELAX): New operand flag.
1836
1837 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1838
1839 * mn10300.h (FMT_*): Move operand format definitions
1840 here.
1841
1842 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1843
1844 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1845
1846 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1847
1848 * mn10300.h (mn10300_opcode): Add "format" field.
1849 (MN10300_OPERAND_*): Define.
1850
1851 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1852
1853 * mn10x00.h: Delete.
1854 * mn10200.h, mn10300.h: New files.
1855
1856 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1857
1858 * mn10x00.h: New file.
1859
1860 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1861
1862 * v850.h: Add new flag to indicate this instruction uses a PC
1863 displacement.
1864
1865 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1866
1867 * h8300.h (stmac): Add missing instruction.
1868
1869 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1870
1871 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1872 field.
1873
1874 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1875
1876 * v850.h (V850_OPERAND_EP): Define.
1877
1878 * v850.h (v850_opcode): Add size field.
1879
1880 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1881
1882 * v850.h (v850_operands): Add insert and extract fields, pointers
1883 to functions used to handle unusual operand encoding.
1884 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1885 V850_OPERAND_SIGNED): Defined.
1886
1887 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1888
1889 * v850.h (v850_operands): Add flags field.
1890 (OPERAND_REG, OPERAND_NUM): Defined.
1891
1892 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1893
1894 * v850.h: New file.
1895
1896 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1897
1898 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1899 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1900 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1901 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1902 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1903 Defined.
1904
1905 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1906
1907 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1908 a 3 bit space id instead of a 2 bit space id.
1909
1910 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1911
1912 * d10v.h: Add some additional defines to support the
1913 assembler in determining which operations can be done in parallel.
1914
1915 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1916
1917 * h8300.h (SN): Define.
1918 (eepmov.b): Renamed from "eepmov"
1919 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1920 with them.
1921
1922 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1923
1924 * d10v.h (OPERAND_SHIFT): New operand flag.
1925
1926 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1927
1928 * d10v.h: Changes for divs, parallel-only instructions, and
1929 signed numbers.
1930
1931 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1932
1933 * d10v.h (pd_reg): Define. Putting the definition here allows
1934 the assembler and disassembler to share the same struct.
1935
1936 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1937
1938 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1939 Williams <steve@icarus.com>.
1940
1941 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1942
1943 * d10v.h: New file.
1944
1945 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1946
1947 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1948
1949 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1950
1951 * m68k.h (mcf5200): New macro.
1952 Document names of coldfire control registers.
1953
1954 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1955
1956 * h8300.h (SRC_IN_DST): Define.
1957
1958 * h8300.h (UNOP3): Mark the register operand in this insn
1959 as a source operand, not a destination operand.
1960 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1961 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1962 register operand with SRC_IN_DST.
1963
1964 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1965
1966 * alpha.h: New file.
1967
1968 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1969
1970 * rs6k.h: Remove obsolete file.
1971
1972 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1973
1974 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1975 fdivp, and fdivrp. Add ffreep.
1976
1977 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1978
1979 * h8300.h: Reorder various #defines for readability.
1980 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1981 (BITOP): Accept additional (unused) argument. All callers changed.
1982 (EBITOP): Likewise.
1983 (O_LAST): Bump.
1984 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1985
1986 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1987 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1988 (BITOP, EBITOP): Handle new H8/S addressing modes for
1989 bit insns.
1990 (UNOP3): Handle new shift/rotate insns on the H8/S.
1991 (insns using exr): New instructions.
1992 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1993
1994 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1995
1996 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1997 was incorrect.
1998
1999 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2000
2001 * h8300.h (START): Remove.
2002 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2003 and mov.l insns that can be relaxed.
2004
2005 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2006
2007 * i386.h: Remove Abs32 from lcall.
2008
2009 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2010
2011 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2012 (SLCPOP): New macro.
2013 Mark X,Y opcode letters as in use.
2014
2015 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2016
2017 * sparc.h (F_FLOAT, F_FBR): Define.
2018
2019 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2020
2021 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2022 from all insns.
2023 (ABS8SRC,ABS8DST): Add ABS8MEM.
2024 (add.l): Fix reg+reg variant.
2025 (eepmov.w): Renamed from eepmovw.
2026 (ldc,stc): Fix many cases.
2027
2028 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2029
2030 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2031
2032 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2033
2034 * sparc.h (O): Mark operand letter as in use.
2035
2036 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2037
2038 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2039 Mark operand letters uU as in use.
2040
2041 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2042
2043 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2044 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2045 (SPARC_OPCODE_SUPPORTED): New macro.
2046 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2047 (F_NOTV9): Delete.
2048
2049 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2050
2051 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2052 declaration consistent with return type in definition.
2053
2054 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2055
2056 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2057
2058 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2059
2060 * i386.h (i386_regtab): Add 80486 test registers.
2061
2062 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2063
2064 * i960.h (I_HX): Define.
2065 (i960_opcodes): Add HX instruction.
2066
2067 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2068
2069 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2070 and fclex.
2071
2072 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2073
2074 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2075 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2076 (bfd_* defines): Delete.
2077 (sparc_opcode_archs): Replaces architecture_pname.
2078 (sparc_opcode_lookup_arch): Declare.
2079 (NUMOPCODES): Delete.
2080
2081 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2082
2083 * sparc.h (enum sparc_architecture): Add v9a.
2084 (ARCHITECTURES_CONFLICT_P): Update.
2085
2086 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2087
2088 * i386.h: Added Pentium Pro instructions.
2089
2090 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2091
2092 * m68k.h: Document new 'W' operand place.
2093
2094 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2095
2096 * hppa.h: Add lci and syncdma instructions.
2097
2098 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2099
2100 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
2101 instructions.
2102
2103 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2104
2105 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2106 assembler's -mcom and -many switches.
2107
2108 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2109
2110 * i386.h: Fix cmpxchg8b extension opcode description.
2111
2112 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2113
2114 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2115 and register cr4.
2116
2117 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2118
2119 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2120
2121 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2122
2123 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2124
2125 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2126
2127 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2128
2129 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2130
2131 * m68kmri.h: Remove.
2132
2133 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2134 declarations. Remove F_ALIAS and flag field of struct
2135 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2136 int. Make name and args fields of struct m68k_opcode const.
2137
2138 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2139
2140 * sparc.h (F_NOTV9): Define.
2141
2142 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2143
2144 * mips.h (INSN_4010): Define.
2145
2146 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2147
2148 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2149
2150 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2151 * m68k.h: Fix argument descriptions of coprocessor
2152 instructions to allow only alterable operands where appropriate.
2153 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2154 (m68k_opcode_aliases): Add more aliases.
2155
2156 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2157
2158 * m68k.h: Added explcitly short-sized conditional branches, and a
2159 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2160 svr4-based configurations.
2161
2162 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2163
2164 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2165 * i386.h: added missing Data16/Data32 flags to a few instructions.
2166
2167 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2168
2169 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2170 (OP_MASK_BCC, OP_SH_BCC): Define.
2171 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2172 (OP_MASK_CCC, OP_SH_CCC): Define.
2173 (INSN_READ_FPR_R): Define.
2174 (INSN_RFE): Delete.
2175
2176 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2177
2178 * m68k.h (enum m68k_architecture): Deleted.
2179 (struct m68k_opcode_alias): New type.
2180 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2181 matching constraints, values and flags. As a side effect of this,
2182 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2183 as I know were never used, now may need re-examining.
2184 (numopcodes): Now const.
2185 (m68k_opcode_aliases, numaliases): New variables.
2186 (endop): Deleted.
2187 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2188 m68k_opcode_aliases; update declaration of m68k_opcodes.
2189
2190 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2191
2192 * hppa.h (delay_type): Delete unused enumeration.
2193 (pa_opcode): Replace unused delayed field with an architecture
2194 field.
2195 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2196
2197 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2198
2199 * mips.h (INSN_ISA4): Define.
2200
2201 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2202
2203 * mips.h (M_DLA_AB, M_DLI): Define.
2204
2205 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2206
2207 * hppa.h (fstwx): Fix single-bit error.
2208
2209 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2210
2211 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2212
2213 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2214
2215 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2216 debug registers. From Charles Hannum (mycroft@netbsd.org).
2217
2218 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2219
2220 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2221 i386 support:
2222 * i386.h (MOV_AX_DISP32): New macro.
2223 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2224 of several call/return instructions.
2225 (ADDR_PREFIX_OPCODE): New macro.
2226
2227 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2228
2229 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2230
2231 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2232 char.
2233 (struct vot, field `name'): ditto.
2234
2235 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2236
2237 * vax.h: Supply and properly group all values in end sentinel.
2238
2239 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2240
2241 * mips.h (INSN_ISA, INSN_4650): Define.
2242
2243 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2244
2245 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2246 systems with a separate instruction and data cache, such as the
2247 29040, these instructions take an optional argument.
2248
2249 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2250
2251 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2252 INSN_TRAP.
2253
2254 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2255
2256 * mips.h (INSN_STORE_MEMORY): Define.
2257
2258 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2259
2260 * sparc.h: Document new operand type 'x'.
2261
2262 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2263
2264 * i960.h (I_CX2): New instruction category. It includes
2265 instructions available on Cx and Jx processors.
2266 (I_JX): New instruction category, for JX-only instructions.
2267 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2268 Jx-only instructions, in I_JX category.
2269
2270 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2271
2272 * ns32k.h (endop): Made pointer const too.
2273
2274 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2275
2276 * ns32k.h: Drop Q operand type as there is no correct use
2277 for it. Add I and Z operand types which allow better checking.
2278
2279 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2280
2281 * h8300.h (xor.l) :fix bit pattern.
2282 (L_2): New size of operand.
2283 (trapa): Use it.
2284
2285 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2286
2287 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2288
2289 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2290
2291 * sparc.h: Include v9 definitions.
2292
2293 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2294
2295 * m68k.h (m68060): Defined.
2296 (m68040up, mfloat, mmmu): Include it.
2297 (struct m68k_opcode): Widen `arch' field.
2298 (m68k_opcodes): Updated for M68060. Removed comments that were
2299 instructions commented out by "JF" years ago.
2300
2301 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2302
2303 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2304 add a one-bit `flags' field.
2305 (F_ALIAS): New macro.
2306
2307 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2308
2309 * h8300.h (dec, inc): Get encoding right.
2310
2311 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2312
2313 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2314 a flag instead.
2315 (PPC_OPERAND_SIGNED): Define.
2316 (PPC_OPERAND_SIGNOPT): Define.
2317
2318 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2319
2320 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2321 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2322
2323 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2324
2325 * i386.h: Reverse last change. It'll be handled in gas instead.
2326
2327 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2328
2329 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2330 slower on the 486 and used the implicit shift count despite the
2331 explicit operand. The one-operand form is still available to get
2332 the shorter form with the implicit shift count.
2333
2334 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2335
2336 * hppa.h: Fix typo in fstws arg string.
2337
2338 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2339
2340 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2341
2342 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2343
2344 * ppc.h (PPC_OPCODE_601): Define.
2345
2346 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2347
2348 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2349 (so we can determine valid completers for both addb and addb[tf].)
2350
2351 * hppa.h (xmpyu): No floating point format specifier for the
2352 xmpyu instruction.
2353
2354 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2355
2356 * ppc.h (PPC_OPERAND_NEXT): Define.
2357 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2358 (struct powerpc_macro): Define.
2359 (powerpc_macros, powerpc_num_macros): Declare.
2360
2361 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2362
2363 * ppc.h: New file. Header file for PowerPC opcode table.
2364
2365 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2366
2367 * hppa.h: More minor template fixes for sfu and copr (to allow
2368 for easier disassembly).
2369
2370 * hppa.h: Fix templates for all the sfu and copr instructions.
2371
2372 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2373
2374 * i386.h (push): Permit Imm16 operand too.
2375
2376 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2377
2378 * h8300.h (andc): Exists in base arch.
2379
2380 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2381
2382 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2383 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2384
2385 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2386
2387 * hppa.h: Add FP quadword store instructions.
2388
2389 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2390
2391 * mips.h: (M_J_A): Added.
2392 (M_LA): Removed.
2393
2394 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2395
2396 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2397 <mellon@pepper.ncd.com>.
2398
2399 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2400
2401 * hppa.h: Immediate field in probei instructions is unsigned,
2402 not low-sign extended.
2403
2404 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2405
2406 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2407
2408 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2409
2410 * i386.h: Add "fxch" without operand.
2411
2412 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2413
2414 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2415
2416 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2417
2418 * hppa.h: Add gfw and gfr to the opcode table.
2419
2420 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2421
2422 * m88k.h: extended to handle m88110.
2423
2424 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2425
2426 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2427 addresses.
2428
2429 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2430
2431 * i960.h (i960_opcodes): Properly bracket initializers.
2432
2433 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2434
2435 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2436
2437 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2438
2439 * m68k.h (two): Protect second argument with parentheses.
2440
2441 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2442
2443 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2444 Deleted old in/out instructions in "#if 0" section.
2445
2446 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2447
2448 * i386.h (i386_optab): Properly bracket initializers.
2449
2450 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2451
2452 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2453 Jeff Law, law@cs.utah.edu).
2454
2455 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2456
2457 * i386.h (lcall): Accept Imm32 operand also.
2458
2459 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2460
2461 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2462 (M_DABS): Added.
2463
2464 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2465
2466 * mips.h (INSN_*): Changed values. Removed unused definitions.
2467 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2468 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2469 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2470 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2471 (M_*): Added new values for r6000 and r4000 macros.
2472 (ANY_DELAY): Removed.
2473
2474 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2475
2476 * mips.h: Added M_LI_S and M_LI_SS.
2477
2478 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2479
2480 * h8300.h: Get some rare mov.bs correct.
2481
2482 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2483
2484 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2485 been included.
2486
2487 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2488
2489 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2490 jump instructions, for use in disassemblers.
2491
2492 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2493
2494 * m88k.h: Make bitfields just unsigned, not unsigned long or
2495 unsigned short.
2496
2497 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2498
2499 * hppa.h: New argument type 'y'. Use in various float instructions.
2500
2501 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2502
2503 * hppa.h (break): First immediate field is unsigned.
2504
2505 * hppa.h: Add rfir instruction.
2506
2507 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2508
2509 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2510
2511 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2512
2513 * mips.h: Reworked the hazard information somewhat, and fixed some
2514 bugs in the instruction hazard descriptions.
2515
2516 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2517
2518 * m88k.h: Corrected a couple of opcodes.
2519
2520 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2521
2522 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2523 new version includes instruction hazard information, but is
2524 otherwise reasonably similar.
2525
2526 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2527
2528 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2529
2530 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2531
2532 Patches from Jeff Law, law@cs.utah.edu:
2533 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2534 Make the tables be the same for the following instructions:
2535 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2536 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2537 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2538 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2539 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2540 "fcmp", and "ftest".
2541
2542 * hppa.h: Make new and old tables the same for "break", "mtctl",
2543 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2544 Fix typo in last patch. Collapse several #ifdefs into a
2545 single #ifdef.
2546
2547 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2548 of the comments up-to-date.
2549
2550 * hppa.h: Update "free list" of letters and update
2551 comments describing each letter's function.
2552
2553 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2554
2555 * h8300.h: Lots of little fixes for the h8/300h.
2556
2557 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2558
2559 Support for H8/300-H
2560 * h8300.h: Lots of new opcodes.
2561
2562 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2563
2564 * h8300.h: checkpoint, includes H8/300-H opcodes.
2565
2566 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2567
2568 * Patches from Jeffrey Law <law@cs.utah.edu>.
2569 * hppa.h: Rework single precision FP
2570 instructions so that they correctly disassemble code
2571 PA1.1 code.
2572
2573 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2574
2575 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2576 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2577
2578 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2579
2580 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2581 gdb will define it for now.
2582
2583 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2584
2585 * sparc.h: Don't end enumerator list with comma.
2586
2587 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2588
2589 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2590 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2591 ("bc2t"): Correct typo.
2592 ("[ls]wc[023]"): Use T rather than t.
2593 ("c[0123]"): Define general coprocessor instructions.
2594
2595 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2596
2597 * m68k.h: Move split point for gcc compilation more towards
2598 middle.
2599
2600 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2601
2602 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2603 simply wrong, ics, rfi, & rfsvc were missing).
2604 Add "a" to opr_ext for "bb". Doc fix.
2605
2606 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2607
2608 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2609 * mips.h: Add casts, to suppress warnings about shifting too much.
2610 * m68k.h: Document the placement code '9'.
2611
2612 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2613
2614 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2615 allows callers to break up the large initialized struct full of
2616 opcodes into two half-sized ones. This permits GCC to compile
2617 this module, since it takes exponential space for initializers.
2618 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2619
2620 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2621
2622 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2623 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2624 initialized structs in it.
2625
2626 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2627
2628 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2629 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2630 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2631
2632 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2633
2634 * mips.h: document "i" and "j" operands correctly.
2635
2636 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2637
2638 * mips.h: Removed endianness dependency.
2639
2640 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2641
2642 * h8300.h: include info on number of cycles per instruction.
2643
2644 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2645
2646 * hppa.h: Move handy aliases to the front. Fix masks for extract
2647 and deposit instructions.
2648
2649 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2650
2651 * i386.h: accept shld and shrd both with and without the shift
2652 count argument, which is always %cl.
2653
2654 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2655
2656 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2657 (one_byte_segment_defaults, two_byte_segment_defaults,
2658 i386_prefixtab_end): Ditto.
2659
2660 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2661
2662 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2663 for operand 2; from John Carr, jfc@dsg.dec.com.
2664
2665 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2666
2667 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2668 always use 16-bit offsets. Makes calculated-size jump tables
2669 feasible.
2670
2671 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2672
2673 * i386.h: Fix one-operand forms of in* and out* patterns.
2674
2675 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2676
2677 * m68k.h: Added CPU32 support.
2678
2679 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2680
2681 * mips.h (break): Disassemble the argument. Patch from
2682 jonathan@cs.stanford.edu (Jonathan Stone).
2683
2684 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2685
2686 * m68k.h: merged Motorola and MIT syntax.
2687
2688 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2689
2690 * m68k.h (pmove): make the tests less strict, the 68k book is
2691 wrong.
2692
2693 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2694
2695 * m68k.h (m68ec030): Defined as alias for 68030.
2696 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2697 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2698 them. Tightened description of "fmovex" to distinguish it from
2699 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2700 up descriptions that claimed versions were available for chips not
2701 supporting them. Added "pmovefd".
2702
2703 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2704
2705 * m68k.h: fix where the . goes in divull
2706
2707 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2708
2709 * m68k.h: the cas2 instruction is supposed to be written with
2710 indirection on the last two operands, which can be either data or
2711 address registers. Added a new operand type 'r' which accepts
2712 either register type. Added new cases for cas2l and cas2w which
2713 use them. Corrected masks for cas2 which failed to recognize use
2714 of address register.
2715
2716 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2717
2718 * m68k.h: Merged in patches (mostly m68040-specific) from
2719 Colin Smith <colin@wrs.com>.
2720
2721 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2722 base). Also cleaned up duplicates, re-ordered instructions for
2723 the sake of dis-assembling (so aliases come after standard names).
2724 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2725
2726 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2727
2728 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2729 all missing .s
2730
2731 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2732
2733 * sparc.h: Moved tables to BFD library.
2734
2735 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2736
2737 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2738
2739 * h8300.h: Finish filling in all the holes in the opcode table,
2740 so that the Lucid C compiler can digest this as well...
2741
2742 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2743
2744 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2745 Fix opcodes on various sizes of fild/fist instructions
2746 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2747 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2748
2749 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2750
2751 * h8300.h: Fill in all the holes in the opcode table so that the
2752 losing HPUX C compiler can digest this...
2753
2754 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2755
2756 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2757 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2758
2759 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2760
2761 * sparc.h: Add new architecture variant sparclite; add its scan
2762 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2763
2764 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2765
2766 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2767 fy@lucid.com).
2768
2769 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2770
2771 * rs6k.h: New version from IBM (Metin).
2772
2773 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2774
2775 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2776 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2777
2778 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2779
2780 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2781
2782 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2783
2784 * m68k.h (one, two): Cast macro args to unsigned to suppress
2785 complaints from compiler and lint about integer overflow during
2786 shift.
2787
2788 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2789
2790 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2791
2792 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2793
2794 * mips.h: Make bitfield layout depend on the HOST compiler,
2795 not on the TARGET system.
2796
2797 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2798
2799 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2800 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2801 <TRANLE@INTELLICORP.COM>.
2802
2803 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2804
2805 * h8300.h: turned op_type enum into #define list
2806
2807 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2808
2809 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2810 similar instructions -- they've been renamed to "fitoq", etc.
2811 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2812 number of arguments.
2813 * h8300.h: Remove extra ; which produces compiler warning.
2814
2815 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2816
2817 * sparc.h: fix opcode for tsubcctv.
2818
2819 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2820
2821 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2822
2823 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2824
2825 * sparc.h (nop): Made the 'lose' field be even tighter,
2826 so only a standard 'nop' is disassembled as a nop.
2827
2828 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2829
2830 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2831 disassembled as a nop.
2832
2833 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2834
2835 * m68k.h, sparc.h: ANSIfy enums.
2836
2837 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2838
2839 * sparc.h: fix a typo.
2840
2841 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2842
2843 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2844 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2845 vax.h: Renamed from ../<foo>-opcode.h.
2846
2847 \f
2848 Local Variables:
2849 version-control: never
2850 End:
This page took 0.090064 seconds and 4 git commands to generate.