3323be98803e5d372615c243a56353646f7fce3b
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
2
3 * mips.h (CPU_R12000): Define.
4
5 2001-05-23 John Healy <jhealy@redhat.com>
6
7 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
8
9 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
10
11 * mips.h (INSN_ISA_MASK): Define.
12
13 2001-05-12 Alan Modra <amodra@one.net.au>
14
15 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
16 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
17 and use InvMem as these insns must have register operands.
18
19 2001-05-04 Alan Modra <amodra@one.net.au>
20
21 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
22 and pextrw to swap reg/rm assignments.
23
24 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
25
26 * cris.h (enum cris_insn_version_usage): Correct comment for
27 cris_ver_v3p.
28
29 2001-03-24 Alan Modra <alan@linuxcare.com.au>
30
31 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
32 Add InvMem to first operand of "maskmovdqu".
33
34 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
35
36 * cris.h (ADD_PC_INCR_OPCODE): New macro.
37
38 2001-03-21 Kazu Hirata <kazu@hxi.com>
39
40 * h8300.h: Fix formatting.
41
42 2001-03-22 Alan Modra <alan@linuxcare.com.au>
43
44 * i386.h (i386_optab): Add paddq, psubq.
45
46 2001-03-19 Alan Modra <alan@linuxcare.com.au>
47
48 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
49
50 2001-02-28 Igor Shevlyakov <igor@windriver.com>
51
52 * m68k.h: new defines for Coldfire V4. Update mcf to know
53 about mcf5407.
54
55 2001-02-18 lars brinkhoff <lars@nocrew.org>
56
57 * pdp11.h: New file.
58
59 2001-02-12 Jan Hubicka <jh@suse.cz>
60
61 * i386.h (i386_optab): SSE integer converison instructions have
62 64bit versions on x86-64.
63
64 2001-02-10 Nick Clifton <nickc@redhat.com>
65
66 * mips.h: Remove extraneous whitespace. Formating change to allow
67 for future contribution.
68
69 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
70
71 * s390.h: New file.
72
73 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
74
75 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
76 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
77 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
78
79 2001-01-24 Karsten Keil <kkeil@suse.de>
80
81 * i386.h (i386_optab): Fix swapgs
82
83 2001-01-14 Alan Modra <alan@linuxcare.com.au>
84
85 * hppa.h: Describe new '<' and '>' operand types, and tidy
86 existing comments.
87 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
88 Remove duplicate "ldw j(s,b),x". Sort some entries.
89
90 2001-01-13 Jan Hubicka <jh@suse.cz>
91
92 * i386.h (i386_optab): Fix pusha and ret templates.
93
94 2001-01-11 Peter Targett <peter.targett@arccores.com>
95
96 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
97 definitions for masking cpu type.
98 (arc_ext_operand_value) New structure for storing extended
99 operands.
100 (ARC_OPERAND_*) Flags for operand values.
101
102 2001-01-10 Jan Hubicka <jh@suse.cz>
103
104 * i386.h (pinsrw): Add.
105 (pshufw): Remove.
106 (cvttpd2dq): Fix operands.
107 (cvttps2dq): Likewise.
108 (movq2q): Rename to movdq2q.
109
110 2001-01-10 Richard Schaal <richard.schaal@intel.com>
111
112 * i386.h: Correct movnti instruction.
113
114 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
115
116 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
117 of operands (unsigned char or unsigned short).
118 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
119 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
120
121 2001-01-05 Jan Hubicka <jh@suse.cz>
122
123 * i386.h (i386_optab): Make [sml]fence template to use immext field.
124
125 2001-01-03 Jan Hubicka <jh@suse.cz>
126
127 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
128 introduced by Pentium4
129
130 2000-12-30 Jan Hubicka <jh@suse.cz>
131
132 * i386.h (i386_optab): Add "rex*" instructions;
133 add swapgs; disable jmp/call far direct instructions for
134 64bit mode; add syscall and sysret; disable registers for 0xc6
135 template. Add 'q' suffixes to extendable instructions, disable
136 obsolete instructions, add new sign/zero extension ones.
137 (i386_regtab): Add extended registers.
138 (*Suf): Add No_qSuf.
139 (q_Suf, wlq_Suf, bwlq_Suf): New.
140
141 2000-12-20 Jan Hubicka <jh@suse.cz>
142
143 * i386.h (i386_optab): Replace "Imm" with "EncImm".
144 (i386_regtab): Add flags field.
145
146 2000-12-12 Nick Clifton <nickc@redhat.com>
147
148 * mips.h: Fix formatting.
149
150 2000-12-01 Chris Demetriou <cgd@sibyte.com>
151
152 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
153 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
154 OP_*_SYSCALL definitions.
155 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
156 19 bit wait codes.
157 (MIPS operand specifier comments): Remove 'm', add 'U' and
158 'J', and update the meaning of 'B' so that it's more general.
159
160 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
161 INSN_ISA5): Renumber, redefine to mean the ISA at which the
162 instruction was added.
163 (INSN_ISA32): New constant.
164 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
165 Renumber to avoid new and/or renumbered INSN_* constants.
166 (INSN_MIPS32): Delete.
167 (ISA_UNKNOWN): New constant to indicate unknown ISA.
168 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
169 ISA_MIPS32): New constants, defined to be the mask of INSN_*
170 constants available at that ISA level.
171 (CPU_UNKNOWN): New constant to indicate unknown CPU.
172 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
173 define it with a unique value.
174 (OPCODE_IS_MEMBER): Update for new ISA membership-related
175 constant meanings.
176
177 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
178 definitions.
179
180 * mips.h (CPU_SB1): New constant.
181
182 2000-10-20 Jakub Jelinek <jakub@redhat.com>
183
184 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
185 Note that '3' is used for siam operand.
186
187 2000-09-22 Jim Wilson <wilson@cygnus.com>
188
189 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
190
191 2000-09-13 Anders Norlander <anorland@acc.umu.se>
192
193 * mips.h: Use defines instead of hard-coded processor numbers.
194 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
195 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
196 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
197 CPU_4KC, CPU_4KM, CPU_4KP): Define..
198 (OPCODE_IS_MEMBER): Use new defines.
199 (OP_MASK_SEL, OP_SH_SEL): Define.
200 (OP_MASK_CODE20, OP_SH_CODE20): Define.
201 Add 'P' to used characters.
202 Use 'H' for coprocessor select field.
203 Use 'm' for 20 bit breakpoint code.
204 Document new arg characters and add to used characters.
205 (INSN_MIPS32): New define for MIPS32 extensions.
206 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
207
208 2000-09-05 Alan Modra <alan@linuxcare.com.au>
209
210 * hppa.h: Mention cz completer.
211
212 2000-08-16 Jim Wilson <wilson@cygnus.com>
213
214 * ia64.h (IA64_OPCODE_POSTINC): New.
215
216 2000-08-15 H.J. Lu <hjl@gnu.org>
217
218 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
219 IgnoreSize change.
220
221 2000-08-08 Jason Eckhardt <jle@cygnus.com>
222
223 * i860.h: Small formatting adjustments.
224
225 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
226
227 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
228 Move related opcodes closer to each other.
229 Minor changes in comments, list undefined opcodes.
230
231 2000-07-26 Dave Brolley <brolley@redhat.com>
232
233 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
234
235 2000-07-22 Jason Eckhardt <jle@cygnus.com>
236
237 * i860.h (btne, bte, bla): Changed these opcodes
238 to use sbroff ('r') instead of split16 ('s').
239 (J, K, L, M): New operand types for 16-bit aligned fields.
240 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
241 use I, J, K, L, M instead of just I.
242 (T, U): New operand types for split 16-bit aligned fields.
243 (st.x): Changed these opcodes to use S, T, U instead of just S.
244 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
245 exist on the i860.
246 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
247 (pfeq.ss, pfeq.dd): New opcodes.
248 (st.s): Fixed incorrect mask bits.
249 (fmlow): Fixed incorrect mask bits.
250 (fzchkl, pfzchkl): Fixed incorrect mask bits.
251 (faddz, pfaddz): Fixed incorrect mask bits.
252 (form, pform): Fixed incorrect mask bits.
253 (pfld.l): Fixed incorrect mask bits.
254 (fst.q): Fixed incorrect mask bits.
255 (all floating point opcodes): Fixed incorrect mask bits for
256 handling of dual bit.
257
258 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
259
260 cris.h: New file.
261
262 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
263
264 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
265 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
266 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
267 (AVR_ISA_M83): Define for ATmega83, ATmega85.
268 (espm): Remove, because ESPM removed in databook update.
269 (eicall, eijmp): Move to the end of opcode table.
270
271 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
272
273 * m68hc11.h: New file for support of Motorola 68hc11.
274
275 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
276
277 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
278
279 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
280
281 * avr.h: New file with AVR opcodes.
282
283 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
284
285 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
286
287 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
288
289 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
290
291 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
292
293 * i386.h: Use sl_FP, not sl_Suf for fild.
294
295 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
296
297 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
298 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
299 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
300 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
301
302 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
303
304 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
305
306 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
307 Alexander Sokolov <robocop@netlink.ru>
308
309 * i386.h (i386_optab): Add cpu_flags for all instructions.
310
311 2000-05-13 Alan Modra <alan@linuxcare.com.au>
312
313 From Gavin Romig-Koch <gavin@cygnus.com>
314 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
315
316 2000-05-04 Timothy Wall <twall@cygnus.com>
317
318 * tic54x.h: New.
319
320 2000-05-03 J.T. Conklin <jtc@redback.com>
321
322 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
323 (PPC_OPERAND_VR): New operand flag for vector registers.
324
325 2000-05-01 Kazu Hirata <kazu@hxi.com>
326
327 * h8300.h (EOP): Add missing initializer.
328
329 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
330
331 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
332 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
333 New operand types l,y,&,fe,fE,fx added to support above forms.
334 (pa_opcodes): Replaced usage of 'x' as source/target for
335 floating point double-word loads/stores with 'fx'.
336
337 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
338 David Mosberger <davidm@hpl.hp.com>
339 Timothy Wall <twall@cygnus.com>
340 Jim Wilson <wilson@cygnus.com>
341
342 * ia64.h: New file.
343
344 2000-03-27 Nick Clifton <nickc@cygnus.com>
345
346 * d30v.h (SHORT_A1): Fix value.
347 (SHORT_AR): Renumber so that it is at the end of the list of short
348 instructions, not the end of the list of long instructions.
349
350 2000-03-26 Alan Modra <alan@linuxcare.com>
351
352 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
353 problem isn't really specific to Unixware.
354 (OLDGCC_COMPAT): Define.
355 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
356 destination %st(0).
357 Fix lots of comments.
358
359 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
360
361 * d30v.h:
362 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
363 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
364 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
365 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
366 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
367 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
368 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
369
370 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
371
372 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
373 fistpd without suffix.
374
375 2000-02-24 Nick Clifton <nickc@cygnus.com>
376
377 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
378 'signed_overflow_ok_p'.
379 Delete prototypes for cgen_set_flags() and cgen_get_flags().
380
381 2000-02-24 Andrew Haley <aph@cygnus.com>
382
383 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
384 (CGEN_CPU_TABLE): flags: new field.
385 Add prototypes for new functions.
386
387 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
388
389 * i386.h: Add some more UNIXWARE_COMPAT comments.
390
391 2000-02-23 Linas Vepstas <linas@linas.org>
392
393 * i370.h: New file.
394
395 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
396
397 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
398 cannot be combined in parallel with ADD/SUBppp.
399
400 2000-02-22 Andrew Haley <aph@cygnus.com>
401
402 * mips.h: (OPCODE_IS_MEMBER): Add comment.
403
404 1999-12-30 Andrew Haley <aph@cygnus.com>
405
406 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
407 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
408 insns.
409
410 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
411
412 * i386.h: Qualify intel mode far call and jmp with x_Suf.
413
414 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
415
416 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
417 indirect jumps and calls. Add FF/3 call for intel mode.
418
419 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
420
421 * mn10300.h: Add new operand types. Add new instruction formats.
422
423 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
424
425 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
426 instruction.
427
428 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
429
430 * mips.h (INSN_ISA5): New.
431
432 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
433
434 * mips.h (OPCODE_IS_MEMBER): New.
435
436 1999-10-29 Nick Clifton <nickc@cygnus.com>
437
438 * d30v.h (SHORT_AR): Define.
439
440 1999-10-18 Michael Meissner <meissner@cygnus.com>
441
442 * alpha.h (alpha_num_opcodes): Convert to unsigned.
443 (alpha_num_operands): Ditto.
444
445 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
446
447 * hppa.h (pa_opcodes): Add load and store cache control to
448 instructions. Add ordered access load and store.
449
450 * hppa.h (pa_opcode): Add new entries for addb and addib.
451
452 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
453
454 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
455
456 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
457
458 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
459
460 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
461
462 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
463 and "be" using completer prefixes.
464
465 * hppa.h (pa_opcodes): Add initializers to silence compiler.
466
467 * hppa.h: Update comments about character usage.
468
469 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
470
471 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
472 up the new fstw & bve instructions.
473
474 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
475
476 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
477 instructions.
478
479 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
480
481 * hppa.h (pa_opcodes): Add long offset double word load/store
482 instructions.
483
484 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
485 stores.
486
487 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
488
489 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
490
491 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
492
493 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
494
495 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
496
497 * hppa.h (pa_opcodes): Add support for "b,l".
498
499 * hppa.h (pa_opcodes): Add support for "b,gate".
500
501 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
502
503 * hppa.h (pa_opcodes): Use 'fX' for first register operand
504 in xmpyu.
505
506 * hppa.h (pa_opcodes): Fix mask for probe and probei.
507
508 * hppa.h (pa_opcodes): Fix mask for depwi.
509
510 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
511
512 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
513 an explicit output argument.
514
515 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
516
517 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
518 Add a few PA2.0 loads and store variants.
519
520 1999-09-04 Steve Chamberlain <sac@pobox.com>
521
522 * pj.h: New file.
523
524 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
525
526 * i386.h (i386_regtab): Move %st to top of table, and split off
527 other fp reg entries.
528 (i386_float_regtab): To here.
529
530 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
531
532 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
533 by 'f'.
534
535 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
536 Add supporting args.
537
538 * hppa.h: Document new completers and args.
539 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
540 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
541 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
542 pmenb and pmdis.
543
544 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
545 hshr, hsub, mixh, mixw, permh.
546
547 * hppa.h (pa_opcodes): Change completers in instructions to
548 use 'c' prefix.
549
550 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
551 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
552
553 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
554 fnegabs to use 'I' instead of 'F'.
555
556 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
557
558 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
559 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
560 Alphabetically sort PIII insns.
561
562 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
563
564 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
565
566 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
567
568 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
569 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
570
571 * hppa.h: Document 64 bit condition completers.
572
573 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
574
575 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
576
577 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
578
579 * i386.h (i386_optab): Add DefaultSize modifier to all insns
580 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
581 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
582
583 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
584 Jeff Law <law@cygnus.com>
585
586 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
587
588 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
589
590 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
591 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
592
593 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
594
595 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
596
597 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
598
599 * hppa.h (struct pa_opcode): Add new field "flags".
600 (FLAGS_STRICT): Define.
601
602 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
603 Jeff Law <law@cygnus.com>
604
605 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
606
607 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
608
609 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
610
611 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
612 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
613 flag to fcomi and friends.
614
615 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
616
617 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
618 integer logical instructions.
619
620 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
621
622 * m68k.h: Document new formats `E', `G', `H' and new places `N',
623 `n', `o'.
624
625 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
626 and new places `m', `M', `h'.
627
628 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
629
630 * hppa.h (pa_opcodes): Add several processor specific system
631 instructions.
632
633 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
634
635 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
636 "addb", and "addib" to be used by the disassembler.
637
638 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
639
640 * i386.h (ReverseModrm): Remove all occurences.
641 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
642 movmskps, pextrw, pmovmskb, maskmovq.
643 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
644 ignore the data size prefix.
645
646 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
647 Mostly stolen from Doug Ledford <dledford@redhat.com>
648
649 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
650
651 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
652
653 1999-04-14 Doug Evans <devans@casey.cygnus.com>
654
655 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
656 (CGEN_ATTR_TYPE): Update.
657 (CGEN_ATTR_MASK): Number booleans starting at 0.
658 (CGEN_ATTR_VALUE): Update.
659 (CGEN_INSN_ATTR): Update.
660
661 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
662
663 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
664 instructions.
665
666 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
667
668 * hppa.h (bb, bvb): Tweak opcode/mask.
669
670
671 1999-03-22 Doug Evans <devans@casey.cygnus.com>
672
673 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
674 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
675 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
676 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
677 Delete member max_insn_size.
678 (enum cgen_cpu_open_arg): New enum.
679 (cpu_open): Update prototype.
680 (cpu_open_1): Declare.
681 (cgen_set_cpu): Delete.
682
683 1999-03-11 Doug Evans <devans@casey.cygnus.com>
684
685 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
686 (CGEN_OPERAND_NIL): New macro.
687 (CGEN_OPERAND): New member `type'.
688 (@arch@_cgen_operand_table): Delete decl.
689 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
690 (CGEN_OPERAND_TABLE): New struct.
691 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
692 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
693 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
694 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
695 {get,set}_{int,vma}_operand.
696 (@arch@_cgen_cpu_open): New arg `isa'.
697 (cgen_set_cpu): Ditto.
698
699 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
700
701 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
702
703 1999-02-25 Doug Evans <devans@casey.cygnus.com>
704
705 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
706 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
707 enum cgen_hw_type.
708 (CGEN_HW_TABLE): New struct.
709 (hw_table): Delete declaration.
710 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
711 to table entry to enum.
712 (CGEN_OPINST): Ditto.
713 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
714
715 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
716
717 * alpha.h (AXP_OPCODE_EV6): New.
718 (AXP_OPCODE_NOPAL): Include it.
719
720 1999-02-09 Doug Evans <devans@casey.cygnus.com>
721
722 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
723 All uses updated. New members int_insn_p, max_insn_size,
724 parse_operand,insert_operand,extract_operand,print_operand,
725 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
726 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
727 extract_handlers,print_handlers.
728 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
729 (CGEN_ATTR_BOOL_OFFSET): New macro.
730 (CGEN_ATTR_MASK): Subtract it to compute bit number.
731 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
732 (cgen_opcode_handler): Renamed from cgen_base.
733 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
734 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
735 all uses updated.
736 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
737 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
738 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
739 (CGEN_OPCODE,CGEN_IBASE): New types.
740 (CGEN_INSN): Rewrite.
741 (CGEN_{ASM,DIS}_HASH*): Delete.
742 (init_opcode_table,init_ibld_table): Declare.
743 (CGEN_INSN_ATTR): New type.
744
745 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
746
747 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
748 (x_FP, d_FP, dls_FP, sldx_FP): Define.
749 Change *Suf definitions to include x and d suffixes.
750 (movsx): Use w_Suf and b_Suf.
751 (movzx): Likewise.
752 (movs): Use bwld_Suf.
753 (fld): Change ordering. Use sld_FP.
754 (fild): Add Intel Syntax equivalent of fildq.
755 (fst): Use sld_FP.
756 (fist): Use sld_FP.
757 (fstp): Use sld_FP. Add x_FP version.
758 (fistp): LLongMem version for Intel Syntax.
759 (fcom, fcomp): Use sld_FP.
760 (fadd, fiadd, fsub): Use sld_FP.
761 (fsubr): Use sld_FP.
762 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
763
764 1999-01-27 Doug Evans <devans@casey.cygnus.com>
765
766 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
767 CGEN_MODE_UINT.
768
769 1999-01-16 Jeffrey A Law (law@cygnus.com)
770
771 * hppa.h (bv): Fix mask.
772
773 1999-01-05 Doug Evans <devans@casey.cygnus.com>
774
775 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
776 (CGEN_ATTR): Use it.
777 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
778 (CGEN_ATTR_TABLE): New member dfault.
779
780 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
781
782 * mips.h (MIPS16_INSN_BRANCH): New.
783
784 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
785
786 The following is part of a change made by Edith Epstein
787 <eepstein@sophia.cygnus.com> as part of a project to merge in
788 changes by HP; HP did not create ChangeLog entries.
789
790 * hppa.h (completer_chars): list of chars to not put a space
791 after.
792
793 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
794
795 * i386.h (i386_optab): Permit w suffix on processor control and
796 status word instructions.
797
798 1998-11-30 Doug Evans <devans@casey.cygnus.com>
799
800 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
801 (struct cgen_keyword_entry): Ditto.
802 (struct cgen_operand): Ditto.
803 (CGEN_IFLD): New typedef, with associated access macros.
804 (CGEN_IFMT): New typedef, with associated access macros.
805 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
806 (CGEN_IVALUE): New typedef.
807 (struct cgen_insn): Delete const on syntax,attrs members.
808 `format' now points to format data. Type of `value' is now
809 CGEN_IVALUE.
810 (struct cgen_opcode_table): New member ifld_table.
811
812 1998-11-18 Doug Evans <devans@casey.cygnus.com>
813
814 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
815 (CGEN_OPERAND_INSTANCE): New member `attrs'.
816 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
817 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
818 (cgen_opcode_table): Update type of dis_hash fn.
819 (extract_operand): Update type of `insn_value' arg.
820
821 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
822
823 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
824
825 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
826
827 * mips.h (INSN_MULT): Added.
828
829 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
830
831 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
832
833 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
834
835 * cgen.h (CGEN_INSN_INT): New typedef.
836 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
837 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
838 (CGEN_INSN_BYTES_PTR): New typedef.
839 (CGEN_EXTRACT_INFO): New typedef.
840 (cgen_insert_fn,cgen_extract_fn): Update.
841 (cgen_opcode_table): New member `insn_endian'.
842 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
843 (insert_operand,extract_operand): Update.
844 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
845
846 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
847
848 * cgen.h (CGEN_ATTR_BOOLS): New macro.
849 (struct CGEN_HW_ENTRY): New member `attrs'.
850 (CGEN_HW_ATTR): New macro.
851 (struct CGEN_OPERAND_INSTANCE): New member `name'.
852 (CGEN_INSN_INVALID_P): New macro.
853
854 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
855
856 * hppa.h: Add "fid".
857
858 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
859
860 From Robert Andrew Dale <rob@nb.net>
861 * i386.h (i386_optab): Add AMD 3DNow! instructions.
862 (AMD_3DNOW_OPCODE): Define.
863
864 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
865
866 * d30v.h (EITHER_BUT_PREFER_MU): Define.
867
868 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
869
870 * cgen.h (cgen_insn): #if 0 out element `cdx'.
871
872 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
873
874 Move all global state data into opcode table struct, and treat
875 opcode table as something that is "opened/closed".
876 * cgen.h (CGEN_OPCODE_DESC): New type.
877 (all fns): New first arg of opcode table descriptor.
878 (cgen_set_parse_operand_fn): Add prototype.
879 (cgen_current_machine,cgen_current_endian): Delete.
880 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
881 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
882 dis_hash_table,dis_hash_table_entries.
883 (opcode_open,opcode_close): Add prototypes.
884
885 * cgen.h (cgen_insn): New element `cdx'.
886
887 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
888
889 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
890
891 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
892
893 * mn10300.h: Add "no_match_operands" field for instructions.
894 (MN10300_MAX_OPERANDS): Define.
895
896 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
897
898 * cgen.h (cgen_macro_insn_count): Declare.
899
900 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
901
902 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
903 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
904 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
905 set_{int,vma}_operand.
906
907 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
908
909 * mn10300.h: Add "machine" field for instructions.
910 (MN103, AM30): Define machine types.
911
912 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
913
914 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
915
916 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
917
918 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
919
920 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
921
922 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
923 and ud2b.
924 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
925 those that happen to be implemented on pentiums.
926
927 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
928
929 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
930 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
931 with Size16|IgnoreSize or Size32|IgnoreSize.
932
933 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
934
935 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
936 (REPE): Rename to REPE_PREFIX_OPCODE.
937 (i386_regtab_end): Remove.
938 (i386_prefixtab, i386_prefixtab_end): Remove.
939 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
940 of md_begin.
941 (MAX_OPCODE_SIZE): Define.
942 (i386_optab_end): Remove.
943 (sl_Suf): Define.
944 (sl_FP): Use sl_Suf.
945
946 * i386.h (i386_optab): Allow 16 bit displacement for `mov
947 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
948 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
949 data32, dword, and adword prefixes.
950 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
951 regs.
952
953 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
954
955 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
956
957 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
958 register operands, because this is a common idiom. Flag them with
959 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
960 fdivrp because gcc erroneously generates them. Also flag with a
961 warning.
962
963 * i386.h: Add suffix modifiers to most insns, and tighter operand
964 checks in some cases. Fix a number of UnixWare compatibility
965 issues with float insns. Merge some floating point opcodes, using
966 new FloatMF modifier.
967 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
968 consistency.
969
970 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
971 IgnoreDataSize where appropriate.
972
973 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
974
975 * i386.h: (one_byte_segment_defaults): Remove.
976 (two_byte_segment_defaults): Remove.
977 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
978
979 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
980
981 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
982 (cgen_hw_lookup_by_num): Declare.
983
984 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
985
986 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
987 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
988
989 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
990
991 * cgen.h (cgen_asm_init_parse): Delete.
992 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
993 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
994
995 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
996
997 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
998 (cgen_asm_finish_insn): Update prototype.
999 (cgen_insn): New members num, data.
1000 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1001 dis_hash, dis_hash_table_size moved to ...
1002 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1003 All uses updated. New members asm_hash_p, dis_hash_p.
1004 (CGEN_MINSN_EXPANSION): New struct.
1005 (cgen_expand_macro_insn): Declare.
1006 (cgen_macro_insn_count): Declare.
1007 (get_insn_operands): Update prototype.
1008 (lookup_get_insn_operands): Declare.
1009
1010 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1011
1012 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1013 regKludge. Add operands types for string instructions.
1014
1015 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1016
1017 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1018 table.
1019
1020 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1021
1022 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1023 for `gettext'.
1024
1025 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1026
1027 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1028 Add IsString flag to string instructions.
1029 (IS_STRING): Don't define.
1030 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1031 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1032 (SS_PREFIX_OPCODE): Define.
1033
1034 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1035
1036 * i386.h: Revert March 24 patch; no more LinearAddress.
1037
1038 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1039
1040 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1041 instructions, and instead add FWait opcode modifier. Add short
1042 form of fldenv and fstenv.
1043 (FWAIT_OPCODE): Define.
1044
1045 * i386.h (i386_optab): Change second operand constraint of `mov
1046 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1047 allow legal instructions such as `movl %gs,%esi'
1048
1049 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1050
1051 * h8300.h: Various changes to fully bracket initializers.
1052
1053 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1054
1055 * i386.h: Set LinearAddress for lidt and lgdt.
1056
1057 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1058
1059 * cgen.h (CGEN_BOOL_ATTR): New macro.
1060
1061 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1062
1063 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1064
1065 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1066
1067 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1068 (cgen_insn): Record syntax and format entries here, rather than
1069 separately.
1070
1071 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1072
1073 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1074
1075 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1076
1077 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1078 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1079 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1080
1081 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1082
1083 * cgen.h (lookup_insn): New argument alias_p.
1084
1085 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1086
1087 Fix rac to accept only a0:
1088 * d10v.h (OPERAND_ACC): Split into:
1089 (OPERAND_ACC0, OPERAND_ACC1) .
1090 (OPERAND_GPR): Define.
1091
1092 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1093
1094 * cgen.h (CGEN_FIELDS): Define here.
1095 (CGEN_HW_ENTRY): New member `type'.
1096 (hw_list): Delete decl.
1097 (enum cgen_mode): Declare.
1098 (CGEN_OPERAND): New member `hw'.
1099 (enum cgen_operand_instance_type): Declare.
1100 (CGEN_OPERAND_INSTANCE): New type.
1101 (CGEN_INSN): New member `operands'.
1102 (CGEN_OPCODE_DATA): Make hw_list const.
1103 (get_insn_operands,lookup_insn): Add prototypes for.
1104
1105 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1106
1107 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1108 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1109 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1110 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1111
1112 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1113
1114 * cgen.h: Correct typo in comment end marker.
1115
1116 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1117
1118 * tic30.h: New file.
1119
1120 Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1121
1122 * cgen.h: Add prototypes for cgen_save_fixups(),
1123 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1124 of cgen_asm_finish_insn() to return a char *.
1125
1126 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1127
1128 * cgen.h: Formatting changes to improve readability.
1129
1130 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1131
1132 * cgen.h (*): Clean up pass over `struct foo' usage.
1133 (CGEN_ATTR): Make unsigned char.
1134 (CGEN_ATTR_TYPE): Update.
1135 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1136 (cgen_base): Move member `attrs' to cgen_insn.
1137 (CGEN_KEYWORD): New member `null_entry'.
1138 (CGEN_{SYNTAX,FORMAT}): New types.
1139 (cgen_insn): Format and syntax separated from each other.
1140
1141 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1142
1143 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1144 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1145 flags_{used,set} long.
1146 (d30v_operand): Make flags field long.
1147
1148 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1149
1150 * m68k.h: Fix comment describing operand types.
1151
1152 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1153
1154 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1155 everything else after down.
1156
1157 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1158
1159 * d10v.h (OPERAND_FLAG): Split into:
1160 (OPERAND_FFLAG, OPERAND_CFLAG) .
1161
1162 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1163
1164 * mips.h (struct mips_opcode): Changed comments to reflect new
1165 field usage.
1166
1167 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1168
1169 * mips.h: Added to comments a quick-ref list of all assigned
1170 operand type characters.
1171 (OP_{MASK,SH}_PERFREG): New macros.
1172
1173 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1174
1175 * sparc.h: Add '_' and '/' for v9a asr's.
1176 Patch from David Miller <davem@vger.rutgers.edu>
1177
1178 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1179
1180 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1181 area are not available in the base model (H8/300).
1182
1183 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1184
1185 * m68k.h: Remove documentation of ` operand specifier.
1186
1187 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1188
1189 * m68k.h: Document q and v operand specifiers.
1190
1191 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1192
1193 * v850.h (struct v850_opcode): Add processors field.
1194 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1195 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1196 (PROCESSOR_V850EA): New bit constants.
1197
1198 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1199
1200 Merge changes from Martin Hunt:
1201
1202 * d30v.h: Allow up to 64 control registers. Add
1203 SHORT_A5S format.
1204
1205 * d30v.h (LONG_Db): New form for delayed branches.
1206
1207 * d30v.h: (LONG_Db): New form for repeati.
1208
1209 * d30v.h (SHORT_D2B): New form.
1210
1211 * d30v.h (SHORT_A2): New form.
1212
1213 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1214 registers are used. Needed for VLIW optimization.
1215
1216 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1217
1218 * cgen.h: Move assembler interface section
1219 up so cgen_parse_operand_result is defined for cgen_parse_address.
1220 (cgen_parse_address): Update prototype.
1221
1222 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1223
1224 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1225
1226 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1227
1228 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1229 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1230 <paubert@iram.es>.
1231
1232 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1233 <paubert@iram.es>.
1234
1235 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1236 <paubert@iram.es>.
1237
1238 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1239 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1240
1241 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1242
1243 * v850.h (V850_NOT_R0): New flag.
1244
1245 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1246
1247 * v850.h (struct v850_opcode): Remove flags field.
1248
1249 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1250
1251 * v850.h (struct v850_opcode): Add flags field.
1252 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1253 fields.
1254 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1255 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1256
1257 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1258
1259 * arc.h: New file.
1260
1261 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1262
1263 * sparc.h (sparc_opcodes): Declare as const.
1264
1265 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1266
1267 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1268 uses single or double precision floating point resources.
1269 (INSN_NO_ISA, INSN_ISA1): Define.
1270 (cpu specific INSN macros): Tweak into bitmasks outside the range
1271 of INSN_ISA field.
1272
1273 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1274
1275 * i386.h: Fix pand opcode.
1276
1277 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1278
1279 * mips.h: Widen INSN_ISA and move it to a more convenient
1280 bit position. Add INSN_3900.
1281
1282 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1283
1284 * mips.h (struct mips_opcode): added new field membership.
1285
1286 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1287
1288 * i386.h (movd): only Reg32 is allowed.
1289
1290 * i386.h: add fcomp and ud2. From Wayne Scott
1291 <wscott@ichips.intel.com>.
1292
1293 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1294
1295 * i386.h: Add MMX instructions.
1296
1297 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1298
1299 * i386.h: Remove W modifier from conditional move instructions.
1300
1301 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1302
1303 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1304 with no arguments to match that generated by the UnixWare
1305 assembler.
1306
1307 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1308
1309 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1310 (cgen_parse_operand_fn): Declare.
1311 (cgen_init_parse_operand): Declare.
1312 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1313 new argument `want'.
1314 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1315 (enum cgen_parse_operand_type): New enum.
1316
1317 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1318
1319 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1320
1321 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1322
1323 * cgen.h: New file.
1324
1325 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1326
1327 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1328 fdivrp.
1329
1330 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1331
1332 * v850.h (extract): Make unsigned.
1333
1334 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1335
1336 * i386.h: Add iclr.
1337
1338 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1339
1340 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1341 take a direction bit.
1342
1343 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1344
1345 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1346
1347 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1348
1349 * sparc.h: Include <ansidecl.h>. Update function declarations to
1350 use prototypes, and to use const when appropriate.
1351
1352 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1353
1354 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1355
1356 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1357
1358 * d10v.h: Change pre_defined_registers to
1359 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1360
1361 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1362
1363 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1364 Change mips_opcodes from const array to a pointer,
1365 and change bfd_mips_num_opcodes from const int to int,
1366 so that we can increase the size of the mips opcodes table
1367 dynamically.
1368
1369 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1370
1371 * d30v.h (FLAG_X): Remove unused flag.
1372
1373 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1374
1375 * d30v.h: New file.
1376
1377 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1378
1379 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1380 (PDS_VALUE): Macro to access value field of predefined symbols.
1381 (tic80_next_predefined_symbol): Add prototype.
1382
1383 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1384
1385 * tic80.h (tic80_symbol_to_value): Change prototype to match
1386 change in function, added class parameter.
1387
1388 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1389
1390 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1391 endmask fields, which are somewhat weird in that 0 and 32 are
1392 treated exactly the same.
1393
1394 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1395
1396 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1397 rather than a constant that is 2**X. Reorder them to put bits for
1398 operands that have symbolic names in the upper bits, so they can
1399 be packed into an int where the lower bits contain the value that
1400 corresponds to that symbolic name.
1401 (predefined_symbo): Add struct.
1402 (tic80_predefined_symbols): Declare array of translations.
1403 (tic80_num_predefined_symbols): Declare size of that array.
1404 (tic80_value_to_symbol): Declare function.
1405 (tic80_symbol_to_value): Declare function.
1406
1407 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1408
1409 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1410
1411 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1412
1413 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1414 be the destination register.
1415
1416 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1417
1418 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1419 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1420 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1421 that the opcode can have two vector instructions in a single
1422 32 bit word and we have to encode/decode both.
1423
1424 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1425
1426 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1427 TIC80_OPERAND_RELATIVE for PC relative.
1428 (TIC80_OPERAND_BASEREL): New flag bit for register
1429 base relative.
1430
1431 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1432
1433 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1434
1435 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1436
1437 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1438 ":s" modifier for scaling.
1439
1440 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1441
1442 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1443 (TIC80_OPERAND_M_LI): Ditto
1444
1445 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1446
1447 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1448 (TIC80_OPERAND_CC): New define for condition code operand.
1449 (TIC80_OPERAND_CR): New define for control register operand.
1450
1451 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1452
1453 * tic80.h (struct tic80_opcode): Name changed.
1454 (struct tic80_opcode): Remove format field.
1455 (struct tic80_operand): Add insertion and extraction functions.
1456 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1457 correct ones.
1458 (FMT_*): Ditto.
1459
1460 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1461
1462 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1463 type IV instruction offsets.
1464
1465 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1466
1467 * tic80.h: New file.
1468
1469 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1470
1471 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1472
1473 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1474
1475 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1476 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1477 * v850.h: Fix comment, v850_operand not powerpc_operand.
1478
1479 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1480
1481 * mn10200.h: Flesh out structures and definitions needed by
1482 the mn10200 assembler & disassembler.
1483
1484 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1485
1486 * mips.h: Add mips16 definitions.
1487
1488 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1489
1490 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1491
1492 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1493
1494 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1495 (MN10300_OPERAND_MEMADDR): Define.
1496
1497 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1498
1499 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1500
1501 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1502
1503 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1504
1505 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1506
1507 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1508
1509 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1510
1511 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1512
1513 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1514
1515 * alpha.h: Don't include "bfd.h"; private relocation types are now
1516 negative to minimize problems with shared libraries. Organize
1517 instruction subsets by AMASK extensions and PALcode
1518 implementation.
1519 (struct alpha_operand): Move flags slot for better packing.
1520
1521 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1522
1523 * v850.h (V850_OPERAND_RELAX): New operand flag.
1524
1525 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1526
1527 * mn10300.h (FMT_*): Move operand format definitions
1528 here.
1529
1530 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1531
1532 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1533
1534 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1535
1536 * mn10300.h (mn10300_opcode): Add "format" field.
1537 (MN10300_OPERAND_*): Define.
1538
1539 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1540
1541 * mn10x00.h: Delete.
1542 * mn10200.h, mn10300.h: New files.
1543
1544 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1545
1546 * mn10x00.h: New file.
1547
1548 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1549
1550 * v850.h: Add new flag to indicate this instruction uses a PC
1551 displacement.
1552
1553 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1554
1555 * h8300.h (stmac): Add missing instruction.
1556
1557 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1558
1559 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1560 field.
1561
1562 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1563
1564 * v850.h (V850_OPERAND_EP): Define.
1565
1566 * v850.h (v850_opcode): Add size field.
1567
1568 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1569
1570 * v850.h (v850_operands): Add insert and extract fields, pointers
1571 to functions used to handle unusual operand encoding.
1572 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1573 V850_OPERAND_SIGNED): Defined.
1574
1575 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1576
1577 * v850.h (v850_operands): Add flags field.
1578 (OPERAND_REG, OPERAND_NUM): Defined.
1579
1580 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1581
1582 * v850.h: New file.
1583
1584 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1585
1586 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1587 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1588 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1589 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1590 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1591 Defined.
1592
1593 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1594
1595 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1596 a 3 bit space id instead of a 2 bit space id.
1597
1598 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1599
1600 * d10v.h: Add some additional defines to support the
1601 assembler in determining which operations can be done in parallel.
1602
1603 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1604
1605 * h8300.h (SN): Define.
1606 (eepmov.b): Renamed from "eepmov"
1607 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1608 with them.
1609
1610 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1611
1612 * d10v.h (OPERAND_SHIFT): New operand flag.
1613
1614 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1615
1616 * d10v.h: Changes for divs, parallel-only instructions, and
1617 signed numbers.
1618
1619 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1620
1621 * d10v.h (pd_reg): Define. Putting the definition here allows
1622 the assembler and disassembler to share the same struct.
1623
1624 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1625
1626 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1627 Williams <steve@icarus.com>.
1628
1629 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1630
1631 * d10v.h: New file.
1632
1633 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1634
1635 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1636
1637 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1638
1639 * m68k.h (mcf5200): New macro.
1640 Document names of coldfire control registers.
1641
1642 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1643
1644 * h8300.h (SRC_IN_DST): Define.
1645
1646 * h8300.h (UNOP3): Mark the register operand in this insn
1647 as a source operand, not a destination operand.
1648 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1649 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1650 register operand with SRC_IN_DST.
1651
1652 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1653
1654 * alpha.h: New file.
1655
1656 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1657
1658 * rs6k.h: Remove obsolete file.
1659
1660 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1661
1662 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1663 fdivp, and fdivrp. Add ffreep.
1664
1665 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1666
1667 * h8300.h: Reorder various #defines for readability.
1668 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1669 (BITOP): Accept additional (unused) argument. All callers changed.
1670 (EBITOP): Likewise.
1671 (O_LAST): Bump.
1672 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1673
1674 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1675 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1676 (BITOP, EBITOP): Handle new H8/S addressing modes for
1677 bit insns.
1678 (UNOP3): Handle new shift/rotate insns on the H8/S.
1679 (insns using exr): New instructions.
1680 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1681
1682 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1683
1684 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1685 was incorrect.
1686
1687 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1688
1689 * h8300.h (START): Remove.
1690 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1691 and mov.l insns that can be relaxed.
1692
1693 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1694
1695 * i386.h: Remove Abs32 from lcall.
1696
1697 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1698
1699 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1700 (SLCPOP): New macro.
1701 Mark X,Y opcode letters as in use.
1702
1703 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1704
1705 * sparc.h (F_FLOAT, F_FBR): Define.
1706
1707 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1708
1709 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1710 from all insns.
1711 (ABS8SRC,ABS8DST): Add ABS8MEM.
1712 (add.l): Fix reg+reg variant.
1713 (eepmov.w): Renamed from eepmovw.
1714 (ldc,stc): Fix many cases.
1715
1716 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1717
1718 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1719
1720 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1721
1722 * sparc.h (O): Mark operand letter as in use.
1723
1724 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1725
1726 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1727 Mark operand letters uU as in use.
1728
1729 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1730
1731 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1732 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1733 (SPARC_OPCODE_SUPPORTED): New macro.
1734 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1735 (F_NOTV9): Delete.
1736
1737 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1738
1739 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1740 declaration consistent with return type in definition.
1741
1742 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1743
1744 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1745
1746 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1747
1748 * i386.h (i386_regtab): Add 80486 test registers.
1749
1750 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1751
1752 * i960.h (I_HX): Define.
1753 (i960_opcodes): Add HX instruction.
1754
1755 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1756
1757 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1758 and fclex.
1759
1760 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1761
1762 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1763 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1764 (bfd_* defines): Delete.
1765 (sparc_opcode_archs): Replaces architecture_pname.
1766 (sparc_opcode_lookup_arch): Declare.
1767 (NUMOPCODES): Delete.
1768
1769 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1770
1771 * sparc.h (enum sparc_architecture): Add v9a.
1772 (ARCHITECTURES_CONFLICT_P): Update.
1773
1774 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1775
1776 * i386.h: Added Pentium Pro instructions.
1777
1778 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1779
1780 * m68k.h: Document new 'W' operand place.
1781
1782 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1783
1784 * hppa.h: Add lci and syncdma instructions.
1785
1786 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1787
1788 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1789 instructions.
1790
1791 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1792
1793 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1794 assembler's -mcom and -many switches.
1795
1796 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1797
1798 * i386.h: Fix cmpxchg8b extension opcode description.
1799
1800 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1801
1802 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1803 and register cr4.
1804
1805 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1806
1807 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1808
1809 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1810
1811 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1812
1813 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1814
1815 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1816
1817 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1818
1819 * m68kmri.h: Remove.
1820
1821 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1822 declarations. Remove F_ALIAS and flag field of struct
1823 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1824 int. Make name and args fields of struct m68k_opcode const.
1825
1826 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1827
1828 * sparc.h (F_NOTV9): Define.
1829
1830 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1831
1832 * mips.h (INSN_4010): Define.
1833
1834 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1835
1836 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1837
1838 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1839 * m68k.h: Fix argument descriptions of coprocessor
1840 instructions to allow only alterable operands where appropriate.
1841 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1842 (m68k_opcode_aliases): Add more aliases.
1843
1844 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1845
1846 * m68k.h: Added explcitly short-sized conditional branches, and a
1847 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1848 svr4-based configurations.
1849
1850 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1851
1852 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1853 * i386.h: added missing Data16/Data32 flags to a few instructions.
1854
1855 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1856
1857 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1858 (OP_MASK_BCC, OP_SH_BCC): Define.
1859 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1860 (OP_MASK_CCC, OP_SH_CCC): Define.
1861 (INSN_READ_FPR_R): Define.
1862 (INSN_RFE): Delete.
1863
1864 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1865
1866 * m68k.h (enum m68k_architecture): Deleted.
1867 (struct m68k_opcode_alias): New type.
1868 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1869 matching constraints, values and flags. As a side effect of this,
1870 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1871 as I know were never used, now may need re-examining.
1872 (numopcodes): Now const.
1873 (m68k_opcode_aliases, numaliases): New variables.
1874 (endop): Deleted.
1875 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1876 m68k_opcode_aliases; update declaration of m68k_opcodes.
1877
1878 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1879
1880 * hppa.h (delay_type): Delete unused enumeration.
1881 (pa_opcode): Replace unused delayed field with an architecture
1882 field.
1883 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1884
1885 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1886
1887 * mips.h (INSN_ISA4): Define.
1888
1889 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1890
1891 * mips.h (M_DLA_AB, M_DLI): Define.
1892
1893 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1894
1895 * hppa.h (fstwx): Fix single-bit error.
1896
1897 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1898
1899 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1900
1901 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1902
1903 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1904 debug registers. From Charles Hannum (mycroft@netbsd.org).
1905
1906 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1907
1908 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1909 i386 support:
1910 * i386.h (MOV_AX_DISP32): New macro.
1911 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1912 of several call/return instructions.
1913 (ADDR_PREFIX_OPCODE): New macro.
1914
1915 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1916
1917 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1918
1919 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1920 char.
1921 (struct vot, field `name'): ditto.
1922
1923 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1924
1925 * vax.h: Supply and properly group all values in end sentinel.
1926
1927 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1928
1929 * mips.h (INSN_ISA, INSN_4650): Define.
1930
1931 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1932
1933 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1934 systems with a separate instruction and data cache, such as the
1935 29040, these instructions take an optional argument.
1936
1937 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1938
1939 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1940 INSN_TRAP.
1941
1942 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1943
1944 * mips.h (INSN_STORE_MEMORY): Define.
1945
1946 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1947
1948 * sparc.h: Document new operand type 'x'.
1949
1950 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1951
1952 * i960.h (I_CX2): New instruction category. It includes
1953 instructions available on Cx and Jx processors.
1954 (I_JX): New instruction category, for JX-only instructions.
1955 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1956 Jx-only instructions, in I_JX category.
1957
1958 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1959
1960 * ns32k.h (endop): Made pointer const too.
1961
1962 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1963
1964 * ns32k.h: Drop Q operand type as there is no correct use
1965 for it. Add I and Z operand types which allow better checking.
1966
1967 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1968
1969 * h8300.h (xor.l) :fix bit pattern.
1970 (L_2): New size of operand.
1971 (trapa): Use it.
1972
1973 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1974
1975 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1976
1977 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1978
1979 * sparc.h: Include v9 definitions.
1980
1981 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1982
1983 * m68k.h (m68060): Defined.
1984 (m68040up, mfloat, mmmu): Include it.
1985 (struct m68k_opcode): Widen `arch' field.
1986 (m68k_opcodes): Updated for M68060. Removed comments that were
1987 instructions commented out by "JF" years ago.
1988
1989 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1990
1991 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1992 add a one-bit `flags' field.
1993 (F_ALIAS): New macro.
1994
1995 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1996
1997 * h8300.h (dec, inc): Get encoding right.
1998
1999 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2000
2001 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2002 a flag instead.
2003 (PPC_OPERAND_SIGNED): Define.
2004 (PPC_OPERAND_SIGNOPT): Define.
2005
2006 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2007
2008 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2009 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2010
2011 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2012
2013 * i386.h: Reverse last change. It'll be handled in gas instead.
2014
2015 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2016
2017 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2018 slower on the 486 and used the implicit shift count despite the
2019 explicit operand. The one-operand form is still available to get
2020 the shorter form with the implicit shift count.
2021
2022 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2023
2024 * hppa.h: Fix typo in fstws arg string.
2025
2026 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2027
2028 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2029
2030 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2031
2032 * ppc.h (PPC_OPCODE_601): Define.
2033
2034 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2035
2036 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2037 (so we can determine valid completers for both addb and addb[tf].)
2038
2039 * hppa.h (xmpyu): No floating point format specifier for the
2040 xmpyu instruction.
2041
2042 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2043
2044 * ppc.h (PPC_OPERAND_NEXT): Define.
2045 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2046 (struct powerpc_macro): Define.
2047 (powerpc_macros, powerpc_num_macros): Declare.
2048
2049 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2050
2051 * ppc.h: New file. Header file for PowerPC opcode table.
2052
2053 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2054
2055 * hppa.h: More minor template fixes for sfu and copr (to allow
2056 for easier disassembly).
2057
2058 * hppa.h: Fix templates for all the sfu and copr instructions.
2059
2060 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2061
2062 * i386.h (push): Permit Imm16 operand too.
2063
2064 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2065
2066 * h8300.h (andc): Exists in base arch.
2067
2068 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2069
2070 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2071 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2072
2073 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2074
2075 * hppa.h: Add FP quadword store instructions.
2076
2077 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2078
2079 * mips.h: (M_J_A): Added.
2080 (M_LA): Removed.
2081
2082 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2083
2084 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2085 <mellon@pepper.ncd.com>.
2086
2087 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2088
2089 * hppa.h: Immediate field in probei instructions is unsigned,
2090 not low-sign extended.
2091
2092 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2093
2094 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2095
2096 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2097
2098 * i386.h: Add "fxch" without operand.
2099
2100 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2101
2102 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2103
2104 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2105
2106 * hppa.h: Add gfw and gfr to the opcode table.
2107
2108 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2109
2110 * m88k.h: extended to handle m88110.
2111
2112 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2113
2114 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2115 addresses.
2116
2117 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2118
2119 * i960.h (i960_opcodes): Properly bracket initializers.
2120
2121 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2122
2123 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2124
2125 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2126
2127 * m68k.h (two): Protect second argument with parentheses.
2128
2129 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2130
2131 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2132 Deleted old in/out instructions in "#if 0" section.
2133
2134 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2135
2136 * i386.h (i386_optab): Properly bracket initializers.
2137
2138 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2139
2140 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2141 Jeff Law, law@cs.utah.edu).
2142
2143 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2144
2145 * i386.h (lcall): Accept Imm32 operand also.
2146
2147 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2148
2149 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2150 (M_DABS): Added.
2151
2152 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2153
2154 * mips.h (INSN_*): Changed values. Removed unused definitions.
2155 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2156 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2157 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2158 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2159 (M_*): Added new values for r6000 and r4000 macros.
2160 (ANY_DELAY): Removed.
2161
2162 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2163
2164 * mips.h: Added M_LI_S and M_LI_SS.
2165
2166 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2167
2168 * h8300.h: Get some rare mov.bs correct.
2169
2170 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2171
2172 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2173 been included.
2174
2175 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2176
2177 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2178 jump instructions, for use in disassemblers.
2179
2180 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2181
2182 * m88k.h: Make bitfields just unsigned, not unsigned long or
2183 unsigned short.
2184
2185 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2186
2187 * hppa.h: New argument type 'y'. Use in various float instructions.
2188
2189 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2190
2191 * hppa.h (break): First immediate field is unsigned.
2192
2193 * hppa.h: Add rfir instruction.
2194
2195 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2196
2197 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2198
2199 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2200
2201 * mips.h: Reworked the hazard information somewhat, and fixed some
2202 bugs in the instruction hazard descriptions.
2203
2204 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2205
2206 * m88k.h: Corrected a couple of opcodes.
2207
2208 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2209
2210 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2211 new version includes instruction hazard information, but is
2212 otherwise reasonably similar.
2213
2214 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2215
2216 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2217
2218 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2219
2220 Patches from Jeff Law, law@cs.utah.edu:
2221 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2222 Make the tables be the same for the following instructions:
2223 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2224 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2225 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2226 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2227 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2228 "fcmp", and "ftest".
2229
2230 * hppa.h: Make new and old tables the same for "break", "mtctl",
2231 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2232 Fix typo in last patch. Collapse several #ifdefs into a
2233 single #ifdef.
2234
2235 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2236 of the comments up-to-date.
2237
2238 * hppa.h: Update "free list" of letters and update
2239 comments describing each letter's function.
2240
2241 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2242
2243 * h8300.h: Lots of little fixes for the h8/300h.
2244
2245 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2246
2247 Support for H8/300-H
2248 * h8300.h: Lots of new opcodes.
2249
2250 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2251
2252 * h8300.h: checkpoint, includes H8/300-H opcodes.
2253
2254 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2255
2256 * Patches from Jeffrey Law <law@cs.utah.edu>.
2257 * hppa.h: Rework single precision FP
2258 instructions so that they correctly disassemble code
2259 PA1.1 code.
2260
2261 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2262
2263 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2264 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2265
2266 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2267
2268 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2269 gdb will define it for now.
2270
2271 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2272
2273 * sparc.h: Don't end enumerator list with comma.
2274
2275 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2276
2277 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2278 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2279 ("bc2t"): Correct typo.
2280 ("[ls]wc[023]"): Use T rather than t.
2281 ("c[0123]"): Define general coprocessor instructions.
2282
2283 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2284
2285 * m68k.h: Move split point for gcc compilation more towards
2286 middle.
2287
2288 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2289
2290 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2291 simply wrong, ics, rfi, & rfsvc were missing).
2292 Add "a" to opr_ext for "bb". Doc fix.
2293
2294 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2295
2296 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2297 * mips.h: Add casts, to suppress warnings about shifting too much.
2298 * m68k.h: Document the placement code '9'.
2299
2300 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2301
2302 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2303 allows callers to break up the large initialized struct full of
2304 opcodes into two half-sized ones. This permits GCC to compile
2305 this module, since it takes exponential space for initializers.
2306 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2307
2308 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2309
2310 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2311 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2312 initialized structs in it.
2313
2314 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2315
2316 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2317 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2318 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2319
2320 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2321
2322 * mips.h: document "i" and "j" operands correctly.
2323
2324 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2325
2326 * mips.h: Removed endianness dependency.
2327
2328 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2329
2330 * h8300.h: include info on number of cycles per instruction.
2331
2332 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2333
2334 * hppa.h: Move handy aliases to the front. Fix masks for extract
2335 and deposit instructions.
2336
2337 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2338
2339 * i386.h: accept shld and shrd both with and without the shift
2340 count argument, which is always %cl.
2341
2342 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2343
2344 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2345 (one_byte_segment_defaults, two_byte_segment_defaults,
2346 i386_prefixtab_end): Ditto.
2347
2348 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2349
2350 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2351 for operand 2; from John Carr, jfc@dsg.dec.com.
2352
2353 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2354
2355 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2356 always use 16-bit offsets. Makes calculated-size jump tables
2357 feasible.
2358
2359 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2360
2361 * i386.h: Fix one-operand forms of in* and out* patterns.
2362
2363 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2364
2365 * m68k.h: Added CPU32 support.
2366
2367 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2368
2369 * mips.h (break): Disassemble the argument. Patch from
2370 jonathan@cs.stanford.edu (Jonathan Stone).
2371
2372 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2373
2374 * m68k.h: merged Motorola and MIT syntax.
2375
2376 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2377
2378 * m68k.h (pmove): make the tests less strict, the 68k book is
2379 wrong.
2380
2381 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2382
2383 * m68k.h (m68ec030): Defined as alias for 68030.
2384 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2385 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2386 them. Tightened description of "fmovex" to distinguish it from
2387 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2388 up descriptions that claimed versions were available for chips not
2389 supporting them. Added "pmovefd".
2390
2391 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2392
2393 * m68k.h: fix where the . goes in divull
2394
2395 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2396
2397 * m68k.h: the cas2 instruction is supposed to be written with
2398 indirection on the last two operands, which can be either data or
2399 address registers. Added a new operand type 'r' which accepts
2400 either register type. Added new cases for cas2l and cas2w which
2401 use them. Corrected masks for cas2 which failed to recognize use
2402 of address register.
2403
2404 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2405
2406 * m68k.h: Merged in patches (mostly m68040-specific) from
2407 Colin Smith <colin@wrs.com>.
2408
2409 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2410 base). Also cleaned up duplicates, re-ordered instructions for
2411 the sake of dis-assembling (so aliases come after standard names).
2412 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2413
2414 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2415
2416 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2417 all missing .s
2418
2419 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2420
2421 * sparc.h: Moved tables to BFD library.
2422
2423 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2424
2425 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2426
2427 * h8300.h: Finish filling in all the holes in the opcode table,
2428 so that the Lucid C compiler can digest this as well...
2429
2430 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2431
2432 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2433 Fix opcodes on various sizes of fild/fist instructions
2434 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2435 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2436
2437 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2438
2439 * h8300.h: Fill in all the holes in the opcode table so that the
2440 losing HPUX C compiler can digest this...
2441
2442 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2443
2444 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2445 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2446
2447 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2448
2449 * sparc.h: Add new architecture variant sparclite; add its scan
2450 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2451
2452 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2453
2454 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2455 fy@lucid.com).
2456
2457 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2458
2459 * rs6k.h: New version from IBM (Metin).
2460
2461 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2462
2463 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2464 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2465
2466 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2467
2468 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2469
2470 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2471
2472 * m68k.h (one, two): Cast macro args to unsigned to suppress
2473 complaints from compiler and lint about integer overflow during
2474 shift.
2475
2476 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2477
2478 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2479
2480 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2481
2482 * mips.h: Make bitfield layout depend on the HOST compiler,
2483 not on the TARGET system.
2484
2485 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2486
2487 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2488 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2489 <TRANLE@INTELLICORP.COM>.
2490
2491 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2492
2493 * h8300.h: turned op_type enum into #define list
2494
2495 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2496
2497 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2498 similar instructions -- they've been renamed to "fitoq", etc.
2499 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2500 number of arguments.
2501 * h8300.h: Remove extra ; which produces compiler warning.
2502
2503 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2504
2505 * sparc.h: fix opcode for tsubcctv.
2506
2507 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2508
2509 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2510
2511 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2512
2513 * sparc.h (nop): Made the 'lose' field be even tighter,
2514 so only a standard 'nop' is disassembled as a nop.
2515
2516 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2517
2518 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2519 disassembled as a nop.
2520
2521 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2522
2523 * m68k.h, sparc.h: ANSIfy enums.
2524
2525 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2526
2527 * sparc.h: fix a typo.
2528
2529 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2530
2531 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2532 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2533 vax.h: Renamed from ../<foo>-opcode.h.
2534
2535 \f
2536 Local Variables:
2537 version-control: never
2538 End:
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