* d10v.h (OPERAND_SP): New macro.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
2
3 * d10v.h (OPERAND_SP): New macro.
4
5 2001-11-15 Alan Modra <amodra@bigpond.net.au>
6
7 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
8
9 2001-11-11 Timothy Wall <twall@alum.mit.edu>
10
11 * tic54x.h: Revise opcode layout; don't really need a separate
12 structure for parallel opcodes.
13
14 2001-11-13 Zack Weinberg <zack@codesourcery.com>
15 Alan Modra <amodra@bigpond.net.au>
16
17 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
18 accept WordReg.
19
20 2001-11-04 Chris Demetriou <cgd@broadcom.com>
21
22 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
23
24 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
25
26 * mmix.h: New file.
27
28 2001-10-18 Chris Demetriou <cgd@broadcom.com>
29
30 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
31 of the expression, to make source code merging easier.
32
33 2001-10-17 Chris Demetriou <cgd@broadcom.com>
34
35 * mips.h: Sort coprocessor instruction argument characters
36 in comment, add a few more words of description for "H".
37
38 2001-10-17 Chris Demetriou <cgd@broadcom.com>
39
40 * mips.h (INSN_SB1): New cpu-specific instruction bit.
41 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
42 if cpu is CPU_SB1.
43
44 2001-10-17 matthew green <mrg@redhat.com>
45
46 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
47
48 2001-10-12 matthew green <mrg@redhat.com>
49
50 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
51 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
52 instructions, respectively.
53
54 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
55
56 * v850.h: Remove spurious comment.
57
58 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
59
60 * h8300.h: Fix compile time warning messages
61
62 2001-09-04 Richard Henderson <rth@redhat.com>
63
64 * alpha.h (struct alpha_operand): Pack elements into bitfields.
65
66 2001-08-31 Eric Christopher <echristo@redhat.com>
67
68 * mips.h: Remove CPU_MIPS32_4K.
69
70 2001-08-27 Torbjorn Granlund <tege@swox.com>
71
72 * ppc.h (PPC_OPERAND_DS): Define.
73
74 2001-08-25 Andreas Jaeger <aj@suse.de>
75
76 * d30v.h: Fix declaration of reg_name_cnt.
77
78 * d10v.h: Fix declaration of d10v_reg_name_cnt.
79
80 * arc.h: Add prototypes from opcodes/arc-opc.c.
81
82 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
83
84 * mips.h (INSN_10000): Define.
85 (OPCODE_IS_MEMBER): Check for INSN_10000.
86
87 2001-08-10 Alan Modra <amodra@one.net.au>
88
89 * ppc.h: Revert 2001-08-08.
90
91 2001-08-08 Alan Modra <amodra@one.net.au>
92
93 1999-10-25 Torbjorn Granlund <tege@swox.com>
94 * ppc.h (struct powerpc_operand): New field `reloc'.
95
96 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
97
98 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
99 (cgen_cpu_desc): Ditto.
100
101 2001-07-07 Ben Elliston <bje@redhat.com>
102
103 * m88k.h: Clean up and reformat. Remove unused code.
104
105 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
106
107 * cgen.h (cgen_keyword): Add nonalpha_chars field.
108
109 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
110
111 * mips.h (CPU_R12000): Define.
112
113 2001-05-23 John Healy <jhealy@redhat.com>
114
115 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
116
117 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
118
119 * mips.h (INSN_ISA_MASK): Define.
120
121 2001-05-12 Alan Modra <amodra@one.net.au>
122
123 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
124 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
125 and use InvMem as these insns must have register operands.
126
127 2001-05-04 Alan Modra <amodra@one.net.au>
128
129 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
130 and pextrw to swap reg/rm assignments.
131
132 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
133
134 * cris.h (enum cris_insn_version_usage): Correct comment for
135 cris_ver_v3p.
136
137 2001-03-24 Alan Modra <alan@linuxcare.com.au>
138
139 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
140 Add InvMem to first operand of "maskmovdqu".
141
142 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
143
144 * cris.h (ADD_PC_INCR_OPCODE): New macro.
145
146 2001-03-21 Kazu Hirata <kazu@hxi.com>
147
148 * h8300.h: Fix formatting.
149
150 2001-03-22 Alan Modra <alan@linuxcare.com.au>
151
152 * i386.h (i386_optab): Add paddq, psubq.
153
154 2001-03-19 Alan Modra <alan@linuxcare.com.au>
155
156 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
157
158 2001-02-28 Igor Shevlyakov <igor@windriver.com>
159
160 * m68k.h: new defines for Coldfire V4. Update mcf to know
161 about mcf5407.
162
163 2001-02-18 lars brinkhoff <lars@nocrew.org>
164
165 * pdp11.h: New file.
166
167 2001-02-12 Jan Hubicka <jh@suse.cz>
168
169 * i386.h (i386_optab): SSE integer converison instructions have
170 64bit versions on x86-64.
171
172 2001-02-10 Nick Clifton <nickc@redhat.com>
173
174 * mips.h: Remove extraneous whitespace. Formating change to allow
175 for future contribution.
176
177 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
178
179 * s390.h: New file.
180
181 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
182
183 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
184 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
185 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
186
187 2001-01-24 Karsten Keil <kkeil@suse.de>
188
189 * i386.h (i386_optab): Fix swapgs
190
191 2001-01-14 Alan Modra <alan@linuxcare.com.au>
192
193 * hppa.h: Describe new '<' and '>' operand types, and tidy
194 existing comments.
195 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
196 Remove duplicate "ldw j(s,b),x". Sort some entries.
197
198 2001-01-13 Jan Hubicka <jh@suse.cz>
199
200 * i386.h (i386_optab): Fix pusha and ret templates.
201
202 2001-01-11 Peter Targett <peter.targett@arccores.com>
203
204 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
205 definitions for masking cpu type.
206 (arc_ext_operand_value) New structure for storing extended
207 operands.
208 (ARC_OPERAND_*) Flags for operand values.
209
210 2001-01-10 Jan Hubicka <jh@suse.cz>
211
212 * i386.h (pinsrw): Add.
213 (pshufw): Remove.
214 (cvttpd2dq): Fix operands.
215 (cvttps2dq): Likewise.
216 (movq2q): Rename to movdq2q.
217
218 2001-01-10 Richard Schaal <richard.schaal@intel.com>
219
220 * i386.h: Correct movnti instruction.
221
222 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
223
224 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
225 of operands (unsigned char or unsigned short).
226 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
227 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
228
229 2001-01-05 Jan Hubicka <jh@suse.cz>
230
231 * i386.h (i386_optab): Make [sml]fence template to use immext field.
232
233 2001-01-03 Jan Hubicka <jh@suse.cz>
234
235 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
236 introduced by Pentium4
237
238 2000-12-30 Jan Hubicka <jh@suse.cz>
239
240 * i386.h (i386_optab): Add "rex*" instructions;
241 add swapgs; disable jmp/call far direct instructions for
242 64bit mode; add syscall and sysret; disable registers for 0xc6
243 template. Add 'q' suffixes to extendable instructions, disable
244 obsolete instructions, add new sign/zero extension ones.
245 (i386_regtab): Add extended registers.
246 (*Suf): Add No_qSuf.
247 (q_Suf, wlq_Suf, bwlq_Suf): New.
248
249 2000-12-20 Jan Hubicka <jh@suse.cz>
250
251 * i386.h (i386_optab): Replace "Imm" with "EncImm".
252 (i386_regtab): Add flags field.
253
254 2000-12-12 Nick Clifton <nickc@redhat.com>
255
256 * mips.h: Fix formatting.
257
258 2000-12-01 Chris Demetriou <cgd@sibyte.com>
259
260 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
261 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
262 OP_*_SYSCALL definitions.
263 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
264 19 bit wait codes.
265 (MIPS operand specifier comments): Remove 'm', add 'U' and
266 'J', and update the meaning of 'B' so that it's more general.
267
268 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
269 INSN_ISA5): Renumber, redefine to mean the ISA at which the
270 instruction was added.
271 (INSN_ISA32): New constant.
272 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
273 Renumber to avoid new and/or renumbered INSN_* constants.
274 (INSN_MIPS32): Delete.
275 (ISA_UNKNOWN): New constant to indicate unknown ISA.
276 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
277 ISA_MIPS32): New constants, defined to be the mask of INSN_*
278 constants available at that ISA level.
279 (CPU_UNKNOWN): New constant to indicate unknown CPU.
280 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
281 define it with a unique value.
282 (OPCODE_IS_MEMBER): Update for new ISA membership-related
283 constant meanings.
284
285 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
286 definitions.
287
288 * mips.h (CPU_SB1): New constant.
289
290 2000-10-20 Jakub Jelinek <jakub@redhat.com>
291
292 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
293 Note that '3' is used for siam operand.
294
295 2000-09-22 Jim Wilson <wilson@cygnus.com>
296
297 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
298
299 2000-09-13 Anders Norlander <anorland@acc.umu.se>
300
301 * mips.h: Use defines instead of hard-coded processor numbers.
302 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
303 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
304 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
305 CPU_4KC, CPU_4KM, CPU_4KP): Define..
306 (OPCODE_IS_MEMBER): Use new defines.
307 (OP_MASK_SEL, OP_SH_SEL): Define.
308 (OP_MASK_CODE20, OP_SH_CODE20): Define.
309 Add 'P' to used characters.
310 Use 'H' for coprocessor select field.
311 Use 'm' for 20 bit breakpoint code.
312 Document new arg characters and add to used characters.
313 (INSN_MIPS32): New define for MIPS32 extensions.
314 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
315
316 2000-09-05 Alan Modra <alan@linuxcare.com.au>
317
318 * hppa.h: Mention cz completer.
319
320 2000-08-16 Jim Wilson <wilson@cygnus.com>
321
322 * ia64.h (IA64_OPCODE_POSTINC): New.
323
324 2000-08-15 H.J. Lu <hjl@gnu.org>
325
326 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
327 IgnoreSize change.
328
329 2000-08-08 Jason Eckhardt <jle@cygnus.com>
330
331 * i860.h: Small formatting adjustments.
332
333 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
334
335 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
336 Move related opcodes closer to each other.
337 Minor changes in comments, list undefined opcodes.
338
339 2000-07-26 Dave Brolley <brolley@redhat.com>
340
341 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
342
343 2000-07-22 Jason Eckhardt <jle@cygnus.com>
344
345 * i860.h (btne, bte, bla): Changed these opcodes
346 to use sbroff ('r') instead of split16 ('s').
347 (J, K, L, M): New operand types for 16-bit aligned fields.
348 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
349 use I, J, K, L, M instead of just I.
350 (T, U): New operand types for split 16-bit aligned fields.
351 (st.x): Changed these opcodes to use S, T, U instead of just S.
352 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
353 exist on the i860.
354 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
355 (pfeq.ss, pfeq.dd): New opcodes.
356 (st.s): Fixed incorrect mask bits.
357 (fmlow): Fixed incorrect mask bits.
358 (fzchkl, pfzchkl): Fixed incorrect mask bits.
359 (faddz, pfaddz): Fixed incorrect mask bits.
360 (form, pform): Fixed incorrect mask bits.
361 (pfld.l): Fixed incorrect mask bits.
362 (fst.q): Fixed incorrect mask bits.
363 (all floating point opcodes): Fixed incorrect mask bits for
364 handling of dual bit.
365
366 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
367
368 cris.h: New file.
369
370 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
371
372 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
373 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
374 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
375 (AVR_ISA_M83): Define for ATmega83, ATmega85.
376 (espm): Remove, because ESPM removed in databook update.
377 (eicall, eijmp): Move to the end of opcode table.
378
379 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
380
381 * m68hc11.h: New file for support of Motorola 68hc11.
382
383 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
384
385 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
386
387 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
388
389 * avr.h: New file with AVR opcodes.
390
391 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
392
393 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
394
395 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
396
397 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
398
399 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
400
401 * i386.h: Use sl_FP, not sl_Suf for fild.
402
403 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
404
405 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
406 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
407 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
408 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
409
410 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
411
412 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
413
414 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
415 Alexander Sokolov <robocop@netlink.ru>
416
417 * i386.h (i386_optab): Add cpu_flags for all instructions.
418
419 2000-05-13 Alan Modra <alan@linuxcare.com.au>
420
421 From Gavin Romig-Koch <gavin@cygnus.com>
422 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
423
424 2000-05-04 Timothy Wall <twall@cygnus.com>
425
426 * tic54x.h: New.
427
428 2000-05-03 J.T. Conklin <jtc@redback.com>
429
430 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
431 (PPC_OPERAND_VR): New operand flag for vector registers.
432
433 2000-05-01 Kazu Hirata <kazu@hxi.com>
434
435 * h8300.h (EOP): Add missing initializer.
436
437 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
438
439 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
440 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
441 New operand types l,y,&,fe,fE,fx added to support above forms.
442 (pa_opcodes): Replaced usage of 'x' as source/target for
443 floating point double-word loads/stores with 'fx'.
444
445 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
446 David Mosberger <davidm@hpl.hp.com>
447 Timothy Wall <twall@cygnus.com>
448 Jim Wilson <wilson@cygnus.com>
449
450 * ia64.h: New file.
451
452 2000-03-27 Nick Clifton <nickc@cygnus.com>
453
454 * d30v.h (SHORT_A1): Fix value.
455 (SHORT_AR): Renumber so that it is at the end of the list of short
456 instructions, not the end of the list of long instructions.
457
458 2000-03-26 Alan Modra <alan@linuxcare.com>
459
460 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
461 problem isn't really specific to Unixware.
462 (OLDGCC_COMPAT): Define.
463 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
464 destination %st(0).
465 Fix lots of comments.
466
467 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
468
469 * d30v.h:
470 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
471 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
472 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
473 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
474 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
475 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
476 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
477
478 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
479
480 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
481 fistpd without suffix.
482
483 2000-02-24 Nick Clifton <nickc@cygnus.com>
484
485 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
486 'signed_overflow_ok_p'.
487 Delete prototypes for cgen_set_flags() and cgen_get_flags().
488
489 2000-02-24 Andrew Haley <aph@cygnus.com>
490
491 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
492 (CGEN_CPU_TABLE): flags: new field.
493 Add prototypes for new functions.
494
495 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
496
497 * i386.h: Add some more UNIXWARE_COMPAT comments.
498
499 2000-02-23 Linas Vepstas <linas@linas.org>
500
501 * i370.h: New file.
502
503 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
504
505 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
506 cannot be combined in parallel with ADD/SUBppp.
507
508 2000-02-22 Andrew Haley <aph@cygnus.com>
509
510 * mips.h: (OPCODE_IS_MEMBER): Add comment.
511
512 1999-12-30 Andrew Haley <aph@cygnus.com>
513
514 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
515 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
516 insns.
517
518 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
519
520 * i386.h: Qualify intel mode far call and jmp with x_Suf.
521
522 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
523
524 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
525 indirect jumps and calls. Add FF/3 call for intel mode.
526
527 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
528
529 * mn10300.h: Add new operand types. Add new instruction formats.
530
531 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
532
533 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
534 instruction.
535
536 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
537
538 * mips.h (INSN_ISA5): New.
539
540 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
541
542 * mips.h (OPCODE_IS_MEMBER): New.
543
544 1999-10-29 Nick Clifton <nickc@cygnus.com>
545
546 * d30v.h (SHORT_AR): Define.
547
548 1999-10-18 Michael Meissner <meissner@cygnus.com>
549
550 * alpha.h (alpha_num_opcodes): Convert to unsigned.
551 (alpha_num_operands): Ditto.
552
553 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
554
555 * hppa.h (pa_opcodes): Add load and store cache control to
556 instructions. Add ordered access load and store.
557
558 * hppa.h (pa_opcode): Add new entries for addb and addib.
559
560 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
561
562 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
563
564 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
565
566 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
567
568 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
569
570 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
571 and "be" using completer prefixes.
572
573 * hppa.h (pa_opcodes): Add initializers to silence compiler.
574
575 * hppa.h: Update comments about character usage.
576
577 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
578
579 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
580 up the new fstw & bve instructions.
581
582 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
583
584 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
585 instructions.
586
587 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
588
589 * hppa.h (pa_opcodes): Add long offset double word load/store
590 instructions.
591
592 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
593 stores.
594
595 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
596
597 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
598
599 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
600
601 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
602
603 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
604
605 * hppa.h (pa_opcodes): Add support for "b,l".
606
607 * hppa.h (pa_opcodes): Add support for "b,gate".
608
609 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
610
611 * hppa.h (pa_opcodes): Use 'fX' for first register operand
612 in xmpyu.
613
614 * hppa.h (pa_opcodes): Fix mask for probe and probei.
615
616 * hppa.h (pa_opcodes): Fix mask for depwi.
617
618 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
619
620 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
621 an explicit output argument.
622
623 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
624
625 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
626 Add a few PA2.0 loads and store variants.
627
628 1999-09-04 Steve Chamberlain <sac@pobox.com>
629
630 * pj.h: New file.
631
632 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
633
634 * i386.h (i386_regtab): Move %st to top of table, and split off
635 other fp reg entries.
636 (i386_float_regtab): To here.
637
638 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
639
640 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
641 by 'f'.
642
643 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
644 Add supporting args.
645
646 * hppa.h: Document new completers and args.
647 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
648 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
649 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
650 pmenb and pmdis.
651
652 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
653 hshr, hsub, mixh, mixw, permh.
654
655 * hppa.h (pa_opcodes): Change completers in instructions to
656 use 'c' prefix.
657
658 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
659 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
660
661 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
662 fnegabs to use 'I' instead of 'F'.
663
664 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
665
666 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
667 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
668 Alphabetically sort PIII insns.
669
670 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
671
672 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
673
674 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
675
676 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
677 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
678
679 * hppa.h: Document 64 bit condition completers.
680
681 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
682
683 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
684
685 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
686
687 * i386.h (i386_optab): Add DefaultSize modifier to all insns
688 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
689 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
690
691 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
692 Jeff Law <law@cygnus.com>
693
694 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
695
696 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
697
698 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
699 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
700
701 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
702
703 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
704
705 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
706
707 * hppa.h (struct pa_opcode): Add new field "flags".
708 (FLAGS_STRICT): Define.
709
710 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
711 Jeff Law <law@cygnus.com>
712
713 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
714
715 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
716
717 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
718
719 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
720 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
721 flag to fcomi and friends.
722
723 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
724
725 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
726 integer logical instructions.
727
728 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
729
730 * m68k.h: Document new formats `E', `G', `H' and new places `N',
731 `n', `o'.
732
733 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
734 and new places `m', `M', `h'.
735
736 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
737
738 * hppa.h (pa_opcodes): Add several processor specific system
739 instructions.
740
741 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
742
743 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
744 "addb", and "addib" to be used by the disassembler.
745
746 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
747
748 * i386.h (ReverseModrm): Remove all occurences.
749 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
750 movmskps, pextrw, pmovmskb, maskmovq.
751 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
752 ignore the data size prefix.
753
754 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
755 Mostly stolen from Doug Ledford <dledford@redhat.com>
756
757 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
758
759 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
760
761 1999-04-14 Doug Evans <devans@casey.cygnus.com>
762
763 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
764 (CGEN_ATTR_TYPE): Update.
765 (CGEN_ATTR_MASK): Number booleans starting at 0.
766 (CGEN_ATTR_VALUE): Update.
767 (CGEN_INSN_ATTR): Update.
768
769 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
770
771 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
772 instructions.
773
774 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
775
776 * hppa.h (bb, bvb): Tweak opcode/mask.
777
778
779 1999-03-22 Doug Evans <devans@casey.cygnus.com>
780
781 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
782 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
783 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
784 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
785 Delete member max_insn_size.
786 (enum cgen_cpu_open_arg): New enum.
787 (cpu_open): Update prototype.
788 (cpu_open_1): Declare.
789 (cgen_set_cpu): Delete.
790
791 1999-03-11 Doug Evans <devans@casey.cygnus.com>
792
793 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
794 (CGEN_OPERAND_NIL): New macro.
795 (CGEN_OPERAND): New member `type'.
796 (@arch@_cgen_operand_table): Delete decl.
797 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
798 (CGEN_OPERAND_TABLE): New struct.
799 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
800 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
801 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
802 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
803 {get,set}_{int,vma}_operand.
804 (@arch@_cgen_cpu_open): New arg `isa'.
805 (cgen_set_cpu): Ditto.
806
807 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
808
809 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
810
811 1999-02-25 Doug Evans <devans@casey.cygnus.com>
812
813 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
814 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
815 enum cgen_hw_type.
816 (CGEN_HW_TABLE): New struct.
817 (hw_table): Delete declaration.
818 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
819 to table entry to enum.
820 (CGEN_OPINST): Ditto.
821 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
822
823 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
824
825 * alpha.h (AXP_OPCODE_EV6): New.
826 (AXP_OPCODE_NOPAL): Include it.
827
828 1999-02-09 Doug Evans <devans@casey.cygnus.com>
829
830 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
831 All uses updated. New members int_insn_p, max_insn_size,
832 parse_operand,insert_operand,extract_operand,print_operand,
833 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
834 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
835 extract_handlers,print_handlers.
836 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
837 (CGEN_ATTR_BOOL_OFFSET): New macro.
838 (CGEN_ATTR_MASK): Subtract it to compute bit number.
839 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
840 (cgen_opcode_handler): Renamed from cgen_base.
841 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
842 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
843 all uses updated.
844 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
845 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
846 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
847 (CGEN_OPCODE,CGEN_IBASE): New types.
848 (CGEN_INSN): Rewrite.
849 (CGEN_{ASM,DIS}_HASH*): Delete.
850 (init_opcode_table,init_ibld_table): Declare.
851 (CGEN_INSN_ATTR): New type.
852
853 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
854
855 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
856 (x_FP, d_FP, dls_FP, sldx_FP): Define.
857 Change *Suf definitions to include x and d suffixes.
858 (movsx): Use w_Suf and b_Suf.
859 (movzx): Likewise.
860 (movs): Use bwld_Suf.
861 (fld): Change ordering. Use sld_FP.
862 (fild): Add Intel Syntax equivalent of fildq.
863 (fst): Use sld_FP.
864 (fist): Use sld_FP.
865 (fstp): Use sld_FP. Add x_FP version.
866 (fistp): LLongMem version for Intel Syntax.
867 (fcom, fcomp): Use sld_FP.
868 (fadd, fiadd, fsub): Use sld_FP.
869 (fsubr): Use sld_FP.
870 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
871
872 1999-01-27 Doug Evans <devans@casey.cygnus.com>
873
874 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
875 CGEN_MODE_UINT.
876
877 1999-01-16 Jeffrey A Law (law@cygnus.com)
878
879 * hppa.h (bv): Fix mask.
880
881 1999-01-05 Doug Evans <devans@casey.cygnus.com>
882
883 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
884 (CGEN_ATTR): Use it.
885 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
886 (CGEN_ATTR_TABLE): New member dfault.
887
888 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
889
890 * mips.h (MIPS16_INSN_BRANCH): New.
891
892 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
893
894 The following is part of a change made by Edith Epstein
895 <eepstein@sophia.cygnus.com> as part of a project to merge in
896 changes by HP; HP did not create ChangeLog entries.
897
898 * hppa.h (completer_chars): list of chars to not put a space
899 after.
900
901 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
902
903 * i386.h (i386_optab): Permit w suffix on processor control and
904 status word instructions.
905
906 1998-11-30 Doug Evans <devans@casey.cygnus.com>
907
908 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
909 (struct cgen_keyword_entry): Ditto.
910 (struct cgen_operand): Ditto.
911 (CGEN_IFLD): New typedef, with associated access macros.
912 (CGEN_IFMT): New typedef, with associated access macros.
913 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
914 (CGEN_IVALUE): New typedef.
915 (struct cgen_insn): Delete const on syntax,attrs members.
916 `format' now points to format data. Type of `value' is now
917 CGEN_IVALUE.
918 (struct cgen_opcode_table): New member ifld_table.
919
920 1998-11-18 Doug Evans <devans@casey.cygnus.com>
921
922 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
923 (CGEN_OPERAND_INSTANCE): New member `attrs'.
924 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
925 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
926 (cgen_opcode_table): Update type of dis_hash fn.
927 (extract_operand): Update type of `insn_value' arg.
928
929 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
930
931 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
932
933 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
934
935 * mips.h (INSN_MULT): Added.
936
937 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
938
939 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
940
941 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
942
943 * cgen.h (CGEN_INSN_INT): New typedef.
944 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
945 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
946 (CGEN_INSN_BYTES_PTR): New typedef.
947 (CGEN_EXTRACT_INFO): New typedef.
948 (cgen_insert_fn,cgen_extract_fn): Update.
949 (cgen_opcode_table): New member `insn_endian'.
950 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
951 (insert_operand,extract_operand): Update.
952 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
953
954 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
955
956 * cgen.h (CGEN_ATTR_BOOLS): New macro.
957 (struct CGEN_HW_ENTRY): New member `attrs'.
958 (CGEN_HW_ATTR): New macro.
959 (struct CGEN_OPERAND_INSTANCE): New member `name'.
960 (CGEN_INSN_INVALID_P): New macro.
961
962 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
963
964 * hppa.h: Add "fid".
965
966 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
967
968 From Robert Andrew Dale <rob@nb.net>
969 * i386.h (i386_optab): Add AMD 3DNow! instructions.
970 (AMD_3DNOW_OPCODE): Define.
971
972 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
973
974 * d30v.h (EITHER_BUT_PREFER_MU): Define.
975
976 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
977
978 * cgen.h (cgen_insn): #if 0 out element `cdx'.
979
980 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
981
982 Move all global state data into opcode table struct, and treat
983 opcode table as something that is "opened/closed".
984 * cgen.h (CGEN_OPCODE_DESC): New type.
985 (all fns): New first arg of opcode table descriptor.
986 (cgen_set_parse_operand_fn): Add prototype.
987 (cgen_current_machine,cgen_current_endian): Delete.
988 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
989 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
990 dis_hash_table,dis_hash_table_entries.
991 (opcode_open,opcode_close): Add prototypes.
992
993 * cgen.h (cgen_insn): New element `cdx'.
994
995 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
996
997 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
998
999 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1000
1001 * mn10300.h: Add "no_match_operands" field for instructions.
1002 (MN10300_MAX_OPERANDS): Define.
1003
1004 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1005
1006 * cgen.h (cgen_macro_insn_count): Declare.
1007
1008 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1009
1010 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1011 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1012 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1013 set_{int,vma}_operand.
1014
1015 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1016
1017 * mn10300.h: Add "machine" field for instructions.
1018 (MN103, AM30): Define machine types.
1019
1020 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1021
1022 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1023
1024 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1025
1026 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1027
1028 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1029
1030 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1031 and ud2b.
1032 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1033 those that happen to be implemented on pentiums.
1034
1035 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1036
1037 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1038 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1039 with Size16|IgnoreSize or Size32|IgnoreSize.
1040
1041 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1042
1043 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1044 (REPE): Rename to REPE_PREFIX_OPCODE.
1045 (i386_regtab_end): Remove.
1046 (i386_prefixtab, i386_prefixtab_end): Remove.
1047 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1048 of md_begin.
1049 (MAX_OPCODE_SIZE): Define.
1050 (i386_optab_end): Remove.
1051 (sl_Suf): Define.
1052 (sl_FP): Use sl_Suf.
1053
1054 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1055 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1056 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1057 data32, dword, and adword prefixes.
1058 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1059 regs.
1060
1061 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1062
1063 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1064
1065 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1066 register operands, because this is a common idiom. Flag them with
1067 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1068 fdivrp because gcc erroneously generates them. Also flag with a
1069 warning.
1070
1071 * i386.h: Add suffix modifiers to most insns, and tighter operand
1072 checks in some cases. Fix a number of UnixWare compatibility
1073 issues with float insns. Merge some floating point opcodes, using
1074 new FloatMF modifier.
1075 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1076 consistency.
1077
1078 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1079 IgnoreDataSize where appropriate.
1080
1081 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1082
1083 * i386.h: (one_byte_segment_defaults): Remove.
1084 (two_byte_segment_defaults): Remove.
1085 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1086
1087 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1088
1089 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1090 (cgen_hw_lookup_by_num): Declare.
1091
1092 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1093
1094 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1095 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1096
1097 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1098
1099 * cgen.h (cgen_asm_init_parse): Delete.
1100 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1101 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1102
1103 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1104
1105 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1106 (cgen_asm_finish_insn): Update prototype.
1107 (cgen_insn): New members num, data.
1108 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1109 dis_hash, dis_hash_table_size moved to ...
1110 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1111 All uses updated. New members asm_hash_p, dis_hash_p.
1112 (CGEN_MINSN_EXPANSION): New struct.
1113 (cgen_expand_macro_insn): Declare.
1114 (cgen_macro_insn_count): Declare.
1115 (get_insn_operands): Update prototype.
1116 (lookup_get_insn_operands): Declare.
1117
1118 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1119
1120 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1121 regKludge. Add operands types for string instructions.
1122
1123 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1124
1125 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1126 table.
1127
1128 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1129
1130 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1131 for `gettext'.
1132
1133 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1134
1135 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1136 Add IsString flag to string instructions.
1137 (IS_STRING): Don't define.
1138 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1139 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1140 (SS_PREFIX_OPCODE): Define.
1141
1142 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1143
1144 * i386.h: Revert March 24 patch; no more LinearAddress.
1145
1146 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1147
1148 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1149 instructions, and instead add FWait opcode modifier. Add short
1150 form of fldenv and fstenv.
1151 (FWAIT_OPCODE): Define.
1152
1153 * i386.h (i386_optab): Change second operand constraint of `mov
1154 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1155 allow legal instructions such as `movl %gs,%esi'
1156
1157 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1158
1159 * h8300.h: Various changes to fully bracket initializers.
1160
1161 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1162
1163 * i386.h: Set LinearAddress for lidt and lgdt.
1164
1165 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1166
1167 * cgen.h (CGEN_BOOL_ATTR): New macro.
1168
1169 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1170
1171 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1172
1173 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1174
1175 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1176 (cgen_insn): Record syntax and format entries here, rather than
1177 separately.
1178
1179 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1180
1181 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1182
1183 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1184
1185 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1186 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1187 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1188
1189 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1190
1191 * cgen.h (lookup_insn): New argument alias_p.
1192
1193 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1194
1195 Fix rac to accept only a0:
1196 * d10v.h (OPERAND_ACC): Split into:
1197 (OPERAND_ACC0, OPERAND_ACC1) .
1198 (OPERAND_GPR): Define.
1199
1200 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1201
1202 * cgen.h (CGEN_FIELDS): Define here.
1203 (CGEN_HW_ENTRY): New member `type'.
1204 (hw_list): Delete decl.
1205 (enum cgen_mode): Declare.
1206 (CGEN_OPERAND): New member `hw'.
1207 (enum cgen_operand_instance_type): Declare.
1208 (CGEN_OPERAND_INSTANCE): New type.
1209 (CGEN_INSN): New member `operands'.
1210 (CGEN_OPCODE_DATA): Make hw_list const.
1211 (get_insn_operands,lookup_insn): Add prototypes for.
1212
1213 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1214
1215 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1216 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1217 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1218 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1219
1220 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1221
1222 * cgen.h: Correct typo in comment end marker.
1223
1224 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1225
1226 * tic30.h: New file.
1227
1228 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1229
1230 * cgen.h: Add prototypes for cgen_save_fixups(),
1231 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1232 of cgen_asm_finish_insn() to return a char *.
1233
1234 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1235
1236 * cgen.h: Formatting changes to improve readability.
1237
1238 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1239
1240 * cgen.h (*): Clean up pass over `struct foo' usage.
1241 (CGEN_ATTR): Make unsigned char.
1242 (CGEN_ATTR_TYPE): Update.
1243 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1244 (cgen_base): Move member `attrs' to cgen_insn.
1245 (CGEN_KEYWORD): New member `null_entry'.
1246 (CGEN_{SYNTAX,FORMAT}): New types.
1247 (cgen_insn): Format and syntax separated from each other.
1248
1249 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1250
1251 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1252 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1253 flags_{used,set} long.
1254 (d30v_operand): Make flags field long.
1255
1256 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1257
1258 * m68k.h: Fix comment describing operand types.
1259
1260 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1261
1262 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1263 everything else after down.
1264
1265 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1266
1267 * d10v.h (OPERAND_FLAG): Split into:
1268 (OPERAND_FFLAG, OPERAND_CFLAG) .
1269
1270 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1271
1272 * mips.h (struct mips_opcode): Changed comments to reflect new
1273 field usage.
1274
1275 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1276
1277 * mips.h: Added to comments a quick-ref list of all assigned
1278 operand type characters.
1279 (OP_{MASK,SH}_PERFREG): New macros.
1280
1281 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1282
1283 * sparc.h: Add '_' and '/' for v9a asr's.
1284 Patch from David Miller <davem@vger.rutgers.edu>
1285
1286 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1287
1288 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1289 area are not available in the base model (H8/300).
1290
1291 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1292
1293 * m68k.h: Remove documentation of ` operand specifier.
1294
1295 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1296
1297 * m68k.h: Document q and v operand specifiers.
1298
1299 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1300
1301 * v850.h (struct v850_opcode): Add processors field.
1302 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1303 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1304 (PROCESSOR_V850EA): New bit constants.
1305
1306 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1307
1308 Merge changes from Martin Hunt:
1309
1310 * d30v.h: Allow up to 64 control registers. Add
1311 SHORT_A5S format.
1312
1313 * d30v.h (LONG_Db): New form for delayed branches.
1314
1315 * d30v.h: (LONG_Db): New form for repeati.
1316
1317 * d30v.h (SHORT_D2B): New form.
1318
1319 * d30v.h (SHORT_A2): New form.
1320
1321 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1322 registers are used. Needed for VLIW optimization.
1323
1324 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1325
1326 * cgen.h: Move assembler interface section
1327 up so cgen_parse_operand_result is defined for cgen_parse_address.
1328 (cgen_parse_address): Update prototype.
1329
1330 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1331
1332 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1333
1334 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1335
1336 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1337 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1338 <paubert@iram.es>.
1339
1340 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1341 <paubert@iram.es>.
1342
1343 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1344 <paubert@iram.es>.
1345
1346 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1347 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1348
1349 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1350
1351 * v850.h (V850_NOT_R0): New flag.
1352
1353 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1354
1355 * v850.h (struct v850_opcode): Remove flags field.
1356
1357 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1358
1359 * v850.h (struct v850_opcode): Add flags field.
1360 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1361 fields.
1362 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1363 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1364
1365 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1366
1367 * arc.h: New file.
1368
1369 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1370
1371 * sparc.h (sparc_opcodes): Declare as const.
1372
1373 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1374
1375 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1376 uses single or double precision floating point resources.
1377 (INSN_NO_ISA, INSN_ISA1): Define.
1378 (cpu specific INSN macros): Tweak into bitmasks outside the range
1379 of INSN_ISA field.
1380
1381 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1382
1383 * i386.h: Fix pand opcode.
1384
1385 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1386
1387 * mips.h: Widen INSN_ISA and move it to a more convenient
1388 bit position. Add INSN_3900.
1389
1390 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1391
1392 * mips.h (struct mips_opcode): added new field membership.
1393
1394 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1395
1396 * i386.h (movd): only Reg32 is allowed.
1397
1398 * i386.h: add fcomp and ud2. From Wayne Scott
1399 <wscott@ichips.intel.com>.
1400
1401 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1402
1403 * i386.h: Add MMX instructions.
1404
1405 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1406
1407 * i386.h: Remove W modifier from conditional move instructions.
1408
1409 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1410
1411 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1412 with no arguments to match that generated by the UnixWare
1413 assembler.
1414
1415 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1416
1417 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1418 (cgen_parse_operand_fn): Declare.
1419 (cgen_init_parse_operand): Declare.
1420 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1421 new argument `want'.
1422 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1423 (enum cgen_parse_operand_type): New enum.
1424
1425 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1426
1427 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1428
1429 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1430
1431 * cgen.h: New file.
1432
1433 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1434
1435 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1436 fdivrp.
1437
1438 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1439
1440 * v850.h (extract): Make unsigned.
1441
1442 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1443
1444 * i386.h: Add iclr.
1445
1446 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1447
1448 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1449 take a direction bit.
1450
1451 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1452
1453 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1454
1455 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1456
1457 * sparc.h: Include <ansidecl.h>. Update function declarations to
1458 use prototypes, and to use const when appropriate.
1459
1460 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1461
1462 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1463
1464 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1465
1466 * d10v.h: Change pre_defined_registers to
1467 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1468
1469 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1470
1471 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1472 Change mips_opcodes from const array to a pointer,
1473 and change bfd_mips_num_opcodes from const int to int,
1474 so that we can increase the size of the mips opcodes table
1475 dynamically.
1476
1477 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1478
1479 * d30v.h (FLAG_X): Remove unused flag.
1480
1481 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1482
1483 * d30v.h: New file.
1484
1485 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1486
1487 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1488 (PDS_VALUE): Macro to access value field of predefined symbols.
1489 (tic80_next_predefined_symbol): Add prototype.
1490
1491 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1492
1493 * tic80.h (tic80_symbol_to_value): Change prototype to match
1494 change in function, added class parameter.
1495
1496 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1497
1498 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1499 endmask fields, which are somewhat weird in that 0 and 32 are
1500 treated exactly the same.
1501
1502 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1503
1504 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1505 rather than a constant that is 2**X. Reorder them to put bits for
1506 operands that have symbolic names in the upper bits, so they can
1507 be packed into an int where the lower bits contain the value that
1508 corresponds to that symbolic name.
1509 (predefined_symbo): Add struct.
1510 (tic80_predefined_symbols): Declare array of translations.
1511 (tic80_num_predefined_symbols): Declare size of that array.
1512 (tic80_value_to_symbol): Declare function.
1513 (tic80_symbol_to_value): Declare function.
1514
1515 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1516
1517 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1518
1519 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1520
1521 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1522 be the destination register.
1523
1524 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1525
1526 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1527 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1528 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1529 that the opcode can have two vector instructions in a single
1530 32 bit word and we have to encode/decode both.
1531
1532 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1533
1534 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1535 TIC80_OPERAND_RELATIVE for PC relative.
1536 (TIC80_OPERAND_BASEREL): New flag bit for register
1537 base relative.
1538
1539 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1540
1541 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1542
1543 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1544
1545 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1546 ":s" modifier for scaling.
1547
1548 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1549
1550 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1551 (TIC80_OPERAND_M_LI): Ditto
1552
1553 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1554
1555 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1556 (TIC80_OPERAND_CC): New define for condition code operand.
1557 (TIC80_OPERAND_CR): New define for control register operand.
1558
1559 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1560
1561 * tic80.h (struct tic80_opcode): Name changed.
1562 (struct tic80_opcode): Remove format field.
1563 (struct tic80_operand): Add insertion and extraction functions.
1564 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1565 correct ones.
1566 (FMT_*): Ditto.
1567
1568 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1569
1570 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1571 type IV instruction offsets.
1572
1573 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1574
1575 * tic80.h: New file.
1576
1577 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1578
1579 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1580
1581 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1582
1583 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1584 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1585 * v850.h: Fix comment, v850_operand not powerpc_operand.
1586
1587 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1588
1589 * mn10200.h: Flesh out structures and definitions needed by
1590 the mn10200 assembler & disassembler.
1591
1592 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1593
1594 * mips.h: Add mips16 definitions.
1595
1596 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1597
1598 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1599
1600 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1601
1602 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1603 (MN10300_OPERAND_MEMADDR): Define.
1604
1605 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1606
1607 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1608
1609 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1610
1611 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1612
1613 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1614
1615 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1616
1617 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1618
1619 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1620
1621 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1622
1623 * alpha.h: Don't include "bfd.h"; private relocation types are now
1624 negative to minimize problems with shared libraries. Organize
1625 instruction subsets by AMASK extensions and PALcode
1626 implementation.
1627 (struct alpha_operand): Move flags slot for better packing.
1628
1629 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1630
1631 * v850.h (V850_OPERAND_RELAX): New operand flag.
1632
1633 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1634
1635 * mn10300.h (FMT_*): Move operand format definitions
1636 here.
1637
1638 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1639
1640 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1641
1642 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1643
1644 * mn10300.h (mn10300_opcode): Add "format" field.
1645 (MN10300_OPERAND_*): Define.
1646
1647 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1648
1649 * mn10x00.h: Delete.
1650 * mn10200.h, mn10300.h: New files.
1651
1652 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1653
1654 * mn10x00.h: New file.
1655
1656 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1657
1658 * v850.h: Add new flag to indicate this instruction uses a PC
1659 displacement.
1660
1661 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1662
1663 * h8300.h (stmac): Add missing instruction.
1664
1665 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1666
1667 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1668 field.
1669
1670 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1671
1672 * v850.h (V850_OPERAND_EP): Define.
1673
1674 * v850.h (v850_opcode): Add size field.
1675
1676 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1677
1678 * v850.h (v850_operands): Add insert and extract fields, pointers
1679 to functions used to handle unusual operand encoding.
1680 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1681 V850_OPERAND_SIGNED): Defined.
1682
1683 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1684
1685 * v850.h (v850_operands): Add flags field.
1686 (OPERAND_REG, OPERAND_NUM): Defined.
1687
1688 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1689
1690 * v850.h: New file.
1691
1692 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1693
1694 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1695 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1696 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1697 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1698 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1699 Defined.
1700
1701 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1702
1703 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1704 a 3 bit space id instead of a 2 bit space id.
1705
1706 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1707
1708 * d10v.h: Add some additional defines to support the
1709 assembler in determining which operations can be done in parallel.
1710
1711 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1712
1713 * h8300.h (SN): Define.
1714 (eepmov.b): Renamed from "eepmov"
1715 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1716 with them.
1717
1718 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1719
1720 * d10v.h (OPERAND_SHIFT): New operand flag.
1721
1722 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1723
1724 * d10v.h: Changes for divs, parallel-only instructions, and
1725 signed numbers.
1726
1727 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1728
1729 * d10v.h (pd_reg): Define. Putting the definition here allows
1730 the assembler and disassembler to share the same struct.
1731
1732 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1733
1734 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1735 Williams <steve@icarus.com>.
1736
1737 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1738
1739 * d10v.h: New file.
1740
1741 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1742
1743 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1744
1745 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1746
1747 * m68k.h (mcf5200): New macro.
1748 Document names of coldfire control registers.
1749
1750 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1751
1752 * h8300.h (SRC_IN_DST): Define.
1753
1754 * h8300.h (UNOP3): Mark the register operand in this insn
1755 as a source operand, not a destination operand.
1756 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1757 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1758 register operand with SRC_IN_DST.
1759
1760 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1761
1762 * alpha.h: New file.
1763
1764 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1765
1766 * rs6k.h: Remove obsolete file.
1767
1768 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1769
1770 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1771 fdivp, and fdivrp. Add ffreep.
1772
1773 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1774
1775 * h8300.h: Reorder various #defines for readability.
1776 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1777 (BITOP): Accept additional (unused) argument. All callers changed.
1778 (EBITOP): Likewise.
1779 (O_LAST): Bump.
1780 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1781
1782 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1783 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1784 (BITOP, EBITOP): Handle new H8/S addressing modes for
1785 bit insns.
1786 (UNOP3): Handle new shift/rotate insns on the H8/S.
1787 (insns using exr): New instructions.
1788 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1789
1790 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1791
1792 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1793 was incorrect.
1794
1795 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1796
1797 * h8300.h (START): Remove.
1798 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1799 and mov.l insns that can be relaxed.
1800
1801 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1802
1803 * i386.h: Remove Abs32 from lcall.
1804
1805 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1806
1807 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1808 (SLCPOP): New macro.
1809 Mark X,Y opcode letters as in use.
1810
1811 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1812
1813 * sparc.h (F_FLOAT, F_FBR): Define.
1814
1815 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1816
1817 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1818 from all insns.
1819 (ABS8SRC,ABS8DST): Add ABS8MEM.
1820 (add.l): Fix reg+reg variant.
1821 (eepmov.w): Renamed from eepmovw.
1822 (ldc,stc): Fix many cases.
1823
1824 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1825
1826 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1827
1828 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1829
1830 * sparc.h (O): Mark operand letter as in use.
1831
1832 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1833
1834 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1835 Mark operand letters uU as in use.
1836
1837 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1838
1839 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1840 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1841 (SPARC_OPCODE_SUPPORTED): New macro.
1842 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1843 (F_NOTV9): Delete.
1844
1845 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1846
1847 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1848 declaration consistent with return type in definition.
1849
1850 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1851
1852 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1853
1854 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1855
1856 * i386.h (i386_regtab): Add 80486 test registers.
1857
1858 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1859
1860 * i960.h (I_HX): Define.
1861 (i960_opcodes): Add HX instruction.
1862
1863 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1864
1865 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1866 and fclex.
1867
1868 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1869
1870 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1871 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1872 (bfd_* defines): Delete.
1873 (sparc_opcode_archs): Replaces architecture_pname.
1874 (sparc_opcode_lookup_arch): Declare.
1875 (NUMOPCODES): Delete.
1876
1877 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1878
1879 * sparc.h (enum sparc_architecture): Add v9a.
1880 (ARCHITECTURES_CONFLICT_P): Update.
1881
1882 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1883
1884 * i386.h: Added Pentium Pro instructions.
1885
1886 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1887
1888 * m68k.h: Document new 'W' operand place.
1889
1890 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1891
1892 * hppa.h: Add lci and syncdma instructions.
1893
1894 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1895
1896 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1897 instructions.
1898
1899 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1900
1901 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1902 assembler's -mcom and -many switches.
1903
1904 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1905
1906 * i386.h: Fix cmpxchg8b extension opcode description.
1907
1908 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1909
1910 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1911 and register cr4.
1912
1913 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1914
1915 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1916
1917 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1918
1919 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1920
1921 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1922
1923 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1924
1925 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1926
1927 * m68kmri.h: Remove.
1928
1929 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1930 declarations. Remove F_ALIAS and flag field of struct
1931 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1932 int. Make name and args fields of struct m68k_opcode const.
1933
1934 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1935
1936 * sparc.h (F_NOTV9): Define.
1937
1938 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1939
1940 * mips.h (INSN_4010): Define.
1941
1942 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1943
1944 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1945
1946 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1947 * m68k.h: Fix argument descriptions of coprocessor
1948 instructions to allow only alterable operands where appropriate.
1949 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1950 (m68k_opcode_aliases): Add more aliases.
1951
1952 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1953
1954 * m68k.h: Added explcitly short-sized conditional branches, and a
1955 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1956 svr4-based configurations.
1957
1958 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1959
1960 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1961 * i386.h: added missing Data16/Data32 flags to a few instructions.
1962
1963 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1964
1965 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1966 (OP_MASK_BCC, OP_SH_BCC): Define.
1967 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1968 (OP_MASK_CCC, OP_SH_CCC): Define.
1969 (INSN_READ_FPR_R): Define.
1970 (INSN_RFE): Delete.
1971
1972 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1973
1974 * m68k.h (enum m68k_architecture): Deleted.
1975 (struct m68k_opcode_alias): New type.
1976 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1977 matching constraints, values and flags. As a side effect of this,
1978 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1979 as I know were never used, now may need re-examining.
1980 (numopcodes): Now const.
1981 (m68k_opcode_aliases, numaliases): New variables.
1982 (endop): Deleted.
1983 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1984 m68k_opcode_aliases; update declaration of m68k_opcodes.
1985
1986 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1987
1988 * hppa.h (delay_type): Delete unused enumeration.
1989 (pa_opcode): Replace unused delayed field with an architecture
1990 field.
1991 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1992
1993 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1994
1995 * mips.h (INSN_ISA4): Define.
1996
1997 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1998
1999 * mips.h (M_DLA_AB, M_DLI): Define.
2000
2001 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2002
2003 * hppa.h (fstwx): Fix single-bit error.
2004
2005 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2006
2007 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2008
2009 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2010
2011 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2012 debug registers. From Charles Hannum (mycroft@netbsd.org).
2013
2014 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2015
2016 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2017 i386 support:
2018 * i386.h (MOV_AX_DISP32): New macro.
2019 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2020 of several call/return instructions.
2021 (ADDR_PREFIX_OPCODE): New macro.
2022
2023 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2024
2025 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2026
2027 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2028 char.
2029 (struct vot, field `name'): ditto.
2030
2031 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2032
2033 * vax.h: Supply and properly group all values in end sentinel.
2034
2035 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2036
2037 * mips.h (INSN_ISA, INSN_4650): Define.
2038
2039 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2040
2041 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2042 systems with a separate instruction and data cache, such as the
2043 29040, these instructions take an optional argument.
2044
2045 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2046
2047 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2048 INSN_TRAP.
2049
2050 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2051
2052 * mips.h (INSN_STORE_MEMORY): Define.
2053
2054 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2055
2056 * sparc.h: Document new operand type 'x'.
2057
2058 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2059
2060 * i960.h (I_CX2): New instruction category. It includes
2061 instructions available on Cx and Jx processors.
2062 (I_JX): New instruction category, for JX-only instructions.
2063 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2064 Jx-only instructions, in I_JX category.
2065
2066 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2067
2068 * ns32k.h (endop): Made pointer const too.
2069
2070 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2071
2072 * ns32k.h: Drop Q operand type as there is no correct use
2073 for it. Add I and Z operand types which allow better checking.
2074
2075 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2076
2077 * h8300.h (xor.l) :fix bit pattern.
2078 (L_2): New size of operand.
2079 (trapa): Use it.
2080
2081 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2082
2083 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2084
2085 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2086
2087 * sparc.h: Include v9 definitions.
2088
2089 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2090
2091 * m68k.h (m68060): Defined.
2092 (m68040up, mfloat, mmmu): Include it.
2093 (struct m68k_opcode): Widen `arch' field.
2094 (m68k_opcodes): Updated for M68060. Removed comments that were
2095 instructions commented out by "JF" years ago.
2096
2097 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2098
2099 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2100 add a one-bit `flags' field.
2101 (F_ALIAS): New macro.
2102
2103 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2104
2105 * h8300.h (dec, inc): Get encoding right.
2106
2107 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2108
2109 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2110 a flag instead.
2111 (PPC_OPERAND_SIGNED): Define.
2112 (PPC_OPERAND_SIGNOPT): Define.
2113
2114 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2115
2116 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2117 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2118
2119 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2120
2121 * i386.h: Reverse last change. It'll be handled in gas instead.
2122
2123 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2124
2125 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2126 slower on the 486 and used the implicit shift count despite the
2127 explicit operand. The one-operand form is still available to get
2128 the shorter form with the implicit shift count.
2129
2130 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2131
2132 * hppa.h: Fix typo in fstws arg string.
2133
2134 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2135
2136 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2137
2138 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2139
2140 * ppc.h (PPC_OPCODE_601): Define.
2141
2142 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2143
2144 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2145 (so we can determine valid completers for both addb and addb[tf].)
2146
2147 * hppa.h (xmpyu): No floating point format specifier for the
2148 xmpyu instruction.
2149
2150 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2151
2152 * ppc.h (PPC_OPERAND_NEXT): Define.
2153 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2154 (struct powerpc_macro): Define.
2155 (powerpc_macros, powerpc_num_macros): Declare.
2156
2157 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2158
2159 * ppc.h: New file. Header file for PowerPC opcode table.
2160
2161 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2162
2163 * hppa.h: More minor template fixes for sfu and copr (to allow
2164 for easier disassembly).
2165
2166 * hppa.h: Fix templates for all the sfu and copr instructions.
2167
2168 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2169
2170 * i386.h (push): Permit Imm16 operand too.
2171
2172 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2173
2174 * h8300.h (andc): Exists in base arch.
2175
2176 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2177
2178 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2179 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2180
2181 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2182
2183 * hppa.h: Add FP quadword store instructions.
2184
2185 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2186
2187 * mips.h: (M_J_A): Added.
2188 (M_LA): Removed.
2189
2190 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2191
2192 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2193 <mellon@pepper.ncd.com>.
2194
2195 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2196
2197 * hppa.h: Immediate field in probei instructions is unsigned,
2198 not low-sign extended.
2199
2200 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2201
2202 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2203
2204 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2205
2206 * i386.h: Add "fxch" without operand.
2207
2208 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2209
2210 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2211
2212 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2213
2214 * hppa.h: Add gfw and gfr to the opcode table.
2215
2216 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2217
2218 * m88k.h: extended to handle m88110.
2219
2220 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2221
2222 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2223 addresses.
2224
2225 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2226
2227 * i960.h (i960_opcodes): Properly bracket initializers.
2228
2229 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2230
2231 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2232
2233 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2234
2235 * m68k.h (two): Protect second argument with parentheses.
2236
2237 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2238
2239 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2240 Deleted old in/out instructions in "#if 0" section.
2241
2242 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2243
2244 * i386.h (i386_optab): Properly bracket initializers.
2245
2246 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2247
2248 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2249 Jeff Law, law@cs.utah.edu).
2250
2251 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2252
2253 * i386.h (lcall): Accept Imm32 operand also.
2254
2255 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2256
2257 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2258 (M_DABS): Added.
2259
2260 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2261
2262 * mips.h (INSN_*): Changed values. Removed unused definitions.
2263 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2264 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2265 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2266 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2267 (M_*): Added new values for r6000 and r4000 macros.
2268 (ANY_DELAY): Removed.
2269
2270 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2271
2272 * mips.h: Added M_LI_S and M_LI_SS.
2273
2274 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2275
2276 * h8300.h: Get some rare mov.bs correct.
2277
2278 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2279
2280 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2281 been included.
2282
2283 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2284
2285 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2286 jump instructions, for use in disassemblers.
2287
2288 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2289
2290 * m88k.h: Make bitfields just unsigned, not unsigned long or
2291 unsigned short.
2292
2293 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2294
2295 * hppa.h: New argument type 'y'. Use in various float instructions.
2296
2297 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2298
2299 * hppa.h (break): First immediate field is unsigned.
2300
2301 * hppa.h: Add rfir instruction.
2302
2303 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2304
2305 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2306
2307 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2308
2309 * mips.h: Reworked the hazard information somewhat, and fixed some
2310 bugs in the instruction hazard descriptions.
2311
2312 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2313
2314 * m88k.h: Corrected a couple of opcodes.
2315
2316 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2317
2318 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2319 new version includes instruction hazard information, but is
2320 otherwise reasonably similar.
2321
2322 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2323
2324 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2325
2326 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2327
2328 Patches from Jeff Law, law@cs.utah.edu:
2329 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2330 Make the tables be the same for the following instructions:
2331 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2332 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2333 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2334 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2335 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2336 "fcmp", and "ftest".
2337
2338 * hppa.h: Make new and old tables the same for "break", "mtctl",
2339 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2340 Fix typo in last patch. Collapse several #ifdefs into a
2341 single #ifdef.
2342
2343 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2344 of the comments up-to-date.
2345
2346 * hppa.h: Update "free list" of letters and update
2347 comments describing each letter's function.
2348
2349 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2350
2351 * h8300.h: Lots of little fixes for the h8/300h.
2352
2353 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2354
2355 Support for H8/300-H
2356 * h8300.h: Lots of new opcodes.
2357
2358 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2359
2360 * h8300.h: checkpoint, includes H8/300-H opcodes.
2361
2362 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2363
2364 * Patches from Jeffrey Law <law@cs.utah.edu>.
2365 * hppa.h: Rework single precision FP
2366 instructions so that they correctly disassemble code
2367 PA1.1 code.
2368
2369 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2370
2371 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2372 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2373
2374 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2375
2376 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2377 gdb will define it for now.
2378
2379 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2380
2381 * sparc.h: Don't end enumerator list with comma.
2382
2383 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2384
2385 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2386 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2387 ("bc2t"): Correct typo.
2388 ("[ls]wc[023]"): Use T rather than t.
2389 ("c[0123]"): Define general coprocessor instructions.
2390
2391 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2392
2393 * m68k.h: Move split point for gcc compilation more towards
2394 middle.
2395
2396 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2397
2398 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2399 simply wrong, ics, rfi, & rfsvc were missing).
2400 Add "a" to opr_ext for "bb". Doc fix.
2401
2402 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2403
2404 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2405 * mips.h: Add casts, to suppress warnings about shifting too much.
2406 * m68k.h: Document the placement code '9'.
2407
2408 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2409
2410 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2411 allows callers to break up the large initialized struct full of
2412 opcodes into two half-sized ones. This permits GCC to compile
2413 this module, since it takes exponential space for initializers.
2414 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2415
2416 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2417
2418 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2419 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2420 initialized structs in it.
2421
2422 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2423
2424 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2425 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2426 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2427
2428 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2429
2430 * mips.h: document "i" and "j" operands correctly.
2431
2432 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2433
2434 * mips.h: Removed endianness dependency.
2435
2436 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2437
2438 * h8300.h: include info on number of cycles per instruction.
2439
2440 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2441
2442 * hppa.h: Move handy aliases to the front. Fix masks for extract
2443 and deposit instructions.
2444
2445 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2446
2447 * i386.h: accept shld and shrd both with and without the shift
2448 count argument, which is always %cl.
2449
2450 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2451
2452 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2453 (one_byte_segment_defaults, two_byte_segment_defaults,
2454 i386_prefixtab_end): Ditto.
2455
2456 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2457
2458 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2459 for operand 2; from John Carr, jfc@dsg.dec.com.
2460
2461 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2462
2463 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2464 always use 16-bit offsets. Makes calculated-size jump tables
2465 feasible.
2466
2467 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2468
2469 * i386.h: Fix one-operand forms of in* and out* patterns.
2470
2471 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2472
2473 * m68k.h: Added CPU32 support.
2474
2475 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2476
2477 * mips.h (break): Disassemble the argument. Patch from
2478 jonathan@cs.stanford.edu (Jonathan Stone).
2479
2480 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2481
2482 * m68k.h: merged Motorola and MIT syntax.
2483
2484 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2485
2486 * m68k.h (pmove): make the tests less strict, the 68k book is
2487 wrong.
2488
2489 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2490
2491 * m68k.h (m68ec030): Defined as alias for 68030.
2492 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2493 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2494 them. Tightened description of "fmovex" to distinguish it from
2495 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2496 up descriptions that claimed versions were available for chips not
2497 supporting them. Added "pmovefd".
2498
2499 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2500
2501 * m68k.h: fix where the . goes in divull
2502
2503 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2504
2505 * m68k.h: the cas2 instruction is supposed to be written with
2506 indirection on the last two operands, which can be either data or
2507 address registers. Added a new operand type 'r' which accepts
2508 either register type. Added new cases for cas2l and cas2w which
2509 use them. Corrected masks for cas2 which failed to recognize use
2510 of address register.
2511
2512 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2513
2514 * m68k.h: Merged in patches (mostly m68040-specific) from
2515 Colin Smith <colin@wrs.com>.
2516
2517 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2518 base). Also cleaned up duplicates, re-ordered instructions for
2519 the sake of dis-assembling (so aliases come after standard names).
2520 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2521
2522 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2523
2524 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2525 all missing .s
2526
2527 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2528
2529 * sparc.h: Moved tables to BFD library.
2530
2531 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2532
2533 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2534
2535 * h8300.h: Finish filling in all the holes in the opcode table,
2536 so that the Lucid C compiler can digest this as well...
2537
2538 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2539
2540 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2541 Fix opcodes on various sizes of fild/fist instructions
2542 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2543 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2544
2545 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2546
2547 * h8300.h: Fill in all the holes in the opcode table so that the
2548 losing HPUX C compiler can digest this...
2549
2550 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2551
2552 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2553 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2554
2555 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2556
2557 * sparc.h: Add new architecture variant sparclite; add its scan
2558 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2559
2560 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2561
2562 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2563 fy@lucid.com).
2564
2565 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2566
2567 * rs6k.h: New version from IBM (Metin).
2568
2569 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2570
2571 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2572 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2573
2574 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2575
2576 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2577
2578 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2579
2580 * m68k.h (one, two): Cast macro args to unsigned to suppress
2581 complaints from compiler and lint about integer overflow during
2582 shift.
2583
2584 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2585
2586 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2587
2588 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2589
2590 * mips.h: Make bitfield layout depend on the HOST compiler,
2591 not on the TARGET system.
2592
2593 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2594
2595 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2596 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2597 <TRANLE@INTELLICORP.COM>.
2598
2599 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2600
2601 * h8300.h: turned op_type enum into #define list
2602
2603 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2604
2605 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2606 similar instructions -- they've been renamed to "fitoq", etc.
2607 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2608 number of arguments.
2609 * h8300.h: Remove extra ; which produces compiler warning.
2610
2611 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2612
2613 * sparc.h: fix opcode for tsubcctv.
2614
2615 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2616
2617 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2618
2619 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2620
2621 * sparc.h (nop): Made the 'lose' field be even tighter,
2622 so only a standard 'nop' is disassembled as a nop.
2623
2624 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2625
2626 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2627 disassembled as a nop.
2628
2629 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2630
2631 * m68k.h, sparc.h: ANSIfy enums.
2632
2633 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2634
2635 * sparc.h: fix a typo.
2636
2637 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2638
2639 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2640 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2641 vax.h: Renamed from ../<foo>-opcode.h.
2642
2643 \f
2644 Local Variables:
2645 version-control: never
2646 End:
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