*** empty log message ***
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-11-04 Chris Demetriou <cgd@broadcom.com>
2
3 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
4
5 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
6
7 * mmix.h: New file.
8
9 2001-10-18 Chris Demetriou <cgd@broadcom.com>
10
11 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
12 of the expression, to make source code merging easier.
13
14 2001-10-17 Chris Demetriou <cgd@broadcom.com>
15
16 * mips.h: Sort coprocessor instruction argument characters
17 in comment, add a few more words of description for "H".
18
19 2001-10-17 Chris Demetriou <cgd@broadcom.com>
20
21 * mips.h (INSN_SB1): New cpu-specific instruction bit.
22 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
23 if cpu is CPU_SB1.
24
25 2001-10-17 matthew green <mrg@redhat.com>
26
27 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
28
29 2001-10-12 matthew green <mrg@redhat.com>
30
31 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
32 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
33 instructions, respectively.
34
35 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
36
37 * v850.h: Remove spurious comment.
38
39 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
40
41 * h8300.h: Fix compile time warning messages
42
43 2001-09-04 Richard Henderson <rth@redhat.com>
44
45 * alpha.h (struct alpha_operand): Pack elements into bitfields.
46
47 2001-08-31 Eric Christopher <echristo@redhat.com>
48
49 * mips.h: Remove CPU_MIPS32_4K.
50
51 2001-08-27 Torbjorn Granlund <tege@swox.com>
52
53 * ppc.h (PPC_OPERAND_DS): Define.
54
55 2001-08-25 Andreas Jaeger <aj@suse.de>
56
57 * d30v.h: Fix declaration of reg_name_cnt.
58
59 * d10v.h: Fix declaration of d10v_reg_name_cnt.
60
61 * arc.h: Add prototypes from opcodes/arc-opc.c.
62
63 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
64
65 * mips.h (INSN_10000): Define.
66 (OPCODE_IS_MEMBER): Check for INSN_10000.
67
68 2001-08-10 Alan Modra <amodra@one.net.au>
69
70 * ppc.h: Revert 2001-08-08.
71
72 2001-08-08 Alan Modra <amodra@one.net.au>
73
74 1999-10-25 Torbjorn Granlund <tege@swox.com>
75 * ppc.h (struct powerpc_operand): New field `reloc'.
76
77 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
78
79 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
80 (cgen_cpu_desc): Ditto.
81
82 2001-07-07 Ben Elliston <bje@redhat.com>
83
84 * m88k.h: Clean up and reformat. Remove unused code.
85
86 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
87
88 * cgen.h (cgen_keyword): Add nonalpha_chars field.
89
90 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
91
92 * mips.h (CPU_R12000): Define.
93
94 2001-05-23 John Healy <jhealy@redhat.com>
95
96 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
97
98 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
99
100 * mips.h (INSN_ISA_MASK): Define.
101
102 2001-05-12 Alan Modra <amodra@one.net.au>
103
104 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
105 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
106 and use InvMem as these insns must have register operands.
107
108 2001-05-04 Alan Modra <amodra@one.net.au>
109
110 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
111 and pextrw to swap reg/rm assignments.
112
113 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
114
115 * cris.h (enum cris_insn_version_usage): Correct comment for
116 cris_ver_v3p.
117
118 2001-03-24 Alan Modra <alan@linuxcare.com.au>
119
120 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
121 Add InvMem to first operand of "maskmovdqu".
122
123 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
124
125 * cris.h (ADD_PC_INCR_OPCODE): New macro.
126
127 2001-03-21 Kazu Hirata <kazu@hxi.com>
128
129 * h8300.h: Fix formatting.
130
131 2001-03-22 Alan Modra <alan@linuxcare.com.au>
132
133 * i386.h (i386_optab): Add paddq, psubq.
134
135 2001-03-19 Alan Modra <alan@linuxcare.com.au>
136
137 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
138
139 2001-02-28 Igor Shevlyakov <igor@windriver.com>
140
141 * m68k.h: new defines for Coldfire V4. Update mcf to know
142 about mcf5407.
143
144 2001-02-18 lars brinkhoff <lars@nocrew.org>
145
146 * pdp11.h: New file.
147
148 2001-02-12 Jan Hubicka <jh@suse.cz>
149
150 * i386.h (i386_optab): SSE integer converison instructions have
151 64bit versions on x86-64.
152
153 2001-02-10 Nick Clifton <nickc@redhat.com>
154
155 * mips.h: Remove extraneous whitespace. Formating change to allow
156 for future contribution.
157
158 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
159
160 * s390.h: New file.
161
162 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
163
164 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
165 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
166 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
167
168 2001-01-24 Karsten Keil <kkeil@suse.de>
169
170 * i386.h (i386_optab): Fix swapgs
171
172 2001-01-14 Alan Modra <alan@linuxcare.com.au>
173
174 * hppa.h: Describe new '<' and '>' operand types, and tidy
175 existing comments.
176 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
177 Remove duplicate "ldw j(s,b),x". Sort some entries.
178
179 2001-01-13 Jan Hubicka <jh@suse.cz>
180
181 * i386.h (i386_optab): Fix pusha and ret templates.
182
183 2001-01-11 Peter Targett <peter.targett@arccores.com>
184
185 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
186 definitions for masking cpu type.
187 (arc_ext_operand_value) New structure for storing extended
188 operands.
189 (ARC_OPERAND_*) Flags for operand values.
190
191 2001-01-10 Jan Hubicka <jh@suse.cz>
192
193 * i386.h (pinsrw): Add.
194 (pshufw): Remove.
195 (cvttpd2dq): Fix operands.
196 (cvttps2dq): Likewise.
197 (movq2q): Rename to movdq2q.
198
199 2001-01-10 Richard Schaal <richard.schaal@intel.com>
200
201 * i386.h: Correct movnti instruction.
202
203 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
204
205 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
206 of operands (unsigned char or unsigned short).
207 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
208 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
209
210 2001-01-05 Jan Hubicka <jh@suse.cz>
211
212 * i386.h (i386_optab): Make [sml]fence template to use immext field.
213
214 2001-01-03 Jan Hubicka <jh@suse.cz>
215
216 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
217 introduced by Pentium4
218
219 2000-12-30 Jan Hubicka <jh@suse.cz>
220
221 * i386.h (i386_optab): Add "rex*" instructions;
222 add swapgs; disable jmp/call far direct instructions for
223 64bit mode; add syscall and sysret; disable registers for 0xc6
224 template. Add 'q' suffixes to extendable instructions, disable
225 obsolete instructions, add new sign/zero extension ones.
226 (i386_regtab): Add extended registers.
227 (*Suf): Add No_qSuf.
228 (q_Suf, wlq_Suf, bwlq_Suf): New.
229
230 2000-12-20 Jan Hubicka <jh@suse.cz>
231
232 * i386.h (i386_optab): Replace "Imm" with "EncImm".
233 (i386_regtab): Add flags field.
234
235 2000-12-12 Nick Clifton <nickc@redhat.com>
236
237 * mips.h: Fix formatting.
238
239 2000-12-01 Chris Demetriou <cgd@sibyte.com>
240
241 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
242 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
243 OP_*_SYSCALL definitions.
244 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
245 19 bit wait codes.
246 (MIPS operand specifier comments): Remove 'm', add 'U' and
247 'J', and update the meaning of 'B' so that it's more general.
248
249 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
250 INSN_ISA5): Renumber, redefine to mean the ISA at which the
251 instruction was added.
252 (INSN_ISA32): New constant.
253 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
254 Renumber to avoid new and/or renumbered INSN_* constants.
255 (INSN_MIPS32): Delete.
256 (ISA_UNKNOWN): New constant to indicate unknown ISA.
257 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
258 ISA_MIPS32): New constants, defined to be the mask of INSN_*
259 constants available at that ISA level.
260 (CPU_UNKNOWN): New constant to indicate unknown CPU.
261 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
262 define it with a unique value.
263 (OPCODE_IS_MEMBER): Update for new ISA membership-related
264 constant meanings.
265
266 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
267 definitions.
268
269 * mips.h (CPU_SB1): New constant.
270
271 2000-10-20 Jakub Jelinek <jakub@redhat.com>
272
273 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
274 Note that '3' is used for siam operand.
275
276 2000-09-22 Jim Wilson <wilson@cygnus.com>
277
278 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
279
280 2000-09-13 Anders Norlander <anorland@acc.umu.se>
281
282 * mips.h: Use defines instead of hard-coded processor numbers.
283 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
284 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
285 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
286 CPU_4KC, CPU_4KM, CPU_4KP): Define..
287 (OPCODE_IS_MEMBER): Use new defines.
288 (OP_MASK_SEL, OP_SH_SEL): Define.
289 (OP_MASK_CODE20, OP_SH_CODE20): Define.
290 Add 'P' to used characters.
291 Use 'H' for coprocessor select field.
292 Use 'm' for 20 bit breakpoint code.
293 Document new arg characters and add to used characters.
294 (INSN_MIPS32): New define for MIPS32 extensions.
295 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
296
297 2000-09-05 Alan Modra <alan@linuxcare.com.au>
298
299 * hppa.h: Mention cz completer.
300
301 2000-08-16 Jim Wilson <wilson@cygnus.com>
302
303 * ia64.h (IA64_OPCODE_POSTINC): New.
304
305 2000-08-15 H.J. Lu <hjl@gnu.org>
306
307 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
308 IgnoreSize change.
309
310 2000-08-08 Jason Eckhardt <jle@cygnus.com>
311
312 * i860.h: Small formatting adjustments.
313
314 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
315
316 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
317 Move related opcodes closer to each other.
318 Minor changes in comments, list undefined opcodes.
319
320 2000-07-26 Dave Brolley <brolley@redhat.com>
321
322 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
323
324 2000-07-22 Jason Eckhardt <jle@cygnus.com>
325
326 * i860.h (btne, bte, bla): Changed these opcodes
327 to use sbroff ('r') instead of split16 ('s').
328 (J, K, L, M): New operand types for 16-bit aligned fields.
329 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
330 use I, J, K, L, M instead of just I.
331 (T, U): New operand types for split 16-bit aligned fields.
332 (st.x): Changed these opcodes to use S, T, U instead of just S.
333 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
334 exist on the i860.
335 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
336 (pfeq.ss, pfeq.dd): New opcodes.
337 (st.s): Fixed incorrect mask bits.
338 (fmlow): Fixed incorrect mask bits.
339 (fzchkl, pfzchkl): Fixed incorrect mask bits.
340 (faddz, pfaddz): Fixed incorrect mask bits.
341 (form, pform): Fixed incorrect mask bits.
342 (pfld.l): Fixed incorrect mask bits.
343 (fst.q): Fixed incorrect mask bits.
344 (all floating point opcodes): Fixed incorrect mask bits for
345 handling of dual bit.
346
347 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
348
349 cris.h: New file.
350
351 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
352
353 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
354 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
355 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
356 (AVR_ISA_M83): Define for ATmega83, ATmega85.
357 (espm): Remove, because ESPM removed in databook update.
358 (eicall, eijmp): Move to the end of opcode table.
359
360 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
361
362 * m68hc11.h: New file for support of Motorola 68hc11.
363
364 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
365
366 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
367
368 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
369
370 * avr.h: New file with AVR opcodes.
371
372 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
373
374 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
375
376 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
377
378 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
379
380 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
381
382 * i386.h: Use sl_FP, not sl_Suf for fild.
383
384 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
385
386 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
387 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
388 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
389 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
390
391 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
392
393 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
394
395 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
396 Alexander Sokolov <robocop@netlink.ru>
397
398 * i386.h (i386_optab): Add cpu_flags for all instructions.
399
400 2000-05-13 Alan Modra <alan@linuxcare.com.au>
401
402 From Gavin Romig-Koch <gavin@cygnus.com>
403 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
404
405 2000-05-04 Timothy Wall <twall@cygnus.com>
406
407 * tic54x.h: New.
408
409 2000-05-03 J.T. Conklin <jtc@redback.com>
410
411 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
412 (PPC_OPERAND_VR): New operand flag for vector registers.
413
414 2000-05-01 Kazu Hirata <kazu@hxi.com>
415
416 * h8300.h (EOP): Add missing initializer.
417
418 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
419
420 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
421 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
422 New operand types l,y,&,fe,fE,fx added to support above forms.
423 (pa_opcodes): Replaced usage of 'x' as source/target for
424 floating point double-word loads/stores with 'fx'.
425
426 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
427 David Mosberger <davidm@hpl.hp.com>
428 Timothy Wall <twall@cygnus.com>
429 Jim Wilson <wilson@cygnus.com>
430
431 * ia64.h: New file.
432
433 2000-03-27 Nick Clifton <nickc@cygnus.com>
434
435 * d30v.h (SHORT_A1): Fix value.
436 (SHORT_AR): Renumber so that it is at the end of the list of short
437 instructions, not the end of the list of long instructions.
438
439 2000-03-26 Alan Modra <alan@linuxcare.com>
440
441 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
442 problem isn't really specific to Unixware.
443 (OLDGCC_COMPAT): Define.
444 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
445 destination %st(0).
446 Fix lots of comments.
447
448 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
449
450 * d30v.h:
451 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
452 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
453 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
454 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
455 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
456 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
457 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
458
459 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
460
461 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
462 fistpd without suffix.
463
464 2000-02-24 Nick Clifton <nickc@cygnus.com>
465
466 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
467 'signed_overflow_ok_p'.
468 Delete prototypes for cgen_set_flags() and cgen_get_flags().
469
470 2000-02-24 Andrew Haley <aph@cygnus.com>
471
472 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
473 (CGEN_CPU_TABLE): flags: new field.
474 Add prototypes for new functions.
475
476 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
477
478 * i386.h: Add some more UNIXWARE_COMPAT comments.
479
480 2000-02-23 Linas Vepstas <linas@linas.org>
481
482 * i370.h: New file.
483
484 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
485
486 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
487 cannot be combined in parallel with ADD/SUBppp.
488
489 2000-02-22 Andrew Haley <aph@cygnus.com>
490
491 * mips.h: (OPCODE_IS_MEMBER): Add comment.
492
493 1999-12-30 Andrew Haley <aph@cygnus.com>
494
495 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
496 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
497 insns.
498
499 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
500
501 * i386.h: Qualify intel mode far call and jmp with x_Suf.
502
503 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
504
505 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
506 indirect jumps and calls. Add FF/3 call for intel mode.
507
508 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
509
510 * mn10300.h: Add new operand types. Add new instruction formats.
511
512 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
513
514 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
515 instruction.
516
517 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
518
519 * mips.h (INSN_ISA5): New.
520
521 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
522
523 * mips.h (OPCODE_IS_MEMBER): New.
524
525 1999-10-29 Nick Clifton <nickc@cygnus.com>
526
527 * d30v.h (SHORT_AR): Define.
528
529 1999-10-18 Michael Meissner <meissner@cygnus.com>
530
531 * alpha.h (alpha_num_opcodes): Convert to unsigned.
532 (alpha_num_operands): Ditto.
533
534 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
535
536 * hppa.h (pa_opcodes): Add load and store cache control to
537 instructions. Add ordered access load and store.
538
539 * hppa.h (pa_opcode): Add new entries for addb and addib.
540
541 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
542
543 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
544
545 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
546
547 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
548
549 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
550
551 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
552 and "be" using completer prefixes.
553
554 * hppa.h (pa_opcodes): Add initializers to silence compiler.
555
556 * hppa.h: Update comments about character usage.
557
558 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
559
560 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
561 up the new fstw & bve instructions.
562
563 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
564
565 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
566 instructions.
567
568 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
569
570 * hppa.h (pa_opcodes): Add long offset double word load/store
571 instructions.
572
573 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
574 stores.
575
576 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
577
578 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
579
580 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
581
582 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
583
584 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
585
586 * hppa.h (pa_opcodes): Add support for "b,l".
587
588 * hppa.h (pa_opcodes): Add support for "b,gate".
589
590 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
591
592 * hppa.h (pa_opcodes): Use 'fX' for first register operand
593 in xmpyu.
594
595 * hppa.h (pa_opcodes): Fix mask for probe and probei.
596
597 * hppa.h (pa_opcodes): Fix mask for depwi.
598
599 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
600
601 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
602 an explicit output argument.
603
604 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
605
606 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
607 Add a few PA2.0 loads and store variants.
608
609 1999-09-04 Steve Chamberlain <sac@pobox.com>
610
611 * pj.h: New file.
612
613 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
614
615 * i386.h (i386_regtab): Move %st to top of table, and split off
616 other fp reg entries.
617 (i386_float_regtab): To here.
618
619 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
620
621 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
622 by 'f'.
623
624 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
625 Add supporting args.
626
627 * hppa.h: Document new completers and args.
628 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
629 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
630 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
631 pmenb and pmdis.
632
633 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
634 hshr, hsub, mixh, mixw, permh.
635
636 * hppa.h (pa_opcodes): Change completers in instructions to
637 use 'c' prefix.
638
639 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
640 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
641
642 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
643 fnegabs to use 'I' instead of 'F'.
644
645 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
646
647 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
648 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
649 Alphabetically sort PIII insns.
650
651 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
652
653 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
654
655 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
656
657 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
658 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
659
660 * hppa.h: Document 64 bit condition completers.
661
662 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
663
664 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
665
666 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
667
668 * i386.h (i386_optab): Add DefaultSize modifier to all insns
669 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
670 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
671
672 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
673 Jeff Law <law@cygnus.com>
674
675 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
676
677 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
678
679 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
680 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
681
682 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
683
684 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
685
686 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
687
688 * hppa.h (struct pa_opcode): Add new field "flags".
689 (FLAGS_STRICT): Define.
690
691 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
692 Jeff Law <law@cygnus.com>
693
694 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
695
696 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
697
698 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
699
700 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
701 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
702 flag to fcomi and friends.
703
704 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
705
706 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
707 integer logical instructions.
708
709 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
710
711 * m68k.h: Document new formats `E', `G', `H' and new places `N',
712 `n', `o'.
713
714 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
715 and new places `m', `M', `h'.
716
717 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
718
719 * hppa.h (pa_opcodes): Add several processor specific system
720 instructions.
721
722 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
723
724 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
725 "addb", and "addib" to be used by the disassembler.
726
727 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
728
729 * i386.h (ReverseModrm): Remove all occurences.
730 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
731 movmskps, pextrw, pmovmskb, maskmovq.
732 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
733 ignore the data size prefix.
734
735 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
736 Mostly stolen from Doug Ledford <dledford@redhat.com>
737
738 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
739
740 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
741
742 1999-04-14 Doug Evans <devans@casey.cygnus.com>
743
744 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
745 (CGEN_ATTR_TYPE): Update.
746 (CGEN_ATTR_MASK): Number booleans starting at 0.
747 (CGEN_ATTR_VALUE): Update.
748 (CGEN_INSN_ATTR): Update.
749
750 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
751
752 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
753 instructions.
754
755 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
756
757 * hppa.h (bb, bvb): Tweak opcode/mask.
758
759
760 1999-03-22 Doug Evans <devans@casey.cygnus.com>
761
762 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
763 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
764 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
765 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
766 Delete member max_insn_size.
767 (enum cgen_cpu_open_arg): New enum.
768 (cpu_open): Update prototype.
769 (cpu_open_1): Declare.
770 (cgen_set_cpu): Delete.
771
772 1999-03-11 Doug Evans <devans@casey.cygnus.com>
773
774 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
775 (CGEN_OPERAND_NIL): New macro.
776 (CGEN_OPERAND): New member `type'.
777 (@arch@_cgen_operand_table): Delete decl.
778 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
779 (CGEN_OPERAND_TABLE): New struct.
780 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
781 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
782 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
783 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
784 {get,set}_{int,vma}_operand.
785 (@arch@_cgen_cpu_open): New arg `isa'.
786 (cgen_set_cpu): Ditto.
787
788 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
789
790 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
791
792 1999-02-25 Doug Evans <devans@casey.cygnus.com>
793
794 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
795 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
796 enum cgen_hw_type.
797 (CGEN_HW_TABLE): New struct.
798 (hw_table): Delete declaration.
799 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
800 to table entry to enum.
801 (CGEN_OPINST): Ditto.
802 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
803
804 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
805
806 * alpha.h (AXP_OPCODE_EV6): New.
807 (AXP_OPCODE_NOPAL): Include it.
808
809 1999-02-09 Doug Evans <devans@casey.cygnus.com>
810
811 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
812 All uses updated. New members int_insn_p, max_insn_size,
813 parse_operand,insert_operand,extract_operand,print_operand,
814 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
815 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
816 extract_handlers,print_handlers.
817 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
818 (CGEN_ATTR_BOOL_OFFSET): New macro.
819 (CGEN_ATTR_MASK): Subtract it to compute bit number.
820 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
821 (cgen_opcode_handler): Renamed from cgen_base.
822 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
823 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
824 all uses updated.
825 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
826 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
827 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
828 (CGEN_OPCODE,CGEN_IBASE): New types.
829 (CGEN_INSN): Rewrite.
830 (CGEN_{ASM,DIS}_HASH*): Delete.
831 (init_opcode_table,init_ibld_table): Declare.
832 (CGEN_INSN_ATTR): New type.
833
834 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
835
836 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
837 (x_FP, d_FP, dls_FP, sldx_FP): Define.
838 Change *Suf definitions to include x and d suffixes.
839 (movsx): Use w_Suf and b_Suf.
840 (movzx): Likewise.
841 (movs): Use bwld_Suf.
842 (fld): Change ordering. Use sld_FP.
843 (fild): Add Intel Syntax equivalent of fildq.
844 (fst): Use sld_FP.
845 (fist): Use sld_FP.
846 (fstp): Use sld_FP. Add x_FP version.
847 (fistp): LLongMem version for Intel Syntax.
848 (fcom, fcomp): Use sld_FP.
849 (fadd, fiadd, fsub): Use sld_FP.
850 (fsubr): Use sld_FP.
851 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
852
853 1999-01-27 Doug Evans <devans@casey.cygnus.com>
854
855 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
856 CGEN_MODE_UINT.
857
858 1999-01-16 Jeffrey A Law (law@cygnus.com)
859
860 * hppa.h (bv): Fix mask.
861
862 1999-01-05 Doug Evans <devans@casey.cygnus.com>
863
864 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
865 (CGEN_ATTR): Use it.
866 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
867 (CGEN_ATTR_TABLE): New member dfault.
868
869 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
870
871 * mips.h (MIPS16_INSN_BRANCH): New.
872
873 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
874
875 The following is part of a change made by Edith Epstein
876 <eepstein@sophia.cygnus.com> as part of a project to merge in
877 changes by HP; HP did not create ChangeLog entries.
878
879 * hppa.h (completer_chars): list of chars to not put a space
880 after.
881
882 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
883
884 * i386.h (i386_optab): Permit w suffix on processor control and
885 status word instructions.
886
887 1998-11-30 Doug Evans <devans@casey.cygnus.com>
888
889 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
890 (struct cgen_keyword_entry): Ditto.
891 (struct cgen_operand): Ditto.
892 (CGEN_IFLD): New typedef, with associated access macros.
893 (CGEN_IFMT): New typedef, with associated access macros.
894 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
895 (CGEN_IVALUE): New typedef.
896 (struct cgen_insn): Delete const on syntax,attrs members.
897 `format' now points to format data. Type of `value' is now
898 CGEN_IVALUE.
899 (struct cgen_opcode_table): New member ifld_table.
900
901 1998-11-18 Doug Evans <devans@casey.cygnus.com>
902
903 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
904 (CGEN_OPERAND_INSTANCE): New member `attrs'.
905 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
906 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
907 (cgen_opcode_table): Update type of dis_hash fn.
908 (extract_operand): Update type of `insn_value' arg.
909
910 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
911
912 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
913
914 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
915
916 * mips.h (INSN_MULT): Added.
917
918 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
919
920 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
921
922 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
923
924 * cgen.h (CGEN_INSN_INT): New typedef.
925 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
926 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
927 (CGEN_INSN_BYTES_PTR): New typedef.
928 (CGEN_EXTRACT_INFO): New typedef.
929 (cgen_insert_fn,cgen_extract_fn): Update.
930 (cgen_opcode_table): New member `insn_endian'.
931 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
932 (insert_operand,extract_operand): Update.
933 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
934
935 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
936
937 * cgen.h (CGEN_ATTR_BOOLS): New macro.
938 (struct CGEN_HW_ENTRY): New member `attrs'.
939 (CGEN_HW_ATTR): New macro.
940 (struct CGEN_OPERAND_INSTANCE): New member `name'.
941 (CGEN_INSN_INVALID_P): New macro.
942
943 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
944
945 * hppa.h: Add "fid".
946
947 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
948
949 From Robert Andrew Dale <rob@nb.net>
950 * i386.h (i386_optab): Add AMD 3DNow! instructions.
951 (AMD_3DNOW_OPCODE): Define.
952
953 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
954
955 * d30v.h (EITHER_BUT_PREFER_MU): Define.
956
957 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
958
959 * cgen.h (cgen_insn): #if 0 out element `cdx'.
960
961 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
962
963 Move all global state data into opcode table struct, and treat
964 opcode table as something that is "opened/closed".
965 * cgen.h (CGEN_OPCODE_DESC): New type.
966 (all fns): New first arg of opcode table descriptor.
967 (cgen_set_parse_operand_fn): Add prototype.
968 (cgen_current_machine,cgen_current_endian): Delete.
969 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
970 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
971 dis_hash_table,dis_hash_table_entries.
972 (opcode_open,opcode_close): Add prototypes.
973
974 * cgen.h (cgen_insn): New element `cdx'.
975
976 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
977
978 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
979
980 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
981
982 * mn10300.h: Add "no_match_operands" field for instructions.
983 (MN10300_MAX_OPERANDS): Define.
984
985 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
986
987 * cgen.h (cgen_macro_insn_count): Declare.
988
989 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
990
991 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
992 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
993 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
994 set_{int,vma}_operand.
995
996 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
997
998 * mn10300.h: Add "machine" field for instructions.
999 (MN103, AM30): Define machine types.
1000
1001 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1002
1003 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1004
1005 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1006
1007 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1008
1009 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1010
1011 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1012 and ud2b.
1013 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1014 those that happen to be implemented on pentiums.
1015
1016 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1017
1018 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1019 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1020 with Size16|IgnoreSize or Size32|IgnoreSize.
1021
1022 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1023
1024 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1025 (REPE): Rename to REPE_PREFIX_OPCODE.
1026 (i386_regtab_end): Remove.
1027 (i386_prefixtab, i386_prefixtab_end): Remove.
1028 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1029 of md_begin.
1030 (MAX_OPCODE_SIZE): Define.
1031 (i386_optab_end): Remove.
1032 (sl_Suf): Define.
1033 (sl_FP): Use sl_Suf.
1034
1035 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1036 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1037 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1038 data32, dword, and adword prefixes.
1039 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1040 regs.
1041
1042 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1043
1044 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1045
1046 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1047 register operands, because this is a common idiom. Flag them with
1048 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1049 fdivrp because gcc erroneously generates them. Also flag with a
1050 warning.
1051
1052 * i386.h: Add suffix modifiers to most insns, and tighter operand
1053 checks in some cases. Fix a number of UnixWare compatibility
1054 issues with float insns. Merge some floating point opcodes, using
1055 new FloatMF modifier.
1056 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1057 consistency.
1058
1059 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1060 IgnoreDataSize where appropriate.
1061
1062 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1063
1064 * i386.h: (one_byte_segment_defaults): Remove.
1065 (two_byte_segment_defaults): Remove.
1066 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1067
1068 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1069
1070 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1071 (cgen_hw_lookup_by_num): Declare.
1072
1073 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1074
1075 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1076 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1077
1078 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1079
1080 * cgen.h (cgen_asm_init_parse): Delete.
1081 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1082 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1083
1084 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1085
1086 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1087 (cgen_asm_finish_insn): Update prototype.
1088 (cgen_insn): New members num, data.
1089 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1090 dis_hash, dis_hash_table_size moved to ...
1091 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1092 All uses updated. New members asm_hash_p, dis_hash_p.
1093 (CGEN_MINSN_EXPANSION): New struct.
1094 (cgen_expand_macro_insn): Declare.
1095 (cgen_macro_insn_count): Declare.
1096 (get_insn_operands): Update prototype.
1097 (lookup_get_insn_operands): Declare.
1098
1099 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1100
1101 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1102 regKludge. Add operands types for string instructions.
1103
1104 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1105
1106 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1107 table.
1108
1109 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1110
1111 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1112 for `gettext'.
1113
1114 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1115
1116 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1117 Add IsString flag to string instructions.
1118 (IS_STRING): Don't define.
1119 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1120 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1121 (SS_PREFIX_OPCODE): Define.
1122
1123 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1124
1125 * i386.h: Revert March 24 patch; no more LinearAddress.
1126
1127 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1128
1129 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1130 instructions, and instead add FWait opcode modifier. Add short
1131 form of fldenv and fstenv.
1132 (FWAIT_OPCODE): Define.
1133
1134 * i386.h (i386_optab): Change second operand constraint of `mov
1135 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1136 allow legal instructions such as `movl %gs,%esi'
1137
1138 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1139
1140 * h8300.h: Various changes to fully bracket initializers.
1141
1142 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1143
1144 * i386.h: Set LinearAddress for lidt and lgdt.
1145
1146 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1147
1148 * cgen.h (CGEN_BOOL_ATTR): New macro.
1149
1150 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1151
1152 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1153
1154 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1155
1156 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1157 (cgen_insn): Record syntax and format entries here, rather than
1158 separately.
1159
1160 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1161
1162 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1163
1164 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1165
1166 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1167 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1168 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1169
1170 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1171
1172 * cgen.h (lookup_insn): New argument alias_p.
1173
1174 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1175
1176 Fix rac to accept only a0:
1177 * d10v.h (OPERAND_ACC): Split into:
1178 (OPERAND_ACC0, OPERAND_ACC1) .
1179 (OPERAND_GPR): Define.
1180
1181 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1182
1183 * cgen.h (CGEN_FIELDS): Define here.
1184 (CGEN_HW_ENTRY): New member `type'.
1185 (hw_list): Delete decl.
1186 (enum cgen_mode): Declare.
1187 (CGEN_OPERAND): New member `hw'.
1188 (enum cgen_operand_instance_type): Declare.
1189 (CGEN_OPERAND_INSTANCE): New type.
1190 (CGEN_INSN): New member `operands'.
1191 (CGEN_OPCODE_DATA): Make hw_list const.
1192 (get_insn_operands,lookup_insn): Add prototypes for.
1193
1194 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1195
1196 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1197 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1198 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1199 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1200
1201 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1202
1203 * cgen.h: Correct typo in comment end marker.
1204
1205 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1206
1207 * tic30.h: New file.
1208
1209 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1210
1211 * cgen.h: Add prototypes for cgen_save_fixups(),
1212 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1213 of cgen_asm_finish_insn() to return a char *.
1214
1215 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1216
1217 * cgen.h: Formatting changes to improve readability.
1218
1219 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1220
1221 * cgen.h (*): Clean up pass over `struct foo' usage.
1222 (CGEN_ATTR): Make unsigned char.
1223 (CGEN_ATTR_TYPE): Update.
1224 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1225 (cgen_base): Move member `attrs' to cgen_insn.
1226 (CGEN_KEYWORD): New member `null_entry'.
1227 (CGEN_{SYNTAX,FORMAT}): New types.
1228 (cgen_insn): Format and syntax separated from each other.
1229
1230 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1231
1232 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1233 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1234 flags_{used,set} long.
1235 (d30v_operand): Make flags field long.
1236
1237 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1238
1239 * m68k.h: Fix comment describing operand types.
1240
1241 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1242
1243 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1244 everything else after down.
1245
1246 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1247
1248 * d10v.h (OPERAND_FLAG): Split into:
1249 (OPERAND_FFLAG, OPERAND_CFLAG) .
1250
1251 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1252
1253 * mips.h (struct mips_opcode): Changed comments to reflect new
1254 field usage.
1255
1256 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1257
1258 * mips.h: Added to comments a quick-ref list of all assigned
1259 operand type characters.
1260 (OP_{MASK,SH}_PERFREG): New macros.
1261
1262 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1263
1264 * sparc.h: Add '_' and '/' for v9a asr's.
1265 Patch from David Miller <davem@vger.rutgers.edu>
1266
1267 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1268
1269 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1270 area are not available in the base model (H8/300).
1271
1272 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1273
1274 * m68k.h: Remove documentation of ` operand specifier.
1275
1276 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1277
1278 * m68k.h: Document q and v operand specifiers.
1279
1280 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1281
1282 * v850.h (struct v850_opcode): Add processors field.
1283 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1284 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1285 (PROCESSOR_V850EA): New bit constants.
1286
1287 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1288
1289 Merge changes from Martin Hunt:
1290
1291 * d30v.h: Allow up to 64 control registers. Add
1292 SHORT_A5S format.
1293
1294 * d30v.h (LONG_Db): New form for delayed branches.
1295
1296 * d30v.h: (LONG_Db): New form for repeati.
1297
1298 * d30v.h (SHORT_D2B): New form.
1299
1300 * d30v.h (SHORT_A2): New form.
1301
1302 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1303 registers are used. Needed for VLIW optimization.
1304
1305 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1306
1307 * cgen.h: Move assembler interface section
1308 up so cgen_parse_operand_result is defined for cgen_parse_address.
1309 (cgen_parse_address): Update prototype.
1310
1311 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1312
1313 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1314
1315 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1316
1317 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1318 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1319 <paubert@iram.es>.
1320
1321 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1322 <paubert@iram.es>.
1323
1324 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1325 <paubert@iram.es>.
1326
1327 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1328 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1329
1330 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1331
1332 * v850.h (V850_NOT_R0): New flag.
1333
1334 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1335
1336 * v850.h (struct v850_opcode): Remove flags field.
1337
1338 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1339
1340 * v850.h (struct v850_opcode): Add flags field.
1341 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1342 fields.
1343 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1344 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1345
1346 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1347
1348 * arc.h: New file.
1349
1350 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1351
1352 * sparc.h (sparc_opcodes): Declare as const.
1353
1354 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1355
1356 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1357 uses single or double precision floating point resources.
1358 (INSN_NO_ISA, INSN_ISA1): Define.
1359 (cpu specific INSN macros): Tweak into bitmasks outside the range
1360 of INSN_ISA field.
1361
1362 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1363
1364 * i386.h: Fix pand opcode.
1365
1366 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1367
1368 * mips.h: Widen INSN_ISA and move it to a more convenient
1369 bit position. Add INSN_3900.
1370
1371 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1372
1373 * mips.h (struct mips_opcode): added new field membership.
1374
1375 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1376
1377 * i386.h (movd): only Reg32 is allowed.
1378
1379 * i386.h: add fcomp and ud2. From Wayne Scott
1380 <wscott@ichips.intel.com>.
1381
1382 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1383
1384 * i386.h: Add MMX instructions.
1385
1386 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1387
1388 * i386.h: Remove W modifier from conditional move instructions.
1389
1390 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1391
1392 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1393 with no arguments to match that generated by the UnixWare
1394 assembler.
1395
1396 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1397
1398 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1399 (cgen_parse_operand_fn): Declare.
1400 (cgen_init_parse_operand): Declare.
1401 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1402 new argument `want'.
1403 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1404 (enum cgen_parse_operand_type): New enum.
1405
1406 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1407
1408 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1409
1410 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1411
1412 * cgen.h: New file.
1413
1414 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1415
1416 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1417 fdivrp.
1418
1419 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1420
1421 * v850.h (extract): Make unsigned.
1422
1423 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1424
1425 * i386.h: Add iclr.
1426
1427 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1428
1429 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1430 take a direction bit.
1431
1432 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1433
1434 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1435
1436 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1437
1438 * sparc.h: Include <ansidecl.h>. Update function declarations to
1439 use prototypes, and to use const when appropriate.
1440
1441 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1442
1443 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1444
1445 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1446
1447 * d10v.h: Change pre_defined_registers to
1448 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1449
1450 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1451
1452 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1453 Change mips_opcodes from const array to a pointer,
1454 and change bfd_mips_num_opcodes from const int to int,
1455 so that we can increase the size of the mips opcodes table
1456 dynamically.
1457
1458 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1459
1460 * d30v.h (FLAG_X): Remove unused flag.
1461
1462 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1463
1464 * d30v.h: New file.
1465
1466 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1467
1468 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1469 (PDS_VALUE): Macro to access value field of predefined symbols.
1470 (tic80_next_predefined_symbol): Add prototype.
1471
1472 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1473
1474 * tic80.h (tic80_symbol_to_value): Change prototype to match
1475 change in function, added class parameter.
1476
1477 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1478
1479 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1480 endmask fields, which are somewhat weird in that 0 and 32 are
1481 treated exactly the same.
1482
1483 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1484
1485 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1486 rather than a constant that is 2**X. Reorder them to put bits for
1487 operands that have symbolic names in the upper bits, so they can
1488 be packed into an int where the lower bits contain the value that
1489 corresponds to that symbolic name.
1490 (predefined_symbo): Add struct.
1491 (tic80_predefined_symbols): Declare array of translations.
1492 (tic80_num_predefined_symbols): Declare size of that array.
1493 (tic80_value_to_symbol): Declare function.
1494 (tic80_symbol_to_value): Declare function.
1495
1496 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1497
1498 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1499
1500 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1501
1502 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1503 be the destination register.
1504
1505 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1506
1507 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1508 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1509 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1510 that the opcode can have two vector instructions in a single
1511 32 bit word and we have to encode/decode both.
1512
1513 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1514
1515 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1516 TIC80_OPERAND_RELATIVE for PC relative.
1517 (TIC80_OPERAND_BASEREL): New flag bit for register
1518 base relative.
1519
1520 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1521
1522 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1523
1524 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1525
1526 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1527 ":s" modifier for scaling.
1528
1529 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1530
1531 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1532 (TIC80_OPERAND_M_LI): Ditto
1533
1534 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1535
1536 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1537 (TIC80_OPERAND_CC): New define for condition code operand.
1538 (TIC80_OPERAND_CR): New define for control register operand.
1539
1540 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1541
1542 * tic80.h (struct tic80_opcode): Name changed.
1543 (struct tic80_opcode): Remove format field.
1544 (struct tic80_operand): Add insertion and extraction functions.
1545 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1546 correct ones.
1547 (FMT_*): Ditto.
1548
1549 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1550
1551 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1552 type IV instruction offsets.
1553
1554 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1555
1556 * tic80.h: New file.
1557
1558 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1559
1560 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1561
1562 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1563
1564 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1565 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1566 * v850.h: Fix comment, v850_operand not powerpc_operand.
1567
1568 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1569
1570 * mn10200.h: Flesh out structures and definitions needed by
1571 the mn10200 assembler & disassembler.
1572
1573 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1574
1575 * mips.h: Add mips16 definitions.
1576
1577 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1578
1579 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1580
1581 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1582
1583 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1584 (MN10300_OPERAND_MEMADDR): Define.
1585
1586 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1587
1588 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1589
1590 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1591
1592 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1593
1594 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1595
1596 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1597
1598 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1599
1600 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1601
1602 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1603
1604 * alpha.h: Don't include "bfd.h"; private relocation types are now
1605 negative to minimize problems with shared libraries. Organize
1606 instruction subsets by AMASK extensions and PALcode
1607 implementation.
1608 (struct alpha_operand): Move flags slot for better packing.
1609
1610 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1611
1612 * v850.h (V850_OPERAND_RELAX): New operand flag.
1613
1614 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1615
1616 * mn10300.h (FMT_*): Move operand format definitions
1617 here.
1618
1619 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1620
1621 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1622
1623 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1624
1625 * mn10300.h (mn10300_opcode): Add "format" field.
1626 (MN10300_OPERAND_*): Define.
1627
1628 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1629
1630 * mn10x00.h: Delete.
1631 * mn10200.h, mn10300.h: New files.
1632
1633 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1634
1635 * mn10x00.h: New file.
1636
1637 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1638
1639 * v850.h: Add new flag to indicate this instruction uses a PC
1640 displacement.
1641
1642 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1643
1644 * h8300.h (stmac): Add missing instruction.
1645
1646 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1647
1648 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1649 field.
1650
1651 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1652
1653 * v850.h (V850_OPERAND_EP): Define.
1654
1655 * v850.h (v850_opcode): Add size field.
1656
1657 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1658
1659 * v850.h (v850_operands): Add insert and extract fields, pointers
1660 to functions used to handle unusual operand encoding.
1661 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1662 V850_OPERAND_SIGNED): Defined.
1663
1664 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1665
1666 * v850.h (v850_operands): Add flags field.
1667 (OPERAND_REG, OPERAND_NUM): Defined.
1668
1669 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1670
1671 * v850.h: New file.
1672
1673 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1674
1675 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1676 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1677 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1678 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1679 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1680 Defined.
1681
1682 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1683
1684 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1685 a 3 bit space id instead of a 2 bit space id.
1686
1687 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1688
1689 * d10v.h: Add some additional defines to support the
1690 assembler in determining which operations can be done in parallel.
1691
1692 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1693
1694 * h8300.h (SN): Define.
1695 (eepmov.b): Renamed from "eepmov"
1696 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1697 with them.
1698
1699 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1700
1701 * d10v.h (OPERAND_SHIFT): New operand flag.
1702
1703 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1704
1705 * d10v.h: Changes for divs, parallel-only instructions, and
1706 signed numbers.
1707
1708 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1709
1710 * d10v.h (pd_reg): Define. Putting the definition here allows
1711 the assembler and disassembler to share the same struct.
1712
1713 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1714
1715 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1716 Williams <steve@icarus.com>.
1717
1718 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1719
1720 * d10v.h: New file.
1721
1722 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1723
1724 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1725
1726 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1727
1728 * m68k.h (mcf5200): New macro.
1729 Document names of coldfire control registers.
1730
1731 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1732
1733 * h8300.h (SRC_IN_DST): Define.
1734
1735 * h8300.h (UNOP3): Mark the register operand in this insn
1736 as a source operand, not a destination operand.
1737 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1738 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1739 register operand with SRC_IN_DST.
1740
1741 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1742
1743 * alpha.h: New file.
1744
1745 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1746
1747 * rs6k.h: Remove obsolete file.
1748
1749 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1750
1751 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1752 fdivp, and fdivrp. Add ffreep.
1753
1754 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1755
1756 * h8300.h: Reorder various #defines for readability.
1757 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1758 (BITOP): Accept additional (unused) argument. All callers changed.
1759 (EBITOP): Likewise.
1760 (O_LAST): Bump.
1761 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1762
1763 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1764 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1765 (BITOP, EBITOP): Handle new H8/S addressing modes for
1766 bit insns.
1767 (UNOP3): Handle new shift/rotate insns on the H8/S.
1768 (insns using exr): New instructions.
1769 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1770
1771 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1772
1773 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1774 was incorrect.
1775
1776 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1777
1778 * h8300.h (START): Remove.
1779 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1780 and mov.l insns that can be relaxed.
1781
1782 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1783
1784 * i386.h: Remove Abs32 from lcall.
1785
1786 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1787
1788 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1789 (SLCPOP): New macro.
1790 Mark X,Y opcode letters as in use.
1791
1792 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1793
1794 * sparc.h (F_FLOAT, F_FBR): Define.
1795
1796 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1797
1798 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1799 from all insns.
1800 (ABS8SRC,ABS8DST): Add ABS8MEM.
1801 (add.l): Fix reg+reg variant.
1802 (eepmov.w): Renamed from eepmovw.
1803 (ldc,stc): Fix many cases.
1804
1805 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1806
1807 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1808
1809 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1810
1811 * sparc.h (O): Mark operand letter as in use.
1812
1813 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1814
1815 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1816 Mark operand letters uU as in use.
1817
1818 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1819
1820 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1821 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1822 (SPARC_OPCODE_SUPPORTED): New macro.
1823 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1824 (F_NOTV9): Delete.
1825
1826 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1827
1828 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1829 declaration consistent with return type in definition.
1830
1831 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1832
1833 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1834
1835 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1836
1837 * i386.h (i386_regtab): Add 80486 test registers.
1838
1839 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1840
1841 * i960.h (I_HX): Define.
1842 (i960_opcodes): Add HX instruction.
1843
1844 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1845
1846 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1847 and fclex.
1848
1849 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1850
1851 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1852 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1853 (bfd_* defines): Delete.
1854 (sparc_opcode_archs): Replaces architecture_pname.
1855 (sparc_opcode_lookup_arch): Declare.
1856 (NUMOPCODES): Delete.
1857
1858 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1859
1860 * sparc.h (enum sparc_architecture): Add v9a.
1861 (ARCHITECTURES_CONFLICT_P): Update.
1862
1863 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1864
1865 * i386.h: Added Pentium Pro instructions.
1866
1867 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1868
1869 * m68k.h: Document new 'W' operand place.
1870
1871 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1872
1873 * hppa.h: Add lci and syncdma instructions.
1874
1875 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1876
1877 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1878 instructions.
1879
1880 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1881
1882 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1883 assembler's -mcom and -many switches.
1884
1885 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1886
1887 * i386.h: Fix cmpxchg8b extension opcode description.
1888
1889 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1890
1891 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1892 and register cr4.
1893
1894 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1895
1896 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1897
1898 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1899
1900 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1901
1902 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1903
1904 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1905
1906 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1907
1908 * m68kmri.h: Remove.
1909
1910 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1911 declarations. Remove F_ALIAS and flag field of struct
1912 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1913 int. Make name and args fields of struct m68k_opcode const.
1914
1915 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1916
1917 * sparc.h (F_NOTV9): Define.
1918
1919 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1920
1921 * mips.h (INSN_4010): Define.
1922
1923 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1924
1925 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1926
1927 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1928 * m68k.h: Fix argument descriptions of coprocessor
1929 instructions to allow only alterable operands where appropriate.
1930 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1931 (m68k_opcode_aliases): Add more aliases.
1932
1933 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1934
1935 * m68k.h: Added explcitly short-sized conditional branches, and a
1936 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1937 svr4-based configurations.
1938
1939 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1940
1941 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1942 * i386.h: added missing Data16/Data32 flags to a few instructions.
1943
1944 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1945
1946 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1947 (OP_MASK_BCC, OP_SH_BCC): Define.
1948 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1949 (OP_MASK_CCC, OP_SH_CCC): Define.
1950 (INSN_READ_FPR_R): Define.
1951 (INSN_RFE): Delete.
1952
1953 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1954
1955 * m68k.h (enum m68k_architecture): Deleted.
1956 (struct m68k_opcode_alias): New type.
1957 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1958 matching constraints, values and flags. As a side effect of this,
1959 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1960 as I know were never used, now may need re-examining.
1961 (numopcodes): Now const.
1962 (m68k_opcode_aliases, numaliases): New variables.
1963 (endop): Deleted.
1964 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1965 m68k_opcode_aliases; update declaration of m68k_opcodes.
1966
1967 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1968
1969 * hppa.h (delay_type): Delete unused enumeration.
1970 (pa_opcode): Replace unused delayed field with an architecture
1971 field.
1972 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1973
1974 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1975
1976 * mips.h (INSN_ISA4): Define.
1977
1978 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1979
1980 * mips.h (M_DLA_AB, M_DLI): Define.
1981
1982 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1983
1984 * hppa.h (fstwx): Fix single-bit error.
1985
1986 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1987
1988 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1989
1990 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1991
1992 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1993 debug registers. From Charles Hannum (mycroft@netbsd.org).
1994
1995 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1996
1997 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1998 i386 support:
1999 * i386.h (MOV_AX_DISP32): New macro.
2000 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2001 of several call/return instructions.
2002 (ADDR_PREFIX_OPCODE): New macro.
2003
2004 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2005
2006 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2007
2008 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2009 char.
2010 (struct vot, field `name'): ditto.
2011
2012 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2013
2014 * vax.h: Supply and properly group all values in end sentinel.
2015
2016 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2017
2018 * mips.h (INSN_ISA, INSN_4650): Define.
2019
2020 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2021
2022 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2023 systems with a separate instruction and data cache, such as the
2024 29040, these instructions take an optional argument.
2025
2026 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2027
2028 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2029 INSN_TRAP.
2030
2031 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2032
2033 * mips.h (INSN_STORE_MEMORY): Define.
2034
2035 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2036
2037 * sparc.h: Document new operand type 'x'.
2038
2039 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2040
2041 * i960.h (I_CX2): New instruction category. It includes
2042 instructions available on Cx and Jx processors.
2043 (I_JX): New instruction category, for JX-only instructions.
2044 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2045 Jx-only instructions, in I_JX category.
2046
2047 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2048
2049 * ns32k.h (endop): Made pointer const too.
2050
2051 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2052
2053 * ns32k.h: Drop Q operand type as there is no correct use
2054 for it. Add I and Z operand types which allow better checking.
2055
2056 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2057
2058 * h8300.h (xor.l) :fix bit pattern.
2059 (L_2): New size of operand.
2060 (trapa): Use it.
2061
2062 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2063
2064 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2065
2066 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2067
2068 * sparc.h: Include v9 definitions.
2069
2070 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2071
2072 * m68k.h (m68060): Defined.
2073 (m68040up, mfloat, mmmu): Include it.
2074 (struct m68k_opcode): Widen `arch' field.
2075 (m68k_opcodes): Updated for M68060. Removed comments that were
2076 instructions commented out by "JF" years ago.
2077
2078 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2079
2080 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2081 add a one-bit `flags' field.
2082 (F_ALIAS): New macro.
2083
2084 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2085
2086 * h8300.h (dec, inc): Get encoding right.
2087
2088 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2089
2090 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2091 a flag instead.
2092 (PPC_OPERAND_SIGNED): Define.
2093 (PPC_OPERAND_SIGNOPT): Define.
2094
2095 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2096
2097 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2098 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2099
2100 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2101
2102 * i386.h: Reverse last change. It'll be handled in gas instead.
2103
2104 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2105
2106 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2107 slower on the 486 and used the implicit shift count despite the
2108 explicit operand. The one-operand form is still available to get
2109 the shorter form with the implicit shift count.
2110
2111 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2112
2113 * hppa.h: Fix typo in fstws arg string.
2114
2115 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2116
2117 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2118
2119 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2120
2121 * ppc.h (PPC_OPCODE_601): Define.
2122
2123 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2124
2125 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2126 (so we can determine valid completers for both addb and addb[tf].)
2127
2128 * hppa.h (xmpyu): No floating point format specifier for the
2129 xmpyu instruction.
2130
2131 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2132
2133 * ppc.h (PPC_OPERAND_NEXT): Define.
2134 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2135 (struct powerpc_macro): Define.
2136 (powerpc_macros, powerpc_num_macros): Declare.
2137
2138 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2139
2140 * ppc.h: New file. Header file for PowerPC opcode table.
2141
2142 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2143
2144 * hppa.h: More minor template fixes for sfu and copr (to allow
2145 for easier disassembly).
2146
2147 * hppa.h: Fix templates for all the sfu and copr instructions.
2148
2149 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2150
2151 * i386.h (push): Permit Imm16 operand too.
2152
2153 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2154
2155 * h8300.h (andc): Exists in base arch.
2156
2157 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2158
2159 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2160 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2161
2162 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2163
2164 * hppa.h: Add FP quadword store instructions.
2165
2166 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2167
2168 * mips.h: (M_J_A): Added.
2169 (M_LA): Removed.
2170
2171 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2172
2173 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2174 <mellon@pepper.ncd.com>.
2175
2176 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2177
2178 * hppa.h: Immediate field in probei instructions is unsigned,
2179 not low-sign extended.
2180
2181 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2182
2183 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2184
2185 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2186
2187 * i386.h: Add "fxch" without operand.
2188
2189 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2190
2191 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2192
2193 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2194
2195 * hppa.h: Add gfw and gfr to the opcode table.
2196
2197 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2198
2199 * m88k.h: extended to handle m88110.
2200
2201 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2202
2203 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2204 addresses.
2205
2206 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2207
2208 * i960.h (i960_opcodes): Properly bracket initializers.
2209
2210 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2211
2212 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2213
2214 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2215
2216 * m68k.h (two): Protect second argument with parentheses.
2217
2218 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2219
2220 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2221 Deleted old in/out instructions in "#if 0" section.
2222
2223 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2224
2225 * i386.h (i386_optab): Properly bracket initializers.
2226
2227 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2228
2229 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2230 Jeff Law, law@cs.utah.edu).
2231
2232 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2233
2234 * i386.h (lcall): Accept Imm32 operand also.
2235
2236 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2237
2238 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2239 (M_DABS): Added.
2240
2241 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2242
2243 * mips.h (INSN_*): Changed values. Removed unused definitions.
2244 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2245 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2246 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2247 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2248 (M_*): Added new values for r6000 and r4000 macros.
2249 (ANY_DELAY): Removed.
2250
2251 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2252
2253 * mips.h: Added M_LI_S and M_LI_SS.
2254
2255 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2256
2257 * h8300.h: Get some rare mov.bs correct.
2258
2259 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2260
2261 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2262 been included.
2263
2264 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2265
2266 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2267 jump instructions, for use in disassemblers.
2268
2269 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2270
2271 * m88k.h: Make bitfields just unsigned, not unsigned long or
2272 unsigned short.
2273
2274 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2275
2276 * hppa.h: New argument type 'y'. Use in various float instructions.
2277
2278 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2279
2280 * hppa.h (break): First immediate field is unsigned.
2281
2282 * hppa.h: Add rfir instruction.
2283
2284 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2285
2286 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2287
2288 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2289
2290 * mips.h: Reworked the hazard information somewhat, and fixed some
2291 bugs in the instruction hazard descriptions.
2292
2293 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2294
2295 * m88k.h: Corrected a couple of opcodes.
2296
2297 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2298
2299 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2300 new version includes instruction hazard information, but is
2301 otherwise reasonably similar.
2302
2303 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2304
2305 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2306
2307 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2308
2309 Patches from Jeff Law, law@cs.utah.edu:
2310 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2311 Make the tables be the same for the following instructions:
2312 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2313 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2314 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2315 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2316 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2317 "fcmp", and "ftest".
2318
2319 * hppa.h: Make new and old tables the same for "break", "mtctl",
2320 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2321 Fix typo in last patch. Collapse several #ifdefs into a
2322 single #ifdef.
2323
2324 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2325 of the comments up-to-date.
2326
2327 * hppa.h: Update "free list" of letters and update
2328 comments describing each letter's function.
2329
2330 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2331
2332 * h8300.h: Lots of little fixes for the h8/300h.
2333
2334 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2335
2336 Support for H8/300-H
2337 * h8300.h: Lots of new opcodes.
2338
2339 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2340
2341 * h8300.h: checkpoint, includes H8/300-H opcodes.
2342
2343 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2344
2345 * Patches from Jeffrey Law <law@cs.utah.edu>.
2346 * hppa.h: Rework single precision FP
2347 instructions so that they correctly disassemble code
2348 PA1.1 code.
2349
2350 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2351
2352 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2353 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2354
2355 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2356
2357 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2358 gdb will define it for now.
2359
2360 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2361
2362 * sparc.h: Don't end enumerator list with comma.
2363
2364 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2365
2366 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2367 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2368 ("bc2t"): Correct typo.
2369 ("[ls]wc[023]"): Use T rather than t.
2370 ("c[0123]"): Define general coprocessor instructions.
2371
2372 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2373
2374 * m68k.h: Move split point for gcc compilation more towards
2375 middle.
2376
2377 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2378
2379 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2380 simply wrong, ics, rfi, & rfsvc were missing).
2381 Add "a" to opr_ext for "bb". Doc fix.
2382
2383 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2384
2385 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2386 * mips.h: Add casts, to suppress warnings about shifting too much.
2387 * m68k.h: Document the placement code '9'.
2388
2389 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2390
2391 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2392 allows callers to break up the large initialized struct full of
2393 opcodes into two half-sized ones. This permits GCC to compile
2394 this module, since it takes exponential space for initializers.
2395 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2396
2397 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2398
2399 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2400 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2401 initialized structs in it.
2402
2403 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2404
2405 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2406 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2407 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2408
2409 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2410
2411 * mips.h: document "i" and "j" operands correctly.
2412
2413 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2414
2415 * mips.h: Removed endianness dependency.
2416
2417 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2418
2419 * h8300.h: include info on number of cycles per instruction.
2420
2421 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2422
2423 * hppa.h: Move handy aliases to the front. Fix masks for extract
2424 and deposit instructions.
2425
2426 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2427
2428 * i386.h: accept shld and shrd both with and without the shift
2429 count argument, which is always %cl.
2430
2431 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2432
2433 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2434 (one_byte_segment_defaults, two_byte_segment_defaults,
2435 i386_prefixtab_end): Ditto.
2436
2437 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2438
2439 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2440 for operand 2; from John Carr, jfc@dsg.dec.com.
2441
2442 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2443
2444 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2445 always use 16-bit offsets. Makes calculated-size jump tables
2446 feasible.
2447
2448 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2449
2450 * i386.h: Fix one-operand forms of in* and out* patterns.
2451
2452 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2453
2454 * m68k.h: Added CPU32 support.
2455
2456 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2457
2458 * mips.h (break): Disassemble the argument. Patch from
2459 jonathan@cs.stanford.edu (Jonathan Stone).
2460
2461 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2462
2463 * m68k.h: merged Motorola and MIT syntax.
2464
2465 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2466
2467 * m68k.h (pmove): make the tests less strict, the 68k book is
2468 wrong.
2469
2470 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2471
2472 * m68k.h (m68ec030): Defined as alias for 68030.
2473 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2474 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2475 them. Tightened description of "fmovex" to distinguish it from
2476 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2477 up descriptions that claimed versions were available for chips not
2478 supporting them. Added "pmovefd".
2479
2480 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2481
2482 * m68k.h: fix where the . goes in divull
2483
2484 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2485
2486 * m68k.h: the cas2 instruction is supposed to be written with
2487 indirection on the last two operands, which can be either data or
2488 address registers. Added a new operand type 'r' which accepts
2489 either register type. Added new cases for cas2l and cas2w which
2490 use them. Corrected masks for cas2 which failed to recognize use
2491 of address register.
2492
2493 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2494
2495 * m68k.h: Merged in patches (mostly m68040-specific) from
2496 Colin Smith <colin@wrs.com>.
2497
2498 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2499 base). Also cleaned up duplicates, re-ordered instructions for
2500 the sake of dis-assembling (so aliases come after standard names).
2501 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2502
2503 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2504
2505 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2506 all missing .s
2507
2508 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2509
2510 * sparc.h: Moved tables to BFD library.
2511
2512 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2513
2514 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2515
2516 * h8300.h: Finish filling in all the holes in the opcode table,
2517 so that the Lucid C compiler can digest this as well...
2518
2519 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2520
2521 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2522 Fix opcodes on various sizes of fild/fist instructions
2523 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2524 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2525
2526 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2527
2528 * h8300.h: Fill in all the holes in the opcode table so that the
2529 losing HPUX C compiler can digest this...
2530
2531 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2532
2533 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2534 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2535
2536 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2537
2538 * sparc.h: Add new architecture variant sparclite; add its scan
2539 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2540
2541 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2542
2543 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2544 fy@lucid.com).
2545
2546 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2547
2548 * rs6k.h: New version from IBM (Metin).
2549
2550 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2551
2552 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2553 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2554
2555 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2556
2557 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2558
2559 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2560
2561 * m68k.h (one, two): Cast macro args to unsigned to suppress
2562 complaints from compiler and lint about integer overflow during
2563 shift.
2564
2565 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2566
2567 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2568
2569 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2570
2571 * mips.h: Make bitfield layout depend on the HOST compiler,
2572 not on the TARGET system.
2573
2574 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2575
2576 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2577 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2578 <TRANLE@INTELLICORP.COM>.
2579
2580 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2581
2582 * h8300.h: turned op_type enum into #define list
2583
2584 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2585
2586 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2587 similar instructions -- they've been renamed to "fitoq", etc.
2588 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2589 number of arguments.
2590 * h8300.h: Remove extra ; which produces compiler warning.
2591
2592 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2593
2594 * sparc.h: fix opcode for tsubcctv.
2595
2596 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2597
2598 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2599
2600 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2601
2602 * sparc.h (nop): Made the 'lose' field be even tighter,
2603 so only a standard 'nop' is disassembled as a nop.
2604
2605 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2606
2607 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2608 disassembled as a nop.
2609
2610 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2611
2612 * m68k.h, sparc.h: ANSIfy enums.
2613
2614 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2615
2616 * sparc.h: fix a typo.
2617
2618 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2619
2620 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2621 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2622 vax.h: Renamed from ../<foo>-opcode.h.
2623
2624 \f
2625 Local Variables:
2626 version-control: never
2627 End:
This page took 0.093779 seconds and 4 git commands to generate.