86e10696ebde697cc140114aa913e1815a67189e
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-09-04 Richard Henderson <rth@redhat.com>
2
3 * alpha.h (struct alpha_operand): Pack elements into bitfields.
4
5 2001-08-31 Eric Christopher <echristo@redhat.com>
6
7 * mips.h: Remove CPU_MIPS32_4K.
8
9 2001-08-27 Torbjorn Granlund <tege@swox.com>
10
11 * ppc.h (PPC_OPERAND_DS): Define.
12
13 2001-08-25 Andreas Jaeger <aj@suse.de>
14
15 * d30v.h: Fix declaration of reg_name_cnt.
16
17 * d10v.h: Fix declaration of d10v_reg_name_cnt.
18
19 * arc.h: Add prototypes from opcodes/arc-opc.c.
20
21 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
22
23 * mips.h (INSN_10000): Define.
24 (OPCODE_IS_MEMBER): Check for INSN_10000.
25
26 2001-08-10 Alan Modra <amodra@one.net.au>
27
28 * ppc.h: Revert 2001-08-08.
29
30 2001-08-08 Alan Modra <amodra@one.net.au>
31
32 1999-10-25 Torbjorn Granlund <tege@swox.com>
33 * ppc.h (struct powerpc_operand): New field `reloc'.
34
35 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
36
37 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
38 (cgen_cpu_desc): Ditto.
39
40 2001-07-07 Ben Elliston <bje@redhat.com>
41
42 * m88k.h: Clean up and reformat. Remove unused code.
43
44 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
45
46 * cgen.h (cgen_keyword): Add nonalpha_chars field.
47
48 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
49
50 * mips.h (CPU_R12000): Define.
51
52 2001-05-23 John Healy <jhealy@redhat.com>
53
54 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
55
56 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
57
58 * mips.h (INSN_ISA_MASK): Define.
59
60 2001-05-12 Alan Modra <amodra@one.net.au>
61
62 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
63 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
64 and use InvMem as these insns must have register operands.
65
66 2001-05-04 Alan Modra <amodra@one.net.au>
67
68 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
69 and pextrw to swap reg/rm assignments.
70
71 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
72
73 * cris.h (enum cris_insn_version_usage): Correct comment for
74 cris_ver_v3p.
75
76 2001-03-24 Alan Modra <alan@linuxcare.com.au>
77
78 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
79 Add InvMem to first operand of "maskmovdqu".
80
81 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
82
83 * cris.h (ADD_PC_INCR_OPCODE): New macro.
84
85 2001-03-21 Kazu Hirata <kazu@hxi.com>
86
87 * h8300.h: Fix formatting.
88
89 2001-03-22 Alan Modra <alan@linuxcare.com.au>
90
91 * i386.h (i386_optab): Add paddq, psubq.
92
93 2001-03-19 Alan Modra <alan@linuxcare.com.au>
94
95 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
96
97 2001-02-28 Igor Shevlyakov <igor@windriver.com>
98
99 * m68k.h: new defines for Coldfire V4. Update mcf to know
100 about mcf5407.
101
102 2001-02-18 lars brinkhoff <lars@nocrew.org>
103
104 * pdp11.h: New file.
105
106 2001-02-12 Jan Hubicka <jh@suse.cz>
107
108 * i386.h (i386_optab): SSE integer converison instructions have
109 64bit versions on x86-64.
110
111 2001-02-10 Nick Clifton <nickc@redhat.com>
112
113 * mips.h: Remove extraneous whitespace. Formating change to allow
114 for future contribution.
115
116 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
117
118 * s390.h: New file.
119
120 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
121
122 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
123 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
124 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
125
126 2001-01-24 Karsten Keil <kkeil@suse.de>
127
128 * i386.h (i386_optab): Fix swapgs
129
130 2001-01-14 Alan Modra <alan@linuxcare.com.au>
131
132 * hppa.h: Describe new '<' and '>' operand types, and tidy
133 existing comments.
134 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
135 Remove duplicate "ldw j(s,b),x". Sort some entries.
136
137 2001-01-13 Jan Hubicka <jh@suse.cz>
138
139 * i386.h (i386_optab): Fix pusha and ret templates.
140
141 2001-01-11 Peter Targett <peter.targett@arccores.com>
142
143 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
144 definitions for masking cpu type.
145 (arc_ext_operand_value) New structure for storing extended
146 operands.
147 (ARC_OPERAND_*) Flags for operand values.
148
149 2001-01-10 Jan Hubicka <jh@suse.cz>
150
151 * i386.h (pinsrw): Add.
152 (pshufw): Remove.
153 (cvttpd2dq): Fix operands.
154 (cvttps2dq): Likewise.
155 (movq2q): Rename to movdq2q.
156
157 2001-01-10 Richard Schaal <richard.schaal@intel.com>
158
159 * i386.h: Correct movnti instruction.
160
161 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
162
163 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
164 of operands (unsigned char or unsigned short).
165 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
166 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
167
168 2001-01-05 Jan Hubicka <jh@suse.cz>
169
170 * i386.h (i386_optab): Make [sml]fence template to use immext field.
171
172 2001-01-03 Jan Hubicka <jh@suse.cz>
173
174 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
175 introduced by Pentium4
176
177 2000-12-30 Jan Hubicka <jh@suse.cz>
178
179 * i386.h (i386_optab): Add "rex*" instructions;
180 add swapgs; disable jmp/call far direct instructions for
181 64bit mode; add syscall and sysret; disable registers for 0xc6
182 template. Add 'q' suffixes to extendable instructions, disable
183 obsolete instructions, add new sign/zero extension ones.
184 (i386_regtab): Add extended registers.
185 (*Suf): Add No_qSuf.
186 (q_Suf, wlq_Suf, bwlq_Suf): New.
187
188 2000-12-20 Jan Hubicka <jh@suse.cz>
189
190 * i386.h (i386_optab): Replace "Imm" with "EncImm".
191 (i386_regtab): Add flags field.
192
193 2000-12-12 Nick Clifton <nickc@redhat.com>
194
195 * mips.h: Fix formatting.
196
197 2000-12-01 Chris Demetriou <cgd@sibyte.com>
198
199 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
200 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
201 OP_*_SYSCALL definitions.
202 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
203 19 bit wait codes.
204 (MIPS operand specifier comments): Remove 'm', add 'U' and
205 'J', and update the meaning of 'B' so that it's more general.
206
207 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
208 INSN_ISA5): Renumber, redefine to mean the ISA at which the
209 instruction was added.
210 (INSN_ISA32): New constant.
211 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
212 Renumber to avoid new and/or renumbered INSN_* constants.
213 (INSN_MIPS32): Delete.
214 (ISA_UNKNOWN): New constant to indicate unknown ISA.
215 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
216 ISA_MIPS32): New constants, defined to be the mask of INSN_*
217 constants available at that ISA level.
218 (CPU_UNKNOWN): New constant to indicate unknown CPU.
219 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
220 define it with a unique value.
221 (OPCODE_IS_MEMBER): Update for new ISA membership-related
222 constant meanings.
223
224 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
225 definitions.
226
227 * mips.h (CPU_SB1): New constant.
228
229 2000-10-20 Jakub Jelinek <jakub@redhat.com>
230
231 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
232 Note that '3' is used for siam operand.
233
234 2000-09-22 Jim Wilson <wilson@cygnus.com>
235
236 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
237
238 2000-09-13 Anders Norlander <anorland@acc.umu.se>
239
240 * mips.h: Use defines instead of hard-coded processor numbers.
241 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
242 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
243 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
244 CPU_4KC, CPU_4KM, CPU_4KP): Define..
245 (OPCODE_IS_MEMBER): Use new defines.
246 (OP_MASK_SEL, OP_SH_SEL): Define.
247 (OP_MASK_CODE20, OP_SH_CODE20): Define.
248 Add 'P' to used characters.
249 Use 'H' for coprocessor select field.
250 Use 'm' for 20 bit breakpoint code.
251 Document new arg characters and add to used characters.
252 (INSN_MIPS32): New define for MIPS32 extensions.
253 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
254
255 2000-09-05 Alan Modra <alan@linuxcare.com.au>
256
257 * hppa.h: Mention cz completer.
258
259 2000-08-16 Jim Wilson <wilson@cygnus.com>
260
261 * ia64.h (IA64_OPCODE_POSTINC): New.
262
263 2000-08-15 H.J. Lu <hjl@gnu.org>
264
265 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
266 IgnoreSize change.
267
268 2000-08-08 Jason Eckhardt <jle@cygnus.com>
269
270 * i860.h: Small formatting adjustments.
271
272 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
273
274 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
275 Move related opcodes closer to each other.
276 Minor changes in comments, list undefined opcodes.
277
278 2000-07-26 Dave Brolley <brolley@redhat.com>
279
280 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
281
282 2000-07-22 Jason Eckhardt <jle@cygnus.com>
283
284 * i860.h (btne, bte, bla): Changed these opcodes
285 to use sbroff ('r') instead of split16 ('s').
286 (J, K, L, M): New operand types for 16-bit aligned fields.
287 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
288 use I, J, K, L, M instead of just I.
289 (T, U): New operand types for split 16-bit aligned fields.
290 (st.x): Changed these opcodes to use S, T, U instead of just S.
291 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
292 exist on the i860.
293 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
294 (pfeq.ss, pfeq.dd): New opcodes.
295 (st.s): Fixed incorrect mask bits.
296 (fmlow): Fixed incorrect mask bits.
297 (fzchkl, pfzchkl): Fixed incorrect mask bits.
298 (faddz, pfaddz): Fixed incorrect mask bits.
299 (form, pform): Fixed incorrect mask bits.
300 (pfld.l): Fixed incorrect mask bits.
301 (fst.q): Fixed incorrect mask bits.
302 (all floating point opcodes): Fixed incorrect mask bits for
303 handling of dual bit.
304
305 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
306
307 cris.h: New file.
308
309 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
310
311 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
312 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
313 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
314 (AVR_ISA_M83): Define for ATmega83, ATmega85.
315 (espm): Remove, because ESPM removed in databook update.
316 (eicall, eijmp): Move to the end of opcode table.
317
318 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
319
320 * m68hc11.h: New file for support of Motorola 68hc11.
321
322 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
323
324 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
325
326 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
327
328 * avr.h: New file with AVR opcodes.
329
330 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
331
332 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
333
334 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
335
336 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
337
338 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
339
340 * i386.h: Use sl_FP, not sl_Suf for fild.
341
342 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
343
344 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
345 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
346 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
347 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
348
349 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
350
351 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
352
353 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
354 Alexander Sokolov <robocop@netlink.ru>
355
356 * i386.h (i386_optab): Add cpu_flags for all instructions.
357
358 2000-05-13 Alan Modra <alan@linuxcare.com.au>
359
360 From Gavin Romig-Koch <gavin@cygnus.com>
361 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
362
363 2000-05-04 Timothy Wall <twall@cygnus.com>
364
365 * tic54x.h: New.
366
367 2000-05-03 J.T. Conklin <jtc@redback.com>
368
369 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
370 (PPC_OPERAND_VR): New operand flag for vector registers.
371
372 2000-05-01 Kazu Hirata <kazu@hxi.com>
373
374 * h8300.h (EOP): Add missing initializer.
375
376 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
377
378 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
379 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
380 New operand types l,y,&,fe,fE,fx added to support above forms.
381 (pa_opcodes): Replaced usage of 'x' as source/target for
382 floating point double-word loads/stores with 'fx'.
383
384 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
385 David Mosberger <davidm@hpl.hp.com>
386 Timothy Wall <twall@cygnus.com>
387 Jim Wilson <wilson@cygnus.com>
388
389 * ia64.h: New file.
390
391 2000-03-27 Nick Clifton <nickc@cygnus.com>
392
393 * d30v.h (SHORT_A1): Fix value.
394 (SHORT_AR): Renumber so that it is at the end of the list of short
395 instructions, not the end of the list of long instructions.
396
397 2000-03-26 Alan Modra <alan@linuxcare.com>
398
399 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
400 problem isn't really specific to Unixware.
401 (OLDGCC_COMPAT): Define.
402 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
403 destination %st(0).
404 Fix lots of comments.
405
406 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
407
408 * d30v.h:
409 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
410 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
411 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
412 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
413 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
414 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
415 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
416
417 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
418
419 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
420 fistpd without suffix.
421
422 2000-02-24 Nick Clifton <nickc@cygnus.com>
423
424 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
425 'signed_overflow_ok_p'.
426 Delete prototypes for cgen_set_flags() and cgen_get_flags().
427
428 2000-02-24 Andrew Haley <aph@cygnus.com>
429
430 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
431 (CGEN_CPU_TABLE): flags: new field.
432 Add prototypes for new functions.
433
434 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
435
436 * i386.h: Add some more UNIXWARE_COMPAT comments.
437
438 2000-02-23 Linas Vepstas <linas@linas.org>
439
440 * i370.h: New file.
441
442 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
443
444 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
445 cannot be combined in parallel with ADD/SUBppp.
446
447 2000-02-22 Andrew Haley <aph@cygnus.com>
448
449 * mips.h: (OPCODE_IS_MEMBER): Add comment.
450
451 1999-12-30 Andrew Haley <aph@cygnus.com>
452
453 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
454 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
455 insns.
456
457 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
458
459 * i386.h: Qualify intel mode far call and jmp with x_Suf.
460
461 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
462
463 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
464 indirect jumps and calls. Add FF/3 call for intel mode.
465
466 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
467
468 * mn10300.h: Add new operand types. Add new instruction formats.
469
470 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
471
472 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
473 instruction.
474
475 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
476
477 * mips.h (INSN_ISA5): New.
478
479 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
480
481 * mips.h (OPCODE_IS_MEMBER): New.
482
483 1999-10-29 Nick Clifton <nickc@cygnus.com>
484
485 * d30v.h (SHORT_AR): Define.
486
487 1999-10-18 Michael Meissner <meissner@cygnus.com>
488
489 * alpha.h (alpha_num_opcodes): Convert to unsigned.
490 (alpha_num_operands): Ditto.
491
492 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
493
494 * hppa.h (pa_opcodes): Add load and store cache control to
495 instructions. Add ordered access load and store.
496
497 * hppa.h (pa_opcode): Add new entries for addb and addib.
498
499 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
500
501 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
502
503 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
504
505 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
506
507 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
508
509 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
510 and "be" using completer prefixes.
511
512 * hppa.h (pa_opcodes): Add initializers to silence compiler.
513
514 * hppa.h: Update comments about character usage.
515
516 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
517
518 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
519 up the new fstw & bve instructions.
520
521 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
522
523 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
524 instructions.
525
526 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
527
528 * hppa.h (pa_opcodes): Add long offset double word load/store
529 instructions.
530
531 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
532 stores.
533
534 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
535
536 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
537
538 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
539
540 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
541
542 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
543
544 * hppa.h (pa_opcodes): Add support for "b,l".
545
546 * hppa.h (pa_opcodes): Add support for "b,gate".
547
548 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
549
550 * hppa.h (pa_opcodes): Use 'fX' for first register operand
551 in xmpyu.
552
553 * hppa.h (pa_opcodes): Fix mask for probe and probei.
554
555 * hppa.h (pa_opcodes): Fix mask for depwi.
556
557 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
558
559 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
560 an explicit output argument.
561
562 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
563
564 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
565 Add a few PA2.0 loads and store variants.
566
567 1999-09-04 Steve Chamberlain <sac@pobox.com>
568
569 * pj.h: New file.
570
571 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
572
573 * i386.h (i386_regtab): Move %st to top of table, and split off
574 other fp reg entries.
575 (i386_float_regtab): To here.
576
577 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
578
579 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
580 by 'f'.
581
582 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
583 Add supporting args.
584
585 * hppa.h: Document new completers and args.
586 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
587 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
588 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
589 pmenb and pmdis.
590
591 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
592 hshr, hsub, mixh, mixw, permh.
593
594 * hppa.h (pa_opcodes): Change completers in instructions to
595 use 'c' prefix.
596
597 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
598 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
599
600 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
601 fnegabs to use 'I' instead of 'F'.
602
603 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
604
605 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
606 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
607 Alphabetically sort PIII insns.
608
609 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
610
611 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
612
613 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
614
615 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
616 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
617
618 * hppa.h: Document 64 bit condition completers.
619
620 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
621
622 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
623
624 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
625
626 * i386.h (i386_optab): Add DefaultSize modifier to all insns
627 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
628 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
629
630 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
631 Jeff Law <law@cygnus.com>
632
633 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
634
635 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
636
637 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
638 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
639
640 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
641
642 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
643
644 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
645
646 * hppa.h (struct pa_opcode): Add new field "flags".
647 (FLAGS_STRICT): Define.
648
649 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
650 Jeff Law <law@cygnus.com>
651
652 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
653
654 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
655
656 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
657
658 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
659 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
660 flag to fcomi and friends.
661
662 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
663
664 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
665 integer logical instructions.
666
667 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
668
669 * m68k.h: Document new formats `E', `G', `H' and new places `N',
670 `n', `o'.
671
672 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
673 and new places `m', `M', `h'.
674
675 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
676
677 * hppa.h (pa_opcodes): Add several processor specific system
678 instructions.
679
680 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
681
682 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
683 "addb", and "addib" to be used by the disassembler.
684
685 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
686
687 * i386.h (ReverseModrm): Remove all occurences.
688 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
689 movmskps, pextrw, pmovmskb, maskmovq.
690 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
691 ignore the data size prefix.
692
693 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
694 Mostly stolen from Doug Ledford <dledford@redhat.com>
695
696 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
697
698 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
699
700 1999-04-14 Doug Evans <devans@casey.cygnus.com>
701
702 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
703 (CGEN_ATTR_TYPE): Update.
704 (CGEN_ATTR_MASK): Number booleans starting at 0.
705 (CGEN_ATTR_VALUE): Update.
706 (CGEN_INSN_ATTR): Update.
707
708 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
709
710 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
711 instructions.
712
713 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
714
715 * hppa.h (bb, bvb): Tweak opcode/mask.
716
717
718 1999-03-22 Doug Evans <devans@casey.cygnus.com>
719
720 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
721 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
722 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
723 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
724 Delete member max_insn_size.
725 (enum cgen_cpu_open_arg): New enum.
726 (cpu_open): Update prototype.
727 (cpu_open_1): Declare.
728 (cgen_set_cpu): Delete.
729
730 1999-03-11 Doug Evans <devans@casey.cygnus.com>
731
732 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
733 (CGEN_OPERAND_NIL): New macro.
734 (CGEN_OPERAND): New member `type'.
735 (@arch@_cgen_operand_table): Delete decl.
736 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
737 (CGEN_OPERAND_TABLE): New struct.
738 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
739 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
740 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
741 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
742 {get,set}_{int,vma}_operand.
743 (@arch@_cgen_cpu_open): New arg `isa'.
744 (cgen_set_cpu): Ditto.
745
746 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
747
748 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
749
750 1999-02-25 Doug Evans <devans@casey.cygnus.com>
751
752 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
753 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
754 enum cgen_hw_type.
755 (CGEN_HW_TABLE): New struct.
756 (hw_table): Delete declaration.
757 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
758 to table entry to enum.
759 (CGEN_OPINST): Ditto.
760 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
761
762 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
763
764 * alpha.h (AXP_OPCODE_EV6): New.
765 (AXP_OPCODE_NOPAL): Include it.
766
767 1999-02-09 Doug Evans <devans@casey.cygnus.com>
768
769 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
770 All uses updated. New members int_insn_p, max_insn_size,
771 parse_operand,insert_operand,extract_operand,print_operand,
772 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
773 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
774 extract_handlers,print_handlers.
775 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
776 (CGEN_ATTR_BOOL_OFFSET): New macro.
777 (CGEN_ATTR_MASK): Subtract it to compute bit number.
778 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
779 (cgen_opcode_handler): Renamed from cgen_base.
780 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
781 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
782 all uses updated.
783 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
784 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
785 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
786 (CGEN_OPCODE,CGEN_IBASE): New types.
787 (CGEN_INSN): Rewrite.
788 (CGEN_{ASM,DIS}_HASH*): Delete.
789 (init_opcode_table,init_ibld_table): Declare.
790 (CGEN_INSN_ATTR): New type.
791
792 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
793
794 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
795 (x_FP, d_FP, dls_FP, sldx_FP): Define.
796 Change *Suf definitions to include x and d suffixes.
797 (movsx): Use w_Suf and b_Suf.
798 (movzx): Likewise.
799 (movs): Use bwld_Suf.
800 (fld): Change ordering. Use sld_FP.
801 (fild): Add Intel Syntax equivalent of fildq.
802 (fst): Use sld_FP.
803 (fist): Use sld_FP.
804 (fstp): Use sld_FP. Add x_FP version.
805 (fistp): LLongMem version for Intel Syntax.
806 (fcom, fcomp): Use sld_FP.
807 (fadd, fiadd, fsub): Use sld_FP.
808 (fsubr): Use sld_FP.
809 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
810
811 1999-01-27 Doug Evans <devans@casey.cygnus.com>
812
813 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
814 CGEN_MODE_UINT.
815
816 1999-01-16 Jeffrey A Law (law@cygnus.com)
817
818 * hppa.h (bv): Fix mask.
819
820 1999-01-05 Doug Evans <devans@casey.cygnus.com>
821
822 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
823 (CGEN_ATTR): Use it.
824 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
825 (CGEN_ATTR_TABLE): New member dfault.
826
827 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
828
829 * mips.h (MIPS16_INSN_BRANCH): New.
830
831 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
832
833 The following is part of a change made by Edith Epstein
834 <eepstein@sophia.cygnus.com> as part of a project to merge in
835 changes by HP; HP did not create ChangeLog entries.
836
837 * hppa.h (completer_chars): list of chars to not put a space
838 after.
839
840 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
841
842 * i386.h (i386_optab): Permit w suffix on processor control and
843 status word instructions.
844
845 1998-11-30 Doug Evans <devans@casey.cygnus.com>
846
847 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
848 (struct cgen_keyword_entry): Ditto.
849 (struct cgen_operand): Ditto.
850 (CGEN_IFLD): New typedef, with associated access macros.
851 (CGEN_IFMT): New typedef, with associated access macros.
852 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
853 (CGEN_IVALUE): New typedef.
854 (struct cgen_insn): Delete const on syntax,attrs members.
855 `format' now points to format data. Type of `value' is now
856 CGEN_IVALUE.
857 (struct cgen_opcode_table): New member ifld_table.
858
859 1998-11-18 Doug Evans <devans@casey.cygnus.com>
860
861 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
862 (CGEN_OPERAND_INSTANCE): New member `attrs'.
863 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
864 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
865 (cgen_opcode_table): Update type of dis_hash fn.
866 (extract_operand): Update type of `insn_value' arg.
867
868 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
869
870 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
871
872 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
873
874 * mips.h (INSN_MULT): Added.
875
876 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
877
878 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
879
880 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
881
882 * cgen.h (CGEN_INSN_INT): New typedef.
883 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
884 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
885 (CGEN_INSN_BYTES_PTR): New typedef.
886 (CGEN_EXTRACT_INFO): New typedef.
887 (cgen_insert_fn,cgen_extract_fn): Update.
888 (cgen_opcode_table): New member `insn_endian'.
889 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
890 (insert_operand,extract_operand): Update.
891 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
892
893 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
894
895 * cgen.h (CGEN_ATTR_BOOLS): New macro.
896 (struct CGEN_HW_ENTRY): New member `attrs'.
897 (CGEN_HW_ATTR): New macro.
898 (struct CGEN_OPERAND_INSTANCE): New member `name'.
899 (CGEN_INSN_INVALID_P): New macro.
900
901 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
902
903 * hppa.h: Add "fid".
904
905 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
906
907 From Robert Andrew Dale <rob@nb.net>
908 * i386.h (i386_optab): Add AMD 3DNow! instructions.
909 (AMD_3DNOW_OPCODE): Define.
910
911 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
912
913 * d30v.h (EITHER_BUT_PREFER_MU): Define.
914
915 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
916
917 * cgen.h (cgen_insn): #if 0 out element `cdx'.
918
919 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
920
921 Move all global state data into opcode table struct, and treat
922 opcode table as something that is "opened/closed".
923 * cgen.h (CGEN_OPCODE_DESC): New type.
924 (all fns): New first arg of opcode table descriptor.
925 (cgen_set_parse_operand_fn): Add prototype.
926 (cgen_current_machine,cgen_current_endian): Delete.
927 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
928 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
929 dis_hash_table,dis_hash_table_entries.
930 (opcode_open,opcode_close): Add prototypes.
931
932 * cgen.h (cgen_insn): New element `cdx'.
933
934 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
935
936 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
937
938 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
939
940 * mn10300.h: Add "no_match_operands" field for instructions.
941 (MN10300_MAX_OPERANDS): Define.
942
943 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
944
945 * cgen.h (cgen_macro_insn_count): Declare.
946
947 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
948
949 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
950 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
951 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
952 set_{int,vma}_operand.
953
954 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
955
956 * mn10300.h: Add "machine" field for instructions.
957 (MN103, AM30): Define machine types.
958
959 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
960
961 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
962
963 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
964
965 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
966
967 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
968
969 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
970 and ud2b.
971 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
972 those that happen to be implemented on pentiums.
973
974 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
975
976 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
977 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
978 with Size16|IgnoreSize or Size32|IgnoreSize.
979
980 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
981
982 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
983 (REPE): Rename to REPE_PREFIX_OPCODE.
984 (i386_regtab_end): Remove.
985 (i386_prefixtab, i386_prefixtab_end): Remove.
986 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
987 of md_begin.
988 (MAX_OPCODE_SIZE): Define.
989 (i386_optab_end): Remove.
990 (sl_Suf): Define.
991 (sl_FP): Use sl_Suf.
992
993 * i386.h (i386_optab): Allow 16 bit displacement for `mov
994 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
995 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
996 data32, dword, and adword prefixes.
997 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
998 regs.
999
1000 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1001
1002 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1003
1004 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1005 register operands, because this is a common idiom. Flag them with
1006 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1007 fdivrp because gcc erroneously generates them. Also flag with a
1008 warning.
1009
1010 * i386.h: Add suffix modifiers to most insns, and tighter operand
1011 checks in some cases. Fix a number of UnixWare compatibility
1012 issues with float insns. Merge some floating point opcodes, using
1013 new FloatMF modifier.
1014 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1015 consistency.
1016
1017 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1018 IgnoreDataSize where appropriate.
1019
1020 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1021
1022 * i386.h: (one_byte_segment_defaults): Remove.
1023 (two_byte_segment_defaults): Remove.
1024 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1025
1026 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1027
1028 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1029 (cgen_hw_lookup_by_num): Declare.
1030
1031 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1032
1033 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1034 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1035
1036 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1037
1038 * cgen.h (cgen_asm_init_parse): Delete.
1039 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1040 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1041
1042 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1043
1044 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1045 (cgen_asm_finish_insn): Update prototype.
1046 (cgen_insn): New members num, data.
1047 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1048 dis_hash, dis_hash_table_size moved to ...
1049 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1050 All uses updated. New members asm_hash_p, dis_hash_p.
1051 (CGEN_MINSN_EXPANSION): New struct.
1052 (cgen_expand_macro_insn): Declare.
1053 (cgen_macro_insn_count): Declare.
1054 (get_insn_operands): Update prototype.
1055 (lookup_get_insn_operands): Declare.
1056
1057 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1058
1059 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1060 regKludge. Add operands types for string instructions.
1061
1062 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1063
1064 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1065 table.
1066
1067 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1068
1069 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1070 for `gettext'.
1071
1072 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1073
1074 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1075 Add IsString flag to string instructions.
1076 (IS_STRING): Don't define.
1077 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1078 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1079 (SS_PREFIX_OPCODE): Define.
1080
1081 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1082
1083 * i386.h: Revert March 24 patch; no more LinearAddress.
1084
1085 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1086
1087 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1088 instructions, and instead add FWait opcode modifier. Add short
1089 form of fldenv and fstenv.
1090 (FWAIT_OPCODE): Define.
1091
1092 * i386.h (i386_optab): Change second operand constraint of `mov
1093 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1094 allow legal instructions such as `movl %gs,%esi'
1095
1096 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1097
1098 * h8300.h: Various changes to fully bracket initializers.
1099
1100 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1101
1102 * i386.h: Set LinearAddress for lidt and lgdt.
1103
1104 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1105
1106 * cgen.h (CGEN_BOOL_ATTR): New macro.
1107
1108 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1109
1110 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1111
1112 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1113
1114 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1115 (cgen_insn): Record syntax and format entries here, rather than
1116 separately.
1117
1118 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1119
1120 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1121
1122 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1123
1124 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1125 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1126 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1127
1128 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1129
1130 * cgen.h (lookup_insn): New argument alias_p.
1131
1132 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1133
1134 Fix rac to accept only a0:
1135 * d10v.h (OPERAND_ACC): Split into:
1136 (OPERAND_ACC0, OPERAND_ACC1) .
1137 (OPERAND_GPR): Define.
1138
1139 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1140
1141 * cgen.h (CGEN_FIELDS): Define here.
1142 (CGEN_HW_ENTRY): New member `type'.
1143 (hw_list): Delete decl.
1144 (enum cgen_mode): Declare.
1145 (CGEN_OPERAND): New member `hw'.
1146 (enum cgen_operand_instance_type): Declare.
1147 (CGEN_OPERAND_INSTANCE): New type.
1148 (CGEN_INSN): New member `operands'.
1149 (CGEN_OPCODE_DATA): Make hw_list const.
1150 (get_insn_operands,lookup_insn): Add prototypes for.
1151
1152 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1153
1154 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1155 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1156 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1157 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1158
1159 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1160
1161 * cgen.h: Correct typo in comment end marker.
1162
1163 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1164
1165 * tic30.h: New file.
1166
1167 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1168
1169 * cgen.h: Add prototypes for cgen_save_fixups(),
1170 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1171 of cgen_asm_finish_insn() to return a char *.
1172
1173 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1174
1175 * cgen.h: Formatting changes to improve readability.
1176
1177 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1178
1179 * cgen.h (*): Clean up pass over `struct foo' usage.
1180 (CGEN_ATTR): Make unsigned char.
1181 (CGEN_ATTR_TYPE): Update.
1182 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1183 (cgen_base): Move member `attrs' to cgen_insn.
1184 (CGEN_KEYWORD): New member `null_entry'.
1185 (CGEN_{SYNTAX,FORMAT}): New types.
1186 (cgen_insn): Format and syntax separated from each other.
1187
1188 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1189
1190 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1191 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1192 flags_{used,set} long.
1193 (d30v_operand): Make flags field long.
1194
1195 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1196
1197 * m68k.h: Fix comment describing operand types.
1198
1199 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1200
1201 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1202 everything else after down.
1203
1204 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1205
1206 * d10v.h (OPERAND_FLAG): Split into:
1207 (OPERAND_FFLAG, OPERAND_CFLAG) .
1208
1209 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1210
1211 * mips.h (struct mips_opcode): Changed comments to reflect new
1212 field usage.
1213
1214 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1215
1216 * mips.h: Added to comments a quick-ref list of all assigned
1217 operand type characters.
1218 (OP_{MASK,SH}_PERFREG): New macros.
1219
1220 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1221
1222 * sparc.h: Add '_' and '/' for v9a asr's.
1223 Patch from David Miller <davem@vger.rutgers.edu>
1224
1225 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1226
1227 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1228 area are not available in the base model (H8/300).
1229
1230 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1231
1232 * m68k.h: Remove documentation of ` operand specifier.
1233
1234 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1235
1236 * m68k.h: Document q and v operand specifiers.
1237
1238 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1239
1240 * v850.h (struct v850_opcode): Add processors field.
1241 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1242 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1243 (PROCESSOR_V850EA): New bit constants.
1244
1245 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1246
1247 Merge changes from Martin Hunt:
1248
1249 * d30v.h: Allow up to 64 control registers. Add
1250 SHORT_A5S format.
1251
1252 * d30v.h (LONG_Db): New form for delayed branches.
1253
1254 * d30v.h: (LONG_Db): New form for repeati.
1255
1256 * d30v.h (SHORT_D2B): New form.
1257
1258 * d30v.h (SHORT_A2): New form.
1259
1260 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1261 registers are used. Needed for VLIW optimization.
1262
1263 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1264
1265 * cgen.h: Move assembler interface section
1266 up so cgen_parse_operand_result is defined for cgen_parse_address.
1267 (cgen_parse_address): Update prototype.
1268
1269 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1270
1271 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1272
1273 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1274
1275 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1276 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1277 <paubert@iram.es>.
1278
1279 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1280 <paubert@iram.es>.
1281
1282 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1283 <paubert@iram.es>.
1284
1285 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1286 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1287
1288 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1289
1290 * v850.h (V850_NOT_R0): New flag.
1291
1292 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1293
1294 * v850.h (struct v850_opcode): Remove flags field.
1295
1296 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1297
1298 * v850.h (struct v850_opcode): Add flags field.
1299 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1300 fields.
1301 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1302 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1303
1304 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1305
1306 * arc.h: New file.
1307
1308 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1309
1310 * sparc.h (sparc_opcodes): Declare as const.
1311
1312 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1313
1314 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1315 uses single or double precision floating point resources.
1316 (INSN_NO_ISA, INSN_ISA1): Define.
1317 (cpu specific INSN macros): Tweak into bitmasks outside the range
1318 of INSN_ISA field.
1319
1320 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1321
1322 * i386.h: Fix pand opcode.
1323
1324 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1325
1326 * mips.h: Widen INSN_ISA and move it to a more convenient
1327 bit position. Add INSN_3900.
1328
1329 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1330
1331 * mips.h (struct mips_opcode): added new field membership.
1332
1333 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1334
1335 * i386.h (movd): only Reg32 is allowed.
1336
1337 * i386.h: add fcomp and ud2. From Wayne Scott
1338 <wscott@ichips.intel.com>.
1339
1340 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1341
1342 * i386.h: Add MMX instructions.
1343
1344 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1345
1346 * i386.h: Remove W modifier from conditional move instructions.
1347
1348 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1349
1350 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1351 with no arguments to match that generated by the UnixWare
1352 assembler.
1353
1354 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1355
1356 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1357 (cgen_parse_operand_fn): Declare.
1358 (cgen_init_parse_operand): Declare.
1359 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1360 new argument `want'.
1361 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1362 (enum cgen_parse_operand_type): New enum.
1363
1364 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1365
1366 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1367
1368 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1369
1370 * cgen.h: New file.
1371
1372 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1373
1374 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1375 fdivrp.
1376
1377 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1378
1379 * v850.h (extract): Make unsigned.
1380
1381 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1382
1383 * i386.h: Add iclr.
1384
1385 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1386
1387 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1388 take a direction bit.
1389
1390 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1391
1392 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1393
1394 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1395
1396 * sparc.h: Include <ansidecl.h>. Update function declarations to
1397 use prototypes, and to use const when appropriate.
1398
1399 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1400
1401 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1402
1403 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1404
1405 * d10v.h: Change pre_defined_registers to
1406 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1407
1408 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1409
1410 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1411 Change mips_opcodes from const array to a pointer,
1412 and change bfd_mips_num_opcodes from const int to int,
1413 so that we can increase the size of the mips opcodes table
1414 dynamically.
1415
1416 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1417
1418 * d30v.h (FLAG_X): Remove unused flag.
1419
1420 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1421
1422 * d30v.h: New file.
1423
1424 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1425
1426 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1427 (PDS_VALUE): Macro to access value field of predefined symbols.
1428 (tic80_next_predefined_symbol): Add prototype.
1429
1430 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1431
1432 * tic80.h (tic80_symbol_to_value): Change prototype to match
1433 change in function, added class parameter.
1434
1435 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1436
1437 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1438 endmask fields, which are somewhat weird in that 0 and 32 are
1439 treated exactly the same.
1440
1441 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1442
1443 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1444 rather than a constant that is 2**X. Reorder them to put bits for
1445 operands that have symbolic names in the upper bits, so they can
1446 be packed into an int where the lower bits contain the value that
1447 corresponds to that symbolic name.
1448 (predefined_symbo): Add struct.
1449 (tic80_predefined_symbols): Declare array of translations.
1450 (tic80_num_predefined_symbols): Declare size of that array.
1451 (tic80_value_to_symbol): Declare function.
1452 (tic80_symbol_to_value): Declare function.
1453
1454 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1455
1456 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1457
1458 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1459
1460 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1461 be the destination register.
1462
1463 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1464
1465 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1466 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1467 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1468 that the opcode can have two vector instructions in a single
1469 32 bit word and we have to encode/decode both.
1470
1471 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1472
1473 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1474 TIC80_OPERAND_RELATIVE for PC relative.
1475 (TIC80_OPERAND_BASEREL): New flag bit for register
1476 base relative.
1477
1478 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1479
1480 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1481
1482 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1483
1484 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1485 ":s" modifier for scaling.
1486
1487 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1488
1489 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1490 (TIC80_OPERAND_M_LI): Ditto
1491
1492 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1493
1494 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1495 (TIC80_OPERAND_CC): New define for condition code operand.
1496 (TIC80_OPERAND_CR): New define for control register operand.
1497
1498 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1499
1500 * tic80.h (struct tic80_opcode): Name changed.
1501 (struct tic80_opcode): Remove format field.
1502 (struct tic80_operand): Add insertion and extraction functions.
1503 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1504 correct ones.
1505 (FMT_*): Ditto.
1506
1507 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1508
1509 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1510 type IV instruction offsets.
1511
1512 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1513
1514 * tic80.h: New file.
1515
1516 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1517
1518 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1519
1520 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1521
1522 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1523 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1524 * v850.h: Fix comment, v850_operand not powerpc_operand.
1525
1526 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1527
1528 * mn10200.h: Flesh out structures and definitions needed by
1529 the mn10200 assembler & disassembler.
1530
1531 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1532
1533 * mips.h: Add mips16 definitions.
1534
1535 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1536
1537 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1538
1539 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1540
1541 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1542 (MN10300_OPERAND_MEMADDR): Define.
1543
1544 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1545
1546 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1547
1548 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1549
1550 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1551
1552 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1553
1554 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1555
1556 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1557
1558 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1559
1560 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1561
1562 * alpha.h: Don't include "bfd.h"; private relocation types are now
1563 negative to minimize problems with shared libraries. Organize
1564 instruction subsets by AMASK extensions and PALcode
1565 implementation.
1566 (struct alpha_operand): Move flags slot for better packing.
1567
1568 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1569
1570 * v850.h (V850_OPERAND_RELAX): New operand flag.
1571
1572 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1573
1574 * mn10300.h (FMT_*): Move operand format definitions
1575 here.
1576
1577 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1578
1579 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1580
1581 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1582
1583 * mn10300.h (mn10300_opcode): Add "format" field.
1584 (MN10300_OPERAND_*): Define.
1585
1586 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1587
1588 * mn10x00.h: Delete.
1589 * mn10200.h, mn10300.h: New files.
1590
1591 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1592
1593 * mn10x00.h: New file.
1594
1595 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1596
1597 * v850.h: Add new flag to indicate this instruction uses a PC
1598 displacement.
1599
1600 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1601
1602 * h8300.h (stmac): Add missing instruction.
1603
1604 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1605
1606 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1607 field.
1608
1609 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1610
1611 * v850.h (V850_OPERAND_EP): Define.
1612
1613 * v850.h (v850_opcode): Add size field.
1614
1615 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1616
1617 * v850.h (v850_operands): Add insert and extract fields, pointers
1618 to functions used to handle unusual operand encoding.
1619 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1620 V850_OPERAND_SIGNED): Defined.
1621
1622 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1623
1624 * v850.h (v850_operands): Add flags field.
1625 (OPERAND_REG, OPERAND_NUM): Defined.
1626
1627 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1628
1629 * v850.h: New file.
1630
1631 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1632
1633 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1634 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1635 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1636 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1637 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1638 Defined.
1639
1640 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1641
1642 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1643 a 3 bit space id instead of a 2 bit space id.
1644
1645 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1646
1647 * d10v.h: Add some additional defines to support the
1648 assembler in determining which operations can be done in parallel.
1649
1650 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1651
1652 * h8300.h (SN): Define.
1653 (eepmov.b): Renamed from "eepmov"
1654 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1655 with them.
1656
1657 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1658
1659 * d10v.h (OPERAND_SHIFT): New operand flag.
1660
1661 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1662
1663 * d10v.h: Changes for divs, parallel-only instructions, and
1664 signed numbers.
1665
1666 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1667
1668 * d10v.h (pd_reg): Define. Putting the definition here allows
1669 the assembler and disassembler to share the same struct.
1670
1671 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1672
1673 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1674 Williams <steve@icarus.com>.
1675
1676 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1677
1678 * d10v.h: New file.
1679
1680 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1681
1682 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1683
1684 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1685
1686 * m68k.h (mcf5200): New macro.
1687 Document names of coldfire control registers.
1688
1689 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1690
1691 * h8300.h (SRC_IN_DST): Define.
1692
1693 * h8300.h (UNOP3): Mark the register operand in this insn
1694 as a source operand, not a destination operand.
1695 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1696 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1697 register operand with SRC_IN_DST.
1698
1699 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1700
1701 * alpha.h: New file.
1702
1703 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1704
1705 * rs6k.h: Remove obsolete file.
1706
1707 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1708
1709 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1710 fdivp, and fdivrp. Add ffreep.
1711
1712 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1713
1714 * h8300.h: Reorder various #defines for readability.
1715 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1716 (BITOP): Accept additional (unused) argument. All callers changed.
1717 (EBITOP): Likewise.
1718 (O_LAST): Bump.
1719 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1720
1721 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1722 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1723 (BITOP, EBITOP): Handle new H8/S addressing modes for
1724 bit insns.
1725 (UNOP3): Handle new shift/rotate insns on the H8/S.
1726 (insns using exr): New instructions.
1727 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1728
1729 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1730
1731 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1732 was incorrect.
1733
1734 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1735
1736 * h8300.h (START): Remove.
1737 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1738 and mov.l insns that can be relaxed.
1739
1740 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1741
1742 * i386.h: Remove Abs32 from lcall.
1743
1744 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1745
1746 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1747 (SLCPOP): New macro.
1748 Mark X,Y opcode letters as in use.
1749
1750 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1751
1752 * sparc.h (F_FLOAT, F_FBR): Define.
1753
1754 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1755
1756 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1757 from all insns.
1758 (ABS8SRC,ABS8DST): Add ABS8MEM.
1759 (add.l): Fix reg+reg variant.
1760 (eepmov.w): Renamed from eepmovw.
1761 (ldc,stc): Fix many cases.
1762
1763 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1764
1765 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1766
1767 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1768
1769 * sparc.h (O): Mark operand letter as in use.
1770
1771 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1772
1773 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1774 Mark operand letters uU as in use.
1775
1776 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1777
1778 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1779 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1780 (SPARC_OPCODE_SUPPORTED): New macro.
1781 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1782 (F_NOTV9): Delete.
1783
1784 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1785
1786 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1787 declaration consistent with return type in definition.
1788
1789 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1790
1791 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1792
1793 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1794
1795 * i386.h (i386_regtab): Add 80486 test registers.
1796
1797 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1798
1799 * i960.h (I_HX): Define.
1800 (i960_opcodes): Add HX instruction.
1801
1802 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1803
1804 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1805 and fclex.
1806
1807 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1808
1809 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1810 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1811 (bfd_* defines): Delete.
1812 (sparc_opcode_archs): Replaces architecture_pname.
1813 (sparc_opcode_lookup_arch): Declare.
1814 (NUMOPCODES): Delete.
1815
1816 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1817
1818 * sparc.h (enum sparc_architecture): Add v9a.
1819 (ARCHITECTURES_CONFLICT_P): Update.
1820
1821 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1822
1823 * i386.h: Added Pentium Pro instructions.
1824
1825 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1826
1827 * m68k.h: Document new 'W' operand place.
1828
1829 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1830
1831 * hppa.h: Add lci and syncdma instructions.
1832
1833 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1834
1835 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1836 instructions.
1837
1838 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1839
1840 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1841 assembler's -mcom and -many switches.
1842
1843 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1844
1845 * i386.h: Fix cmpxchg8b extension opcode description.
1846
1847 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1848
1849 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1850 and register cr4.
1851
1852 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1853
1854 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1855
1856 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1857
1858 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1859
1860 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1861
1862 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1863
1864 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1865
1866 * m68kmri.h: Remove.
1867
1868 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1869 declarations. Remove F_ALIAS and flag field of struct
1870 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1871 int. Make name and args fields of struct m68k_opcode const.
1872
1873 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1874
1875 * sparc.h (F_NOTV9): Define.
1876
1877 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1878
1879 * mips.h (INSN_4010): Define.
1880
1881 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1882
1883 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1884
1885 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1886 * m68k.h: Fix argument descriptions of coprocessor
1887 instructions to allow only alterable operands where appropriate.
1888 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1889 (m68k_opcode_aliases): Add more aliases.
1890
1891 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1892
1893 * m68k.h: Added explcitly short-sized conditional branches, and a
1894 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1895 svr4-based configurations.
1896
1897 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1898
1899 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1900 * i386.h: added missing Data16/Data32 flags to a few instructions.
1901
1902 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1903
1904 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1905 (OP_MASK_BCC, OP_SH_BCC): Define.
1906 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1907 (OP_MASK_CCC, OP_SH_CCC): Define.
1908 (INSN_READ_FPR_R): Define.
1909 (INSN_RFE): Delete.
1910
1911 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1912
1913 * m68k.h (enum m68k_architecture): Deleted.
1914 (struct m68k_opcode_alias): New type.
1915 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1916 matching constraints, values and flags. As a side effect of this,
1917 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1918 as I know were never used, now may need re-examining.
1919 (numopcodes): Now const.
1920 (m68k_opcode_aliases, numaliases): New variables.
1921 (endop): Deleted.
1922 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1923 m68k_opcode_aliases; update declaration of m68k_opcodes.
1924
1925 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1926
1927 * hppa.h (delay_type): Delete unused enumeration.
1928 (pa_opcode): Replace unused delayed field with an architecture
1929 field.
1930 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1931
1932 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1933
1934 * mips.h (INSN_ISA4): Define.
1935
1936 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1937
1938 * mips.h (M_DLA_AB, M_DLI): Define.
1939
1940 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1941
1942 * hppa.h (fstwx): Fix single-bit error.
1943
1944 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1945
1946 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1947
1948 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1949
1950 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1951 debug registers. From Charles Hannum (mycroft@netbsd.org).
1952
1953 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1954
1955 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1956 i386 support:
1957 * i386.h (MOV_AX_DISP32): New macro.
1958 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1959 of several call/return instructions.
1960 (ADDR_PREFIX_OPCODE): New macro.
1961
1962 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1963
1964 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1965
1966 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1967 char.
1968 (struct vot, field `name'): ditto.
1969
1970 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1971
1972 * vax.h: Supply and properly group all values in end sentinel.
1973
1974 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1975
1976 * mips.h (INSN_ISA, INSN_4650): Define.
1977
1978 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1979
1980 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1981 systems with a separate instruction and data cache, such as the
1982 29040, these instructions take an optional argument.
1983
1984 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1985
1986 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1987 INSN_TRAP.
1988
1989 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1990
1991 * mips.h (INSN_STORE_MEMORY): Define.
1992
1993 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1994
1995 * sparc.h: Document new operand type 'x'.
1996
1997 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1998
1999 * i960.h (I_CX2): New instruction category. It includes
2000 instructions available on Cx and Jx processors.
2001 (I_JX): New instruction category, for JX-only instructions.
2002 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2003 Jx-only instructions, in I_JX category.
2004
2005 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2006
2007 * ns32k.h (endop): Made pointer const too.
2008
2009 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2010
2011 * ns32k.h: Drop Q operand type as there is no correct use
2012 for it. Add I and Z operand types which allow better checking.
2013
2014 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2015
2016 * h8300.h (xor.l) :fix bit pattern.
2017 (L_2): New size of operand.
2018 (trapa): Use it.
2019
2020 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2021
2022 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2023
2024 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2025
2026 * sparc.h: Include v9 definitions.
2027
2028 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2029
2030 * m68k.h (m68060): Defined.
2031 (m68040up, mfloat, mmmu): Include it.
2032 (struct m68k_opcode): Widen `arch' field.
2033 (m68k_opcodes): Updated for M68060. Removed comments that were
2034 instructions commented out by "JF" years ago.
2035
2036 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2037
2038 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2039 add a one-bit `flags' field.
2040 (F_ALIAS): New macro.
2041
2042 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2043
2044 * h8300.h (dec, inc): Get encoding right.
2045
2046 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2047
2048 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2049 a flag instead.
2050 (PPC_OPERAND_SIGNED): Define.
2051 (PPC_OPERAND_SIGNOPT): Define.
2052
2053 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2054
2055 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2056 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2057
2058 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2059
2060 * i386.h: Reverse last change. It'll be handled in gas instead.
2061
2062 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2063
2064 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2065 slower on the 486 and used the implicit shift count despite the
2066 explicit operand. The one-operand form is still available to get
2067 the shorter form with the implicit shift count.
2068
2069 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2070
2071 * hppa.h: Fix typo in fstws arg string.
2072
2073 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2074
2075 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2076
2077 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2078
2079 * ppc.h (PPC_OPCODE_601): Define.
2080
2081 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2082
2083 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2084 (so we can determine valid completers for both addb and addb[tf].)
2085
2086 * hppa.h (xmpyu): No floating point format specifier for the
2087 xmpyu instruction.
2088
2089 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2090
2091 * ppc.h (PPC_OPERAND_NEXT): Define.
2092 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2093 (struct powerpc_macro): Define.
2094 (powerpc_macros, powerpc_num_macros): Declare.
2095
2096 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2097
2098 * ppc.h: New file. Header file for PowerPC opcode table.
2099
2100 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2101
2102 * hppa.h: More minor template fixes for sfu and copr (to allow
2103 for easier disassembly).
2104
2105 * hppa.h: Fix templates for all the sfu and copr instructions.
2106
2107 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2108
2109 * i386.h (push): Permit Imm16 operand too.
2110
2111 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2112
2113 * h8300.h (andc): Exists in base arch.
2114
2115 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2116
2117 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2118 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2119
2120 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2121
2122 * hppa.h: Add FP quadword store instructions.
2123
2124 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2125
2126 * mips.h: (M_J_A): Added.
2127 (M_LA): Removed.
2128
2129 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2130
2131 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2132 <mellon@pepper.ncd.com>.
2133
2134 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2135
2136 * hppa.h: Immediate field in probei instructions is unsigned,
2137 not low-sign extended.
2138
2139 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2140
2141 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2142
2143 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2144
2145 * i386.h: Add "fxch" without operand.
2146
2147 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2148
2149 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2150
2151 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2152
2153 * hppa.h: Add gfw and gfr to the opcode table.
2154
2155 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2156
2157 * m88k.h: extended to handle m88110.
2158
2159 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2160
2161 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2162 addresses.
2163
2164 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2165
2166 * i960.h (i960_opcodes): Properly bracket initializers.
2167
2168 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2169
2170 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2171
2172 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2173
2174 * m68k.h (two): Protect second argument with parentheses.
2175
2176 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2177
2178 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2179 Deleted old in/out instructions in "#if 0" section.
2180
2181 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2182
2183 * i386.h (i386_optab): Properly bracket initializers.
2184
2185 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2186
2187 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2188 Jeff Law, law@cs.utah.edu).
2189
2190 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2191
2192 * i386.h (lcall): Accept Imm32 operand also.
2193
2194 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2195
2196 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2197 (M_DABS): Added.
2198
2199 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2200
2201 * mips.h (INSN_*): Changed values. Removed unused definitions.
2202 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2203 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2204 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2205 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2206 (M_*): Added new values for r6000 and r4000 macros.
2207 (ANY_DELAY): Removed.
2208
2209 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2210
2211 * mips.h: Added M_LI_S and M_LI_SS.
2212
2213 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2214
2215 * h8300.h: Get some rare mov.bs correct.
2216
2217 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2218
2219 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2220 been included.
2221
2222 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2223
2224 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2225 jump instructions, for use in disassemblers.
2226
2227 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2228
2229 * m88k.h: Make bitfields just unsigned, not unsigned long or
2230 unsigned short.
2231
2232 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2233
2234 * hppa.h: New argument type 'y'. Use in various float instructions.
2235
2236 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2237
2238 * hppa.h (break): First immediate field is unsigned.
2239
2240 * hppa.h: Add rfir instruction.
2241
2242 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2243
2244 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2245
2246 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2247
2248 * mips.h: Reworked the hazard information somewhat, and fixed some
2249 bugs in the instruction hazard descriptions.
2250
2251 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2252
2253 * m88k.h: Corrected a couple of opcodes.
2254
2255 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2256
2257 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2258 new version includes instruction hazard information, but is
2259 otherwise reasonably similar.
2260
2261 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2262
2263 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2264
2265 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2266
2267 Patches from Jeff Law, law@cs.utah.edu:
2268 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2269 Make the tables be the same for the following instructions:
2270 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2271 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2272 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2273 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2274 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2275 "fcmp", and "ftest".
2276
2277 * hppa.h: Make new and old tables the same for "break", "mtctl",
2278 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2279 Fix typo in last patch. Collapse several #ifdefs into a
2280 single #ifdef.
2281
2282 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2283 of the comments up-to-date.
2284
2285 * hppa.h: Update "free list" of letters and update
2286 comments describing each letter's function.
2287
2288 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2289
2290 * h8300.h: Lots of little fixes for the h8/300h.
2291
2292 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2293
2294 Support for H8/300-H
2295 * h8300.h: Lots of new opcodes.
2296
2297 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2298
2299 * h8300.h: checkpoint, includes H8/300-H opcodes.
2300
2301 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2302
2303 * Patches from Jeffrey Law <law@cs.utah.edu>.
2304 * hppa.h: Rework single precision FP
2305 instructions so that they correctly disassemble code
2306 PA1.1 code.
2307
2308 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2309
2310 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2311 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2312
2313 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2314
2315 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2316 gdb will define it for now.
2317
2318 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2319
2320 * sparc.h: Don't end enumerator list with comma.
2321
2322 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2323
2324 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2325 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2326 ("bc2t"): Correct typo.
2327 ("[ls]wc[023]"): Use T rather than t.
2328 ("c[0123]"): Define general coprocessor instructions.
2329
2330 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2331
2332 * m68k.h: Move split point for gcc compilation more towards
2333 middle.
2334
2335 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2336
2337 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2338 simply wrong, ics, rfi, & rfsvc were missing).
2339 Add "a" to opr_ext for "bb". Doc fix.
2340
2341 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2342
2343 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2344 * mips.h: Add casts, to suppress warnings about shifting too much.
2345 * m68k.h: Document the placement code '9'.
2346
2347 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2348
2349 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2350 allows callers to break up the large initialized struct full of
2351 opcodes into two half-sized ones. This permits GCC to compile
2352 this module, since it takes exponential space for initializers.
2353 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2354
2355 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2356
2357 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2358 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2359 initialized structs in it.
2360
2361 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2362
2363 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2364 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2365 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2366
2367 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2368
2369 * mips.h: document "i" and "j" operands correctly.
2370
2371 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2372
2373 * mips.h: Removed endianness dependency.
2374
2375 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2376
2377 * h8300.h: include info on number of cycles per instruction.
2378
2379 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2380
2381 * hppa.h: Move handy aliases to the front. Fix masks for extract
2382 and deposit instructions.
2383
2384 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2385
2386 * i386.h: accept shld and shrd both with and without the shift
2387 count argument, which is always %cl.
2388
2389 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2390
2391 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2392 (one_byte_segment_defaults, two_byte_segment_defaults,
2393 i386_prefixtab_end): Ditto.
2394
2395 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2396
2397 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2398 for operand 2; from John Carr, jfc@dsg.dec.com.
2399
2400 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2401
2402 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2403 always use 16-bit offsets. Makes calculated-size jump tables
2404 feasible.
2405
2406 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2407
2408 * i386.h: Fix one-operand forms of in* and out* patterns.
2409
2410 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2411
2412 * m68k.h: Added CPU32 support.
2413
2414 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2415
2416 * mips.h (break): Disassemble the argument. Patch from
2417 jonathan@cs.stanford.edu (Jonathan Stone).
2418
2419 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2420
2421 * m68k.h: merged Motorola and MIT syntax.
2422
2423 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2424
2425 * m68k.h (pmove): make the tests less strict, the 68k book is
2426 wrong.
2427
2428 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2429
2430 * m68k.h (m68ec030): Defined as alias for 68030.
2431 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2432 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2433 them. Tightened description of "fmovex" to distinguish it from
2434 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2435 up descriptions that claimed versions were available for chips not
2436 supporting them. Added "pmovefd".
2437
2438 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2439
2440 * m68k.h: fix where the . goes in divull
2441
2442 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2443
2444 * m68k.h: the cas2 instruction is supposed to be written with
2445 indirection on the last two operands, which can be either data or
2446 address registers. Added a new operand type 'r' which accepts
2447 either register type. Added new cases for cas2l and cas2w which
2448 use them. Corrected masks for cas2 which failed to recognize use
2449 of address register.
2450
2451 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2452
2453 * m68k.h: Merged in patches (mostly m68040-specific) from
2454 Colin Smith <colin@wrs.com>.
2455
2456 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2457 base). Also cleaned up duplicates, re-ordered instructions for
2458 the sake of dis-assembling (so aliases come after standard names).
2459 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2460
2461 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2462
2463 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2464 all missing .s
2465
2466 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2467
2468 * sparc.h: Moved tables to BFD library.
2469
2470 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2471
2472 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2473
2474 * h8300.h: Finish filling in all the holes in the opcode table,
2475 so that the Lucid C compiler can digest this as well...
2476
2477 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2478
2479 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2480 Fix opcodes on various sizes of fild/fist instructions
2481 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2482 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2483
2484 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2485
2486 * h8300.h: Fill in all the holes in the opcode table so that the
2487 losing HPUX C compiler can digest this...
2488
2489 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2490
2491 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2492 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2493
2494 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2495
2496 * sparc.h: Add new architecture variant sparclite; add its scan
2497 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2498
2499 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2500
2501 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2502 fy@lucid.com).
2503
2504 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2505
2506 * rs6k.h: New version from IBM (Metin).
2507
2508 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2509
2510 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2511 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2512
2513 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2514
2515 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2516
2517 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2518
2519 * m68k.h (one, two): Cast macro args to unsigned to suppress
2520 complaints from compiler and lint about integer overflow during
2521 shift.
2522
2523 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2524
2525 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2526
2527 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2528
2529 * mips.h: Make bitfield layout depend on the HOST compiler,
2530 not on the TARGET system.
2531
2532 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2533
2534 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2535 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2536 <TRANLE@INTELLICORP.COM>.
2537
2538 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2539
2540 * h8300.h: turned op_type enum into #define list
2541
2542 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2543
2544 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2545 similar instructions -- they've been renamed to "fitoq", etc.
2546 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2547 number of arguments.
2548 * h8300.h: Remove extra ; which produces compiler warning.
2549
2550 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2551
2552 * sparc.h: fix opcode for tsubcctv.
2553
2554 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2555
2556 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2557
2558 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2559
2560 * sparc.h (nop): Made the 'lose' field be even tighter,
2561 so only a standard 'nop' is disassembled as a nop.
2562
2563 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2564
2565 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2566 disassembled as a nop.
2567
2568 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2569
2570 * m68k.h, sparc.h: ANSIfy enums.
2571
2572 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2573
2574 * sparc.h: fix a typo.
2575
2576 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2577
2578 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2579 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2580 vax.h: Renamed from ../<foo>-opcode.h.
2581
2582 \f
2583 Local Variables:
2584 version-control: never
2585 End:
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