Add support for MIPS R1[02]000 performance counter opcodes.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
2
3 * mips.h (INSN_10000): Define.
4 (OPCODE_IS_MEMBER): Check for INSN_10000.
5
6 2001-08-10 Alan Modra <amodra@one.net.au>
7
8 * ppc.h: Revert 2001-08-08.
9
10 2001-08-08 Alan Modra <amodra@one.net.au>
11
12 1999-10-25 Torbjorn Granlund <tege@swox.com>
13 * ppc.h (struct powerpc_operand): New field `reloc'.
14
15 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
16
17 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
18 (cgen_cpu_desc): Ditto.
19
20 2001-07-07 Ben Elliston <bje@redhat.com>
21
22 * m88k.h: Clean up and reformat. Remove unused code.
23
24 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
25
26 * cgen.h (cgen_keyword): Add nonalpha_chars field.
27
28 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
29
30 * mips.h (CPU_R12000): Define.
31
32 2001-05-23 John Healy <jhealy@redhat.com>
33
34 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
35
36 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
37
38 * mips.h (INSN_ISA_MASK): Define.
39
40 2001-05-12 Alan Modra <amodra@one.net.au>
41
42 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
43 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
44 and use InvMem as these insns must have register operands.
45
46 2001-05-04 Alan Modra <amodra@one.net.au>
47
48 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
49 and pextrw to swap reg/rm assignments.
50
51 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
52
53 * cris.h (enum cris_insn_version_usage): Correct comment for
54 cris_ver_v3p.
55
56 2001-03-24 Alan Modra <alan@linuxcare.com.au>
57
58 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
59 Add InvMem to first operand of "maskmovdqu".
60
61 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
62
63 * cris.h (ADD_PC_INCR_OPCODE): New macro.
64
65 2001-03-21 Kazu Hirata <kazu@hxi.com>
66
67 * h8300.h: Fix formatting.
68
69 2001-03-22 Alan Modra <alan@linuxcare.com.au>
70
71 * i386.h (i386_optab): Add paddq, psubq.
72
73 2001-03-19 Alan Modra <alan@linuxcare.com.au>
74
75 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
76
77 2001-02-28 Igor Shevlyakov <igor@windriver.com>
78
79 * m68k.h: new defines for Coldfire V4. Update mcf to know
80 about mcf5407.
81
82 2001-02-18 lars brinkhoff <lars@nocrew.org>
83
84 * pdp11.h: New file.
85
86 2001-02-12 Jan Hubicka <jh@suse.cz>
87
88 * i386.h (i386_optab): SSE integer converison instructions have
89 64bit versions on x86-64.
90
91 2001-02-10 Nick Clifton <nickc@redhat.com>
92
93 * mips.h: Remove extraneous whitespace. Formating change to allow
94 for future contribution.
95
96 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
97
98 * s390.h: New file.
99
100 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
101
102 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
103 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
104 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
105
106 2001-01-24 Karsten Keil <kkeil@suse.de>
107
108 * i386.h (i386_optab): Fix swapgs
109
110 2001-01-14 Alan Modra <alan@linuxcare.com.au>
111
112 * hppa.h: Describe new '<' and '>' operand types, and tidy
113 existing comments.
114 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
115 Remove duplicate "ldw j(s,b),x". Sort some entries.
116
117 2001-01-13 Jan Hubicka <jh@suse.cz>
118
119 * i386.h (i386_optab): Fix pusha and ret templates.
120
121 2001-01-11 Peter Targett <peter.targett@arccores.com>
122
123 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
124 definitions for masking cpu type.
125 (arc_ext_operand_value) New structure for storing extended
126 operands.
127 (ARC_OPERAND_*) Flags for operand values.
128
129 2001-01-10 Jan Hubicka <jh@suse.cz>
130
131 * i386.h (pinsrw): Add.
132 (pshufw): Remove.
133 (cvttpd2dq): Fix operands.
134 (cvttps2dq): Likewise.
135 (movq2q): Rename to movdq2q.
136
137 2001-01-10 Richard Schaal <richard.schaal@intel.com>
138
139 * i386.h: Correct movnti instruction.
140
141 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
142
143 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
144 of operands (unsigned char or unsigned short).
145 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
146 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
147
148 2001-01-05 Jan Hubicka <jh@suse.cz>
149
150 * i386.h (i386_optab): Make [sml]fence template to use immext field.
151
152 2001-01-03 Jan Hubicka <jh@suse.cz>
153
154 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
155 introduced by Pentium4
156
157 2000-12-30 Jan Hubicka <jh@suse.cz>
158
159 * i386.h (i386_optab): Add "rex*" instructions;
160 add swapgs; disable jmp/call far direct instructions for
161 64bit mode; add syscall and sysret; disable registers for 0xc6
162 template. Add 'q' suffixes to extendable instructions, disable
163 obsolete instructions, add new sign/zero extension ones.
164 (i386_regtab): Add extended registers.
165 (*Suf): Add No_qSuf.
166 (q_Suf, wlq_Suf, bwlq_Suf): New.
167
168 2000-12-20 Jan Hubicka <jh@suse.cz>
169
170 * i386.h (i386_optab): Replace "Imm" with "EncImm".
171 (i386_regtab): Add flags field.
172
173 2000-12-12 Nick Clifton <nickc@redhat.com>
174
175 * mips.h: Fix formatting.
176
177 2000-12-01 Chris Demetriou <cgd@sibyte.com>
178
179 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
180 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
181 OP_*_SYSCALL definitions.
182 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
183 19 bit wait codes.
184 (MIPS operand specifier comments): Remove 'm', add 'U' and
185 'J', and update the meaning of 'B' so that it's more general.
186
187 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
188 INSN_ISA5): Renumber, redefine to mean the ISA at which the
189 instruction was added.
190 (INSN_ISA32): New constant.
191 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
192 Renumber to avoid new and/or renumbered INSN_* constants.
193 (INSN_MIPS32): Delete.
194 (ISA_UNKNOWN): New constant to indicate unknown ISA.
195 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
196 ISA_MIPS32): New constants, defined to be the mask of INSN_*
197 constants available at that ISA level.
198 (CPU_UNKNOWN): New constant to indicate unknown CPU.
199 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
200 define it with a unique value.
201 (OPCODE_IS_MEMBER): Update for new ISA membership-related
202 constant meanings.
203
204 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
205 definitions.
206
207 * mips.h (CPU_SB1): New constant.
208
209 2000-10-20 Jakub Jelinek <jakub@redhat.com>
210
211 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
212 Note that '3' is used for siam operand.
213
214 2000-09-22 Jim Wilson <wilson@cygnus.com>
215
216 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
217
218 2000-09-13 Anders Norlander <anorland@acc.umu.se>
219
220 * mips.h: Use defines instead of hard-coded processor numbers.
221 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
222 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
223 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
224 CPU_4KC, CPU_4KM, CPU_4KP): Define..
225 (OPCODE_IS_MEMBER): Use new defines.
226 (OP_MASK_SEL, OP_SH_SEL): Define.
227 (OP_MASK_CODE20, OP_SH_CODE20): Define.
228 Add 'P' to used characters.
229 Use 'H' for coprocessor select field.
230 Use 'm' for 20 bit breakpoint code.
231 Document new arg characters and add to used characters.
232 (INSN_MIPS32): New define for MIPS32 extensions.
233 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
234
235 2000-09-05 Alan Modra <alan@linuxcare.com.au>
236
237 * hppa.h: Mention cz completer.
238
239 2000-08-16 Jim Wilson <wilson@cygnus.com>
240
241 * ia64.h (IA64_OPCODE_POSTINC): New.
242
243 2000-08-15 H.J. Lu <hjl@gnu.org>
244
245 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
246 IgnoreSize change.
247
248 2000-08-08 Jason Eckhardt <jle@cygnus.com>
249
250 * i860.h: Small formatting adjustments.
251
252 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
253
254 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
255 Move related opcodes closer to each other.
256 Minor changes in comments, list undefined opcodes.
257
258 2000-07-26 Dave Brolley <brolley@redhat.com>
259
260 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
261
262 2000-07-22 Jason Eckhardt <jle@cygnus.com>
263
264 * i860.h (btne, bte, bla): Changed these opcodes
265 to use sbroff ('r') instead of split16 ('s').
266 (J, K, L, M): New operand types for 16-bit aligned fields.
267 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
268 use I, J, K, L, M instead of just I.
269 (T, U): New operand types for split 16-bit aligned fields.
270 (st.x): Changed these opcodes to use S, T, U instead of just S.
271 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
272 exist on the i860.
273 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
274 (pfeq.ss, pfeq.dd): New opcodes.
275 (st.s): Fixed incorrect mask bits.
276 (fmlow): Fixed incorrect mask bits.
277 (fzchkl, pfzchkl): Fixed incorrect mask bits.
278 (faddz, pfaddz): Fixed incorrect mask bits.
279 (form, pform): Fixed incorrect mask bits.
280 (pfld.l): Fixed incorrect mask bits.
281 (fst.q): Fixed incorrect mask bits.
282 (all floating point opcodes): Fixed incorrect mask bits for
283 handling of dual bit.
284
285 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
286
287 cris.h: New file.
288
289 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
290
291 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
292 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
293 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
294 (AVR_ISA_M83): Define for ATmega83, ATmega85.
295 (espm): Remove, because ESPM removed in databook update.
296 (eicall, eijmp): Move to the end of opcode table.
297
298 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
299
300 * m68hc11.h: New file for support of Motorola 68hc11.
301
302 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
303
304 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
305
306 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
307
308 * avr.h: New file with AVR opcodes.
309
310 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
311
312 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
313
314 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
315
316 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
317
318 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
319
320 * i386.h: Use sl_FP, not sl_Suf for fild.
321
322 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
323
324 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
325 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
326 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
327 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
328
329 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
330
331 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
332
333 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
334 Alexander Sokolov <robocop@netlink.ru>
335
336 * i386.h (i386_optab): Add cpu_flags for all instructions.
337
338 2000-05-13 Alan Modra <alan@linuxcare.com.au>
339
340 From Gavin Romig-Koch <gavin@cygnus.com>
341 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
342
343 2000-05-04 Timothy Wall <twall@cygnus.com>
344
345 * tic54x.h: New.
346
347 2000-05-03 J.T. Conklin <jtc@redback.com>
348
349 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
350 (PPC_OPERAND_VR): New operand flag for vector registers.
351
352 2000-05-01 Kazu Hirata <kazu@hxi.com>
353
354 * h8300.h (EOP): Add missing initializer.
355
356 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
357
358 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
359 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
360 New operand types l,y,&,fe,fE,fx added to support above forms.
361 (pa_opcodes): Replaced usage of 'x' as source/target for
362 floating point double-word loads/stores with 'fx'.
363
364 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
365 David Mosberger <davidm@hpl.hp.com>
366 Timothy Wall <twall@cygnus.com>
367 Jim Wilson <wilson@cygnus.com>
368
369 * ia64.h: New file.
370
371 2000-03-27 Nick Clifton <nickc@cygnus.com>
372
373 * d30v.h (SHORT_A1): Fix value.
374 (SHORT_AR): Renumber so that it is at the end of the list of short
375 instructions, not the end of the list of long instructions.
376
377 2000-03-26 Alan Modra <alan@linuxcare.com>
378
379 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
380 problem isn't really specific to Unixware.
381 (OLDGCC_COMPAT): Define.
382 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
383 destination %st(0).
384 Fix lots of comments.
385
386 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
387
388 * d30v.h:
389 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
390 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
391 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
392 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
393 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
394 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
395 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
396
397 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
398
399 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
400 fistpd without suffix.
401
402 2000-02-24 Nick Clifton <nickc@cygnus.com>
403
404 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
405 'signed_overflow_ok_p'.
406 Delete prototypes for cgen_set_flags() and cgen_get_flags().
407
408 2000-02-24 Andrew Haley <aph@cygnus.com>
409
410 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
411 (CGEN_CPU_TABLE): flags: new field.
412 Add prototypes for new functions.
413
414 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
415
416 * i386.h: Add some more UNIXWARE_COMPAT comments.
417
418 2000-02-23 Linas Vepstas <linas@linas.org>
419
420 * i370.h: New file.
421
422 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
423
424 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
425 cannot be combined in parallel with ADD/SUBppp.
426
427 2000-02-22 Andrew Haley <aph@cygnus.com>
428
429 * mips.h: (OPCODE_IS_MEMBER): Add comment.
430
431 1999-12-30 Andrew Haley <aph@cygnus.com>
432
433 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
434 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
435 insns.
436
437 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
438
439 * i386.h: Qualify intel mode far call and jmp with x_Suf.
440
441 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
442
443 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
444 indirect jumps and calls. Add FF/3 call for intel mode.
445
446 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
447
448 * mn10300.h: Add new operand types. Add new instruction formats.
449
450 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
451
452 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
453 instruction.
454
455 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
456
457 * mips.h (INSN_ISA5): New.
458
459 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
460
461 * mips.h (OPCODE_IS_MEMBER): New.
462
463 1999-10-29 Nick Clifton <nickc@cygnus.com>
464
465 * d30v.h (SHORT_AR): Define.
466
467 1999-10-18 Michael Meissner <meissner@cygnus.com>
468
469 * alpha.h (alpha_num_opcodes): Convert to unsigned.
470 (alpha_num_operands): Ditto.
471
472 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
473
474 * hppa.h (pa_opcodes): Add load and store cache control to
475 instructions. Add ordered access load and store.
476
477 * hppa.h (pa_opcode): Add new entries for addb and addib.
478
479 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
480
481 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
482
483 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
484
485 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
486
487 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
488
489 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
490 and "be" using completer prefixes.
491
492 * hppa.h (pa_opcodes): Add initializers to silence compiler.
493
494 * hppa.h: Update comments about character usage.
495
496 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
497
498 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
499 up the new fstw & bve instructions.
500
501 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
502
503 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
504 instructions.
505
506 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
507
508 * hppa.h (pa_opcodes): Add long offset double word load/store
509 instructions.
510
511 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
512 stores.
513
514 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
515
516 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
517
518 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
519
520 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
521
522 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
523
524 * hppa.h (pa_opcodes): Add support for "b,l".
525
526 * hppa.h (pa_opcodes): Add support for "b,gate".
527
528 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
529
530 * hppa.h (pa_opcodes): Use 'fX' for first register operand
531 in xmpyu.
532
533 * hppa.h (pa_opcodes): Fix mask for probe and probei.
534
535 * hppa.h (pa_opcodes): Fix mask for depwi.
536
537 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
538
539 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
540 an explicit output argument.
541
542 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
543
544 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
545 Add a few PA2.0 loads and store variants.
546
547 1999-09-04 Steve Chamberlain <sac@pobox.com>
548
549 * pj.h: New file.
550
551 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
552
553 * i386.h (i386_regtab): Move %st to top of table, and split off
554 other fp reg entries.
555 (i386_float_regtab): To here.
556
557 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
558
559 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
560 by 'f'.
561
562 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
563 Add supporting args.
564
565 * hppa.h: Document new completers and args.
566 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
567 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
568 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
569 pmenb and pmdis.
570
571 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
572 hshr, hsub, mixh, mixw, permh.
573
574 * hppa.h (pa_opcodes): Change completers in instructions to
575 use 'c' prefix.
576
577 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
578 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
579
580 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
581 fnegabs to use 'I' instead of 'F'.
582
583 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
584
585 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
586 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
587 Alphabetically sort PIII insns.
588
589 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
590
591 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
592
593 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
594
595 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
596 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
597
598 * hppa.h: Document 64 bit condition completers.
599
600 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
601
602 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
603
604 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
605
606 * i386.h (i386_optab): Add DefaultSize modifier to all insns
607 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
608 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
609
610 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
611 Jeff Law <law@cygnus.com>
612
613 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
614
615 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
616
617 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
618 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
619
620 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
621
622 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
623
624 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
625
626 * hppa.h (struct pa_opcode): Add new field "flags".
627 (FLAGS_STRICT): Define.
628
629 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
630 Jeff Law <law@cygnus.com>
631
632 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
633
634 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
635
636 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
637
638 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
639 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
640 flag to fcomi and friends.
641
642 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
643
644 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
645 integer logical instructions.
646
647 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
648
649 * m68k.h: Document new formats `E', `G', `H' and new places `N',
650 `n', `o'.
651
652 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
653 and new places `m', `M', `h'.
654
655 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
656
657 * hppa.h (pa_opcodes): Add several processor specific system
658 instructions.
659
660 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
661
662 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
663 "addb", and "addib" to be used by the disassembler.
664
665 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
666
667 * i386.h (ReverseModrm): Remove all occurences.
668 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
669 movmskps, pextrw, pmovmskb, maskmovq.
670 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
671 ignore the data size prefix.
672
673 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
674 Mostly stolen from Doug Ledford <dledford@redhat.com>
675
676 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
677
678 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
679
680 1999-04-14 Doug Evans <devans@casey.cygnus.com>
681
682 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
683 (CGEN_ATTR_TYPE): Update.
684 (CGEN_ATTR_MASK): Number booleans starting at 0.
685 (CGEN_ATTR_VALUE): Update.
686 (CGEN_INSN_ATTR): Update.
687
688 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
689
690 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
691 instructions.
692
693 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
694
695 * hppa.h (bb, bvb): Tweak opcode/mask.
696
697
698 1999-03-22 Doug Evans <devans@casey.cygnus.com>
699
700 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
701 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
702 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
703 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
704 Delete member max_insn_size.
705 (enum cgen_cpu_open_arg): New enum.
706 (cpu_open): Update prototype.
707 (cpu_open_1): Declare.
708 (cgen_set_cpu): Delete.
709
710 1999-03-11 Doug Evans <devans@casey.cygnus.com>
711
712 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
713 (CGEN_OPERAND_NIL): New macro.
714 (CGEN_OPERAND): New member `type'.
715 (@arch@_cgen_operand_table): Delete decl.
716 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
717 (CGEN_OPERAND_TABLE): New struct.
718 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
719 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
720 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
721 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
722 {get,set}_{int,vma}_operand.
723 (@arch@_cgen_cpu_open): New arg `isa'.
724 (cgen_set_cpu): Ditto.
725
726 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
727
728 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
729
730 1999-02-25 Doug Evans <devans@casey.cygnus.com>
731
732 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
733 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
734 enum cgen_hw_type.
735 (CGEN_HW_TABLE): New struct.
736 (hw_table): Delete declaration.
737 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
738 to table entry to enum.
739 (CGEN_OPINST): Ditto.
740 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
741
742 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
743
744 * alpha.h (AXP_OPCODE_EV6): New.
745 (AXP_OPCODE_NOPAL): Include it.
746
747 1999-02-09 Doug Evans <devans@casey.cygnus.com>
748
749 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
750 All uses updated. New members int_insn_p, max_insn_size,
751 parse_operand,insert_operand,extract_operand,print_operand,
752 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
753 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
754 extract_handlers,print_handlers.
755 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
756 (CGEN_ATTR_BOOL_OFFSET): New macro.
757 (CGEN_ATTR_MASK): Subtract it to compute bit number.
758 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
759 (cgen_opcode_handler): Renamed from cgen_base.
760 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
761 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
762 all uses updated.
763 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
764 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
765 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
766 (CGEN_OPCODE,CGEN_IBASE): New types.
767 (CGEN_INSN): Rewrite.
768 (CGEN_{ASM,DIS}_HASH*): Delete.
769 (init_opcode_table,init_ibld_table): Declare.
770 (CGEN_INSN_ATTR): New type.
771
772 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
773
774 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
775 (x_FP, d_FP, dls_FP, sldx_FP): Define.
776 Change *Suf definitions to include x and d suffixes.
777 (movsx): Use w_Suf and b_Suf.
778 (movzx): Likewise.
779 (movs): Use bwld_Suf.
780 (fld): Change ordering. Use sld_FP.
781 (fild): Add Intel Syntax equivalent of fildq.
782 (fst): Use sld_FP.
783 (fist): Use sld_FP.
784 (fstp): Use sld_FP. Add x_FP version.
785 (fistp): LLongMem version for Intel Syntax.
786 (fcom, fcomp): Use sld_FP.
787 (fadd, fiadd, fsub): Use sld_FP.
788 (fsubr): Use sld_FP.
789 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
790
791 1999-01-27 Doug Evans <devans@casey.cygnus.com>
792
793 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
794 CGEN_MODE_UINT.
795
796 1999-01-16 Jeffrey A Law (law@cygnus.com)
797
798 * hppa.h (bv): Fix mask.
799
800 1999-01-05 Doug Evans <devans@casey.cygnus.com>
801
802 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
803 (CGEN_ATTR): Use it.
804 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
805 (CGEN_ATTR_TABLE): New member dfault.
806
807 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
808
809 * mips.h (MIPS16_INSN_BRANCH): New.
810
811 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
812
813 The following is part of a change made by Edith Epstein
814 <eepstein@sophia.cygnus.com> as part of a project to merge in
815 changes by HP; HP did not create ChangeLog entries.
816
817 * hppa.h (completer_chars): list of chars to not put a space
818 after.
819
820 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
821
822 * i386.h (i386_optab): Permit w suffix on processor control and
823 status word instructions.
824
825 1998-11-30 Doug Evans <devans@casey.cygnus.com>
826
827 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
828 (struct cgen_keyword_entry): Ditto.
829 (struct cgen_operand): Ditto.
830 (CGEN_IFLD): New typedef, with associated access macros.
831 (CGEN_IFMT): New typedef, with associated access macros.
832 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
833 (CGEN_IVALUE): New typedef.
834 (struct cgen_insn): Delete const on syntax,attrs members.
835 `format' now points to format data. Type of `value' is now
836 CGEN_IVALUE.
837 (struct cgen_opcode_table): New member ifld_table.
838
839 1998-11-18 Doug Evans <devans@casey.cygnus.com>
840
841 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
842 (CGEN_OPERAND_INSTANCE): New member `attrs'.
843 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
844 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
845 (cgen_opcode_table): Update type of dis_hash fn.
846 (extract_operand): Update type of `insn_value' arg.
847
848 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
849
850 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
851
852 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
853
854 * mips.h (INSN_MULT): Added.
855
856 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
857
858 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
859
860 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
861
862 * cgen.h (CGEN_INSN_INT): New typedef.
863 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
864 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
865 (CGEN_INSN_BYTES_PTR): New typedef.
866 (CGEN_EXTRACT_INFO): New typedef.
867 (cgen_insert_fn,cgen_extract_fn): Update.
868 (cgen_opcode_table): New member `insn_endian'.
869 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
870 (insert_operand,extract_operand): Update.
871 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
872
873 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
874
875 * cgen.h (CGEN_ATTR_BOOLS): New macro.
876 (struct CGEN_HW_ENTRY): New member `attrs'.
877 (CGEN_HW_ATTR): New macro.
878 (struct CGEN_OPERAND_INSTANCE): New member `name'.
879 (CGEN_INSN_INVALID_P): New macro.
880
881 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
882
883 * hppa.h: Add "fid".
884
885 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
886
887 From Robert Andrew Dale <rob@nb.net>
888 * i386.h (i386_optab): Add AMD 3DNow! instructions.
889 (AMD_3DNOW_OPCODE): Define.
890
891 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
892
893 * d30v.h (EITHER_BUT_PREFER_MU): Define.
894
895 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
896
897 * cgen.h (cgen_insn): #if 0 out element `cdx'.
898
899 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
900
901 Move all global state data into opcode table struct, and treat
902 opcode table as something that is "opened/closed".
903 * cgen.h (CGEN_OPCODE_DESC): New type.
904 (all fns): New first arg of opcode table descriptor.
905 (cgen_set_parse_operand_fn): Add prototype.
906 (cgen_current_machine,cgen_current_endian): Delete.
907 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
908 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
909 dis_hash_table,dis_hash_table_entries.
910 (opcode_open,opcode_close): Add prototypes.
911
912 * cgen.h (cgen_insn): New element `cdx'.
913
914 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
915
916 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
917
918 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
919
920 * mn10300.h: Add "no_match_operands" field for instructions.
921 (MN10300_MAX_OPERANDS): Define.
922
923 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
924
925 * cgen.h (cgen_macro_insn_count): Declare.
926
927 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
928
929 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
930 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
931 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
932 set_{int,vma}_operand.
933
934 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
935
936 * mn10300.h: Add "machine" field for instructions.
937 (MN103, AM30): Define machine types.
938
939 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
940
941 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
942
943 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
944
945 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
946
947 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
948
949 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
950 and ud2b.
951 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
952 those that happen to be implemented on pentiums.
953
954 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
955
956 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
957 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
958 with Size16|IgnoreSize or Size32|IgnoreSize.
959
960 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
961
962 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
963 (REPE): Rename to REPE_PREFIX_OPCODE.
964 (i386_regtab_end): Remove.
965 (i386_prefixtab, i386_prefixtab_end): Remove.
966 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
967 of md_begin.
968 (MAX_OPCODE_SIZE): Define.
969 (i386_optab_end): Remove.
970 (sl_Suf): Define.
971 (sl_FP): Use sl_Suf.
972
973 * i386.h (i386_optab): Allow 16 bit displacement for `mov
974 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
975 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
976 data32, dword, and adword prefixes.
977 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
978 regs.
979
980 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
981
982 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
983
984 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
985 register operands, because this is a common idiom. Flag them with
986 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
987 fdivrp because gcc erroneously generates them. Also flag with a
988 warning.
989
990 * i386.h: Add suffix modifiers to most insns, and tighter operand
991 checks in some cases. Fix a number of UnixWare compatibility
992 issues with float insns. Merge some floating point opcodes, using
993 new FloatMF modifier.
994 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
995 consistency.
996
997 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
998 IgnoreDataSize where appropriate.
999
1000 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1001
1002 * i386.h: (one_byte_segment_defaults): Remove.
1003 (two_byte_segment_defaults): Remove.
1004 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1005
1006 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1007
1008 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1009 (cgen_hw_lookup_by_num): Declare.
1010
1011 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1012
1013 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1014 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1015
1016 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1017
1018 * cgen.h (cgen_asm_init_parse): Delete.
1019 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1020 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1021
1022 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1023
1024 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1025 (cgen_asm_finish_insn): Update prototype.
1026 (cgen_insn): New members num, data.
1027 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1028 dis_hash, dis_hash_table_size moved to ...
1029 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1030 All uses updated. New members asm_hash_p, dis_hash_p.
1031 (CGEN_MINSN_EXPANSION): New struct.
1032 (cgen_expand_macro_insn): Declare.
1033 (cgen_macro_insn_count): Declare.
1034 (get_insn_operands): Update prototype.
1035 (lookup_get_insn_operands): Declare.
1036
1037 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1038
1039 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1040 regKludge. Add operands types for string instructions.
1041
1042 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1043
1044 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1045 table.
1046
1047 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1048
1049 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1050 for `gettext'.
1051
1052 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1053
1054 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1055 Add IsString flag to string instructions.
1056 (IS_STRING): Don't define.
1057 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1058 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1059 (SS_PREFIX_OPCODE): Define.
1060
1061 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1062
1063 * i386.h: Revert March 24 patch; no more LinearAddress.
1064
1065 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1066
1067 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1068 instructions, and instead add FWait opcode modifier. Add short
1069 form of fldenv and fstenv.
1070 (FWAIT_OPCODE): Define.
1071
1072 * i386.h (i386_optab): Change second operand constraint of `mov
1073 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1074 allow legal instructions such as `movl %gs,%esi'
1075
1076 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1077
1078 * h8300.h: Various changes to fully bracket initializers.
1079
1080 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1081
1082 * i386.h: Set LinearAddress for lidt and lgdt.
1083
1084 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1085
1086 * cgen.h (CGEN_BOOL_ATTR): New macro.
1087
1088 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1089
1090 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1091
1092 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1093
1094 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1095 (cgen_insn): Record syntax and format entries here, rather than
1096 separately.
1097
1098 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1099
1100 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1101
1102 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1103
1104 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1105 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1106 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1107
1108 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1109
1110 * cgen.h (lookup_insn): New argument alias_p.
1111
1112 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1113
1114 Fix rac to accept only a0:
1115 * d10v.h (OPERAND_ACC): Split into:
1116 (OPERAND_ACC0, OPERAND_ACC1) .
1117 (OPERAND_GPR): Define.
1118
1119 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1120
1121 * cgen.h (CGEN_FIELDS): Define here.
1122 (CGEN_HW_ENTRY): New member `type'.
1123 (hw_list): Delete decl.
1124 (enum cgen_mode): Declare.
1125 (CGEN_OPERAND): New member `hw'.
1126 (enum cgen_operand_instance_type): Declare.
1127 (CGEN_OPERAND_INSTANCE): New type.
1128 (CGEN_INSN): New member `operands'.
1129 (CGEN_OPCODE_DATA): Make hw_list const.
1130 (get_insn_operands,lookup_insn): Add prototypes for.
1131
1132 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1133
1134 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1135 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1136 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1137 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1138
1139 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1140
1141 * cgen.h: Correct typo in comment end marker.
1142
1143 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1144
1145 * tic30.h: New file.
1146
1147 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1148
1149 * cgen.h: Add prototypes for cgen_save_fixups(),
1150 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1151 of cgen_asm_finish_insn() to return a char *.
1152
1153 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1154
1155 * cgen.h: Formatting changes to improve readability.
1156
1157 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1158
1159 * cgen.h (*): Clean up pass over `struct foo' usage.
1160 (CGEN_ATTR): Make unsigned char.
1161 (CGEN_ATTR_TYPE): Update.
1162 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1163 (cgen_base): Move member `attrs' to cgen_insn.
1164 (CGEN_KEYWORD): New member `null_entry'.
1165 (CGEN_{SYNTAX,FORMAT}): New types.
1166 (cgen_insn): Format and syntax separated from each other.
1167
1168 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1169
1170 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1171 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1172 flags_{used,set} long.
1173 (d30v_operand): Make flags field long.
1174
1175 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1176
1177 * m68k.h: Fix comment describing operand types.
1178
1179 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1180
1181 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1182 everything else after down.
1183
1184 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1185
1186 * d10v.h (OPERAND_FLAG): Split into:
1187 (OPERAND_FFLAG, OPERAND_CFLAG) .
1188
1189 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1190
1191 * mips.h (struct mips_opcode): Changed comments to reflect new
1192 field usage.
1193
1194 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1195
1196 * mips.h: Added to comments a quick-ref list of all assigned
1197 operand type characters.
1198 (OP_{MASK,SH}_PERFREG): New macros.
1199
1200 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1201
1202 * sparc.h: Add '_' and '/' for v9a asr's.
1203 Patch from David Miller <davem@vger.rutgers.edu>
1204
1205 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1206
1207 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1208 area are not available in the base model (H8/300).
1209
1210 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1211
1212 * m68k.h: Remove documentation of ` operand specifier.
1213
1214 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1215
1216 * m68k.h: Document q and v operand specifiers.
1217
1218 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1219
1220 * v850.h (struct v850_opcode): Add processors field.
1221 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1222 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1223 (PROCESSOR_V850EA): New bit constants.
1224
1225 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1226
1227 Merge changes from Martin Hunt:
1228
1229 * d30v.h: Allow up to 64 control registers. Add
1230 SHORT_A5S format.
1231
1232 * d30v.h (LONG_Db): New form for delayed branches.
1233
1234 * d30v.h: (LONG_Db): New form for repeati.
1235
1236 * d30v.h (SHORT_D2B): New form.
1237
1238 * d30v.h (SHORT_A2): New form.
1239
1240 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1241 registers are used. Needed for VLIW optimization.
1242
1243 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1244
1245 * cgen.h: Move assembler interface section
1246 up so cgen_parse_operand_result is defined for cgen_parse_address.
1247 (cgen_parse_address): Update prototype.
1248
1249 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1250
1251 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1252
1253 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1254
1255 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1256 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1257 <paubert@iram.es>.
1258
1259 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1260 <paubert@iram.es>.
1261
1262 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1263 <paubert@iram.es>.
1264
1265 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1266 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1267
1268 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1269
1270 * v850.h (V850_NOT_R0): New flag.
1271
1272 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1273
1274 * v850.h (struct v850_opcode): Remove flags field.
1275
1276 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1277
1278 * v850.h (struct v850_opcode): Add flags field.
1279 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1280 fields.
1281 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1282 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1283
1284 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1285
1286 * arc.h: New file.
1287
1288 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1289
1290 * sparc.h (sparc_opcodes): Declare as const.
1291
1292 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1293
1294 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1295 uses single or double precision floating point resources.
1296 (INSN_NO_ISA, INSN_ISA1): Define.
1297 (cpu specific INSN macros): Tweak into bitmasks outside the range
1298 of INSN_ISA field.
1299
1300 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1301
1302 * i386.h: Fix pand opcode.
1303
1304 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1305
1306 * mips.h: Widen INSN_ISA and move it to a more convenient
1307 bit position. Add INSN_3900.
1308
1309 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1310
1311 * mips.h (struct mips_opcode): added new field membership.
1312
1313 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1314
1315 * i386.h (movd): only Reg32 is allowed.
1316
1317 * i386.h: add fcomp and ud2. From Wayne Scott
1318 <wscott@ichips.intel.com>.
1319
1320 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1321
1322 * i386.h: Add MMX instructions.
1323
1324 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1325
1326 * i386.h: Remove W modifier from conditional move instructions.
1327
1328 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1329
1330 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1331 with no arguments to match that generated by the UnixWare
1332 assembler.
1333
1334 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1335
1336 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1337 (cgen_parse_operand_fn): Declare.
1338 (cgen_init_parse_operand): Declare.
1339 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1340 new argument `want'.
1341 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1342 (enum cgen_parse_operand_type): New enum.
1343
1344 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1345
1346 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1347
1348 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1349
1350 * cgen.h: New file.
1351
1352 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1353
1354 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1355 fdivrp.
1356
1357 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1358
1359 * v850.h (extract): Make unsigned.
1360
1361 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1362
1363 * i386.h: Add iclr.
1364
1365 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1366
1367 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1368 take a direction bit.
1369
1370 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1371
1372 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1373
1374 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1375
1376 * sparc.h: Include <ansidecl.h>. Update function declarations to
1377 use prototypes, and to use const when appropriate.
1378
1379 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1380
1381 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1382
1383 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1384
1385 * d10v.h: Change pre_defined_registers to
1386 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1387
1388 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1389
1390 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1391 Change mips_opcodes from const array to a pointer,
1392 and change bfd_mips_num_opcodes from const int to int,
1393 so that we can increase the size of the mips opcodes table
1394 dynamically.
1395
1396 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1397
1398 * d30v.h (FLAG_X): Remove unused flag.
1399
1400 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1401
1402 * d30v.h: New file.
1403
1404 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1405
1406 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1407 (PDS_VALUE): Macro to access value field of predefined symbols.
1408 (tic80_next_predefined_symbol): Add prototype.
1409
1410 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1411
1412 * tic80.h (tic80_symbol_to_value): Change prototype to match
1413 change in function, added class parameter.
1414
1415 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1416
1417 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1418 endmask fields, which are somewhat weird in that 0 and 32 are
1419 treated exactly the same.
1420
1421 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1422
1423 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1424 rather than a constant that is 2**X. Reorder them to put bits for
1425 operands that have symbolic names in the upper bits, so they can
1426 be packed into an int where the lower bits contain the value that
1427 corresponds to that symbolic name.
1428 (predefined_symbo): Add struct.
1429 (tic80_predefined_symbols): Declare array of translations.
1430 (tic80_num_predefined_symbols): Declare size of that array.
1431 (tic80_value_to_symbol): Declare function.
1432 (tic80_symbol_to_value): Declare function.
1433
1434 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1435
1436 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1437
1438 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1439
1440 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1441 be the destination register.
1442
1443 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1444
1445 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1446 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1447 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1448 that the opcode can have two vector instructions in a single
1449 32 bit word and we have to encode/decode both.
1450
1451 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1452
1453 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1454 TIC80_OPERAND_RELATIVE for PC relative.
1455 (TIC80_OPERAND_BASEREL): New flag bit for register
1456 base relative.
1457
1458 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1459
1460 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1461
1462 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1463
1464 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1465 ":s" modifier for scaling.
1466
1467 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1468
1469 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1470 (TIC80_OPERAND_M_LI): Ditto
1471
1472 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1473
1474 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1475 (TIC80_OPERAND_CC): New define for condition code operand.
1476 (TIC80_OPERAND_CR): New define for control register operand.
1477
1478 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1479
1480 * tic80.h (struct tic80_opcode): Name changed.
1481 (struct tic80_opcode): Remove format field.
1482 (struct tic80_operand): Add insertion and extraction functions.
1483 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1484 correct ones.
1485 (FMT_*): Ditto.
1486
1487 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1488
1489 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1490 type IV instruction offsets.
1491
1492 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1493
1494 * tic80.h: New file.
1495
1496 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1497
1498 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1499
1500 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1501
1502 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1503 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1504 * v850.h: Fix comment, v850_operand not powerpc_operand.
1505
1506 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1507
1508 * mn10200.h: Flesh out structures and definitions needed by
1509 the mn10200 assembler & disassembler.
1510
1511 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1512
1513 * mips.h: Add mips16 definitions.
1514
1515 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1516
1517 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1518
1519 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1520
1521 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1522 (MN10300_OPERAND_MEMADDR): Define.
1523
1524 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1525
1526 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1527
1528 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1529
1530 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1531
1532 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1533
1534 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1535
1536 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1537
1538 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1539
1540 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1541
1542 * alpha.h: Don't include "bfd.h"; private relocation types are now
1543 negative to minimize problems with shared libraries. Organize
1544 instruction subsets by AMASK extensions and PALcode
1545 implementation.
1546 (struct alpha_operand): Move flags slot for better packing.
1547
1548 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1549
1550 * v850.h (V850_OPERAND_RELAX): New operand flag.
1551
1552 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1553
1554 * mn10300.h (FMT_*): Move operand format definitions
1555 here.
1556
1557 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1558
1559 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1560
1561 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1562
1563 * mn10300.h (mn10300_opcode): Add "format" field.
1564 (MN10300_OPERAND_*): Define.
1565
1566 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1567
1568 * mn10x00.h: Delete.
1569 * mn10200.h, mn10300.h: New files.
1570
1571 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1572
1573 * mn10x00.h: New file.
1574
1575 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1576
1577 * v850.h: Add new flag to indicate this instruction uses a PC
1578 displacement.
1579
1580 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1581
1582 * h8300.h (stmac): Add missing instruction.
1583
1584 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1585
1586 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1587 field.
1588
1589 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1590
1591 * v850.h (V850_OPERAND_EP): Define.
1592
1593 * v850.h (v850_opcode): Add size field.
1594
1595 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1596
1597 * v850.h (v850_operands): Add insert and extract fields, pointers
1598 to functions used to handle unusual operand encoding.
1599 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1600 V850_OPERAND_SIGNED): Defined.
1601
1602 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1603
1604 * v850.h (v850_operands): Add flags field.
1605 (OPERAND_REG, OPERAND_NUM): Defined.
1606
1607 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1608
1609 * v850.h: New file.
1610
1611 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1612
1613 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1614 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1615 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1616 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1617 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1618 Defined.
1619
1620 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1621
1622 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1623 a 3 bit space id instead of a 2 bit space id.
1624
1625 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1626
1627 * d10v.h: Add some additional defines to support the
1628 assembler in determining which operations can be done in parallel.
1629
1630 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1631
1632 * h8300.h (SN): Define.
1633 (eepmov.b): Renamed from "eepmov"
1634 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1635 with them.
1636
1637 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1638
1639 * d10v.h (OPERAND_SHIFT): New operand flag.
1640
1641 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1642
1643 * d10v.h: Changes for divs, parallel-only instructions, and
1644 signed numbers.
1645
1646 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1647
1648 * d10v.h (pd_reg): Define. Putting the definition here allows
1649 the assembler and disassembler to share the same struct.
1650
1651 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1652
1653 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1654 Williams <steve@icarus.com>.
1655
1656 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1657
1658 * d10v.h: New file.
1659
1660 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1661
1662 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1663
1664 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1665
1666 * m68k.h (mcf5200): New macro.
1667 Document names of coldfire control registers.
1668
1669 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1670
1671 * h8300.h (SRC_IN_DST): Define.
1672
1673 * h8300.h (UNOP3): Mark the register operand in this insn
1674 as a source operand, not a destination operand.
1675 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1676 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1677 register operand with SRC_IN_DST.
1678
1679 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1680
1681 * alpha.h: New file.
1682
1683 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1684
1685 * rs6k.h: Remove obsolete file.
1686
1687 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1688
1689 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1690 fdivp, and fdivrp. Add ffreep.
1691
1692 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1693
1694 * h8300.h: Reorder various #defines for readability.
1695 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1696 (BITOP): Accept additional (unused) argument. All callers changed.
1697 (EBITOP): Likewise.
1698 (O_LAST): Bump.
1699 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1700
1701 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1702 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1703 (BITOP, EBITOP): Handle new H8/S addressing modes for
1704 bit insns.
1705 (UNOP3): Handle new shift/rotate insns on the H8/S.
1706 (insns using exr): New instructions.
1707 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1708
1709 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1710
1711 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1712 was incorrect.
1713
1714 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1715
1716 * h8300.h (START): Remove.
1717 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1718 and mov.l insns that can be relaxed.
1719
1720 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1721
1722 * i386.h: Remove Abs32 from lcall.
1723
1724 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1725
1726 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1727 (SLCPOP): New macro.
1728 Mark X,Y opcode letters as in use.
1729
1730 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1731
1732 * sparc.h (F_FLOAT, F_FBR): Define.
1733
1734 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1735
1736 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1737 from all insns.
1738 (ABS8SRC,ABS8DST): Add ABS8MEM.
1739 (add.l): Fix reg+reg variant.
1740 (eepmov.w): Renamed from eepmovw.
1741 (ldc,stc): Fix many cases.
1742
1743 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1744
1745 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1746
1747 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1748
1749 * sparc.h (O): Mark operand letter as in use.
1750
1751 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1752
1753 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1754 Mark operand letters uU as in use.
1755
1756 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1757
1758 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1759 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1760 (SPARC_OPCODE_SUPPORTED): New macro.
1761 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1762 (F_NOTV9): Delete.
1763
1764 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1765
1766 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1767 declaration consistent with return type in definition.
1768
1769 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1770
1771 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1772
1773 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1774
1775 * i386.h (i386_regtab): Add 80486 test registers.
1776
1777 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1778
1779 * i960.h (I_HX): Define.
1780 (i960_opcodes): Add HX instruction.
1781
1782 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1783
1784 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1785 and fclex.
1786
1787 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1788
1789 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1790 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1791 (bfd_* defines): Delete.
1792 (sparc_opcode_archs): Replaces architecture_pname.
1793 (sparc_opcode_lookup_arch): Declare.
1794 (NUMOPCODES): Delete.
1795
1796 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1797
1798 * sparc.h (enum sparc_architecture): Add v9a.
1799 (ARCHITECTURES_CONFLICT_P): Update.
1800
1801 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1802
1803 * i386.h: Added Pentium Pro instructions.
1804
1805 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1806
1807 * m68k.h: Document new 'W' operand place.
1808
1809 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1810
1811 * hppa.h: Add lci and syncdma instructions.
1812
1813 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1814
1815 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1816 instructions.
1817
1818 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1819
1820 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1821 assembler's -mcom and -many switches.
1822
1823 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1824
1825 * i386.h: Fix cmpxchg8b extension opcode description.
1826
1827 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1828
1829 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1830 and register cr4.
1831
1832 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1833
1834 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1835
1836 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1837
1838 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1839
1840 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1841
1842 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1843
1844 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1845
1846 * m68kmri.h: Remove.
1847
1848 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1849 declarations. Remove F_ALIAS and flag field of struct
1850 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1851 int. Make name and args fields of struct m68k_opcode const.
1852
1853 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1854
1855 * sparc.h (F_NOTV9): Define.
1856
1857 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1858
1859 * mips.h (INSN_4010): Define.
1860
1861 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1862
1863 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1864
1865 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1866 * m68k.h: Fix argument descriptions of coprocessor
1867 instructions to allow only alterable operands where appropriate.
1868 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1869 (m68k_opcode_aliases): Add more aliases.
1870
1871 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1872
1873 * m68k.h: Added explcitly short-sized conditional branches, and a
1874 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1875 svr4-based configurations.
1876
1877 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1878
1879 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1880 * i386.h: added missing Data16/Data32 flags to a few instructions.
1881
1882 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1883
1884 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1885 (OP_MASK_BCC, OP_SH_BCC): Define.
1886 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1887 (OP_MASK_CCC, OP_SH_CCC): Define.
1888 (INSN_READ_FPR_R): Define.
1889 (INSN_RFE): Delete.
1890
1891 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1892
1893 * m68k.h (enum m68k_architecture): Deleted.
1894 (struct m68k_opcode_alias): New type.
1895 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1896 matching constraints, values and flags. As a side effect of this,
1897 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1898 as I know were never used, now may need re-examining.
1899 (numopcodes): Now const.
1900 (m68k_opcode_aliases, numaliases): New variables.
1901 (endop): Deleted.
1902 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1903 m68k_opcode_aliases; update declaration of m68k_opcodes.
1904
1905 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1906
1907 * hppa.h (delay_type): Delete unused enumeration.
1908 (pa_opcode): Replace unused delayed field with an architecture
1909 field.
1910 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1911
1912 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1913
1914 * mips.h (INSN_ISA4): Define.
1915
1916 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1917
1918 * mips.h (M_DLA_AB, M_DLI): Define.
1919
1920 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1921
1922 * hppa.h (fstwx): Fix single-bit error.
1923
1924 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1925
1926 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1927
1928 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1929
1930 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1931 debug registers. From Charles Hannum (mycroft@netbsd.org).
1932
1933 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1934
1935 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1936 i386 support:
1937 * i386.h (MOV_AX_DISP32): New macro.
1938 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1939 of several call/return instructions.
1940 (ADDR_PREFIX_OPCODE): New macro.
1941
1942 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1943
1944 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1945
1946 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1947 char.
1948 (struct vot, field `name'): ditto.
1949
1950 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1951
1952 * vax.h: Supply and properly group all values in end sentinel.
1953
1954 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1955
1956 * mips.h (INSN_ISA, INSN_4650): Define.
1957
1958 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1959
1960 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1961 systems with a separate instruction and data cache, such as the
1962 29040, these instructions take an optional argument.
1963
1964 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1965
1966 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1967 INSN_TRAP.
1968
1969 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1970
1971 * mips.h (INSN_STORE_MEMORY): Define.
1972
1973 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1974
1975 * sparc.h: Document new operand type 'x'.
1976
1977 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1978
1979 * i960.h (I_CX2): New instruction category. It includes
1980 instructions available on Cx and Jx processors.
1981 (I_JX): New instruction category, for JX-only instructions.
1982 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1983 Jx-only instructions, in I_JX category.
1984
1985 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1986
1987 * ns32k.h (endop): Made pointer const too.
1988
1989 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1990
1991 * ns32k.h: Drop Q operand type as there is no correct use
1992 for it. Add I and Z operand types which allow better checking.
1993
1994 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1995
1996 * h8300.h (xor.l) :fix bit pattern.
1997 (L_2): New size of operand.
1998 (trapa): Use it.
1999
2000 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2001
2002 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2003
2004 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2005
2006 * sparc.h: Include v9 definitions.
2007
2008 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2009
2010 * m68k.h (m68060): Defined.
2011 (m68040up, mfloat, mmmu): Include it.
2012 (struct m68k_opcode): Widen `arch' field.
2013 (m68k_opcodes): Updated for M68060. Removed comments that were
2014 instructions commented out by "JF" years ago.
2015
2016 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2017
2018 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2019 add a one-bit `flags' field.
2020 (F_ALIAS): New macro.
2021
2022 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2023
2024 * h8300.h (dec, inc): Get encoding right.
2025
2026 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2027
2028 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2029 a flag instead.
2030 (PPC_OPERAND_SIGNED): Define.
2031 (PPC_OPERAND_SIGNOPT): Define.
2032
2033 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2034
2035 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2036 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2037
2038 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2039
2040 * i386.h: Reverse last change. It'll be handled in gas instead.
2041
2042 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2043
2044 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2045 slower on the 486 and used the implicit shift count despite the
2046 explicit operand. The one-operand form is still available to get
2047 the shorter form with the implicit shift count.
2048
2049 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2050
2051 * hppa.h: Fix typo in fstws arg string.
2052
2053 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2054
2055 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2056
2057 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2058
2059 * ppc.h (PPC_OPCODE_601): Define.
2060
2061 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2062
2063 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2064 (so we can determine valid completers for both addb and addb[tf].)
2065
2066 * hppa.h (xmpyu): No floating point format specifier for the
2067 xmpyu instruction.
2068
2069 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2070
2071 * ppc.h (PPC_OPERAND_NEXT): Define.
2072 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2073 (struct powerpc_macro): Define.
2074 (powerpc_macros, powerpc_num_macros): Declare.
2075
2076 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2077
2078 * ppc.h: New file. Header file for PowerPC opcode table.
2079
2080 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2081
2082 * hppa.h: More minor template fixes for sfu and copr (to allow
2083 for easier disassembly).
2084
2085 * hppa.h: Fix templates for all the sfu and copr instructions.
2086
2087 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2088
2089 * i386.h (push): Permit Imm16 operand too.
2090
2091 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2092
2093 * h8300.h (andc): Exists in base arch.
2094
2095 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2096
2097 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2098 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2099
2100 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2101
2102 * hppa.h: Add FP quadword store instructions.
2103
2104 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2105
2106 * mips.h: (M_J_A): Added.
2107 (M_LA): Removed.
2108
2109 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2110
2111 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2112 <mellon@pepper.ncd.com>.
2113
2114 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2115
2116 * hppa.h: Immediate field in probei instructions is unsigned,
2117 not low-sign extended.
2118
2119 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2120
2121 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2122
2123 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2124
2125 * i386.h: Add "fxch" without operand.
2126
2127 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2128
2129 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2130
2131 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2132
2133 * hppa.h: Add gfw and gfr to the opcode table.
2134
2135 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2136
2137 * m88k.h: extended to handle m88110.
2138
2139 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2140
2141 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2142 addresses.
2143
2144 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2145
2146 * i960.h (i960_opcodes): Properly bracket initializers.
2147
2148 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2149
2150 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2151
2152 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2153
2154 * m68k.h (two): Protect second argument with parentheses.
2155
2156 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2157
2158 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2159 Deleted old in/out instructions in "#if 0" section.
2160
2161 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2162
2163 * i386.h (i386_optab): Properly bracket initializers.
2164
2165 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2166
2167 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2168 Jeff Law, law@cs.utah.edu).
2169
2170 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2171
2172 * i386.h (lcall): Accept Imm32 operand also.
2173
2174 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2175
2176 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2177 (M_DABS): Added.
2178
2179 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2180
2181 * mips.h (INSN_*): Changed values. Removed unused definitions.
2182 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2183 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2184 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2185 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2186 (M_*): Added new values for r6000 and r4000 macros.
2187 (ANY_DELAY): Removed.
2188
2189 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2190
2191 * mips.h: Added M_LI_S and M_LI_SS.
2192
2193 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2194
2195 * h8300.h: Get some rare mov.bs correct.
2196
2197 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2198
2199 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2200 been included.
2201
2202 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2203
2204 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2205 jump instructions, for use in disassemblers.
2206
2207 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2208
2209 * m88k.h: Make bitfields just unsigned, not unsigned long or
2210 unsigned short.
2211
2212 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2213
2214 * hppa.h: New argument type 'y'. Use in various float instructions.
2215
2216 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2217
2218 * hppa.h (break): First immediate field is unsigned.
2219
2220 * hppa.h: Add rfir instruction.
2221
2222 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2223
2224 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2225
2226 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2227
2228 * mips.h: Reworked the hazard information somewhat, and fixed some
2229 bugs in the instruction hazard descriptions.
2230
2231 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2232
2233 * m88k.h: Corrected a couple of opcodes.
2234
2235 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2236
2237 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2238 new version includes instruction hazard information, but is
2239 otherwise reasonably similar.
2240
2241 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2242
2243 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2244
2245 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2246
2247 Patches from Jeff Law, law@cs.utah.edu:
2248 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2249 Make the tables be the same for the following instructions:
2250 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2251 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2252 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2253 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2254 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2255 "fcmp", and "ftest".
2256
2257 * hppa.h: Make new and old tables the same for "break", "mtctl",
2258 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2259 Fix typo in last patch. Collapse several #ifdefs into a
2260 single #ifdef.
2261
2262 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2263 of the comments up-to-date.
2264
2265 * hppa.h: Update "free list" of letters and update
2266 comments describing each letter's function.
2267
2268 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2269
2270 * h8300.h: Lots of little fixes for the h8/300h.
2271
2272 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2273
2274 Support for H8/300-H
2275 * h8300.h: Lots of new opcodes.
2276
2277 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2278
2279 * h8300.h: checkpoint, includes H8/300-H opcodes.
2280
2281 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2282
2283 * Patches from Jeffrey Law <law@cs.utah.edu>.
2284 * hppa.h: Rework single precision FP
2285 instructions so that they correctly disassemble code
2286 PA1.1 code.
2287
2288 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2289
2290 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2291 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2292
2293 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2294
2295 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2296 gdb will define it for now.
2297
2298 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2299
2300 * sparc.h: Don't end enumerator list with comma.
2301
2302 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2303
2304 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2305 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2306 ("bc2t"): Correct typo.
2307 ("[ls]wc[023]"): Use T rather than t.
2308 ("c[0123]"): Define general coprocessor instructions.
2309
2310 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2311
2312 * m68k.h: Move split point for gcc compilation more towards
2313 middle.
2314
2315 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2316
2317 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2318 simply wrong, ics, rfi, & rfsvc were missing).
2319 Add "a" to opr_ext for "bb". Doc fix.
2320
2321 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2322
2323 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2324 * mips.h: Add casts, to suppress warnings about shifting too much.
2325 * m68k.h: Document the placement code '9'.
2326
2327 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2328
2329 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2330 allows callers to break up the large initialized struct full of
2331 opcodes into two half-sized ones. This permits GCC to compile
2332 this module, since it takes exponential space for initializers.
2333 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2334
2335 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2336
2337 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2338 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2339 initialized structs in it.
2340
2341 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2342
2343 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2344 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2345 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2346
2347 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2348
2349 * mips.h: document "i" and "j" operands correctly.
2350
2351 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2352
2353 * mips.h: Removed endianness dependency.
2354
2355 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2356
2357 * h8300.h: include info on number of cycles per instruction.
2358
2359 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2360
2361 * hppa.h: Move handy aliases to the front. Fix masks for extract
2362 and deposit instructions.
2363
2364 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2365
2366 * i386.h: accept shld and shrd both with and without the shift
2367 count argument, which is always %cl.
2368
2369 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2370
2371 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2372 (one_byte_segment_defaults, two_byte_segment_defaults,
2373 i386_prefixtab_end): Ditto.
2374
2375 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2376
2377 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2378 for operand 2; from John Carr, jfc@dsg.dec.com.
2379
2380 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2381
2382 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2383 always use 16-bit offsets. Makes calculated-size jump tables
2384 feasible.
2385
2386 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2387
2388 * i386.h: Fix one-operand forms of in* and out* patterns.
2389
2390 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2391
2392 * m68k.h: Added CPU32 support.
2393
2394 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2395
2396 * mips.h (break): Disassemble the argument. Patch from
2397 jonathan@cs.stanford.edu (Jonathan Stone).
2398
2399 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2400
2401 * m68k.h: merged Motorola and MIT syntax.
2402
2403 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2404
2405 * m68k.h (pmove): make the tests less strict, the 68k book is
2406 wrong.
2407
2408 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2409
2410 * m68k.h (m68ec030): Defined as alias for 68030.
2411 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2412 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2413 them. Tightened description of "fmovex" to distinguish it from
2414 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2415 up descriptions that claimed versions were available for chips not
2416 supporting them. Added "pmovefd".
2417
2418 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2419
2420 * m68k.h: fix where the . goes in divull
2421
2422 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2423
2424 * m68k.h: the cas2 instruction is supposed to be written with
2425 indirection on the last two operands, which can be either data or
2426 address registers. Added a new operand type 'r' which accepts
2427 either register type. Added new cases for cas2l and cas2w which
2428 use them. Corrected masks for cas2 which failed to recognize use
2429 of address register.
2430
2431 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2432
2433 * m68k.h: Merged in patches (mostly m68040-specific) from
2434 Colin Smith <colin@wrs.com>.
2435
2436 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2437 base). Also cleaned up duplicates, re-ordered instructions for
2438 the sake of dis-assembling (so aliases come after standard names).
2439 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2440
2441 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2442
2443 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2444 all missing .s
2445
2446 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2447
2448 * sparc.h: Moved tables to BFD library.
2449
2450 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2451
2452 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2453
2454 * h8300.h: Finish filling in all the holes in the opcode table,
2455 so that the Lucid C compiler can digest this as well...
2456
2457 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2458
2459 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2460 Fix opcodes on various sizes of fild/fist instructions
2461 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2462 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2463
2464 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2465
2466 * h8300.h: Fill in all the holes in the opcode table so that the
2467 losing HPUX C compiler can digest this...
2468
2469 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2470
2471 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2472 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2473
2474 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2475
2476 * sparc.h: Add new architecture variant sparclite; add its scan
2477 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2478
2479 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2480
2481 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2482 fy@lucid.com).
2483
2484 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2485
2486 * rs6k.h: New version from IBM (Metin).
2487
2488 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2489
2490 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2491 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2492
2493 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2494
2495 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2496
2497 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2498
2499 * m68k.h (one, two): Cast macro args to unsigned to suppress
2500 complaints from compiler and lint about integer overflow during
2501 shift.
2502
2503 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2504
2505 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2506
2507 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2508
2509 * mips.h: Make bitfield layout depend on the HOST compiler,
2510 not on the TARGET system.
2511
2512 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2513
2514 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2515 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2516 <TRANLE@INTELLICORP.COM>.
2517
2518 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2519
2520 * h8300.h: turned op_type enum into #define list
2521
2522 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2523
2524 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2525 similar instructions -- they've been renamed to "fitoq", etc.
2526 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2527 number of arguments.
2528 * h8300.h: Remove extra ; which produces compiler warning.
2529
2530 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2531
2532 * sparc.h: fix opcode for tsubcctv.
2533
2534 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2535
2536 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2537
2538 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2539
2540 * sparc.h (nop): Made the 'lose' field be even tighter,
2541 so only a standard 'nop' is disassembled as a nop.
2542
2543 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2544
2545 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2546 disassembled as a nop.
2547
2548 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2549
2550 * m68k.h, sparc.h: ANSIfy enums.
2551
2552 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2553
2554 * sparc.h: fix a typo.
2555
2556 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2557
2558 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2559 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2560 vax.h: Renamed from ../<foo>-opcode.h.
2561
2562 \f
2563 Local Variables:
2564 version-control: never
2565 End:
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