[include/opcode/]
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2002-09-27 Gavin Romig-Koch <gavin@redhat.com>
2 Ken Raeburn <raeburn@cygnus.com>
3 Aldy Hernandez <aldyh@redhat.com>
4 Eric Christopher <echristo@redhat.com>
5 Richard Sandiford <rsandifo@redhat.com>
6
7 * mips.h: Update comment for new opcodes.
8 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
9 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
10 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
11 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
12 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
13 Don't match CPU_R4111 with INSN_4100.
14
15 2002-08-19 Elena Zannoni <ezannoni@redhat.com>
16
17 From matthew green <mrg@redhat.com>
18
19 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
20 instructions.
21 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
22 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
23 e500x2 Integer select, branch locking, performance monitor,
24 cache locking and machine check APUs, respectively.
25 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
26 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
27
28 2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
29
30 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
31 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
32 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
33 memory banks.
34 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
35
36 2002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
37
38 * mips.h (INSN_MIPS16): New define.
39
40 2002-07-08 Alan Modra <amodra@bigpond.net.au>
41
42 * i386.h: Remove IgnoreSize from movsx and movzx.
43
44 2002-06-08 Alan Modra <amodra@bigpond.net.au>
45
46 * a29k.h: Replace CONST with const.
47 (CONST): Don't define.
48 * convex.h: Replace CONST with const.
49 (CONST): Don't define.
50 * dlx.h: Replace CONST with const.
51 * or32.h (CONST): Don't define.
52
53 2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
54
55 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
56 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
57 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
58 (INSN_MDMX): New constants, for MDMX support.
59 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
60
61 2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
62
63 * dlx.h: New file.
64
65 2002-05-25 Alan Modra <amodra@bigpond.net.au>
66
67 * ia64.h: Use #include "" instead of <> for local header files.
68 * sparc.h: Likewise.
69
70 2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
71
72 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
73
74 2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
75
76 * h8300.h: Corrected defs of all control regs
77 and eepmov instr.
78
79 2002-04-11 Alan Modra <amodra@bigpond.net.au>
80
81 * i386.h: Add intel mode cmpsd and movsd.
82 Put them before SSE2 insns, so that rep prefix works.
83
84 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
85
86 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
87 instructions.
88 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
89 may be passed along with the ISA bitmask.
90
91 2002-03-05 Paul Koning <pkoning@equallogic.com>
92
93 * pdp11.h: Add format codes for float instruction formats.
94
95 2002-02-25 Alan Modra <amodra@bigpond.net.au>
96
97 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
98
99 Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
100
101 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
102
103 Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
104
105 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
106 (xchg): Fix.
107 (in, out): Disable 64bit operands.
108 (call, jmp): Avoid REX prefixes.
109 (jcxz): Prohibit in 64bit mode
110 (jrcxz, loop): Add 64bit variants.
111 (movq): Fix patterns.
112 (movmskps, pextrw, pinstrw): Add 64bit variants.
113
114 2002-01-31 Ivan Guzvinec <ivang@opencores.org>
115
116 * or32.h: New file.
117
118 2002-01-22 Graydon Hoare <graydon@redhat.com>
119
120 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
121 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
122
123 2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
124
125 * h8300.h: Comment typo fix.
126
127 2002-01-03 matthew green <mrg@redhat.com>
128
129 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
130 (PPC_OPCODE_BOOKE64): Likewise.
131
132 Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
133
134 * hppa.h (call, ret): Move to end of table.
135 (addb, addib): PA2.0 variants should have been PA2.0W.
136 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
137 happy.
138 (fldw, fldd, fstw, fstd, bb): Likewise.
139 (short loads/stores): Tweak format specifier slightly to keep
140 disassembler happy.
141 (indexed loads/stores): Likewise.
142 (absolute loads/stores): Likewise.
143
144 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
145
146 * d10v.h (OPERAND_NOSP): New macro.
147
148 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
149
150 * d10v.h (OPERAND_SP): New macro.
151
152 2001-11-15 Alan Modra <amodra@bigpond.net.au>
153
154 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
155
156 2001-11-11 Timothy Wall <twall@alum.mit.edu>
157
158 * tic54x.h: Revise opcode layout; don't really need a separate
159 structure for parallel opcodes.
160
161 2001-11-13 Zack Weinberg <zack@codesourcery.com>
162 Alan Modra <amodra@bigpond.net.au>
163
164 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
165 accept WordReg.
166
167 2001-11-04 Chris Demetriou <cgd@broadcom.com>
168
169 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
170
171 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
172
173 * mmix.h: New file.
174
175 2001-10-18 Chris Demetriou <cgd@broadcom.com>
176
177 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
178 of the expression, to make source code merging easier.
179
180 2001-10-17 Chris Demetriou <cgd@broadcom.com>
181
182 * mips.h: Sort coprocessor instruction argument characters
183 in comment, add a few more words of description for "H".
184
185 2001-10-17 Chris Demetriou <cgd@broadcom.com>
186
187 * mips.h (INSN_SB1): New cpu-specific instruction bit.
188 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
189 if cpu is CPU_SB1.
190
191 2001-10-17 matthew green <mrg@redhat.com>
192
193 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
194
195 2001-10-12 matthew green <mrg@redhat.com>
196
197 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
198 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
199 instructions, respectively.
200
201 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
202
203 * v850.h: Remove spurious comment.
204
205 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
206
207 * h8300.h: Fix compile time warning messages
208
209 2001-09-04 Richard Henderson <rth@redhat.com>
210
211 * alpha.h (struct alpha_operand): Pack elements into bitfields.
212
213 2001-08-31 Eric Christopher <echristo@redhat.com>
214
215 * mips.h: Remove CPU_MIPS32_4K.
216
217 2001-08-27 Torbjorn Granlund <tege@swox.com>
218
219 * ppc.h (PPC_OPERAND_DS): Define.
220
221 2001-08-25 Andreas Jaeger <aj@suse.de>
222
223 * d30v.h: Fix declaration of reg_name_cnt.
224
225 * d10v.h: Fix declaration of d10v_reg_name_cnt.
226
227 * arc.h: Add prototypes from opcodes/arc-opc.c.
228
229 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
230
231 * mips.h (INSN_10000): Define.
232 (OPCODE_IS_MEMBER): Check for INSN_10000.
233
234 2001-08-10 Alan Modra <amodra@one.net.au>
235
236 * ppc.h: Revert 2001-08-08.
237
238 2001-08-10 Richard Sandiford <rsandifo@redhat.com>
239
240 * mips.h (INSN_GP32): Remove.
241 (OPCODE_IS_MEMBER): Remove gp32 parameter.
242 (M_MOVE): New macro identifier.
243
244 2001-08-08 Alan Modra <amodra@one.net.au>
245
246 1999-10-25 Torbjorn Granlund <tege@swox.com>
247 * ppc.h (struct powerpc_operand): New field `reloc'.
248
249 2001-08-01 Aldy Hernandez <aldyh@redhat.com>
250
251 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
252
253 2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
254
255 * cgen.h (CGEN_INSN): Add regex support.
256 (build_insn_regex): Declare.
257
258 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
259
260 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
261 (cgen_cpu_desc): Ditto.
262
263 2001-07-07 Ben Elliston <bje@redhat.com>
264
265 * m88k.h: Clean up and reformat. Remove unused code.
266
267 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
268
269 * cgen.h (cgen_keyword): Add nonalpha_chars field.
270
271 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
272
273 * mips.h (CPU_R12000): Define.
274
275 2001-05-23 John Healy <jhealy@redhat.com>
276
277 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
278
279 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
280
281 * mips.h (INSN_ISA_MASK): Define.
282
283 2001-05-12 Alan Modra <amodra@one.net.au>
284
285 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
286 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
287 and use InvMem as these insns must have register operands.
288
289 2001-05-04 Alan Modra <amodra@one.net.au>
290
291 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
292 and pextrw to swap reg/rm assignments.
293
294 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
295
296 * cris.h (enum cris_insn_version_usage): Correct comment for
297 cris_ver_v3p.
298
299 2001-03-24 Alan Modra <alan@linuxcare.com.au>
300
301 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
302 Add InvMem to first operand of "maskmovdqu".
303
304 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
305
306 * cris.h (ADD_PC_INCR_OPCODE): New macro.
307
308 2001-03-21 Kazu Hirata <kazu@hxi.com>
309
310 * h8300.h: Fix formatting.
311
312 2001-03-22 Alan Modra <alan@linuxcare.com.au>
313
314 * i386.h (i386_optab): Add paddq, psubq.
315
316 2001-03-19 Alan Modra <alan@linuxcare.com.au>
317
318 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
319
320 2001-02-28 Igor Shevlyakov <igor@windriver.com>
321
322 * m68k.h: new defines for Coldfire V4. Update mcf to know
323 about mcf5407.
324
325 2001-02-18 lars brinkhoff <lars@nocrew.org>
326
327 * pdp11.h: New file.
328
329 2001-02-12 Jan Hubicka <jh@suse.cz>
330
331 * i386.h (i386_optab): SSE integer converison instructions have
332 64bit versions on x86-64.
333
334 2001-02-10 Nick Clifton <nickc@redhat.com>
335
336 * mips.h: Remove extraneous whitespace. Formating change to allow
337 for future contribution.
338
339 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
340
341 * s390.h: New file.
342
343 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
344
345 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
346 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
347 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
348
349 2001-01-24 Karsten Keil <kkeil@suse.de>
350
351 * i386.h (i386_optab): Fix swapgs
352
353 2001-01-14 Alan Modra <alan@linuxcare.com.au>
354
355 * hppa.h: Describe new '<' and '>' operand types, and tidy
356 existing comments.
357 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
358 Remove duplicate "ldw j(s,b),x". Sort some entries.
359
360 2001-01-13 Jan Hubicka <jh@suse.cz>
361
362 * i386.h (i386_optab): Fix pusha and ret templates.
363
364 2001-01-11 Peter Targett <peter.targett@arccores.com>
365
366 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
367 definitions for masking cpu type.
368 (arc_ext_operand_value) New structure for storing extended
369 operands.
370 (ARC_OPERAND_*) Flags for operand values.
371
372 2001-01-10 Jan Hubicka <jh@suse.cz>
373
374 * i386.h (pinsrw): Add.
375 (pshufw): Remove.
376 (cvttpd2dq): Fix operands.
377 (cvttps2dq): Likewise.
378 (movq2q): Rename to movdq2q.
379
380 2001-01-10 Richard Schaal <richard.schaal@intel.com>
381
382 * i386.h: Correct movnti instruction.
383
384 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
385
386 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
387 of operands (unsigned char or unsigned short).
388 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
389 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
390
391 2001-01-05 Jan Hubicka <jh@suse.cz>
392
393 * i386.h (i386_optab): Make [sml]fence template to use immext field.
394
395 2001-01-03 Jan Hubicka <jh@suse.cz>
396
397 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
398 introduced by Pentium4
399
400 2000-12-30 Jan Hubicka <jh@suse.cz>
401
402 * i386.h (i386_optab): Add "rex*" instructions;
403 add swapgs; disable jmp/call far direct instructions for
404 64bit mode; add syscall and sysret; disable registers for 0xc6
405 template. Add 'q' suffixes to extendable instructions, disable
406 obsolete instructions, add new sign/zero extension ones.
407 (i386_regtab): Add extended registers.
408 (*Suf): Add No_qSuf.
409 (q_Suf, wlq_Suf, bwlq_Suf): New.
410
411 2000-12-20 Jan Hubicka <jh@suse.cz>
412
413 * i386.h (i386_optab): Replace "Imm" with "EncImm".
414 (i386_regtab): Add flags field.
415
416 2000-12-12 Nick Clifton <nickc@redhat.com>
417
418 * mips.h: Fix formatting.
419
420 2000-12-01 Chris Demetriou <cgd@sibyte.com>
421
422 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
423 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
424 OP_*_SYSCALL definitions.
425 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
426 19 bit wait codes.
427 (MIPS operand specifier comments): Remove 'm', add 'U' and
428 'J', and update the meaning of 'B' so that it's more general.
429
430 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
431 INSN_ISA5): Renumber, redefine to mean the ISA at which the
432 instruction was added.
433 (INSN_ISA32): New constant.
434 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
435 Renumber to avoid new and/or renumbered INSN_* constants.
436 (INSN_MIPS32): Delete.
437 (ISA_UNKNOWN): New constant to indicate unknown ISA.
438 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
439 ISA_MIPS32): New constants, defined to be the mask of INSN_*
440 constants available at that ISA level.
441 (CPU_UNKNOWN): New constant to indicate unknown CPU.
442 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
443 define it with a unique value.
444 (OPCODE_IS_MEMBER): Update for new ISA membership-related
445 constant meanings.
446
447 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
448 definitions.
449
450 * mips.h (CPU_SB1): New constant.
451
452 2000-10-20 Jakub Jelinek <jakub@redhat.com>
453
454 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
455 Note that '3' is used for siam operand.
456
457 2000-09-22 Jim Wilson <wilson@cygnus.com>
458
459 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
460
461 2000-09-13 Anders Norlander <anorland@acc.umu.se>
462
463 * mips.h: Use defines instead of hard-coded processor numbers.
464 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
465 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
466 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
467 CPU_4KC, CPU_4KM, CPU_4KP): Define..
468 (OPCODE_IS_MEMBER): Use new defines.
469 (OP_MASK_SEL, OP_SH_SEL): Define.
470 (OP_MASK_CODE20, OP_SH_CODE20): Define.
471 Add 'P' to used characters.
472 Use 'H' for coprocessor select field.
473 Use 'm' for 20 bit breakpoint code.
474 Document new arg characters and add to used characters.
475 (INSN_MIPS32): New define for MIPS32 extensions.
476 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
477
478 2000-09-05 Alan Modra <alan@linuxcare.com.au>
479
480 * hppa.h: Mention cz completer.
481
482 2000-08-16 Jim Wilson <wilson@cygnus.com>
483
484 * ia64.h (IA64_OPCODE_POSTINC): New.
485
486 2000-08-15 H.J. Lu <hjl@gnu.org>
487
488 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
489 IgnoreSize change.
490
491 2000-08-08 Jason Eckhardt <jle@cygnus.com>
492
493 * i860.h: Small formatting adjustments.
494
495 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
496
497 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
498 Move related opcodes closer to each other.
499 Minor changes in comments, list undefined opcodes.
500
501 2000-07-26 Dave Brolley <brolley@redhat.com>
502
503 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
504
505 2000-07-22 Jason Eckhardt <jle@cygnus.com>
506
507 * i860.h (btne, bte, bla): Changed these opcodes
508 to use sbroff ('r') instead of split16 ('s').
509 (J, K, L, M): New operand types for 16-bit aligned fields.
510 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
511 use I, J, K, L, M instead of just I.
512 (T, U): New operand types for split 16-bit aligned fields.
513 (st.x): Changed these opcodes to use S, T, U instead of just S.
514 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
515 exist on the i860.
516 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
517 (pfeq.ss, pfeq.dd): New opcodes.
518 (st.s): Fixed incorrect mask bits.
519 (fmlow): Fixed incorrect mask bits.
520 (fzchkl, pfzchkl): Fixed incorrect mask bits.
521 (faddz, pfaddz): Fixed incorrect mask bits.
522 (form, pform): Fixed incorrect mask bits.
523 (pfld.l): Fixed incorrect mask bits.
524 (fst.q): Fixed incorrect mask bits.
525 (all floating point opcodes): Fixed incorrect mask bits for
526 handling of dual bit.
527
528 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
529
530 cris.h: New file.
531
532 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
533
534 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
535 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
536 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
537 (AVR_ISA_M83): Define for ATmega83, ATmega85.
538 (espm): Remove, because ESPM removed in databook update.
539 (eicall, eijmp): Move to the end of opcode table.
540
541 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
542
543 * m68hc11.h: New file for support of Motorola 68hc11.
544
545 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
546
547 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
548
549 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
550
551 * avr.h: New file with AVR opcodes.
552
553 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
554
555 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
556
557 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
558
559 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
560
561 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
562
563 * i386.h: Use sl_FP, not sl_Suf for fild.
564
565 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
566
567 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
568 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
569 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
570 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
571
572 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
573
574 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
575
576 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
577 Alexander Sokolov <robocop@netlink.ru>
578
579 * i386.h (i386_optab): Add cpu_flags for all instructions.
580
581 2000-05-13 Alan Modra <alan@linuxcare.com.au>
582
583 From Gavin Romig-Koch <gavin@cygnus.com>
584 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
585
586 2000-05-04 Timothy Wall <twall@cygnus.com>
587
588 * tic54x.h: New.
589
590 2000-05-03 J.T. Conklin <jtc@redback.com>
591
592 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
593 (PPC_OPERAND_VR): New operand flag for vector registers.
594
595 2000-05-01 Kazu Hirata <kazu@hxi.com>
596
597 * h8300.h (EOP): Add missing initializer.
598
599 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
600
601 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
602 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
603 New operand types l,y,&,fe,fE,fx added to support above forms.
604 (pa_opcodes): Replaced usage of 'x' as source/target for
605 floating point double-word loads/stores with 'fx'.
606
607 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
608 David Mosberger <davidm@hpl.hp.com>
609 Timothy Wall <twall@cygnus.com>
610 Jim Wilson <wilson@cygnus.com>
611
612 * ia64.h: New file.
613
614 2000-03-27 Nick Clifton <nickc@cygnus.com>
615
616 * d30v.h (SHORT_A1): Fix value.
617 (SHORT_AR): Renumber so that it is at the end of the list of short
618 instructions, not the end of the list of long instructions.
619
620 2000-03-26 Alan Modra <alan@linuxcare.com>
621
622 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
623 problem isn't really specific to Unixware.
624 (OLDGCC_COMPAT): Define.
625 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
626 destination %st(0).
627 Fix lots of comments.
628
629 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
630
631 * d30v.h:
632 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
633 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
634 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
635 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
636 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
637 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
638 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
639
640 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
641
642 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
643 fistpd without suffix.
644
645 2000-02-24 Nick Clifton <nickc@cygnus.com>
646
647 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
648 'signed_overflow_ok_p'.
649 Delete prototypes for cgen_set_flags() and cgen_get_flags().
650
651 2000-02-24 Andrew Haley <aph@cygnus.com>
652
653 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
654 (CGEN_CPU_TABLE): flags: new field.
655 Add prototypes for new functions.
656
657 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
658
659 * i386.h: Add some more UNIXWARE_COMPAT comments.
660
661 2000-02-23 Linas Vepstas <linas@linas.org>
662
663 * i370.h: New file.
664
665 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
666
667 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
668 cannot be combined in parallel with ADD/SUBppp.
669
670 2000-02-22 Andrew Haley <aph@cygnus.com>
671
672 * mips.h: (OPCODE_IS_MEMBER): Add comment.
673
674 1999-12-30 Andrew Haley <aph@cygnus.com>
675
676 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
677 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
678 insns.
679
680 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
681
682 * i386.h: Qualify intel mode far call and jmp with x_Suf.
683
684 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
685
686 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
687 indirect jumps and calls. Add FF/3 call for intel mode.
688
689 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
690
691 * mn10300.h: Add new operand types. Add new instruction formats.
692
693 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
694
695 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
696 instruction.
697
698 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
699
700 * mips.h (INSN_ISA5): New.
701
702 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
703
704 * mips.h (OPCODE_IS_MEMBER): New.
705
706 1999-10-29 Nick Clifton <nickc@cygnus.com>
707
708 * d30v.h (SHORT_AR): Define.
709
710 1999-10-18 Michael Meissner <meissner@cygnus.com>
711
712 * alpha.h (alpha_num_opcodes): Convert to unsigned.
713 (alpha_num_operands): Ditto.
714
715 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
716
717 * hppa.h (pa_opcodes): Add load and store cache control to
718 instructions. Add ordered access load and store.
719
720 * hppa.h (pa_opcode): Add new entries for addb and addib.
721
722 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
723
724 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
725
726 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
727
728 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
729
730 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
731
732 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
733 and "be" using completer prefixes.
734
735 * hppa.h (pa_opcodes): Add initializers to silence compiler.
736
737 * hppa.h: Update comments about character usage.
738
739 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
740
741 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
742 up the new fstw & bve instructions.
743
744 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
745
746 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
747 instructions.
748
749 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
750
751 * hppa.h (pa_opcodes): Add long offset double word load/store
752 instructions.
753
754 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
755 stores.
756
757 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
758
759 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
760
761 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
762
763 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
764
765 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
766
767 * hppa.h (pa_opcodes): Add support for "b,l".
768
769 * hppa.h (pa_opcodes): Add support for "b,gate".
770
771 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
772
773 * hppa.h (pa_opcodes): Use 'fX' for first register operand
774 in xmpyu.
775
776 * hppa.h (pa_opcodes): Fix mask for probe and probei.
777
778 * hppa.h (pa_opcodes): Fix mask for depwi.
779
780 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
781
782 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
783 an explicit output argument.
784
785 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
786
787 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
788 Add a few PA2.0 loads and store variants.
789
790 1999-09-04 Steve Chamberlain <sac@pobox.com>
791
792 * pj.h: New file.
793
794 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
795
796 * i386.h (i386_regtab): Move %st to top of table, and split off
797 other fp reg entries.
798 (i386_float_regtab): To here.
799
800 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
801
802 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
803 by 'f'.
804
805 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
806 Add supporting args.
807
808 * hppa.h: Document new completers and args.
809 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
810 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
811 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
812 pmenb and pmdis.
813
814 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
815 hshr, hsub, mixh, mixw, permh.
816
817 * hppa.h (pa_opcodes): Change completers in instructions to
818 use 'c' prefix.
819
820 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
821 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
822
823 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
824 fnegabs to use 'I' instead of 'F'.
825
826 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
827
828 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
829 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
830 Alphabetically sort PIII insns.
831
832 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
833
834 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
835
836 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
837
838 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
839 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
840
841 * hppa.h: Document 64 bit condition completers.
842
843 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
844
845 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
846
847 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
848
849 * i386.h (i386_optab): Add DefaultSize modifier to all insns
850 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
851 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
852
853 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
854 Jeff Law <law@cygnus.com>
855
856 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
857
858 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
859
860 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
861 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
862
863 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
864
865 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
866
867 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
868
869 * hppa.h (struct pa_opcode): Add new field "flags".
870 (FLAGS_STRICT): Define.
871
872 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
873 Jeff Law <law@cygnus.com>
874
875 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
876
877 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
878
879 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
880
881 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
882 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
883 flag to fcomi and friends.
884
885 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
886
887 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
888 integer logical instructions.
889
890 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
891
892 * m68k.h: Document new formats `E', `G', `H' and new places `N',
893 `n', `o'.
894
895 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
896 and new places `m', `M', `h'.
897
898 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
899
900 * hppa.h (pa_opcodes): Add several processor specific system
901 instructions.
902
903 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
904
905 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
906 "addb", and "addib" to be used by the disassembler.
907
908 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
909
910 * i386.h (ReverseModrm): Remove all occurences.
911 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
912 movmskps, pextrw, pmovmskb, maskmovq.
913 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
914 ignore the data size prefix.
915
916 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
917 Mostly stolen from Doug Ledford <dledford@redhat.com>
918
919 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
920
921 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
922
923 1999-04-14 Doug Evans <devans@casey.cygnus.com>
924
925 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
926 (CGEN_ATTR_TYPE): Update.
927 (CGEN_ATTR_MASK): Number booleans starting at 0.
928 (CGEN_ATTR_VALUE): Update.
929 (CGEN_INSN_ATTR): Update.
930
931 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
932
933 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
934 instructions.
935
936 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
937
938 * hppa.h (bb, bvb): Tweak opcode/mask.
939
940
941 1999-03-22 Doug Evans <devans@casey.cygnus.com>
942
943 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
944 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
945 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
946 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
947 Delete member max_insn_size.
948 (enum cgen_cpu_open_arg): New enum.
949 (cpu_open): Update prototype.
950 (cpu_open_1): Declare.
951 (cgen_set_cpu): Delete.
952
953 1999-03-11 Doug Evans <devans@casey.cygnus.com>
954
955 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
956 (CGEN_OPERAND_NIL): New macro.
957 (CGEN_OPERAND): New member `type'.
958 (@arch@_cgen_operand_table): Delete decl.
959 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
960 (CGEN_OPERAND_TABLE): New struct.
961 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
962 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
963 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
964 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
965 {get,set}_{int,vma}_operand.
966 (@arch@_cgen_cpu_open): New arg `isa'.
967 (cgen_set_cpu): Ditto.
968
969 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
970
971 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
972
973 1999-02-25 Doug Evans <devans@casey.cygnus.com>
974
975 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
976 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
977 enum cgen_hw_type.
978 (CGEN_HW_TABLE): New struct.
979 (hw_table): Delete declaration.
980 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
981 to table entry to enum.
982 (CGEN_OPINST): Ditto.
983 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
984
985 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
986
987 * alpha.h (AXP_OPCODE_EV6): New.
988 (AXP_OPCODE_NOPAL): Include it.
989
990 1999-02-09 Doug Evans <devans@casey.cygnus.com>
991
992 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
993 All uses updated. New members int_insn_p, max_insn_size,
994 parse_operand,insert_operand,extract_operand,print_operand,
995 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
996 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
997 extract_handlers,print_handlers.
998 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
999 (CGEN_ATTR_BOOL_OFFSET): New macro.
1000 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1001 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1002 (cgen_opcode_handler): Renamed from cgen_base.
1003 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1004 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1005 all uses updated.
1006 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1007 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1008 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1009 (CGEN_OPCODE,CGEN_IBASE): New types.
1010 (CGEN_INSN): Rewrite.
1011 (CGEN_{ASM,DIS}_HASH*): Delete.
1012 (init_opcode_table,init_ibld_table): Declare.
1013 (CGEN_INSN_ATTR): New type.
1014
1015 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
1016
1017 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1018 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1019 Change *Suf definitions to include x and d suffixes.
1020 (movsx): Use w_Suf and b_Suf.
1021 (movzx): Likewise.
1022 (movs): Use bwld_Suf.
1023 (fld): Change ordering. Use sld_FP.
1024 (fild): Add Intel Syntax equivalent of fildq.
1025 (fst): Use sld_FP.
1026 (fist): Use sld_FP.
1027 (fstp): Use sld_FP. Add x_FP version.
1028 (fistp): LLongMem version for Intel Syntax.
1029 (fcom, fcomp): Use sld_FP.
1030 (fadd, fiadd, fsub): Use sld_FP.
1031 (fsubr): Use sld_FP.
1032 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1033
1034 1999-01-27 Doug Evans <devans@casey.cygnus.com>
1035
1036 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1037 CGEN_MODE_UINT.
1038
1039 1999-01-16 Jeffrey A Law (law@cygnus.com)
1040
1041 * hppa.h (bv): Fix mask.
1042
1043 1999-01-05 Doug Evans <devans@casey.cygnus.com>
1044
1045 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1046 (CGEN_ATTR): Use it.
1047 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1048 (CGEN_ATTR_TABLE): New member dfault.
1049
1050 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1051
1052 * mips.h (MIPS16_INSN_BRANCH): New.
1053
1054 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1055
1056 The following is part of a change made by Edith Epstein
1057 <eepstein@sophia.cygnus.com> as part of a project to merge in
1058 changes by HP; HP did not create ChangeLog entries.
1059
1060 * hppa.h (completer_chars): list of chars to not put a space
1061 after.
1062
1063 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1064
1065 * i386.h (i386_optab): Permit w suffix on processor control and
1066 status word instructions.
1067
1068 1998-11-30 Doug Evans <devans@casey.cygnus.com>
1069
1070 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1071 (struct cgen_keyword_entry): Ditto.
1072 (struct cgen_operand): Ditto.
1073 (CGEN_IFLD): New typedef, with associated access macros.
1074 (CGEN_IFMT): New typedef, with associated access macros.
1075 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1076 (CGEN_IVALUE): New typedef.
1077 (struct cgen_insn): Delete const on syntax,attrs members.
1078 `format' now points to format data. Type of `value' is now
1079 CGEN_IVALUE.
1080 (struct cgen_opcode_table): New member ifld_table.
1081
1082 1998-11-18 Doug Evans <devans@casey.cygnus.com>
1083
1084 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1085 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1086 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1087 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1088 (cgen_opcode_table): Update type of dis_hash fn.
1089 (extract_operand): Update type of `insn_value' arg.
1090
1091 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1092
1093 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1094
1095 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1096
1097 * mips.h (INSN_MULT): Added.
1098
1099 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1100
1101 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1102
1103 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1104
1105 * cgen.h (CGEN_INSN_INT): New typedef.
1106 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1107 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1108 (CGEN_INSN_BYTES_PTR): New typedef.
1109 (CGEN_EXTRACT_INFO): New typedef.
1110 (cgen_insert_fn,cgen_extract_fn): Update.
1111 (cgen_opcode_table): New member `insn_endian'.
1112 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1113 (insert_operand,extract_operand): Update.
1114 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1115
1116 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1117
1118 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1119 (struct CGEN_HW_ENTRY): New member `attrs'.
1120 (CGEN_HW_ATTR): New macro.
1121 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1122 (CGEN_INSN_INVALID_P): New macro.
1123
1124 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1125
1126 * hppa.h: Add "fid".
1127
1128 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1129
1130 From Robert Andrew Dale <rob@nb.net>
1131 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1132 (AMD_3DNOW_OPCODE): Define.
1133
1134 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1135
1136 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1137
1138 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1139
1140 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1141
1142 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1143
1144 Move all global state data into opcode table struct, and treat
1145 opcode table as something that is "opened/closed".
1146 * cgen.h (CGEN_OPCODE_DESC): New type.
1147 (all fns): New first arg of opcode table descriptor.
1148 (cgen_set_parse_operand_fn): Add prototype.
1149 (cgen_current_machine,cgen_current_endian): Delete.
1150 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1151 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1152 dis_hash_table,dis_hash_table_entries.
1153 (opcode_open,opcode_close): Add prototypes.
1154
1155 * cgen.h (cgen_insn): New element `cdx'.
1156
1157 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1158
1159 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1160
1161 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1162
1163 * mn10300.h: Add "no_match_operands" field for instructions.
1164 (MN10300_MAX_OPERANDS): Define.
1165
1166 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1167
1168 * cgen.h (cgen_macro_insn_count): Declare.
1169
1170 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1171
1172 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1173 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1174 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1175 set_{int,vma}_operand.
1176
1177 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1178
1179 * mn10300.h: Add "machine" field for instructions.
1180 (MN103, AM30): Define machine types.
1181
1182 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1183
1184 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1185
1186 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1187
1188 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1189
1190 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1191
1192 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1193 and ud2b.
1194 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1195 those that happen to be implemented on pentiums.
1196
1197 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1198
1199 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1200 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1201 with Size16|IgnoreSize or Size32|IgnoreSize.
1202
1203 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1204
1205 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1206 (REPE): Rename to REPE_PREFIX_OPCODE.
1207 (i386_regtab_end): Remove.
1208 (i386_prefixtab, i386_prefixtab_end): Remove.
1209 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1210 of md_begin.
1211 (MAX_OPCODE_SIZE): Define.
1212 (i386_optab_end): Remove.
1213 (sl_Suf): Define.
1214 (sl_FP): Use sl_Suf.
1215
1216 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1217 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1218 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1219 data32, dword, and adword prefixes.
1220 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1221 regs.
1222
1223 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1224
1225 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1226
1227 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1228 register operands, because this is a common idiom. Flag them with
1229 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1230 fdivrp because gcc erroneously generates them. Also flag with a
1231 warning.
1232
1233 * i386.h: Add suffix modifiers to most insns, and tighter operand
1234 checks in some cases. Fix a number of UnixWare compatibility
1235 issues with float insns. Merge some floating point opcodes, using
1236 new FloatMF modifier.
1237 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1238 consistency.
1239
1240 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1241 IgnoreDataSize where appropriate.
1242
1243 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1244
1245 * i386.h: (one_byte_segment_defaults): Remove.
1246 (two_byte_segment_defaults): Remove.
1247 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1248
1249 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1250
1251 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1252 (cgen_hw_lookup_by_num): Declare.
1253
1254 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1255
1256 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1257 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1258
1259 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1260
1261 * cgen.h (cgen_asm_init_parse): Delete.
1262 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1263 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1264
1265 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1266
1267 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1268 (cgen_asm_finish_insn): Update prototype.
1269 (cgen_insn): New members num, data.
1270 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1271 dis_hash, dis_hash_table_size moved to ...
1272 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1273 All uses updated. New members asm_hash_p, dis_hash_p.
1274 (CGEN_MINSN_EXPANSION): New struct.
1275 (cgen_expand_macro_insn): Declare.
1276 (cgen_macro_insn_count): Declare.
1277 (get_insn_operands): Update prototype.
1278 (lookup_get_insn_operands): Declare.
1279
1280 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1281
1282 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1283 regKludge. Add operands types for string instructions.
1284
1285 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1286
1287 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1288 table.
1289
1290 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1291
1292 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1293 for `gettext'.
1294
1295 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1296
1297 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1298 Add IsString flag to string instructions.
1299 (IS_STRING): Don't define.
1300 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1301 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1302 (SS_PREFIX_OPCODE): Define.
1303
1304 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1305
1306 * i386.h: Revert March 24 patch; no more LinearAddress.
1307
1308 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1309
1310 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1311 instructions, and instead add FWait opcode modifier. Add short
1312 form of fldenv and fstenv.
1313 (FWAIT_OPCODE): Define.
1314
1315 * i386.h (i386_optab): Change second operand constraint of `mov
1316 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1317 allow legal instructions such as `movl %gs,%esi'
1318
1319 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1320
1321 * h8300.h: Various changes to fully bracket initializers.
1322
1323 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1324
1325 * i386.h: Set LinearAddress for lidt and lgdt.
1326
1327 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1328
1329 * cgen.h (CGEN_BOOL_ATTR): New macro.
1330
1331 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1332
1333 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1334
1335 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1336
1337 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1338 (cgen_insn): Record syntax and format entries here, rather than
1339 separately.
1340
1341 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1342
1343 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1344
1345 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1346
1347 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1348 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1349 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1350
1351 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1352
1353 * cgen.h (lookup_insn): New argument alias_p.
1354
1355 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1356
1357 Fix rac to accept only a0:
1358 * d10v.h (OPERAND_ACC): Split into:
1359 (OPERAND_ACC0, OPERAND_ACC1) .
1360 (OPERAND_GPR): Define.
1361
1362 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1363
1364 * cgen.h (CGEN_FIELDS): Define here.
1365 (CGEN_HW_ENTRY): New member `type'.
1366 (hw_list): Delete decl.
1367 (enum cgen_mode): Declare.
1368 (CGEN_OPERAND): New member `hw'.
1369 (enum cgen_operand_instance_type): Declare.
1370 (CGEN_OPERAND_INSTANCE): New type.
1371 (CGEN_INSN): New member `operands'.
1372 (CGEN_OPCODE_DATA): Make hw_list const.
1373 (get_insn_operands,lookup_insn): Add prototypes for.
1374
1375 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1376
1377 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1378 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1379 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1380 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1381
1382 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1383
1384 * cgen.h: Correct typo in comment end marker.
1385
1386 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1387
1388 * tic30.h: New file.
1389
1390 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1391
1392 * cgen.h: Add prototypes for cgen_save_fixups(),
1393 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1394 of cgen_asm_finish_insn() to return a char *.
1395
1396 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1397
1398 * cgen.h: Formatting changes to improve readability.
1399
1400 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1401
1402 * cgen.h (*): Clean up pass over `struct foo' usage.
1403 (CGEN_ATTR): Make unsigned char.
1404 (CGEN_ATTR_TYPE): Update.
1405 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1406 (cgen_base): Move member `attrs' to cgen_insn.
1407 (CGEN_KEYWORD): New member `null_entry'.
1408 (CGEN_{SYNTAX,FORMAT}): New types.
1409 (cgen_insn): Format and syntax separated from each other.
1410
1411 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1412
1413 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1414 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1415 flags_{used,set} long.
1416 (d30v_operand): Make flags field long.
1417
1418 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1419
1420 * m68k.h: Fix comment describing operand types.
1421
1422 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1423
1424 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1425 everything else after down.
1426
1427 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1428
1429 * d10v.h (OPERAND_FLAG): Split into:
1430 (OPERAND_FFLAG, OPERAND_CFLAG) .
1431
1432 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1433
1434 * mips.h (struct mips_opcode): Changed comments to reflect new
1435 field usage.
1436
1437 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1438
1439 * mips.h: Added to comments a quick-ref list of all assigned
1440 operand type characters.
1441 (OP_{MASK,SH}_PERFREG): New macros.
1442
1443 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1444
1445 * sparc.h: Add '_' and '/' for v9a asr's.
1446 Patch from David Miller <davem@vger.rutgers.edu>
1447
1448 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1449
1450 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1451 area are not available in the base model (H8/300).
1452
1453 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1454
1455 * m68k.h: Remove documentation of ` operand specifier.
1456
1457 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1458
1459 * m68k.h: Document q and v operand specifiers.
1460
1461 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1462
1463 * v850.h (struct v850_opcode): Add processors field.
1464 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1465 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1466 (PROCESSOR_V850EA): New bit constants.
1467
1468 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1469
1470 Merge changes from Martin Hunt:
1471
1472 * d30v.h: Allow up to 64 control registers. Add
1473 SHORT_A5S format.
1474
1475 * d30v.h (LONG_Db): New form for delayed branches.
1476
1477 * d30v.h: (LONG_Db): New form for repeati.
1478
1479 * d30v.h (SHORT_D2B): New form.
1480
1481 * d30v.h (SHORT_A2): New form.
1482
1483 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1484 registers are used. Needed for VLIW optimization.
1485
1486 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1487
1488 * cgen.h: Move assembler interface section
1489 up so cgen_parse_operand_result is defined for cgen_parse_address.
1490 (cgen_parse_address): Update prototype.
1491
1492 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1493
1494 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1495
1496 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1497
1498 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1499 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1500 <paubert@iram.es>.
1501
1502 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1503 <paubert@iram.es>.
1504
1505 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1506 <paubert@iram.es>.
1507
1508 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1509 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1510
1511 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1512
1513 * v850.h (V850_NOT_R0): New flag.
1514
1515 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1516
1517 * v850.h (struct v850_opcode): Remove flags field.
1518
1519 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1520
1521 * v850.h (struct v850_opcode): Add flags field.
1522 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1523 fields.
1524 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1525 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1526
1527 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1528
1529 * arc.h: New file.
1530
1531 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1532
1533 * sparc.h (sparc_opcodes): Declare as const.
1534
1535 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1536
1537 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1538 uses single or double precision floating point resources.
1539 (INSN_NO_ISA, INSN_ISA1): Define.
1540 (cpu specific INSN macros): Tweak into bitmasks outside the range
1541 of INSN_ISA field.
1542
1543 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1544
1545 * i386.h: Fix pand opcode.
1546
1547 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1548
1549 * mips.h: Widen INSN_ISA and move it to a more convenient
1550 bit position. Add INSN_3900.
1551
1552 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1553
1554 * mips.h (struct mips_opcode): added new field membership.
1555
1556 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1557
1558 * i386.h (movd): only Reg32 is allowed.
1559
1560 * i386.h: add fcomp and ud2. From Wayne Scott
1561 <wscott@ichips.intel.com>.
1562
1563 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1564
1565 * i386.h: Add MMX instructions.
1566
1567 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1568
1569 * i386.h: Remove W modifier from conditional move instructions.
1570
1571 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1572
1573 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1574 with no arguments to match that generated by the UnixWare
1575 assembler.
1576
1577 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1578
1579 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1580 (cgen_parse_operand_fn): Declare.
1581 (cgen_init_parse_operand): Declare.
1582 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1583 new argument `want'.
1584 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1585 (enum cgen_parse_operand_type): New enum.
1586
1587 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1588
1589 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1590
1591 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1592
1593 * cgen.h: New file.
1594
1595 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1596
1597 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1598 fdivrp.
1599
1600 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1601
1602 * v850.h (extract): Make unsigned.
1603
1604 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1605
1606 * i386.h: Add iclr.
1607
1608 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1609
1610 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1611 take a direction bit.
1612
1613 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1614
1615 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1616
1617 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1618
1619 * sparc.h: Include <ansidecl.h>. Update function declarations to
1620 use prototypes, and to use const when appropriate.
1621
1622 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1623
1624 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1625
1626 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1627
1628 * d10v.h: Change pre_defined_registers to
1629 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1630
1631 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1632
1633 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1634 Change mips_opcodes from const array to a pointer,
1635 and change bfd_mips_num_opcodes from const int to int,
1636 so that we can increase the size of the mips opcodes table
1637 dynamically.
1638
1639 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1640
1641 * d30v.h (FLAG_X): Remove unused flag.
1642
1643 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1644
1645 * d30v.h: New file.
1646
1647 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1648
1649 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1650 (PDS_VALUE): Macro to access value field of predefined symbols.
1651 (tic80_next_predefined_symbol): Add prototype.
1652
1653 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1654
1655 * tic80.h (tic80_symbol_to_value): Change prototype to match
1656 change in function, added class parameter.
1657
1658 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1659
1660 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1661 endmask fields, which are somewhat weird in that 0 and 32 are
1662 treated exactly the same.
1663
1664 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1665
1666 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1667 rather than a constant that is 2**X. Reorder them to put bits for
1668 operands that have symbolic names in the upper bits, so they can
1669 be packed into an int where the lower bits contain the value that
1670 corresponds to that symbolic name.
1671 (predefined_symbo): Add struct.
1672 (tic80_predefined_symbols): Declare array of translations.
1673 (tic80_num_predefined_symbols): Declare size of that array.
1674 (tic80_value_to_symbol): Declare function.
1675 (tic80_symbol_to_value): Declare function.
1676
1677 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1678
1679 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1680
1681 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1682
1683 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1684 be the destination register.
1685
1686 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1687
1688 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1689 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1690 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1691 that the opcode can have two vector instructions in a single
1692 32 bit word and we have to encode/decode both.
1693
1694 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1695
1696 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1697 TIC80_OPERAND_RELATIVE for PC relative.
1698 (TIC80_OPERAND_BASEREL): New flag bit for register
1699 base relative.
1700
1701 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1702
1703 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1704
1705 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1706
1707 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1708 ":s" modifier for scaling.
1709
1710 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1711
1712 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1713 (TIC80_OPERAND_M_LI): Ditto
1714
1715 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1716
1717 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1718 (TIC80_OPERAND_CC): New define for condition code operand.
1719 (TIC80_OPERAND_CR): New define for control register operand.
1720
1721 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1722
1723 * tic80.h (struct tic80_opcode): Name changed.
1724 (struct tic80_opcode): Remove format field.
1725 (struct tic80_operand): Add insertion and extraction functions.
1726 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1727 correct ones.
1728 (FMT_*): Ditto.
1729
1730 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1731
1732 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1733 type IV instruction offsets.
1734
1735 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1736
1737 * tic80.h: New file.
1738
1739 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1740
1741 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1742
1743 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1744
1745 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1746 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1747 * v850.h: Fix comment, v850_operand not powerpc_operand.
1748
1749 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1750
1751 * mn10200.h: Flesh out structures and definitions needed by
1752 the mn10200 assembler & disassembler.
1753
1754 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1755
1756 * mips.h: Add mips16 definitions.
1757
1758 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1759
1760 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1761
1762 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1763
1764 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1765 (MN10300_OPERAND_MEMADDR): Define.
1766
1767 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1768
1769 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1770
1771 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1772
1773 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1774
1775 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1776
1777 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1778
1779 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1780
1781 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1782
1783 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1784
1785 * alpha.h: Don't include "bfd.h"; private relocation types are now
1786 negative to minimize problems with shared libraries. Organize
1787 instruction subsets by AMASK extensions and PALcode
1788 implementation.
1789 (struct alpha_operand): Move flags slot for better packing.
1790
1791 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1792
1793 * v850.h (V850_OPERAND_RELAX): New operand flag.
1794
1795 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1796
1797 * mn10300.h (FMT_*): Move operand format definitions
1798 here.
1799
1800 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1801
1802 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1803
1804 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1805
1806 * mn10300.h (mn10300_opcode): Add "format" field.
1807 (MN10300_OPERAND_*): Define.
1808
1809 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1810
1811 * mn10x00.h: Delete.
1812 * mn10200.h, mn10300.h: New files.
1813
1814 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1815
1816 * mn10x00.h: New file.
1817
1818 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1819
1820 * v850.h: Add new flag to indicate this instruction uses a PC
1821 displacement.
1822
1823 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1824
1825 * h8300.h (stmac): Add missing instruction.
1826
1827 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1828
1829 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1830 field.
1831
1832 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1833
1834 * v850.h (V850_OPERAND_EP): Define.
1835
1836 * v850.h (v850_opcode): Add size field.
1837
1838 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1839
1840 * v850.h (v850_operands): Add insert and extract fields, pointers
1841 to functions used to handle unusual operand encoding.
1842 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1843 V850_OPERAND_SIGNED): Defined.
1844
1845 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1846
1847 * v850.h (v850_operands): Add flags field.
1848 (OPERAND_REG, OPERAND_NUM): Defined.
1849
1850 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1851
1852 * v850.h: New file.
1853
1854 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1855
1856 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1857 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1858 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1859 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1860 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1861 Defined.
1862
1863 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1864
1865 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1866 a 3 bit space id instead of a 2 bit space id.
1867
1868 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1869
1870 * d10v.h: Add some additional defines to support the
1871 assembler in determining which operations can be done in parallel.
1872
1873 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1874
1875 * h8300.h (SN): Define.
1876 (eepmov.b): Renamed from "eepmov"
1877 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1878 with them.
1879
1880 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1881
1882 * d10v.h (OPERAND_SHIFT): New operand flag.
1883
1884 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1885
1886 * d10v.h: Changes for divs, parallel-only instructions, and
1887 signed numbers.
1888
1889 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1890
1891 * d10v.h (pd_reg): Define. Putting the definition here allows
1892 the assembler and disassembler to share the same struct.
1893
1894 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1895
1896 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1897 Williams <steve@icarus.com>.
1898
1899 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1900
1901 * d10v.h: New file.
1902
1903 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1904
1905 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1906
1907 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1908
1909 * m68k.h (mcf5200): New macro.
1910 Document names of coldfire control registers.
1911
1912 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1913
1914 * h8300.h (SRC_IN_DST): Define.
1915
1916 * h8300.h (UNOP3): Mark the register operand in this insn
1917 as a source operand, not a destination operand.
1918 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1919 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1920 register operand with SRC_IN_DST.
1921
1922 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1923
1924 * alpha.h: New file.
1925
1926 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1927
1928 * rs6k.h: Remove obsolete file.
1929
1930 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1931
1932 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1933 fdivp, and fdivrp. Add ffreep.
1934
1935 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1936
1937 * h8300.h: Reorder various #defines for readability.
1938 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1939 (BITOP): Accept additional (unused) argument. All callers changed.
1940 (EBITOP): Likewise.
1941 (O_LAST): Bump.
1942 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1943
1944 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1945 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1946 (BITOP, EBITOP): Handle new H8/S addressing modes for
1947 bit insns.
1948 (UNOP3): Handle new shift/rotate insns on the H8/S.
1949 (insns using exr): New instructions.
1950 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1951
1952 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1953
1954 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1955 was incorrect.
1956
1957 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1958
1959 * h8300.h (START): Remove.
1960 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1961 and mov.l insns that can be relaxed.
1962
1963 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1964
1965 * i386.h: Remove Abs32 from lcall.
1966
1967 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1968
1969 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1970 (SLCPOP): New macro.
1971 Mark X,Y opcode letters as in use.
1972
1973 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1974
1975 * sparc.h (F_FLOAT, F_FBR): Define.
1976
1977 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1978
1979 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1980 from all insns.
1981 (ABS8SRC,ABS8DST): Add ABS8MEM.
1982 (add.l): Fix reg+reg variant.
1983 (eepmov.w): Renamed from eepmovw.
1984 (ldc,stc): Fix many cases.
1985
1986 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1987
1988 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1989
1990 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1991
1992 * sparc.h (O): Mark operand letter as in use.
1993
1994 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1995
1996 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1997 Mark operand letters uU as in use.
1998
1999 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2000
2001 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2002 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2003 (SPARC_OPCODE_SUPPORTED): New macro.
2004 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2005 (F_NOTV9): Delete.
2006
2007 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2008
2009 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2010 declaration consistent with return type in definition.
2011
2012 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2013
2014 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2015
2016 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2017
2018 * i386.h (i386_regtab): Add 80486 test registers.
2019
2020 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2021
2022 * i960.h (I_HX): Define.
2023 (i960_opcodes): Add HX instruction.
2024
2025 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2026
2027 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2028 and fclex.
2029
2030 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2031
2032 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2033 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2034 (bfd_* defines): Delete.
2035 (sparc_opcode_archs): Replaces architecture_pname.
2036 (sparc_opcode_lookup_arch): Declare.
2037 (NUMOPCODES): Delete.
2038
2039 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2040
2041 * sparc.h (enum sparc_architecture): Add v9a.
2042 (ARCHITECTURES_CONFLICT_P): Update.
2043
2044 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2045
2046 * i386.h: Added Pentium Pro instructions.
2047
2048 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2049
2050 * m68k.h: Document new 'W' operand place.
2051
2052 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2053
2054 * hppa.h: Add lci and syncdma instructions.
2055
2056 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2057
2058 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
2059 instructions.
2060
2061 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2062
2063 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2064 assembler's -mcom and -many switches.
2065
2066 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2067
2068 * i386.h: Fix cmpxchg8b extension opcode description.
2069
2070 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2071
2072 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2073 and register cr4.
2074
2075 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2076
2077 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2078
2079 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2080
2081 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2082
2083 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2084
2085 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2086
2087 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2088
2089 * m68kmri.h: Remove.
2090
2091 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2092 declarations. Remove F_ALIAS and flag field of struct
2093 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2094 int. Make name and args fields of struct m68k_opcode const.
2095
2096 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2097
2098 * sparc.h (F_NOTV9): Define.
2099
2100 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2101
2102 * mips.h (INSN_4010): Define.
2103
2104 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2105
2106 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2107
2108 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2109 * m68k.h: Fix argument descriptions of coprocessor
2110 instructions to allow only alterable operands where appropriate.
2111 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2112 (m68k_opcode_aliases): Add more aliases.
2113
2114 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2115
2116 * m68k.h: Added explcitly short-sized conditional branches, and a
2117 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2118 svr4-based configurations.
2119
2120 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2121
2122 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2123 * i386.h: added missing Data16/Data32 flags to a few instructions.
2124
2125 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2126
2127 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2128 (OP_MASK_BCC, OP_SH_BCC): Define.
2129 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2130 (OP_MASK_CCC, OP_SH_CCC): Define.
2131 (INSN_READ_FPR_R): Define.
2132 (INSN_RFE): Delete.
2133
2134 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2135
2136 * m68k.h (enum m68k_architecture): Deleted.
2137 (struct m68k_opcode_alias): New type.
2138 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2139 matching constraints, values and flags. As a side effect of this,
2140 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2141 as I know were never used, now may need re-examining.
2142 (numopcodes): Now const.
2143 (m68k_opcode_aliases, numaliases): New variables.
2144 (endop): Deleted.
2145 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2146 m68k_opcode_aliases; update declaration of m68k_opcodes.
2147
2148 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2149
2150 * hppa.h (delay_type): Delete unused enumeration.
2151 (pa_opcode): Replace unused delayed field with an architecture
2152 field.
2153 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2154
2155 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2156
2157 * mips.h (INSN_ISA4): Define.
2158
2159 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2160
2161 * mips.h (M_DLA_AB, M_DLI): Define.
2162
2163 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2164
2165 * hppa.h (fstwx): Fix single-bit error.
2166
2167 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2168
2169 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2170
2171 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2172
2173 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2174 debug registers. From Charles Hannum (mycroft@netbsd.org).
2175
2176 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2177
2178 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2179 i386 support:
2180 * i386.h (MOV_AX_DISP32): New macro.
2181 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2182 of several call/return instructions.
2183 (ADDR_PREFIX_OPCODE): New macro.
2184
2185 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2186
2187 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2188
2189 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2190 char.
2191 (struct vot, field `name'): ditto.
2192
2193 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2194
2195 * vax.h: Supply and properly group all values in end sentinel.
2196
2197 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2198
2199 * mips.h (INSN_ISA, INSN_4650): Define.
2200
2201 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2202
2203 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2204 systems with a separate instruction and data cache, such as the
2205 29040, these instructions take an optional argument.
2206
2207 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2208
2209 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2210 INSN_TRAP.
2211
2212 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2213
2214 * mips.h (INSN_STORE_MEMORY): Define.
2215
2216 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2217
2218 * sparc.h: Document new operand type 'x'.
2219
2220 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2221
2222 * i960.h (I_CX2): New instruction category. It includes
2223 instructions available on Cx and Jx processors.
2224 (I_JX): New instruction category, for JX-only instructions.
2225 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2226 Jx-only instructions, in I_JX category.
2227
2228 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2229
2230 * ns32k.h (endop): Made pointer const too.
2231
2232 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2233
2234 * ns32k.h: Drop Q operand type as there is no correct use
2235 for it. Add I and Z operand types which allow better checking.
2236
2237 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2238
2239 * h8300.h (xor.l) :fix bit pattern.
2240 (L_2): New size of operand.
2241 (trapa): Use it.
2242
2243 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2244
2245 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2246
2247 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2248
2249 * sparc.h: Include v9 definitions.
2250
2251 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2252
2253 * m68k.h (m68060): Defined.
2254 (m68040up, mfloat, mmmu): Include it.
2255 (struct m68k_opcode): Widen `arch' field.
2256 (m68k_opcodes): Updated for M68060. Removed comments that were
2257 instructions commented out by "JF" years ago.
2258
2259 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2260
2261 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2262 add a one-bit `flags' field.
2263 (F_ALIAS): New macro.
2264
2265 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2266
2267 * h8300.h (dec, inc): Get encoding right.
2268
2269 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2270
2271 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2272 a flag instead.
2273 (PPC_OPERAND_SIGNED): Define.
2274 (PPC_OPERAND_SIGNOPT): Define.
2275
2276 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2277
2278 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2279 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2280
2281 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2282
2283 * i386.h: Reverse last change. It'll be handled in gas instead.
2284
2285 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2286
2287 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2288 slower on the 486 and used the implicit shift count despite the
2289 explicit operand. The one-operand form is still available to get
2290 the shorter form with the implicit shift count.
2291
2292 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2293
2294 * hppa.h: Fix typo in fstws arg string.
2295
2296 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2297
2298 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2299
2300 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2301
2302 * ppc.h (PPC_OPCODE_601): Define.
2303
2304 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2305
2306 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2307 (so we can determine valid completers for both addb and addb[tf].)
2308
2309 * hppa.h (xmpyu): No floating point format specifier for the
2310 xmpyu instruction.
2311
2312 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2313
2314 * ppc.h (PPC_OPERAND_NEXT): Define.
2315 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2316 (struct powerpc_macro): Define.
2317 (powerpc_macros, powerpc_num_macros): Declare.
2318
2319 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2320
2321 * ppc.h: New file. Header file for PowerPC opcode table.
2322
2323 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2324
2325 * hppa.h: More minor template fixes for sfu and copr (to allow
2326 for easier disassembly).
2327
2328 * hppa.h: Fix templates for all the sfu and copr instructions.
2329
2330 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2331
2332 * i386.h (push): Permit Imm16 operand too.
2333
2334 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2335
2336 * h8300.h (andc): Exists in base arch.
2337
2338 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2339
2340 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2341 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2342
2343 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2344
2345 * hppa.h: Add FP quadword store instructions.
2346
2347 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2348
2349 * mips.h: (M_J_A): Added.
2350 (M_LA): Removed.
2351
2352 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2353
2354 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2355 <mellon@pepper.ncd.com>.
2356
2357 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2358
2359 * hppa.h: Immediate field in probei instructions is unsigned,
2360 not low-sign extended.
2361
2362 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2363
2364 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2365
2366 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2367
2368 * i386.h: Add "fxch" without operand.
2369
2370 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2371
2372 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2373
2374 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2375
2376 * hppa.h: Add gfw and gfr to the opcode table.
2377
2378 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2379
2380 * m88k.h: extended to handle m88110.
2381
2382 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2383
2384 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2385 addresses.
2386
2387 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2388
2389 * i960.h (i960_opcodes): Properly bracket initializers.
2390
2391 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2392
2393 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2394
2395 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2396
2397 * m68k.h (two): Protect second argument with parentheses.
2398
2399 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2400
2401 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2402 Deleted old in/out instructions in "#if 0" section.
2403
2404 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2405
2406 * i386.h (i386_optab): Properly bracket initializers.
2407
2408 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2409
2410 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2411 Jeff Law, law@cs.utah.edu).
2412
2413 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2414
2415 * i386.h (lcall): Accept Imm32 operand also.
2416
2417 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2418
2419 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2420 (M_DABS): Added.
2421
2422 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2423
2424 * mips.h (INSN_*): Changed values. Removed unused definitions.
2425 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2426 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2427 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2428 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2429 (M_*): Added new values for r6000 and r4000 macros.
2430 (ANY_DELAY): Removed.
2431
2432 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2433
2434 * mips.h: Added M_LI_S and M_LI_SS.
2435
2436 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2437
2438 * h8300.h: Get some rare mov.bs correct.
2439
2440 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2441
2442 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2443 been included.
2444
2445 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2446
2447 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2448 jump instructions, for use in disassemblers.
2449
2450 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2451
2452 * m88k.h: Make bitfields just unsigned, not unsigned long or
2453 unsigned short.
2454
2455 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2456
2457 * hppa.h: New argument type 'y'. Use in various float instructions.
2458
2459 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2460
2461 * hppa.h (break): First immediate field is unsigned.
2462
2463 * hppa.h: Add rfir instruction.
2464
2465 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2466
2467 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2468
2469 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2470
2471 * mips.h: Reworked the hazard information somewhat, and fixed some
2472 bugs in the instruction hazard descriptions.
2473
2474 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2475
2476 * m88k.h: Corrected a couple of opcodes.
2477
2478 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2479
2480 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2481 new version includes instruction hazard information, but is
2482 otherwise reasonably similar.
2483
2484 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2485
2486 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2487
2488 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2489
2490 Patches from Jeff Law, law@cs.utah.edu:
2491 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2492 Make the tables be the same for the following instructions:
2493 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2494 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2495 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2496 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2497 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2498 "fcmp", and "ftest".
2499
2500 * hppa.h: Make new and old tables the same for "break", "mtctl",
2501 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2502 Fix typo in last patch. Collapse several #ifdefs into a
2503 single #ifdef.
2504
2505 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2506 of the comments up-to-date.
2507
2508 * hppa.h: Update "free list" of letters and update
2509 comments describing each letter's function.
2510
2511 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2512
2513 * h8300.h: Lots of little fixes for the h8/300h.
2514
2515 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2516
2517 Support for H8/300-H
2518 * h8300.h: Lots of new opcodes.
2519
2520 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2521
2522 * h8300.h: checkpoint, includes H8/300-H opcodes.
2523
2524 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2525
2526 * Patches from Jeffrey Law <law@cs.utah.edu>.
2527 * hppa.h: Rework single precision FP
2528 instructions so that they correctly disassemble code
2529 PA1.1 code.
2530
2531 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2532
2533 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2534 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2535
2536 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2537
2538 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2539 gdb will define it for now.
2540
2541 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2542
2543 * sparc.h: Don't end enumerator list with comma.
2544
2545 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2546
2547 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2548 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2549 ("bc2t"): Correct typo.
2550 ("[ls]wc[023]"): Use T rather than t.
2551 ("c[0123]"): Define general coprocessor instructions.
2552
2553 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2554
2555 * m68k.h: Move split point for gcc compilation more towards
2556 middle.
2557
2558 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2559
2560 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2561 simply wrong, ics, rfi, & rfsvc were missing).
2562 Add "a" to opr_ext for "bb". Doc fix.
2563
2564 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2565
2566 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2567 * mips.h: Add casts, to suppress warnings about shifting too much.
2568 * m68k.h: Document the placement code '9'.
2569
2570 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2571
2572 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2573 allows callers to break up the large initialized struct full of
2574 opcodes into two half-sized ones. This permits GCC to compile
2575 this module, since it takes exponential space for initializers.
2576 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2577
2578 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2579
2580 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2581 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2582 initialized structs in it.
2583
2584 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2585
2586 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2587 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2588 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2589
2590 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2591
2592 * mips.h: document "i" and "j" operands correctly.
2593
2594 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2595
2596 * mips.h: Removed endianness dependency.
2597
2598 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2599
2600 * h8300.h: include info on number of cycles per instruction.
2601
2602 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2603
2604 * hppa.h: Move handy aliases to the front. Fix masks for extract
2605 and deposit instructions.
2606
2607 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2608
2609 * i386.h: accept shld and shrd both with and without the shift
2610 count argument, which is always %cl.
2611
2612 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2613
2614 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2615 (one_byte_segment_defaults, two_byte_segment_defaults,
2616 i386_prefixtab_end): Ditto.
2617
2618 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2619
2620 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2621 for operand 2; from John Carr, jfc@dsg.dec.com.
2622
2623 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2624
2625 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2626 always use 16-bit offsets. Makes calculated-size jump tables
2627 feasible.
2628
2629 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2630
2631 * i386.h: Fix one-operand forms of in* and out* patterns.
2632
2633 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2634
2635 * m68k.h: Added CPU32 support.
2636
2637 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2638
2639 * mips.h (break): Disassemble the argument. Patch from
2640 jonathan@cs.stanford.edu (Jonathan Stone).
2641
2642 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2643
2644 * m68k.h: merged Motorola and MIT syntax.
2645
2646 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2647
2648 * m68k.h (pmove): make the tests less strict, the 68k book is
2649 wrong.
2650
2651 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2652
2653 * m68k.h (m68ec030): Defined as alias for 68030.
2654 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2655 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2656 them. Tightened description of "fmovex" to distinguish it from
2657 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2658 up descriptions that claimed versions were available for chips not
2659 supporting them. Added "pmovefd".
2660
2661 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2662
2663 * m68k.h: fix where the . goes in divull
2664
2665 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2666
2667 * m68k.h: the cas2 instruction is supposed to be written with
2668 indirection on the last two operands, which can be either data or
2669 address registers. Added a new operand type 'r' which accepts
2670 either register type. Added new cases for cas2l and cas2w which
2671 use them. Corrected masks for cas2 which failed to recognize use
2672 of address register.
2673
2674 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2675
2676 * m68k.h: Merged in patches (mostly m68040-specific) from
2677 Colin Smith <colin@wrs.com>.
2678
2679 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2680 base). Also cleaned up duplicates, re-ordered instructions for
2681 the sake of dis-assembling (so aliases come after standard names).
2682 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2683
2684 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2685
2686 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2687 all missing .s
2688
2689 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2690
2691 * sparc.h: Moved tables to BFD library.
2692
2693 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2694
2695 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2696
2697 * h8300.h: Finish filling in all the holes in the opcode table,
2698 so that the Lucid C compiler can digest this as well...
2699
2700 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2701
2702 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2703 Fix opcodes on various sizes of fild/fist instructions
2704 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2705 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2706
2707 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2708
2709 * h8300.h: Fill in all the holes in the opcode table so that the
2710 losing HPUX C compiler can digest this...
2711
2712 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2713
2714 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2715 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2716
2717 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2718
2719 * sparc.h: Add new architecture variant sparclite; add its scan
2720 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2721
2722 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2723
2724 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2725 fy@lucid.com).
2726
2727 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2728
2729 * rs6k.h: New version from IBM (Metin).
2730
2731 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2732
2733 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2734 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2735
2736 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2737
2738 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2739
2740 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2741
2742 * m68k.h (one, two): Cast macro args to unsigned to suppress
2743 complaints from compiler and lint about integer overflow during
2744 shift.
2745
2746 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2747
2748 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2749
2750 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2751
2752 * mips.h: Make bitfield layout depend on the HOST compiler,
2753 not on the TARGET system.
2754
2755 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2756
2757 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2758 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2759 <TRANLE@INTELLICORP.COM>.
2760
2761 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2762
2763 * h8300.h: turned op_type enum into #define list
2764
2765 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2766
2767 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2768 similar instructions -- they've been renamed to "fitoq", etc.
2769 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2770 number of arguments.
2771 * h8300.h: Remove extra ; which produces compiler warning.
2772
2773 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2774
2775 * sparc.h: fix opcode for tsubcctv.
2776
2777 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2778
2779 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2780
2781 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2782
2783 * sparc.h (nop): Made the 'lose' field be even tighter,
2784 so only a standard 'nop' is disassembled as a nop.
2785
2786 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2787
2788 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2789 disassembled as a nop.
2790
2791 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2792
2793 * m68k.h, sparc.h: ANSIfy enums.
2794
2795 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2796
2797 * sparc.h: fix a typo.
2798
2799 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2800
2801 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2802 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2803 vax.h: Renamed from ../<foo>-opcode.h.
2804
2805 \f
2806 Local Variables:
2807 version-control: never
2808 End:
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