b506b66af1df798682d9e3819759d95ecf668d89
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-01-11 Peter Targett <peter.targett@arccores.com>
2
3 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
4 definitions for masking cpu type.
5 (arc_ext_operand_value) New structure for storing extended
6 operands.
7 (ARC_OPERAND_*) Flags for operand values.
8
9 2001-01-10 Jan Hubicka <jh@suse.cz>
10
11 * i386.h (pinsrw): Add.
12 (pshufw): Remove.
13 (cvttpd2dq): Fix operands.
14 (cvttps2dq): Likewise.
15 (movq2q): Rename to movdq2q.
16
17 2001-01-10 Richard Schaal <richard.schaal@intel.com>
18
19 * i386.h: Correct movnti instruction.
20
21 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
22
23 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
24 of operands (unsigned char or unsigned short).
25 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
26 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
27
28 2001-01-05 Jan Hubicka <jh@suse.cz>
29
30 * i386.h (i386_optab): Make [sml]fence template to use immext field.
31
32 2001-01-03 Jan Hubicka <jh@suse.cz>
33
34 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
35 introduced by Pentium4
36
37 2000-12-30 Jan Hubicka <jh@suse.cz>
38
39 * i386.h (i386_optab): Add "rex*" instructions;
40 add swapgs; disable jmp/call far direct instructions for
41 64bit mode; add syscall and sysret; disable registers for 0xc6
42 template. Add 'q' suffixes to extendable instructions, disable
43 obsolete instructions, add new sign/zero extension ones.
44 (i386_regtab): Add extended registers.
45 (*Suf): Add No_qSuf.
46 (q_Suf, wlq_Suf, bwlq_Suf): New.
47
48 2000-12-20 Jan Hubicka <jh@suse.cz>
49
50 * i386.h (i386_optab): Replace "Imm" with "EncImm".
51 (i386_regtab): Add flags field.
52
53 2000-12-12 Nick Clifton <nickc@redhat.com>
54
55 * mips.h: Fix formatting.
56
57 2000-12-01 Chris Demetriou <cgd@sibyte.com>
58
59 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
60 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
61 OP_*_SYSCALL definitions.
62 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
63 19 bit wait codes.
64 (MIPS operand specifier comments): Remove 'm', add 'U' and
65 'J', and update the meaning of 'B' so that it's more general.
66
67 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
68 INSN_ISA5): Renumber, redefine to mean the ISA at which the
69 instruction was added.
70 (INSN_ISA32): New constant.
71 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
72 Renumber to avoid new and/or renumbered INSN_* constants.
73 (INSN_MIPS32): Delete.
74 (ISA_UNKNOWN): New constant to indicate unknown ISA.
75 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
76 ISA_MIPS32): New constants, defined to be the mask of INSN_*
77 constants available at that ISA level.
78 (CPU_UNKNOWN): New constant to indicate unknown CPU.
79 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
80 define it with a unique value.
81 (OPCODE_IS_MEMBER): Update for new ISA membership-related
82 constant meanings.
83
84 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
85 definitions.
86
87 * mips.h (CPU_SB1): New constant.
88
89 2000-10-20 Jakub Jelinek <jakub@redhat.com>
90
91 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
92 Note that '3' is used for siam operand.
93
94 2000-09-22 Jim Wilson <wilson@cygnus.com>
95
96 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
97
98 2000-09-13 Anders Norlander <anorland@acc.umu.se>
99
100 * mips.h: Use defines instead of hard-coded processor numbers.
101 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
102 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
103 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
104 CPU_4KC, CPU_4KM, CPU_4KP): Define..
105 (OPCODE_IS_MEMBER): Use new defines.
106 (OP_MASK_SEL, OP_SH_SEL): Define.
107 (OP_MASK_CODE20, OP_SH_CODE20): Define.
108 Add 'P' to used characters.
109 Use 'H' for coprocessor select field.
110 Use 'm' for 20 bit breakpoint code.
111 Document new arg characters and add to used characters.
112 (INSN_MIPS32): New define for MIPS32 extensions.
113 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
114
115 2000-09-05 Alan Modra <alan@linuxcare.com.au>
116
117 * hppa.h: Mention cz completer.
118
119 2000-08-16 Jim Wilson <wilson@cygnus.com>
120
121 * ia64.h (IA64_OPCODE_POSTINC): New.
122
123 2000-08-15 H.J. Lu <hjl@gnu.org>
124
125 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
126 IgnoreSize change.
127
128 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
129
130 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
131 Move related opcodes closer to each other.
132 Minor changes in comments, list undefined opcodes.
133
134 2000-07-26 Dave Brolley <brolley@redhat.com>
135
136 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
137
138 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
139
140 cris.h: New file.
141
142 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
143
144 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
145 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
146 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
147 (AVR_ISA_M83): Define for ATmega83, ATmega85.
148 (espm): Remove, because ESPM removed in databook update.
149 (eicall, eijmp): Move to the end of opcode table.
150
151 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
152
153 * m68hc11.h: New file for support of Motorola 68hc11.
154
155 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
156
157 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
158
159 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
160
161 * avr.h: New file with AVR opcodes.
162
163 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
164
165 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
166
167 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
168
169 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
170
171 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
172
173 * i386.h: Use sl_FP, not sl_Suf for fild.
174
175 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
176
177 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
178 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
179 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
180 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
181
182 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
183
184 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
185
186 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
187 Alexander Sokolov <robocop@netlink.ru>
188
189 * i386.h (i386_optab): Add cpu_flags for all instructions.
190
191 2000-05-13 Alan Modra <alan@linuxcare.com.au>
192
193 From Gavin Romig-Koch <gavin@cygnus.com>
194 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
195
196 2000-05-04 Timothy Wall <twall@cygnus.com>
197
198 * tic54x.h: New.
199
200 2000-05-03 J.T. Conklin <jtc@redback.com>
201
202 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
203 (PPC_OPERAND_VR): New operand flag for vector registers.
204
205 2000-05-01 Kazu Hirata <kazu@hxi.com>
206
207 * h8300.h (EOP): Add missing initializer.
208
209 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
210
211 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
212 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
213 New operand types l,y,&,fe,fE,fx added to support above forms.
214 (pa_opcodes): Replaced usage of 'x' as source/target for
215 floating point double-word loads/stores with 'fx'.
216
217 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
218 David Mosberger <davidm@hpl.hp.com>
219 Timothy Wall <twall@cygnus.com>
220 Jim Wilson <wilson@cygnus.com>
221
222 * ia64.h: New file.
223
224 2000-03-27 Nick Clifton <nickc@cygnus.com>
225
226 * d30v.h (SHORT_A1): Fix value.
227 (SHORT_AR): Renumber so that it is at the end of the list of short
228 instructions, not the end of the list of long instructions.
229
230 2000-03-26 Alan Modra <alan@linuxcare.com>
231
232 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
233 problem isn't really specific to Unixware.
234 (OLDGCC_COMPAT): Define.
235 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
236 destination %st(0).
237 Fix lots of comments.
238
239 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
240
241 * d30v.h:
242 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
243 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
244 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
245 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
246 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
247 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
248 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
249
250 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
251
252 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
253 fistpd without suffix.
254
255 2000-02-24 Nick Clifton <nickc@cygnus.com>
256
257 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
258 'signed_overflow_ok_p'.
259 Delete prototypes for cgen_set_flags() and cgen_get_flags().
260
261 2000-02-24 Andrew Haley <aph@cygnus.com>
262
263 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
264 (CGEN_CPU_TABLE): flags: new field.
265 Add prototypes for new functions.
266
267 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
268
269 * i386.h: Add some more UNIXWARE_COMPAT comments.
270
271 2000-02-23 Linas Vepstas <linas@linas.org>
272
273 * i370.h: New file.
274
275 2000-02-22 Andrew Haley <aph@cygnus.com>
276
277 * mips.h: (OPCODE_IS_MEMBER): Add comment.
278
279 1999-12-30 Andrew Haley <aph@cygnus.com>
280
281 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
282 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
283 insns.
284
285 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
286
287 * i386.h: Qualify intel mode far call and jmp with x_Suf.
288
289 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
290
291 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
292 indirect jumps and calls. Add FF/3 call for intel mode.
293
294 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
295
296 * mn10300.h: Add new operand types. Add new instruction formats.
297
298 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
299
300 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
301 instruction.
302
303 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
304
305 * mips.h (INSN_ISA5): New.
306
307 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
308
309 * mips.h (OPCODE_IS_MEMBER): New.
310
311 1999-10-29 Nick Clifton <nickc@cygnus.com>
312
313 * d30v.h (SHORT_AR): Define.
314
315 1999-10-18 Michael Meissner <meissner@cygnus.com>
316
317 * alpha.h (alpha_num_opcodes): Convert to unsigned.
318 (alpha_num_operands): Ditto.
319
320 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
321
322 * hppa.h (pa_opcodes): Add load and store cache control to
323 instructions. Add ordered access load and store.
324
325 * hppa.h (pa_opcode): Add new entries for addb and addib.
326
327 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
328
329 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
330
331 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
332
333 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
334
335 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
336
337 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
338 and "be" using completer prefixes.
339
340 * hppa.h (pa_opcodes): Add initializers to silence compiler.
341
342 * hppa.h: Update comments about character usage.
343
344 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
345
346 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
347 up the new fstw & bve instructions.
348
349 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
350
351 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
352 instructions.
353
354 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
355
356 * hppa.h (pa_opcodes): Add long offset double word load/store
357 instructions.
358
359 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
360 stores.
361
362 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
363
364 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
365
366 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
367
368 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
369
370 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
371
372 * hppa.h (pa_opcodes): Add support for "b,l".
373
374 * hppa.h (pa_opcodes): Add support for "b,gate".
375
376 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
377
378 * hppa.h (pa_opcodes): Use 'fX' for first register operand
379 in xmpyu.
380
381 * hppa.h (pa_opcodes): Fix mask for probe and probei.
382
383 * hppa.h (pa_opcodes): Fix mask for depwi.
384
385 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
386
387 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
388 an explicit output argument.
389
390 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
391
392 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
393 Add a few PA2.0 loads and store variants.
394
395 1999-09-04 Steve Chamberlain <sac@pobox.com>
396
397 * pj.h: New file.
398
399 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
400
401 * i386.h (i386_regtab): Move %st to top of table, and split off
402 other fp reg entries.
403 (i386_float_regtab): To here.
404
405 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
406
407 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
408 by 'f'.
409
410 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
411 Add supporting args.
412
413 * hppa.h: Document new completers and args.
414 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
415 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
416 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
417 pmenb and pmdis.
418
419 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
420 hshr, hsub, mixh, mixw, permh.
421
422 * hppa.h (pa_opcodes): Change completers in instructions to
423 use 'c' prefix.
424
425 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
426 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
427
428 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
429 fnegabs to use 'I' instead of 'F'.
430
431 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
432
433 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
434 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
435 Alphabetically sort PIII insns.
436
437 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
438
439 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
440
441 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
442
443 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
444 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
445
446 * hppa.h: Document 64 bit condition completers.
447
448 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
449
450 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
451
452 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
453
454 * i386.h (i386_optab): Add DefaultSize modifier to all insns
455 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
456 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
457
458 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
459 Jeff Law <law@cygnus.com>
460
461 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
462
463 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
464
465 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
466 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
467
468 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
469
470 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
471
472 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
473
474 * hppa.h (struct pa_opcode): Add new field "flags".
475 (FLAGS_STRICT): Define.
476
477 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
478 Jeff Law <law@cygnus.com>
479
480 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
481
482 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
483
484 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
485
486 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
487 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
488 flag to fcomi and friends.
489
490 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
491
492 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
493 integer logical instructions.
494
495 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
496
497 * m68k.h: Document new formats `E', `G', `H' and new places `N',
498 `n', `o'.
499
500 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
501 and new places `m', `M', `h'.
502
503 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
504
505 * hppa.h (pa_opcodes): Add several processor specific system
506 instructions.
507
508 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
509
510 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
511 "addb", and "addib" to be used by the disassembler.
512
513 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
514
515 * i386.h (ReverseModrm): Remove all occurences.
516 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
517 movmskps, pextrw, pmovmskb, maskmovq.
518 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
519 ignore the data size prefix.
520
521 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
522 Mostly stolen from Doug Ledford <dledford@redhat.com>
523
524 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
525
526 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
527
528 1999-04-14 Doug Evans <devans@casey.cygnus.com>
529
530 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
531 (CGEN_ATTR_TYPE): Update.
532 (CGEN_ATTR_MASK): Number booleans starting at 0.
533 (CGEN_ATTR_VALUE): Update.
534 (CGEN_INSN_ATTR): Update.
535
536 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
537
538 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
539 instructions.
540
541 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
542
543 * hppa.h (bb, bvb): Tweak opcode/mask.
544
545
546 1999-03-22 Doug Evans <devans@casey.cygnus.com>
547
548 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
549 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
550 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
551 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
552 Delete member max_insn_size.
553 (enum cgen_cpu_open_arg): New enum.
554 (cpu_open): Update prototype.
555 (cpu_open_1): Declare.
556 (cgen_set_cpu): Delete.
557
558 1999-03-11 Doug Evans <devans@casey.cygnus.com>
559
560 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
561 (CGEN_OPERAND_NIL): New macro.
562 (CGEN_OPERAND): New member `type'.
563 (@arch@_cgen_operand_table): Delete decl.
564 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
565 (CGEN_OPERAND_TABLE): New struct.
566 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
567 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
568 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
569 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
570 {get,set}_{int,vma}_operand.
571 (@arch@_cgen_cpu_open): New arg `isa'.
572 (cgen_set_cpu): Ditto.
573
574 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
575
576 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
577
578 1999-02-25 Doug Evans <devans@casey.cygnus.com>
579
580 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
581 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
582 enum cgen_hw_type.
583 (CGEN_HW_TABLE): New struct.
584 (hw_table): Delete declaration.
585 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
586 to table entry to enum.
587 (CGEN_OPINST): Ditto.
588 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
589
590 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
591
592 * alpha.h (AXP_OPCODE_EV6): New.
593 (AXP_OPCODE_NOPAL): Include it.
594
595 1999-02-09 Doug Evans <devans@casey.cygnus.com>
596
597 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
598 All uses updated. New members int_insn_p, max_insn_size,
599 parse_operand,insert_operand,extract_operand,print_operand,
600 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
601 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
602 extract_handlers,print_handlers.
603 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
604 (CGEN_ATTR_BOOL_OFFSET): New macro.
605 (CGEN_ATTR_MASK): Subtract it to compute bit number.
606 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
607 (cgen_opcode_handler): Renamed from cgen_base.
608 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
609 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
610 all uses updated.
611 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
612 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
613 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
614 (CGEN_OPCODE,CGEN_IBASE): New types.
615 (CGEN_INSN): Rewrite.
616 (CGEN_{ASM,DIS}_HASH*): Delete.
617 (init_opcode_table,init_ibld_table): Declare.
618 (CGEN_INSN_ATTR): New type.
619
620 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
621
622 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
623 (x_FP, d_FP, dls_FP, sldx_FP): Define.
624 Change *Suf definitions to include x and d suffixes.
625 (movsx): Use w_Suf and b_Suf.
626 (movzx): Likewise.
627 (movs): Use bwld_Suf.
628 (fld): Change ordering. Use sld_FP.
629 (fild): Add Intel Syntax equivalent of fildq.
630 (fst): Use sld_FP.
631 (fist): Use sld_FP.
632 (fstp): Use sld_FP. Add x_FP version.
633 (fistp): LLongMem version for Intel Syntax.
634 (fcom, fcomp): Use sld_FP.
635 (fadd, fiadd, fsub): Use sld_FP.
636 (fsubr): Use sld_FP.
637 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
638
639 1999-01-27 Doug Evans <devans@casey.cygnus.com>
640
641 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
642 CGEN_MODE_UINT.
643
644 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
645
646 * hppa.h (bv): Fix mask.
647
648 1999-01-05 Doug Evans <devans@casey.cygnus.com>
649
650 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
651 (CGEN_ATTR): Use it.
652 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
653 (CGEN_ATTR_TABLE): New member dfault.
654
655 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
656
657 * mips.h (MIPS16_INSN_BRANCH): New.
658
659 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
660
661 The following is part of a change made by Edith Epstein
662 <eepstein@sophia.cygnus.com> as part of a project to merge in
663 changes by HP; HP did not create ChangeLog entries.
664
665 * hppa.h (completer_chars): list of chars to not put a space
666 after.
667
668 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
669
670 * i386.h (i386_optab): Permit w suffix on processor control and
671 status word instructions.
672
673 1998-11-30 Doug Evans <devans@casey.cygnus.com>
674
675 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
676 (struct cgen_keyword_entry): Ditto.
677 (struct cgen_operand): Ditto.
678 (CGEN_IFLD): New typedef, with associated access macros.
679 (CGEN_IFMT): New typedef, with associated access macros.
680 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
681 (CGEN_IVALUE): New typedef.
682 (struct cgen_insn): Delete const on syntax,attrs members.
683 `format' now points to format data. Type of `value' is now
684 CGEN_IVALUE.
685 (struct cgen_opcode_table): New member ifld_table.
686
687 1998-11-18 Doug Evans <devans@casey.cygnus.com>
688
689 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
690 (CGEN_OPERAND_INSTANCE): New member `attrs'.
691 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
692 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
693 (cgen_opcode_table): Update type of dis_hash fn.
694 (extract_operand): Update type of `insn_value' arg.
695
696 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
697
698 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
699
700 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
701
702 * mips.h (INSN_MULT): Added.
703
704 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
705
706 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
707
708 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
709
710 * cgen.h (CGEN_INSN_INT): New typedef.
711 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
712 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
713 (CGEN_INSN_BYTES_PTR): New typedef.
714 (CGEN_EXTRACT_INFO): New typedef.
715 (cgen_insert_fn,cgen_extract_fn): Update.
716 (cgen_opcode_table): New member `insn_endian'.
717 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
718 (insert_operand,extract_operand): Update.
719 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
720
721 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
722
723 * cgen.h (CGEN_ATTR_BOOLS): New macro.
724 (struct CGEN_HW_ENTRY): New member `attrs'.
725 (CGEN_HW_ATTR): New macro.
726 (struct CGEN_OPERAND_INSTANCE): New member `name'.
727 (CGEN_INSN_INVALID_P): New macro.
728
729 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
730
731 * hppa.h: Add "fid".
732
733 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
734
735 From Robert Andrew Dale <rob@nb.net>
736 * i386.h (i386_optab): Add AMD 3DNow! instructions.
737 (AMD_3DNOW_OPCODE): Define.
738
739 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
740
741 * d30v.h (EITHER_BUT_PREFER_MU): Define.
742
743 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
744
745 * cgen.h (cgen_insn): #if 0 out element `cdx'.
746
747 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
748
749 Move all global state data into opcode table struct, and treat
750 opcode table as something that is "opened/closed".
751 * cgen.h (CGEN_OPCODE_DESC): New type.
752 (all fns): New first arg of opcode table descriptor.
753 (cgen_set_parse_operand_fn): Add prototype.
754 (cgen_current_machine,cgen_current_endian): Delete.
755 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
756 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
757 dis_hash_table,dis_hash_table_entries.
758 (opcode_open,opcode_close): Add prototypes.
759
760 * cgen.h (cgen_insn): New element `cdx'.
761
762 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
763
764 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
765
766 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
767
768 * mn10300.h: Add "no_match_operands" field for instructions.
769 (MN10300_MAX_OPERANDS): Define.
770
771 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
772
773 * cgen.h (cgen_macro_insn_count): Declare.
774
775 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
776
777 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
778 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
779 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
780 set_{int,vma}_operand.
781
782 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
783
784 * mn10300.h: Add "machine" field for instructions.
785 (MN103, AM30): Define machine types.
786
787 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
788
789 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
790
791 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
792
793 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
794
795 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
796
797 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
798 and ud2b.
799 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
800 those that happen to be implemented on pentiums.
801
802 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
803
804 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
805 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
806 with Size16|IgnoreSize or Size32|IgnoreSize.
807
808 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
809
810 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
811 (REPE): Rename to REPE_PREFIX_OPCODE.
812 (i386_regtab_end): Remove.
813 (i386_prefixtab, i386_prefixtab_end): Remove.
814 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
815 of md_begin.
816 (MAX_OPCODE_SIZE): Define.
817 (i386_optab_end): Remove.
818 (sl_Suf): Define.
819 (sl_FP): Use sl_Suf.
820
821 * i386.h (i386_optab): Allow 16 bit displacement for `mov
822 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
823 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
824 data32, dword, and adword prefixes.
825 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
826 regs.
827
828 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
829
830 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
831
832 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
833 register operands, because this is a common idiom. Flag them with
834 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
835 fdivrp because gcc erroneously generates them. Also flag with a
836 warning.
837
838 * i386.h: Add suffix modifiers to most insns, and tighter operand
839 checks in some cases. Fix a number of UnixWare compatibility
840 issues with float insns. Merge some floating point opcodes, using
841 new FloatMF modifier.
842 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
843 consistency.
844
845 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
846 IgnoreDataSize where appropriate.
847
848 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
849
850 * i386.h: (one_byte_segment_defaults): Remove.
851 (two_byte_segment_defaults): Remove.
852 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
853
854 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
855
856 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
857 (cgen_hw_lookup_by_num): Declare.
858
859 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
860
861 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
862 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
863
864 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
865
866 * cgen.h (cgen_asm_init_parse): Delete.
867 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
868 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
869
870 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
871
872 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
873 (cgen_asm_finish_insn): Update prototype.
874 (cgen_insn): New members num, data.
875 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
876 dis_hash, dis_hash_table_size moved to ...
877 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
878 All uses updated. New members asm_hash_p, dis_hash_p.
879 (CGEN_MINSN_EXPANSION): New struct.
880 (cgen_expand_macro_insn): Declare.
881 (cgen_macro_insn_count): Declare.
882 (get_insn_operands): Update prototype.
883 (lookup_get_insn_operands): Declare.
884
885 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
886
887 * i386.h (i386_optab): Change iclrKludge and imulKludge to
888 regKludge. Add operands types for string instructions.
889
890 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
891
892 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
893 table.
894
895 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
896
897 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
898 for `gettext'.
899
900 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
901
902 * i386.h: Remove NoModrm flag from all insns: it's never checked.
903 Add IsString flag to string instructions.
904 (IS_STRING): Don't define.
905 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
906 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
907 (SS_PREFIX_OPCODE): Define.
908
909 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
910
911 * i386.h: Revert March 24 patch; no more LinearAddress.
912
913 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
914
915 * i386.h (i386_optab): Remove fwait (9b) from all floating point
916 instructions, and instead add FWait opcode modifier. Add short
917 form of fldenv and fstenv.
918 (FWAIT_OPCODE): Define.
919
920 * i386.h (i386_optab): Change second operand constraint of `mov
921 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
922 allow legal instructions such as `movl %gs,%esi'
923
924 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
925
926 * h8300.h: Various changes to fully bracket initializers.
927
928 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
929
930 * i386.h: Set LinearAddress for lidt and lgdt.
931
932 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
933
934 * cgen.h (CGEN_BOOL_ATTR): New macro.
935
936 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
937
938 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
939
940 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
941
942 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
943 (cgen_insn): Record syntax and format entries here, rather than
944 separately.
945
946 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
947
948 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
949
950 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
951
952 * cgen.h (cgen_insert_fn): Change type of result to const char *.
953 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
954 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
955
956 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
957
958 * cgen.h (lookup_insn): New argument alias_p.
959
960 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
961
962 Fix rac to accept only a0:
963 * d10v.h (OPERAND_ACC): Split into:
964 (OPERAND_ACC0, OPERAND_ACC1) .
965 (OPERAND_GPR): Define.
966
967 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
968
969 * cgen.h (CGEN_FIELDS): Define here.
970 (CGEN_HW_ENTRY): New member `type'.
971 (hw_list): Delete decl.
972 (enum cgen_mode): Declare.
973 (CGEN_OPERAND): New member `hw'.
974 (enum cgen_operand_instance_type): Declare.
975 (CGEN_OPERAND_INSTANCE): New type.
976 (CGEN_INSN): New member `operands'.
977 (CGEN_OPCODE_DATA): Make hw_list const.
978 (get_insn_operands,lookup_insn): Add prototypes for.
979
980 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
981
982 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
983 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
984 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
985 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
986
987 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
988
989 * cgen.h: Correct typo in comment end marker.
990
991 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
992
993 * tic30.h: New file.
994
995 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
996
997 * cgen.h: Add prototypes for cgen_save_fixups(),
998 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
999 of cgen_asm_finish_insn() to return a char *.
1000
1001 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1002
1003 * cgen.h: Formatting changes to improve readability.
1004
1005 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1006
1007 * cgen.h (*): Clean up pass over `struct foo' usage.
1008 (CGEN_ATTR): Make unsigned char.
1009 (CGEN_ATTR_TYPE): Update.
1010 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1011 (cgen_base): Move member `attrs' to cgen_insn.
1012 (CGEN_KEYWORD): New member `null_entry'.
1013 (CGEN_{SYNTAX,FORMAT}): New types.
1014 (cgen_insn): Format and syntax separated from each other.
1015
1016 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1017
1018 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1019 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1020 flags_{used,set} long.
1021 (d30v_operand): Make flags field long.
1022
1023 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1024
1025 * m68k.h: Fix comment describing operand types.
1026
1027 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1028
1029 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1030 everything else after down.
1031
1032 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1033
1034 * d10v.h (OPERAND_FLAG): Split into:
1035 (OPERAND_FFLAG, OPERAND_CFLAG) .
1036
1037 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1038
1039 * mips.h (struct mips_opcode): Changed comments to reflect new
1040 field usage.
1041
1042 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1043
1044 * mips.h: Added to comments a quick-ref list of all assigned
1045 operand type characters.
1046 (OP_{MASK,SH}_PERFREG): New macros.
1047
1048 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1049
1050 * sparc.h: Add '_' and '/' for v9a asr's.
1051 Patch from David Miller <davem@vger.rutgers.edu>
1052
1053 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1054
1055 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1056 area are not available in the base model (H8/300).
1057
1058 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1059
1060 * m68k.h: Remove documentation of ` operand specifier.
1061
1062 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1063
1064 * m68k.h: Document q and v operand specifiers.
1065
1066 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1067
1068 * v850.h (struct v850_opcode): Add processors field.
1069 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1070 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1071 (PROCESSOR_V850EA): New bit constants.
1072
1073 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1074
1075 Merge changes from Martin Hunt:
1076
1077 * d30v.h: Allow up to 64 control registers. Add
1078 SHORT_A5S format.
1079
1080 * d30v.h (LONG_Db): New form for delayed branches.
1081
1082 * d30v.h: (LONG_Db): New form for repeati.
1083
1084 * d30v.h (SHORT_D2B): New form.
1085
1086 * d30v.h (SHORT_A2): New form.
1087
1088 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1089 registers are used. Needed for VLIW optimization.
1090
1091 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1092
1093 * cgen.h: Move assembler interface section
1094 up so cgen_parse_operand_result is defined for cgen_parse_address.
1095 (cgen_parse_address): Update prototype.
1096
1097 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1098
1099 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1100
1101 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1102
1103 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1104 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1105 <paubert@iram.es>.
1106
1107 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1108 <paubert@iram.es>.
1109
1110 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1111 <paubert@iram.es>.
1112
1113 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1114 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1115
1116 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1117
1118 * v850.h (V850_NOT_R0): New flag.
1119
1120 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1121
1122 * v850.h (struct v850_opcode): Remove flags field.
1123
1124 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1125
1126 * v850.h (struct v850_opcode): Add flags field.
1127 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1128 fields.
1129 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1130 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1131
1132 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1133
1134 * arc.h: New file.
1135
1136 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1137
1138 * sparc.h (sparc_opcodes): Declare as const.
1139
1140 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1141
1142 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1143 uses single or double precision floating point resources.
1144 (INSN_NO_ISA, INSN_ISA1): Define.
1145 (cpu specific INSN macros): Tweak into bitmasks outside the range
1146 of INSN_ISA field.
1147
1148 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1149
1150 * i386.h: Fix pand opcode.
1151
1152 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1153
1154 * mips.h: Widen INSN_ISA and move it to a more convenient
1155 bit position. Add INSN_3900.
1156
1157 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1158
1159 * mips.h (struct mips_opcode): added new field membership.
1160
1161 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1162
1163 * i386.h (movd): only Reg32 is allowed.
1164
1165 * i386.h: add fcomp and ud2. From Wayne Scott
1166 <wscott@ichips.intel.com>.
1167
1168 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1169
1170 * i386.h: Add MMX instructions.
1171
1172 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1173
1174 * i386.h: Remove W modifier from conditional move instructions.
1175
1176 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1177
1178 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1179 with no arguments to match that generated by the UnixWare
1180 assembler.
1181
1182 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1183
1184 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1185 (cgen_parse_operand_fn): Declare.
1186 (cgen_init_parse_operand): Declare.
1187 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1188 new argument `want'.
1189 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1190 (enum cgen_parse_operand_type): New enum.
1191
1192 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1193
1194 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1195
1196 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1197
1198 * cgen.h: New file.
1199
1200 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1201
1202 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1203 fdivrp.
1204
1205 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1206
1207 * v850.h (extract): Make unsigned.
1208
1209 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1210
1211 * i386.h: Add iclr.
1212
1213 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1214
1215 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1216 take a direction bit.
1217
1218 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1219
1220 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1221
1222 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1223
1224 * sparc.h: Include <ansidecl.h>. Update function declarations to
1225 use prototypes, and to use const when appropriate.
1226
1227 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1228
1229 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1230
1231 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1232
1233 * d10v.h: Change pre_defined_registers to
1234 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1235
1236 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1237
1238 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1239 Change mips_opcodes from const array to a pointer,
1240 and change bfd_mips_num_opcodes from const int to int,
1241 so that we can increase the size of the mips opcodes table
1242 dynamically.
1243
1244 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1245
1246 * d30v.h (FLAG_X): Remove unused flag.
1247
1248 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1249
1250 * d30v.h: New file.
1251
1252 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1253
1254 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1255 (PDS_VALUE): Macro to access value field of predefined symbols.
1256 (tic80_next_predefined_symbol): Add prototype.
1257
1258 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1259
1260 * tic80.h (tic80_symbol_to_value): Change prototype to match
1261 change in function, added class parameter.
1262
1263 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1264
1265 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1266 endmask fields, which are somewhat weird in that 0 and 32 are
1267 treated exactly the same.
1268
1269 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1270
1271 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1272 rather than a constant that is 2**X. Reorder them to put bits for
1273 operands that have symbolic names in the upper bits, so they can
1274 be packed into an int where the lower bits contain the value that
1275 corresponds to that symbolic name.
1276 (predefined_symbo): Add struct.
1277 (tic80_predefined_symbols): Declare array of translations.
1278 (tic80_num_predefined_symbols): Declare size of that array.
1279 (tic80_value_to_symbol): Declare function.
1280 (tic80_symbol_to_value): Declare function.
1281
1282 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1283
1284 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1285
1286 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1287
1288 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1289 be the destination register.
1290
1291 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1292
1293 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1294 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1295 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1296 that the opcode can have two vector instructions in a single
1297 32 bit word and we have to encode/decode both.
1298
1299 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1300
1301 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1302 TIC80_OPERAND_RELATIVE for PC relative.
1303 (TIC80_OPERAND_BASEREL): New flag bit for register
1304 base relative.
1305
1306 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1307
1308 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1309
1310 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1311
1312 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1313 ":s" modifier for scaling.
1314
1315 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1316
1317 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1318 (TIC80_OPERAND_M_LI): Ditto
1319
1320 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1321
1322 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1323 (TIC80_OPERAND_CC): New define for condition code operand.
1324 (TIC80_OPERAND_CR): New define for control register operand.
1325
1326 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1327
1328 * tic80.h (struct tic80_opcode): Name changed.
1329 (struct tic80_opcode): Remove format field.
1330 (struct tic80_operand): Add insertion and extraction functions.
1331 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1332 correct ones.
1333 (FMT_*): Ditto.
1334
1335 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1336
1337 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1338 type IV instruction offsets.
1339
1340 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1341
1342 * tic80.h: New file.
1343
1344 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1345
1346 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1347
1348 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1349
1350 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1351 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1352 * v850.h: Fix comment, v850_operand not powerpc_operand.
1353
1354 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1355
1356 * mn10200.h: Flesh out structures and definitions needed by
1357 the mn10200 assembler & disassembler.
1358
1359 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1360
1361 * mips.h: Add mips16 definitions.
1362
1363 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1364
1365 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1366
1367 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1368
1369 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1370 (MN10300_OPERAND_MEMADDR): Define.
1371
1372 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1373
1374 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1375
1376 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1377
1378 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1379
1380 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1381
1382 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1383
1384 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1385
1386 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1387
1388 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1389
1390 * alpha.h: Don't include "bfd.h"; private relocation types are now
1391 negative to minimize problems with shared libraries. Organize
1392 instruction subsets by AMASK extensions and PALcode
1393 implementation.
1394 (struct alpha_operand): Move flags slot for better packing.
1395
1396 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1397
1398 * v850.h (V850_OPERAND_RELAX): New operand flag.
1399
1400 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1401
1402 * mn10300.h (FMT_*): Move operand format definitions
1403 here.
1404
1405 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1406
1407 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1408
1409 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1410
1411 * mn10300.h (mn10300_opcode): Add "format" field.
1412 (MN10300_OPERAND_*): Define.
1413
1414 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1415
1416 * mn10x00.h: Delete.
1417 * mn10200.h, mn10300.h: New files.
1418
1419 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1420
1421 * mn10x00.h: New file.
1422
1423 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1424
1425 * v850.h: Add new flag to indicate this instruction uses a PC
1426 displacement.
1427
1428 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1429
1430 * h8300.h (stmac): Add missing instruction.
1431
1432 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1433
1434 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1435 field.
1436
1437 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1438
1439 * v850.h (V850_OPERAND_EP): Define.
1440
1441 * v850.h (v850_opcode): Add size field.
1442
1443 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1444
1445 * v850.h (v850_operands): Add insert and extract fields, pointers
1446 to functions used to handle unusual operand encoding.
1447 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1448 V850_OPERAND_SIGNED): Defined.
1449
1450 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1451
1452 * v850.h (v850_operands): Add flags field.
1453 (OPERAND_REG, OPERAND_NUM): Defined.
1454
1455 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1456
1457 * v850.h: New file.
1458
1459 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1460
1461 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1462 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1463 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1464 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1465 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1466 Defined.
1467
1468 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1469
1470 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1471 a 3 bit space id instead of a 2 bit space id.
1472
1473 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1474
1475 * d10v.h: Add some additional defines to support the
1476 assembler in determining which operations can be done in parallel.
1477
1478 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1479
1480 * h8300.h (SN): Define.
1481 (eepmov.b): Renamed from "eepmov"
1482 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1483 with them.
1484
1485 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1486
1487 * d10v.h (OPERAND_SHIFT): New operand flag.
1488
1489 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1490
1491 * d10v.h: Changes for divs, parallel-only instructions, and
1492 signed numbers.
1493
1494 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1495
1496 * d10v.h (pd_reg): Define. Putting the definition here allows
1497 the assembler and disassembler to share the same struct.
1498
1499 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1500
1501 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1502 Williams <steve@icarus.com>.
1503
1504 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1505
1506 * d10v.h: New file.
1507
1508 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1509
1510 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1511
1512 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1513
1514 * m68k.h (mcf5200): New macro.
1515 Document names of coldfire control registers.
1516
1517 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1518
1519 * h8300.h (SRC_IN_DST): Define.
1520
1521 * h8300.h (UNOP3): Mark the register operand in this insn
1522 as a source operand, not a destination operand.
1523 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1524 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1525 register operand with SRC_IN_DST.
1526
1527 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1528
1529 * alpha.h: New file.
1530
1531 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1532
1533 * rs6k.h: Remove obsolete file.
1534
1535 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1536
1537 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1538 fdivp, and fdivrp. Add ffreep.
1539
1540 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1541
1542 * h8300.h: Reorder various #defines for readability.
1543 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1544 (BITOP): Accept additional (unused) argument. All callers changed.
1545 (EBITOP): Likewise.
1546 (O_LAST): Bump.
1547 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1548
1549 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1550 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1551 (BITOP, EBITOP): Handle new H8/S addressing modes for
1552 bit insns.
1553 (UNOP3): Handle new shift/rotate insns on the H8/S.
1554 (insns using exr): New instructions.
1555 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1556
1557 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1558
1559 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1560 was incorrect.
1561
1562 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1563
1564 * h8300.h (START): Remove.
1565 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1566 and mov.l insns that can be relaxed.
1567
1568 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1569
1570 * i386.h: Remove Abs32 from lcall.
1571
1572 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1573
1574 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1575 (SLCPOP): New macro.
1576 Mark X,Y opcode letters as in use.
1577
1578 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1579
1580 * sparc.h (F_FLOAT, F_FBR): Define.
1581
1582 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1583
1584 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1585 from all insns.
1586 (ABS8SRC,ABS8DST): Add ABS8MEM.
1587 (add.l): Fix reg+reg variant.
1588 (eepmov.w): Renamed from eepmovw.
1589 (ldc,stc): Fix many cases.
1590
1591 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1592
1593 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1594
1595 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1596
1597 * sparc.h (O): Mark operand letter as in use.
1598
1599 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1600
1601 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1602 Mark operand letters uU as in use.
1603
1604 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1605
1606 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1607 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1608 (SPARC_OPCODE_SUPPORTED): New macro.
1609 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1610 (F_NOTV9): Delete.
1611
1612 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1613
1614 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1615 declaration consistent with return type in definition.
1616
1617 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1618
1619 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1620
1621 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1622
1623 * i386.h (i386_regtab): Add 80486 test registers.
1624
1625 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1626
1627 * i960.h (I_HX): Define.
1628 (i960_opcodes): Add HX instruction.
1629
1630 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1631
1632 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1633 and fclex.
1634
1635 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1636
1637 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1638 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1639 (bfd_* defines): Delete.
1640 (sparc_opcode_archs): Replaces architecture_pname.
1641 (sparc_opcode_lookup_arch): Declare.
1642 (NUMOPCODES): Delete.
1643
1644 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1645
1646 * sparc.h (enum sparc_architecture): Add v9a.
1647 (ARCHITECTURES_CONFLICT_P): Update.
1648
1649 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1650
1651 * i386.h: Added Pentium Pro instructions.
1652
1653 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1654
1655 * m68k.h: Document new 'W' operand place.
1656
1657 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1658
1659 * hppa.h: Add lci and syncdma instructions.
1660
1661 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1662
1663 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1664 instructions.
1665
1666 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1667
1668 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1669 assembler's -mcom and -many switches.
1670
1671 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1672
1673 * i386.h: Fix cmpxchg8b extension opcode description.
1674
1675 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1676
1677 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1678 and register cr4.
1679
1680 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1681
1682 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1683
1684 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1685
1686 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1687
1688 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1689
1690 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1691
1692 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1693
1694 * m68kmri.h: Remove.
1695
1696 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1697 declarations. Remove F_ALIAS and flag field of struct
1698 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1699 int. Make name and args fields of struct m68k_opcode const.
1700
1701 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1702
1703 * sparc.h (F_NOTV9): Define.
1704
1705 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1706
1707 * mips.h (INSN_4010): Define.
1708
1709 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1710
1711 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1712
1713 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1714 * m68k.h: Fix argument descriptions of coprocessor
1715 instructions to allow only alterable operands where appropriate.
1716 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1717 (m68k_opcode_aliases): Add more aliases.
1718
1719 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1720
1721 * m68k.h: Added explcitly short-sized conditional branches, and a
1722 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1723 svr4-based configurations.
1724
1725 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1726
1727 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1728 * i386.h: added missing Data16/Data32 flags to a few instructions.
1729
1730 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1731
1732 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1733 (OP_MASK_BCC, OP_SH_BCC): Define.
1734 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1735 (OP_MASK_CCC, OP_SH_CCC): Define.
1736 (INSN_READ_FPR_R): Define.
1737 (INSN_RFE): Delete.
1738
1739 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1740
1741 * m68k.h (enum m68k_architecture): Deleted.
1742 (struct m68k_opcode_alias): New type.
1743 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1744 matching constraints, values and flags. As a side effect of this,
1745 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1746 as I know were never used, now may need re-examining.
1747 (numopcodes): Now const.
1748 (m68k_opcode_aliases, numaliases): New variables.
1749 (endop): Deleted.
1750 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1751 m68k_opcode_aliases; update declaration of m68k_opcodes.
1752
1753 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1754
1755 * hppa.h (delay_type): Delete unused enumeration.
1756 (pa_opcode): Replace unused delayed field with an architecture
1757 field.
1758 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1759
1760 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1761
1762 * mips.h (INSN_ISA4): Define.
1763
1764 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1765
1766 * mips.h (M_DLA_AB, M_DLI): Define.
1767
1768 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1769
1770 * hppa.h (fstwx): Fix single-bit error.
1771
1772 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1773
1774 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1775
1776 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1777
1778 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1779 debug registers. From Charles Hannum (mycroft@netbsd.org).
1780
1781 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1782
1783 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1784 i386 support:
1785 * i386.h (MOV_AX_DISP32): New macro.
1786 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1787 of several call/return instructions.
1788 (ADDR_PREFIX_OPCODE): New macro.
1789
1790 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1791
1792 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1793
1794 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1795 it pointer to const char;
1796 (struct vot, field `name'): ditto.
1797
1798 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1799
1800 * vax.h: Supply and properly group all values in end sentinel.
1801
1802 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1803
1804 * mips.h (INSN_ISA, INSN_4650): Define.
1805
1806 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1807
1808 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1809 systems with a separate instruction and data cache, such as the
1810 29040, these instructions take an optional argument.
1811
1812 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1813
1814 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1815 INSN_TRAP.
1816
1817 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1818
1819 * mips.h (INSN_STORE_MEMORY): Define.
1820
1821 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1822
1823 * sparc.h: Document new operand type 'x'.
1824
1825 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1826
1827 * i960.h (I_CX2): New instruction category. It includes
1828 instructions available on Cx and Jx processors.
1829 (I_JX): New instruction category, for JX-only instructions.
1830 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1831 Jx-only instructions, in I_JX category.
1832
1833 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1834
1835 * ns32k.h (endop): Made pointer const too.
1836
1837 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1838
1839 * ns32k.h: Drop Q operand type as there is no correct use
1840 for it. Add I and Z operand types which allow better checking.
1841
1842 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1843
1844 * h8300.h (xor.l) :fix bit pattern.
1845 (L_2): New size of operand.
1846 (trapa): Use it.
1847
1848 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1849
1850 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1851
1852 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1853
1854 * sparc.h: Include v9 definitions.
1855
1856 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1857
1858 * m68k.h (m68060): Defined.
1859 (m68040up, mfloat, mmmu): Include it.
1860 (struct m68k_opcode): Widen `arch' field.
1861 (m68k_opcodes): Updated for M68060. Removed comments that were
1862 instructions commented out by "JF" years ago.
1863
1864 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1865
1866 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1867 add a one-bit `flags' field.
1868 (F_ALIAS): New macro.
1869
1870 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1871
1872 * h8300.h (dec, inc): Get encoding right.
1873
1874 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1875
1876 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1877 a flag instead.
1878 (PPC_OPERAND_SIGNED): Define.
1879 (PPC_OPERAND_SIGNOPT): Define.
1880
1881 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1882
1883 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1884 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1885
1886 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1887
1888 * i386.h: Reverse last change. It'll be handled in gas instead.
1889
1890 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1891
1892 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1893 slower on the 486 and used the implicit shift count despite the
1894 explicit operand. The one-operand form is still available to get
1895 the shorter form with the implicit shift count.
1896
1897 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1898
1899 * hppa.h: Fix typo in fstws arg string.
1900
1901 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1902
1903 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1904
1905 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1906
1907 * ppc.h (PPC_OPCODE_601): Define.
1908
1909 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1910
1911 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1912 (so we can determine valid completers for both addb and addb[tf].)
1913
1914 * hppa.h (xmpyu): No floating point format specifier for the
1915 xmpyu instruction.
1916
1917 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1918
1919 * ppc.h (PPC_OPERAND_NEXT): Define.
1920 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1921 (struct powerpc_macro): Define.
1922 (powerpc_macros, powerpc_num_macros): Declare.
1923
1924 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1925
1926 * ppc.h: New file. Header file for PowerPC opcode table.
1927
1928 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1929
1930 * hppa.h: More minor template fixes for sfu and copr (to allow
1931 for easier disassembly).
1932
1933 * hppa.h: Fix templates for all the sfu and copr instructions.
1934
1935 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1936
1937 * i386.h (push): Permit Imm16 operand too.
1938
1939 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1940
1941 * h8300.h (andc): Exists in base arch.
1942
1943 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1944
1945 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1946 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1947
1948 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1949
1950 * hppa.h: Add FP quadword store instructions.
1951
1952 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1953
1954 * mips.h: (M_J_A): Added.
1955 (M_LA): Removed.
1956
1957 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1958
1959 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1960 <mellon@pepper.ncd.com>.
1961
1962 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1963
1964 * hppa.h: Immediate field in probei instructions is unsigned,
1965 not low-sign extended.
1966
1967 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1968
1969 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1970
1971 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1972
1973 * i386.h: Add "fxch" without operand.
1974
1975 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1976
1977 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1978
1979 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1980
1981 * hppa.h: Add gfw and gfr to the opcode table.
1982
1983 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1984
1985 * m88k.h: extended to handle m88110.
1986
1987 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1988
1989 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1990 addresses.
1991
1992 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1993
1994 * i960.h (i960_opcodes): Properly bracket initializers.
1995
1996 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1997
1998 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1999
2000 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2001
2002 * m68k.h (two): Protect second argument with parentheses.
2003
2004 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2005
2006 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2007 Deleted old in/out instructions in "#if 0" section.
2008
2009 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2010
2011 * i386.h (i386_optab): Properly bracket initializers.
2012
2013 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2014
2015 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2016 Jeff Law, law@cs.utah.edu).
2017
2018 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2019
2020 * i386.h (lcall): Accept Imm32 operand also.
2021
2022 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2023
2024 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2025 (M_DABS): Added.
2026
2027 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2028
2029 * mips.h (INSN_*): Changed values. Removed unused definitions.
2030 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2031 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2032 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2033 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2034 (M_*): Added new values for r6000 and r4000 macros.
2035 (ANY_DELAY): Removed.
2036
2037 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2038
2039 * mips.h: Added M_LI_S and M_LI_SS.
2040
2041 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2042
2043 * h8300.h: Get some rare mov.bs correct.
2044
2045 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2046
2047 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2048 been included.
2049
2050 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2051
2052 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2053 jump instructions, for use in disassemblers.
2054
2055 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2056
2057 * m88k.h: Make bitfields just unsigned, not unsigned long or
2058 unsigned short.
2059
2060 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2061
2062 * hppa.h: New argument type 'y'. Use in various float instructions.
2063
2064 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2065
2066 * hppa.h (break): First immediate field is unsigned.
2067
2068 * hppa.h: Add rfir instruction.
2069
2070 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2071
2072 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2073
2074 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2075
2076 * mips.h: Reworked the hazard information somewhat, and fixed some
2077 bugs in the instruction hazard descriptions.
2078
2079 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2080
2081 * m88k.h: Corrected a couple of opcodes.
2082
2083 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2084
2085 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2086 new version includes instruction hazard information, but is
2087 otherwise reasonably similar.
2088
2089 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2090
2091 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2092
2093 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2094
2095 Patches from Jeff Law, law@cs.utah.edu:
2096 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2097 Make the tables be the same for the following instructions:
2098 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2099 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2100 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2101 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2102 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2103 "fcmp", and "ftest".
2104
2105 * hppa.h: Make new and old tables the same for "break", "mtctl",
2106 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2107 Fix typo in last patch. Collapse several #ifdefs into a
2108 single #ifdef.
2109
2110 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2111 of the comments up-to-date.
2112
2113 * hppa.h: Update "free list" of letters and update
2114 comments describing each letter's function.
2115
2116 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2117
2118 * h8300.h: checkpoint, includes H8/300-H opcodes.
2119
2120 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2121
2122 * Patches from Jeffrey Law <law@cs.utah.edu>.
2123 * hppa.h: Rework single precision FP
2124 instructions so that they correctly disassemble code
2125 PA1.1 code.
2126
2127 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2128
2129 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2130 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2131
2132 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2133
2134 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2135 gdb will define it for now.
2136
2137 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2138
2139 * sparc.h: Don't end enumerator list with comma.
2140
2141 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2142
2143 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2144 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2145 ("bc2t"): Correct typo.
2146 ("[ls]wc[023]"): Use T rather than t.
2147 ("c[0123]"): Define general coprocessor instructions.
2148
2149 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2150
2151 * m68k.h: Move split point for gcc compilation more towards
2152 middle.
2153
2154 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2155
2156 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2157 simply wrong, ics, rfi, & rfsvc were missing).
2158 Add "a" to opr_ext for "bb". Doc fix.
2159
2160 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2161
2162 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2163 * mips.h: Add casts, to suppress warnings about shifting too much.
2164 * m68k.h: Document the placement code '9'.
2165
2166 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2167
2168 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2169 allows callers to break up the large initialized struct full of
2170 opcodes into two half-sized ones. This permits GCC to compile
2171 this module, since it takes exponential space for initializers.
2172 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2173
2174 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2175
2176 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2177 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2178 initialized structs in it.
2179
2180 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2181
2182 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2183 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2184 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2185
2186 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2187
2188 * mips.h: document "i" and "j" operands correctly.
2189
2190 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2191
2192 * mips.h: Removed endianness dependency.
2193
2194 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2195
2196 * h8300.h: include info on number of cycles per instruction.
2197
2198 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2199
2200 * hppa.h: Move handy aliases to the front. Fix masks for extract
2201 and deposit instructions.
2202
2203 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2204
2205 * i386.h: accept shld and shrd both with and without the shift
2206 count argument, which is always %cl.
2207
2208 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2209
2210 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2211 (one_byte_segment_defaults, two_byte_segment_defaults,
2212 i386_prefixtab_end): Ditto.
2213
2214 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2215
2216 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2217 for operand 2; from John Carr, jfc@dsg.dec.com.
2218
2219 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2220
2221 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2222 always use 16-bit offsets. Makes calculated-size jump tables
2223 feasible.
2224
2225 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2226
2227 * i386.h: Fix one-operand forms of in* and out* patterns.
2228
2229 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2230
2231 * m68k.h: Added CPU32 support.
2232
2233 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2234
2235 * mips.h (break): Disassemble the argument. Patch from
2236 jonathan@cs.stanford.edu (Jonathan Stone).
2237
2238 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2239
2240 * m68k.h: merged Motorola and MIT syntax.
2241
2242 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2243
2244 * m68k.h (pmove): make the tests less strict, the 68k book is
2245 wrong.
2246
2247 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2248
2249 * m68k.h (m68ec030): Defined as alias for 68030.
2250 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2251 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2252 them. Tightened description of "fmovex" to distinguish it from
2253 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2254 up descriptions that claimed versions were available for chips not
2255 supporting them. Added "pmovefd".
2256
2257 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2258
2259 * m68k.h: fix where the . goes in divull
2260
2261 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2262
2263 * m68k.h: the cas2 instruction is supposed to be written with
2264 indirection on the last two operands, which can be either data or
2265 address registers. Added a new operand type 'r' which accepts
2266 either register type. Added new cases for cas2l and cas2w which
2267 use them. Corrected masks for cas2 which failed to recognize use
2268 of address register.
2269
2270 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2271
2272 * m68k.h: Merged in patches (mostly m68040-specific) from
2273 Colin Smith <colin@wrs.com>.
2274
2275 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2276 base). Also cleaned up duplicates, re-ordered instructions for
2277 the sake of dis-assembling (so aliases come after standard names).
2278 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2279
2280 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2281
2282 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2283 all missing .s
2284
2285 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2286
2287 * sparc.h: Moved tables to BFD library.
2288
2289 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2290
2291 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2292
2293 * h8300.h: Finish filling in all the holes in the opcode table,
2294 so that the Lucid C compiler can digest this as well...
2295
2296 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2297
2298 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2299 Fix opcodes on various sizes of fild/fist instructions
2300 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2301 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2302
2303 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2304
2305 * h8300.h: Fill in all the holes in the opcode table so that the
2306 losing HPUX C compiler can digest this...
2307
2308 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2309
2310 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2311 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2312
2313 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2314
2315 * sparc.h: Add new architecture variant sparclite; add its scan
2316 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2317
2318 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2319
2320 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2321 fy@lucid.com).
2322
2323 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2324
2325 * rs6k.h: New version from IBM (Metin).
2326
2327 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2328
2329 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2330 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2331
2332 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2333
2334 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2335
2336 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2337
2338 * m68k.h (one, two): Cast macro args to unsigned to suppress
2339 complaints from compiler and lint about integer overflow during
2340 shift.
2341
2342 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2343
2344 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2345
2346 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2347
2348 * mips.h: Make bitfield layout depend on the HOST compiler,
2349 not on the TARGET system.
2350
2351 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2352
2353 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2354 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2355 <TRANLE@INTELLICORP.COM>.
2356
2357 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2358
2359 * h8300.h: turned op_type enum into #define list
2360
2361 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2362
2363 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2364 similar instructions -- they've been renamed to "fitoq", etc.
2365 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2366 number of arguments.
2367 * h8300.h: Remove extra ; which produces compiler warning.
2368
2369 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2370
2371 * sparc.h: fix opcode for tsubcctv.
2372
2373 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2374
2375 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2376
2377 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2378
2379 * sparc.h (nop): Made the 'lose' field be even tighter,
2380 so only a standard 'nop' is disassembled as a nop.
2381
2382 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2383
2384 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2385 disassembled as a nop.
2386
2387 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2388
2389 * sparc.h: fix a typo.
2390
2391 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2392
2393 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2394 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2395 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2396
2397 \f
2398 Local Variables:
2399 version-control: never
2400 End:
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