1 2000-02-22 Andrew Haley <aph@cygnus.com>
3 * mips.h: (OPCODE_IS_MEMBER): Add comment.
5 1999-12-30 Andrew Haley <aph@cygnus.com>
7 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
8 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
11 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
13 * i386.h: Qualify intel mode far call and jmp with x_Suf.
15 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
17 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
18 indirect jumps and calls. Add FF/3 call for intel mode.
20 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
22 * mn10300.h: Add new operand types. Add new instruction formats.
24 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
26 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
29 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
31 * mips.h (INSN_ISA5): New.
33 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
35 * mips.h (OPCODE_IS_MEMBER): New.
37 1999-10-29 Nick Clifton <nickc@cygnus.com>
39 * d30v.h (SHORT_AR): Define.
41 1999-10-18 Michael Meissner <meissner@cygnus.com>
43 * alpha.h (alpha_num_opcodes): Convert to unsigned.
44 (alpha_num_operands): Ditto.
46 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
48 * hppa.h (pa_opcodes): Add load and store cache control to
49 instructions. Add ordered access load and store.
51 * hppa.h (pa_opcode): Add new entries for addb and addib.
53 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
55 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
57 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
59 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
61 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
63 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
64 and "be" using completer prefixes.
66 * hppa.h (pa_opcodes): Add initializers to silence compiler.
68 * hppa.h: Update comments about character usage.
70 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
72 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
73 up the new fstw & bve instructions.
75 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
77 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
80 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
82 * hppa.h (pa_opcodes): Add long offset double word load/store
85 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
88 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
90 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
92 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
94 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
96 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
98 * hppa.h (pa_opcodes): Add support for "b,l".
100 * hppa.h (pa_opcodes): Add support for "b,gate".
102 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
104 * hppa.h (pa_opcodes): Use 'fX' for first register operand
107 * hppa.h (pa_opcodes): Fix mask for probe and probei.
109 * hppa.h (pa_opcodes): Fix mask for depwi.
111 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
113 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
114 an explicit output argument.
116 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
118 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
119 Add a few PA2.0 loads and store variants.
121 1999-09-04 Steve Chamberlain <sac@pobox.com>
125 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
127 * i386.h (i386_regtab): Move %st to top of table, and split off
128 other fp reg entries.
129 (i386_float_regtab): To here.
131 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
133 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
136 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
139 * hppa.h: Document new completers and args.
140 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
141 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
142 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
145 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
146 hshr, hsub, mixh, mixw, permh.
148 * hppa.h (pa_opcodes): Change completers in instructions to
151 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
152 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
154 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
155 fnegabs to use 'I' instead of 'F'.
157 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
159 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
160 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
161 Alphabetically sort PIII insns.
163 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
165 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
167 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
169 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
170 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
172 * hppa.h: Document 64 bit condition completers.
174 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
176 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
178 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
180 * i386.h (i386_optab): Add DefaultSize modifier to all insns
181 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
182 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
184 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
185 Jeff Law <law@cygnus.com>
187 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
189 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
191 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
192 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
194 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
196 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
198 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
200 * hppa.h (struct pa_opcode): Add new field "flags".
201 (FLAGS_STRICT): Define.
203 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
204 Jeff Law <law@cygnus.com>
206 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
208 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
210 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
212 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
213 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
214 flag to fcomi and friends.
216 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
218 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
219 integer logical instructions.
221 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
223 * m68k.h: Document new formats `E', `G', `H' and new places `N',
226 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
227 and new places `m', `M', `h'.
229 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
231 * hppa.h (pa_opcodes): Add several processor specific system
234 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
236 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
237 "addb", and "addib" to be used by the disassembler.
239 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
241 * i386.h (ReverseModrm): Remove all occurences.
242 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
243 movmskps, pextrw, pmovmskb, maskmovq.
244 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
245 ignore the data size prefix.
247 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
248 Mostly stolen from Doug Ledford <dledford@redhat.com>
250 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
252 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
254 1999-04-14 Doug Evans <devans@casey.cygnus.com>
256 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
257 (CGEN_ATTR_TYPE): Update.
258 (CGEN_ATTR_MASK): Number booleans starting at 0.
259 (CGEN_ATTR_VALUE): Update.
260 (CGEN_INSN_ATTR): Update.
262 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
264 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
267 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
269 * hppa.h (bb, bvb): Tweak opcode/mask.
272 1999-03-22 Doug Evans <devans@casey.cygnus.com>
274 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
275 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
276 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
277 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
278 Delete member max_insn_size.
279 (enum cgen_cpu_open_arg): New enum.
280 (cpu_open): Update prototype.
281 (cpu_open_1): Declare.
282 (cgen_set_cpu): Delete.
284 1999-03-11 Doug Evans <devans@casey.cygnus.com>
286 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
287 (CGEN_OPERAND_NIL): New macro.
288 (CGEN_OPERAND): New member `type'.
289 (@arch@_cgen_operand_table): Delete decl.
290 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
291 (CGEN_OPERAND_TABLE): New struct.
292 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
293 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
294 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
295 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
296 {get,set}_{int,vma}_operand.
297 (@arch@_cgen_cpu_open): New arg `isa'.
298 (cgen_set_cpu): Ditto.
300 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
302 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
304 1999-02-25 Doug Evans <devans@casey.cygnus.com>
306 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
307 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
309 (CGEN_HW_TABLE): New struct.
310 (hw_table): Delete declaration.
311 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
312 to table entry to enum.
313 (CGEN_OPINST): Ditto.
314 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
316 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
318 * alpha.h (AXP_OPCODE_EV6): New.
319 (AXP_OPCODE_NOPAL): Include it.
321 1999-02-09 Doug Evans <devans@casey.cygnus.com>
323 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
324 All uses updated. New members int_insn_p, max_insn_size,
325 parse_operand,insert_operand,extract_operand,print_operand,
326 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
327 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
328 extract_handlers,print_handlers.
329 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
330 (CGEN_ATTR_BOOL_OFFSET): New macro.
331 (CGEN_ATTR_MASK): Subtract it to compute bit number.
332 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
333 (cgen_opcode_handler): Renamed from cgen_base.
334 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
335 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
337 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
338 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
339 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
340 (CGEN_OPCODE,CGEN_IBASE): New types.
341 (CGEN_INSN): Rewrite.
342 (CGEN_{ASM,DIS}_HASH*): Delete.
343 (init_opcode_table,init_ibld_table): Declare.
344 (CGEN_INSN_ATTR): New type.
346 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
348 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
349 (x_FP, d_FP, dls_FP, sldx_FP): Define.
350 Change *Suf definitions to include x and d suffixes.
351 (movsx): Use w_Suf and b_Suf.
353 (movs): Use bwld_Suf.
354 (fld): Change ordering. Use sld_FP.
355 (fild): Add Intel Syntax equivalent of fildq.
358 (fstp): Use sld_FP. Add x_FP version.
359 (fistp): LLongMem version for Intel Syntax.
360 (fcom, fcomp): Use sld_FP.
361 (fadd, fiadd, fsub): Use sld_FP.
363 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
365 1999-01-27 Doug Evans <devans@casey.cygnus.com>
367 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
370 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
372 * hppa.h (bv): Fix mask.
374 1999-01-05 Doug Evans <devans@casey.cygnus.com>
376 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
378 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
379 (CGEN_ATTR_TABLE): New member dfault.
381 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
383 * mips.h (MIPS16_INSN_BRANCH): New.
385 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
387 The following is part of a change made by Edith Epstein
388 <eepstein@sophia.cygnus.com> as part of a project to merge in
389 changes by HP; HP did not create ChangeLog entries.
391 * hppa.h (completer_chars): list of chars to not put a space
394 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
396 * i386.h (i386_optab): Permit w suffix on processor control and
397 status word instructions.
399 1998-11-30 Doug Evans <devans@casey.cygnus.com>
401 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
402 (struct cgen_keyword_entry): Ditto.
403 (struct cgen_operand): Ditto.
404 (CGEN_IFLD): New typedef, with associated access macros.
405 (CGEN_IFMT): New typedef, with associated access macros.
406 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
407 (CGEN_IVALUE): New typedef.
408 (struct cgen_insn): Delete const on syntax,attrs members.
409 `format' now points to format data. Type of `value' is now
411 (struct cgen_opcode_table): New member ifld_table.
413 1998-11-18 Doug Evans <devans@casey.cygnus.com>
415 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
416 (CGEN_OPERAND_INSTANCE): New member `attrs'.
417 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
418 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
419 (cgen_opcode_table): Update type of dis_hash fn.
420 (extract_operand): Update type of `insn_value' arg.
422 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
424 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
426 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
428 * mips.h (INSN_MULT): Added.
430 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
432 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
434 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
436 * cgen.h (CGEN_INSN_INT): New typedef.
437 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
438 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
439 (CGEN_INSN_BYTES_PTR): New typedef.
440 (CGEN_EXTRACT_INFO): New typedef.
441 (cgen_insert_fn,cgen_extract_fn): Update.
442 (cgen_opcode_table): New member `insn_endian'.
443 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
444 (insert_operand,extract_operand): Update.
445 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
447 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
449 * cgen.h (CGEN_ATTR_BOOLS): New macro.
450 (struct CGEN_HW_ENTRY): New member `attrs'.
451 (CGEN_HW_ATTR): New macro.
452 (struct CGEN_OPERAND_INSTANCE): New member `name'.
453 (CGEN_INSN_INVALID_P): New macro.
455 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
459 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
461 From Robert Andrew Dale <rob@nb.net>
462 * i386.h (i386_optab): Add AMD 3DNow! instructions.
463 (AMD_3DNOW_OPCODE): Define.
465 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
467 * d30v.h (EITHER_BUT_PREFER_MU): Define.
469 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
471 * cgen.h (cgen_insn): #if 0 out element `cdx'.
473 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
475 Move all global state data into opcode table struct, and treat
476 opcode table as something that is "opened/closed".
477 * cgen.h (CGEN_OPCODE_DESC): New type.
478 (all fns): New first arg of opcode table descriptor.
479 (cgen_set_parse_operand_fn): Add prototype.
480 (cgen_current_machine,cgen_current_endian): Delete.
481 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
482 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
483 dis_hash_table,dis_hash_table_entries.
484 (opcode_open,opcode_close): Add prototypes.
486 * cgen.h (cgen_insn): New element `cdx'.
488 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
490 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
492 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
494 * mn10300.h: Add "no_match_operands" field for instructions.
495 (MN10300_MAX_OPERANDS): Define.
497 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
499 * cgen.h (cgen_macro_insn_count): Declare.
501 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
503 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
504 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
505 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
506 set_{int,vma}_operand.
508 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
510 * mn10300.h: Add "machine" field for instructions.
511 (MN103, AM30): Define machine types.
513 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
515 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
517 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
519 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
521 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
523 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
525 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
526 those that happen to be implemented on pentiums.
528 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
530 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
531 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
532 with Size16|IgnoreSize or Size32|IgnoreSize.
534 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
536 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
537 (REPE): Rename to REPE_PREFIX_OPCODE.
538 (i386_regtab_end): Remove.
539 (i386_prefixtab, i386_prefixtab_end): Remove.
540 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
542 (MAX_OPCODE_SIZE): Define.
543 (i386_optab_end): Remove.
547 * i386.h (i386_optab): Allow 16 bit displacement for `mov
548 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
549 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
550 data32, dword, and adword prefixes.
551 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
554 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
556 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
558 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
559 register operands, because this is a common idiom. Flag them with
560 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
561 fdivrp because gcc erroneously generates them. Also flag with a
564 * i386.h: Add suffix modifiers to most insns, and tighter operand
565 checks in some cases. Fix a number of UnixWare compatibility
566 issues with float insns. Merge some floating point opcodes, using
567 new FloatMF modifier.
568 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
571 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
572 IgnoreDataSize where appropriate.
574 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
576 * i386.h: (one_byte_segment_defaults): Remove.
577 (two_byte_segment_defaults): Remove.
578 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
580 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
582 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
583 (cgen_hw_lookup_by_num): Declare.
585 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
587 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
588 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
590 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
592 * cgen.h (cgen_asm_init_parse): Delete.
593 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
594 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
596 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
598 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
599 (cgen_asm_finish_insn): Update prototype.
600 (cgen_insn): New members num, data.
601 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
602 dis_hash, dis_hash_table_size moved to ...
603 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
604 All uses updated. New members asm_hash_p, dis_hash_p.
605 (CGEN_MINSN_EXPANSION): New struct.
606 (cgen_expand_macro_insn): Declare.
607 (cgen_macro_insn_count): Declare.
608 (get_insn_operands): Update prototype.
609 (lookup_get_insn_operands): Declare.
611 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
613 * i386.h (i386_optab): Change iclrKludge and imulKludge to
614 regKludge. Add operands types for string instructions.
616 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
618 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
621 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
623 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
626 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
628 * i386.h: Remove NoModrm flag from all insns: it's never checked.
629 Add IsString flag to string instructions.
630 (IS_STRING): Don't define.
631 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
632 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
633 (SS_PREFIX_OPCODE): Define.
635 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
637 * i386.h: Revert March 24 patch; no more LinearAddress.
639 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
641 * i386.h (i386_optab): Remove fwait (9b) from all floating point
642 instructions, and instead add FWait opcode modifier. Add short
643 form of fldenv and fstenv.
644 (FWAIT_OPCODE): Define.
646 * i386.h (i386_optab): Change second operand constraint of `mov
647 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
648 allow legal instructions such as `movl %gs,%esi'
650 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
652 * h8300.h: Various changes to fully bracket initializers.
654 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
656 * i386.h: Set LinearAddress for lidt and lgdt.
658 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
660 * cgen.h (CGEN_BOOL_ATTR): New macro.
662 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
664 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
666 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
668 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
669 (cgen_insn): Record syntax and format entries here, rather than
672 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
674 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
676 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
678 * cgen.h (cgen_insert_fn): Change type of result to const char *.
679 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
680 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
682 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
684 * cgen.h (lookup_insn): New argument alias_p.
686 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
688 Fix rac to accept only a0:
689 * d10v.h (OPERAND_ACC): Split into:
690 (OPERAND_ACC0, OPERAND_ACC1) .
691 (OPERAND_GPR): Define.
693 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
695 * cgen.h (CGEN_FIELDS): Define here.
696 (CGEN_HW_ENTRY): New member `type'.
697 (hw_list): Delete decl.
698 (enum cgen_mode): Declare.
699 (CGEN_OPERAND): New member `hw'.
700 (enum cgen_operand_instance_type): Declare.
701 (CGEN_OPERAND_INSTANCE): New type.
702 (CGEN_INSN): New member `operands'.
703 (CGEN_OPCODE_DATA): Make hw_list const.
704 (get_insn_operands,lookup_insn): Add prototypes for.
706 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
708 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
709 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
710 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
711 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
713 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
715 * cgen.h: Correct typo in comment end marker.
717 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
721 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
723 * cgen.h: Add prototypes for cgen_save_fixups(),
724 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
725 of cgen_asm_finish_insn() to return a char *.
727 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
729 * cgen.h: Formatting changes to improve readability.
731 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
733 * cgen.h (*): Clean up pass over `struct foo' usage.
734 (CGEN_ATTR): Make unsigned char.
735 (CGEN_ATTR_TYPE): Update.
736 (CGEN_ATTR_{ENTRY,TABLE}): New types.
737 (cgen_base): Move member `attrs' to cgen_insn.
738 (CGEN_KEYWORD): New member `null_entry'.
739 (CGEN_{SYNTAX,FORMAT}): New types.
740 (cgen_insn): Format and syntax separated from each other.
742 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
744 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
745 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
746 flags_{used,set} long.
747 (d30v_operand): Make flags field long.
749 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
751 * m68k.h: Fix comment describing operand types.
753 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
755 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
756 everything else after down.
758 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
760 * d10v.h (OPERAND_FLAG): Split into:
761 (OPERAND_FFLAG, OPERAND_CFLAG) .
763 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
765 * mips.h (struct mips_opcode): Changed comments to reflect new
768 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
770 * mips.h: Added to comments a quick-ref list of all assigned
771 operand type characters.
772 (OP_{MASK,SH}_PERFREG): New macros.
774 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
776 * sparc.h: Add '_' and '/' for v9a asr's.
777 Patch from David Miller <davem@vger.rutgers.edu>
779 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
781 * h8300.h: Bit ops with absolute addresses not in the 8 bit
782 area are not available in the base model (H8/300).
784 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
786 * m68k.h: Remove documentation of ` operand specifier.
788 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
790 * m68k.h: Document q and v operand specifiers.
792 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
794 * v850.h (struct v850_opcode): Add processors field.
795 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
796 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
797 (PROCESSOR_V850EA): New bit constants.
799 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
801 Merge changes from Martin Hunt:
803 * d30v.h: Allow up to 64 control registers. Add
806 * d30v.h (LONG_Db): New form for delayed branches.
808 * d30v.h: (LONG_Db): New form for repeati.
810 * d30v.h (SHORT_D2B): New form.
812 * d30v.h (SHORT_A2): New form.
814 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
815 registers are used. Needed for VLIW optimization.
817 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
819 * cgen.h: Move assembler interface section
820 up so cgen_parse_operand_result is defined for cgen_parse_address.
821 (cgen_parse_address): Update prototype.
823 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
825 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
827 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
829 * i386.h (two_byte_segment_defaults): Correct base register 5 in
830 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
833 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
836 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
839 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
840 (JUMP_ON_ECX_ZERO): Remove commented out macro.
842 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
844 * v850.h (V850_NOT_R0): New flag.
846 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
848 * v850.h (struct v850_opcode): Remove flags field.
850 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
852 * v850.h (struct v850_opcode): Add flags field.
853 (struct v850_operand): Extend meaning of 'bits' and 'shift'
855 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
856 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
858 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
862 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
864 * sparc.h (sparc_opcodes): Declare as const.
866 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
868 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
869 uses single or double precision floating point resources.
870 (INSN_NO_ISA, INSN_ISA1): Define.
871 (cpu specific INSN macros): Tweak into bitmasks outside the range
874 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
876 * i386.h: Fix pand opcode.
878 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
880 * mips.h: Widen INSN_ISA and move it to a more convenient
881 bit position. Add INSN_3900.
883 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
885 * mips.h (struct mips_opcode): added new field membership.
887 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
889 * i386.h (movd): only Reg32 is allowed.
891 * i386.h: add fcomp and ud2. From Wayne Scott
892 <wscott@ichips.intel.com>.
894 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
896 * i386.h: Add MMX instructions.
898 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
900 * i386.h: Remove W modifier from conditional move instructions.
902 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
904 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
905 with no arguments to match that generated by the UnixWare
908 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
910 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
911 (cgen_parse_operand_fn): Declare.
912 (cgen_init_parse_operand): Declare.
913 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
915 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
916 (enum cgen_parse_operand_type): New enum.
918 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
920 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
922 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
926 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
928 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
931 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
933 * v850.h (extract): Make unsigned.
935 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
939 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
941 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
942 take a direction bit.
944 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
946 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
948 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
950 * sparc.h: Include <ansidecl.h>. Update function declarations to
951 use prototypes, and to use const when appropriate.
953 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
955 * mn10300.h (MN10300_OPERAND_RELAX): Define.
957 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
959 * d10v.h: Change pre_defined_registers to
960 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
962 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
964 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
965 Change mips_opcodes from const array to a pointer,
966 and change bfd_mips_num_opcodes from const int to int,
967 so that we can increase the size of the mips opcodes table
970 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
972 * d30v.h (FLAG_X): Remove unused flag.
974 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
978 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
980 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
981 (PDS_VALUE): Macro to access value field of predefined symbols.
982 (tic80_next_predefined_symbol): Add prototype.
984 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
986 * tic80.h (tic80_symbol_to_value): Change prototype to match
987 change in function, added class parameter.
989 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
991 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
992 endmask fields, which are somewhat weird in that 0 and 32 are
993 treated exactly the same.
995 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
997 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
998 rather than a constant that is 2**X. Reorder them to put bits for
999 operands that have symbolic names in the upper bits, so they can
1000 be packed into an int where the lower bits contain the value that
1001 corresponds to that symbolic name.
1002 (predefined_symbo): Add struct.
1003 (tic80_predefined_symbols): Declare array of translations.
1004 (tic80_num_predefined_symbols): Declare size of that array.
1005 (tic80_value_to_symbol): Declare function.
1006 (tic80_symbol_to_value): Declare function.
1008 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1010 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1012 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1014 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1015 be the destination register.
1017 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1019 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1020 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1021 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1022 that the opcode can have two vector instructions in a single
1023 32 bit word and we have to encode/decode both.
1025 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1027 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1028 TIC80_OPERAND_RELATIVE for PC relative.
1029 (TIC80_OPERAND_BASEREL): New flag bit for register
1032 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1034 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1036 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1038 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1039 ":s" modifier for scaling.
1041 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1043 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1044 (TIC80_OPERAND_M_LI): Ditto
1046 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1048 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1049 (TIC80_OPERAND_CC): New define for condition code operand.
1050 (TIC80_OPERAND_CR): New define for control register operand.
1052 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1054 * tic80.h (struct tic80_opcode): Name changed.
1055 (struct tic80_opcode): Remove format field.
1056 (struct tic80_operand): Add insertion and extraction functions.
1057 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1061 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1063 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1064 type IV instruction offsets.
1066 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1068 * tic80.h: New file.
1070 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1072 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1074 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1076 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1077 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1078 * v850.h: Fix comment, v850_operand not powerpc_operand.
1080 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1082 * mn10200.h: Flesh out structures and definitions needed by
1083 the mn10200 assembler & disassembler.
1085 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1087 * mips.h: Add mips16 definitions.
1089 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1091 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1093 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1095 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1096 (MN10300_OPERAND_MEMADDR): Define.
1098 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1100 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1102 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1104 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1106 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1108 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1110 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1112 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1114 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1116 * alpha.h: Don't include "bfd.h"; private relocation types are now
1117 negative to minimize problems with shared libraries. Organize
1118 instruction subsets by AMASK extensions and PALcode
1120 (struct alpha_operand): Move flags slot for better packing.
1122 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1124 * v850.h (V850_OPERAND_RELAX): New operand flag.
1126 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1128 * mn10300.h (FMT_*): Move operand format definitions
1131 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1133 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1135 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1137 * mn10300.h (mn10300_opcode): Add "format" field.
1138 (MN10300_OPERAND_*): Define.
1140 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1142 * mn10x00.h: Delete.
1143 * mn10200.h, mn10300.h: New files.
1145 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1147 * mn10x00.h: New file.
1149 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1151 * v850.h: Add new flag to indicate this instruction uses a PC
1154 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1156 * h8300.h (stmac): Add missing instruction.
1158 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1160 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1163 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1165 * v850.h (V850_OPERAND_EP): Define.
1167 * v850.h (v850_opcode): Add size field.
1169 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1171 * v850.h (v850_operands): Add insert and extract fields, pointers
1172 to functions used to handle unusual operand encoding.
1173 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1174 V850_OPERAND_SIGNED): Defined.
1176 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1178 * v850.h (v850_operands): Add flags field.
1179 (OPERAND_REG, OPERAND_NUM): Defined.
1181 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1185 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1187 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1188 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1189 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1190 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1191 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1194 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1196 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1197 a 3 bit space id instead of a 2 bit space id.
1199 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1201 * d10v.h: Add some additional defines to support the
1202 assembler in determining which operations can be done in parallel.
1204 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1206 * h8300.h (SN): Define.
1207 (eepmov.b): Renamed from "eepmov"
1208 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1211 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1213 * d10v.h (OPERAND_SHIFT): New operand flag.
1215 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1217 * d10v.h: Changes for divs, parallel-only instructions, and
1220 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1222 * d10v.h (pd_reg): Define. Putting the definition here allows
1223 the assembler and disassembler to share the same struct.
1225 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1227 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1228 Williams <steve@icarus.com>.
1230 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1234 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1236 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1238 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1240 * m68k.h (mcf5200): New macro.
1241 Document names of coldfire control registers.
1243 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1245 * h8300.h (SRC_IN_DST): Define.
1247 * h8300.h (UNOP3): Mark the register operand in this insn
1248 as a source operand, not a destination operand.
1249 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1250 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1251 register operand with SRC_IN_DST.
1253 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1255 * alpha.h: New file.
1257 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1259 * rs6k.h: Remove obsolete file.
1261 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1263 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1264 fdivp, and fdivrp. Add ffreep.
1266 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1268 * h8300.h: Reorder various #defines for readability.
1269 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1270 (BITOP): Accept additional (unused) argument. All callers changed.
1273 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1275 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1276 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1277 (BITOP, EBITOP): Handle new H8/S addressing modes for
1279 (UNOP3): Handle new shift/rotate insns on the H8/S.
1280 (insns using exr): New instructions.
1281 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1283 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1285 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1288 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1290 * h8300.h (START): Remove.
1291 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1292 and mov.l insns that can be relaxed.
1294 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1296 * i386.h: Remove Abs32 from lcall.
1298 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1300 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1301 (SLCPOP): New macro.
1302 Mark X,Y opcode letters as in use.
1304 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1306 * sparc.h (F_FLOAT, F_FBR): Define.
1308 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1310 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1312 (ABS8SRC,ABS8DST): Add ABS8MEM.
1313 (add.l): Fix reg+reg variant.
1314 (eepmov.w): Renamed from eepmovw.
1315 (ldc,stc): Fix many cases.
1317 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1319 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1321 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1323 * sparc.h (O): Mark operand letter as in use.
1325 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1327 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1328 Mark operand letters uU as in use.
1330 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1332 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1333 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1334 (SPARC_OPCODE_SUPPORTED): New macro.
1335 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1338 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1340 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1341 declaration consistent with return type in definition.
1343 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1345 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1347 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1349 * i386.h (i386_regtab): Add 80486 test registers.
1351 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1353 * i960.h (I_HX): Define.
1354 (i960_opcodes): Add HX instruction.
1356 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1358 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1361 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1363 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1364 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1365 (bfd_* defines): Delete.
1366 (sparc_opcode_archs): Replaces architecture_pname.
1367 (sparc_opcode_lookup_arch): Declare.
1368 (NUMOPCODES): Delete.
1370 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1372 * sparc.h (enum sparc_architecture): Add v9a.
1373 (ARCHITECTURES_CONFLICT_P): Update.
1375 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1377 * i386.h: Added Pentium Pro instructions.
1379 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1381 * m68k.h: Document new 'W' operand place.
1383 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1385 * hppa.h: Add lci and syncdma instructions.
1387 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1389 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1392 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1394 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1395 assembler's -mcom and -many switches.
1397 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1399 * i386.h: Fix cmpxchg8b extension opcode description.
1401 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1403 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1406 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1408 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1410 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1412 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1414 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1416 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1418 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1420 * m68kmri.h: Remove.
1422 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1423 declarations. Remove F_ALIAS and flag field of struct
1424 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1425 int. Make name and args fields of struct m68k_opcode const.
1427 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1429 * sparc.h (F_NOTV9): Define.
1431 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1433 * mips.h (INSN_4010): Define.
1435 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1437 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1439 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1440 * m68k.h: Fix argument descriptions of coprocessor
1441 instructions to allow only alterable operands where appropriate.
1442 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1443 (m68k_opcode_aliases): Add more aliases.
1445 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1447 * m68k.h: Added explcitly short-sized conditional branches, and a
1448 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1449 svr4-based configurations.
1451 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1453 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1454 * i386.h: added missing Data16/Data32 flags to a few instructions.
1456 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1458 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1459 (OP_MASK_BCC, OP_SH_BCC): Define.
1460 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1461 (OP_MASK_CCC, OP_SH_CCC): Define.
1462 (INSN_READ_FPR_R): Define.
1465 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1467 * m68k.h (enum m68k_architecture): Deleted.
1468 (struct m68k_opcode_alias): New type.
1469 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1470 matching constraints, values and flags. As a side effect of this,
1471 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1472 as I know were never used, now may need re-examining.
1473 (numopcodes): Now const.
1474 (m68k_opcode_aliases, numaliases): New variables.
1476 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1477 m68k_opcode_aliases; update declaration of m68k_opcodes.
1479 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1481 * hppa.h (delay_type): Delete unused enumeration.
1482 (pa_opcode): Replace unused delayed field with an architecture
1484 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1486 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1488 * mips.h (INSN_ISA4): Define.
1490 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1492 * mips.h (M_DLA_AB, M_DLI): Define.
1494 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1496 * hppa.h (fstwx): Fix single-bit error.
1498 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1500 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1502 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1504 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1505 debug registers. From Charles Hannum (mycroft@netbsd.org).
1507 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1509 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1511 * i386.h (MOV_AX_DISP32): New macro.
1512 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1513 of several call/return instructions.
1514 (ADDR_PREFIX_OPCODE): New macro.
1516 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1518 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1520 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1521 it pointer to const char;
1522 (struct vot, field `name'): ditto.
1524 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1526 * vax.h: Supply and properly group all values in end sentinel.
1528 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1530 * mips.h (INSN_ISA, INSN_4650): Define.
1532 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1534 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1535 systems with a separate instruction and data cache, such as the
1536 29040, these instructions take an optional argument.
1538 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1540 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1543 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1545 * mips.h (INSN_STORE_MEMORY): Define.
1547 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1549 * sparc.h: Document new operand type 'x'.
1551 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1553 * i960.h (I_CX2): New instruction category. It includes
1554 instructions available on Cx and Jx processors.
1555 (I_JX): New instruction category, for JX-only instructions.
1556 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1557 Jx-only instructions, in I_JX category.
1559 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1561 * ns32k.h (endop): Made pointer const too.
1563 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1565 * ns32k.h: Drop Q operand type as there is no correct use
1566 for it. Add I and Z operand types which allow better checking.
1568 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1570 * h8300.h (xor.l) :fix bit pattern.
1571 (L_2): New size of operand.
1574 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1576 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1578 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1580 * sparc.h: Include v9 definitions.
1582 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1584 * m68k.h (m68060): Defined.
1585 (m68040up, mfloat, mmmu): Include it.
1586 (struct m68k_opcode): Widen `arch' field.
1587 (m68k_opcodes): Updated for M68060. Removed comments that were
1588 instructions commented out by "JF" years ago.
1590 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1592 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1593 add a one-bit `flags' field.
1594 (F_ALIAS): New macro.
1596 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1598 * h8300.h (dec, inc): Get encoding right.
1600 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1602 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1604 (PPC_OPERAND_SIGNED): Define.
1605 (PPC_OPERAND_SIGNOPT): Define.
1607 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1609 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1610 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1612 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1614 * i386.h: Reverse last change. It'll be handled in gas instead.
1616 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1618 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1619 slower on the 486 and used the implicit shift count despite the
1620 explicit operand. The one-operand form is still available to get
1621 the shorter form with the implicit shift count.
1623 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1625 * hppa.h: Fix typo in fstws arg string.
1627 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1629 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1631 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1633 * ppc.h (PPC_OPCODE_601): Define.
1635 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1637 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1638 (so we can determine valid completers for both addb and addb[tf].)
1640 * hppa.h (xmpyu): No floating point format specifier for the
1643 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1645 * ppc.h (PPC_OPERAND_NEXT): Define.
1646 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1647 (struct powerpc_macro): Define.
1648 (powerpc_macros, powerpc_num_macros): Declare.
1650 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1652 * ppc.h: New file. Header file for PowerPC opcode table.
1654 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1656 * hppa.h: More minor template fixes for sfu and copr (to allow
1657 for easier disassembly).
1659 * hppa.h: Fix templates for all the sfu and copr instructions.
1661 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1663 * i386.h (push): Permit Imm16 operand too.
1665 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1667 * h8300.h (andc): Exists in base arch.
1669 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1671 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1672 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1674 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1676 * hppa.h: Add FP quadword store instructions.
1678 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1680 * mips.h: (M_J_A): Added.
1683 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1685 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1686 <mellon@pepper.ncd.com>.
1688 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1690 * hppa.h: Immediate field in probei instructions is unsigned,
1691 not low-sign extended.
1693 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1695 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1697 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1699 * i386.h: Add "fxch" without operand.
1701 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1703 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1705 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1707 * hppa.h: Add gfw and gfr to the opcode table.
1709 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1711 * m88k.h: extended to handle m88110.
1713 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1715 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1718 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1720 * i960.h (i960_opcodes): Properly bracket initializers.
1722 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1724 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1726 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1728 * m68k.h (two): Protect second argument with parentheses.
1730 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1732 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1733 Deleted old in/out instructions in "#if 0" section.
1735 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1737 * i386.h (i386_optab): Properly bracket initializers.
1739 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1741 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1742 Jeff Law, law@cs.utah.edu).
1744 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1746 * i386.h (lcall): Accept Imm32 operand also.
1748 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1750 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1753 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1755 * mips.h (INSN_*): Changed values. Removed unused definitions.
1756 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1757 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1758 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1759 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1760 (M_*): Added new values for r6000 and r4000 macros.
1761 (ANY_DELAY): Removed.
1763 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1765 * mips.h: Added M_LI_S and M_LI_SS.
1767 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1769 * h8300.h: Get some rare mov.bs correct.
1771 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1773 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1776 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1778 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1779 jump instructions, for use in disassemblers.
1781 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1783 * m88k.h: Make bitfields just unsigned, not unsigned long or
1786 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1788 * hppa.h: New argument type 'y'. Use in various float instructions.
1790 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1792 * hppa.h (break): First immediate field is unsigned.
1794 * hppa.h: Add rfir instruction.
1796 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1798 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1800 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1802 * mips.h: Reworked the hazard information somewhat, and fixed some
1803 bugs in the instruction hazard descriptions.
1805 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1807 * m88k.h: Corrected a couple of opcodes.
1809 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1811 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1812 new version includes instruction hazard information, but is
1813 otherwise reasonably similar.
1815 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1817 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1819 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1821 Patches from Jeff Law, law@cs.utah.edu:
1822 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1823 Make the tables be the same for the following instructions:
1824 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1825 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1826 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1827 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1828 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1829 "fcmp", and "ftest".
1831 * hppa.h: Make new and old tables the same for "break", "mtctl",
1832 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1833 Fix typo in last patch. Collapse several #ifdefs into a
1836 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1837 of the comments up-to-date.
1839 * hppa.h: Update "free list" of letters and update
1840 comments describing each letter's function.
1842 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1844 * h8300.h: checkpoint, includes H8/300-H opcodes.
1846 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1848 * Patches from Jeffrey Law <law@cs.utah.edu>.
1849 * hppa.h: Rework single precision FP
1850 instructions so that they correctly disassemble code
1853 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1855 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1856 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1858 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1860 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1861 gdb will define it for now.
1863 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1865 * sparc.h: Don't end enumerator list with comma.
1867 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1869 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1870 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1871 ("bc2t"): Correct typo.
1872 ("[ls]wc[023]"): Use T rather than t.
1873 ("c[0123]"): Define general coprocessor instructions.
1875 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1877 * m68k.h: Move split point for gcc compilation more towards
1880 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1882 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1883 simply wrong, ics, rfi, & rfsvc were missing).
1884 Add "a" to opr_ext for "bb". Doc fix.
1886 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1888 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1889 * mips.h: Add casts, to suppress warnings about shifting too much.
1890 * m68k.h: Document the placement code '9'.
1892 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1894 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1895 allows callers to break up the large initialized struct full of
1896 opcodes into two half-sized ones. This permits GCC to compile
1897 this module, since it takes exponential space for initializers.
1898 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1900 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1902 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1903 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1904 initialized structs in it.
1906 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1908 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1909 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1910 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1912 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1914 * mips.h: document "i" and "j" operands correctly.
1916 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1918 * mips.h: Removed endianness dependency.
1920 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1922 * h8300.h: include info on number of cycles per instruction.
1924 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1926 * hppa.h: Move handy aliases to the front. Fix masks for extract
1927 and deposit instructions.
1929 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1931 * i386.h: accept shld and shrd both with and without the shift
1932 count argument, which is always %cl.
1934 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1936 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1937 (one_byte_segment_defaults, two_byte_segment_defaults,
1938 i386_prefixtab_end): Ditto.
1940 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1942 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1943 for operand 2; from John Carr, jfc@dsg.dec.com.
1945 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1947 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1948 always use 16-bit offsets. Makes calculated-size jump tables
1951 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1953 * i386.h: Fix one-operand forms of in* and out* patterns.
1955 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1957 * m68k.h: Added CPU32 support.
1959 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1961 * mips.h (break): Disassemble the argument. Patch from
1962 jonathan@cs.stanford.edu (Jonathan Stone).
1964 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1966 * m68k.h: merged Motorola and MIT syntax.
1968 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1970 * m68k.h (pmove): make the tests less strict, the 68k book is
1973 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1975 * m68k.h (m68ec030): Defined as alias for 68030.
1976 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1977 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1978 them. Tightened description of "fmovex" to distinguish it from
1979 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1980 up descriptions that claimed versions were available for chips not
1981 supporting them. Added "pmovefd".
1983 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1985 * m68k.h: fix where the . goes in divull
1987 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1989 * m68k.h: the cas2 instruction is supposed to be written with
1990 indirection on the last two operands, which can be either data or
1991 address registers. Added a new operand type 'r' which accepts
1992 either register type. Added new cases for cas2l and cas2w which
1993 use them. Corrected masks for cas2 which failed to recognize use
1994 of address register.
1996 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1998 * m68k.h: Merged in patches (mostly m68040-specific) from
1999 Colin Smith <colin@wrs.com>.
2001 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2002 base). Also cleaned up duplicates, re-ordered instructions for
2003 the sake of dis-assembling (so aliases come after standard names).
2004 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2006 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2008 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2011 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2013 * sparc.h: Moved tables to BFD library.
2015 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2017 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2019 * h8300.h: Finish filling in all the holes in the opcode table,
2020 so that the Lucid C compiler can digest this as well...
2022 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2024 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2025 Fix opcodes on various sizes of fild/fist instructions
2026 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2027 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2029 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2031 * h8300.h: Fill in all the holes in the opcode table so that the
2032 losing HPUX C compiler can digest this...
2034 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2036 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2037 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2039 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2041 * sparc.h: Add new architecture variant sparclite; add its scan
2042 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2044 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2046 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2049 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2051 * rs6k.h: New version from IBM (Metin).
2053 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2055 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2056 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2058 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2060 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2062 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2064 * m68k.h (one, two): Cast macro args to unsigned to suppress
2065 complaints from compiler and lint about integer overflow during
2068 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2070 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2072 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2074 * mips.h: Make bitfield layout depend on the HOST compiler,
2075 not on the TARGET system.
2077 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2079 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2080 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2081 <TRANLE@INTELLICORP.COM>.
2083 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2085 * h8300.h: turned op_type enum into #define list
2087 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2089 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2090 similar instructions -- they've been renamed to "fitoq", etc.
2091 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2092 number of arguments.
2093 * h8300.h: Remove extra ; which produces compiler warning.
2095 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2097 * sparc.h: fix opcode for tsubcctv.
2099 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2101 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2103 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2105 * sparc.h (nop): Made the 'lose' field be even tighter,
2106 so only a standard 'nop' is disassembled as a nop.
2108 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2110 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2111 disassembled as a nop.
2113 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2115 * sparc.h: fix a typo.
2117 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2119 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2120 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2121 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2125 version-control: never