b8642e515065bdb1ef50211f6eebbb8697408ed7
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
2
3 cris.h: New file.
4
5 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
6
7 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
8 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
9 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
10 (AVR_ISA_M83): Define for ATmega83, ATmega85.
11 (espm): Remove, because ESPM removed in databook update.
12 (eicall, eijmp): Move to the end of opcode table.
13
14 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
15
16 * m68hc11.h: New file for support of Motorola 68hc11.
17
18 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
19
20 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
21
22 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
23
24 * avr.h: New file with AVR opcodes.
25
26 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
27
28 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
29
30 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
31
32 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
33
34 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
35
36 * i386.h: Use sl_FP, not sl_Suf for fild.
37
38 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
39
40 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
41 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
42 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
43 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
44
45 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
46
47 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
48
49 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
50 Alexander Sokolov <robocop@netlink.ru>
51
52 * i386.h (i386_optab): Add cpu_flags for all instructions.
53
54 2000-05-13 Alan Modra <alan@linuxcare.com.au>
55
56 From Gavin Romig-Koch <gavin@cygnus.com>
57 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
58
59 2000-05-04 Timothy Wall <twall@cygnus.com>
60
61 * tic54x.h: New.
62
63 2000-05-03 J.T. Conklin <jtc@redback.com>
64
65 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
66 (PPC_OPERAND_VR): New operand flag for vector registers.
67
68 2000-05-01 Kazu Hirata <kazu@hxi.com>
69
70 * h8300.h (EOP): Add missing initializer.
71
72 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
73
74 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
75 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
76 New operand types l,y,&,fe,fE,fx added to support above forms.
77 (pa_opcodes): Replaced usage of 'x' as source/target for
78 floating point double-word loads/stores with 'fx'.
79
80 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
81 David Mosberger <davidm@hpl.hp.com>
82 Timothy Wall <twall@cygnus.com>
83 Jim Wilson <wilson@cygnus.com>
84
85 * ia64.h: New file.
86
87 2000-03-27 Nick Clifton <nickc@cygnus.com>
88
89 * d30v.h (SHORT_A1): Fix value.
90 (SHORT_AR): Renumber so that it is at the end of the list of short
91 instructions, not the end of the list of long instructions.
92
93 2000-03-26 Alan Modra <alan@linuxcare.com>
94
95 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
96 problem isn't really specific to Unixware.
97 (OLDGCC_COMPAT): Define.
98 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
99 destination %st(0).
100 Fix lots of comments.
101
102 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
103
104 * d30v.h:
105 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
106 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
107 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
108 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
109 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
110 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
111 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
112
113 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
114
115 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
116 fistpd without suffix.
117
118 2000-02-24 Nick Clifton <nickc@cygnus.com>
119
120 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
121 'signed_overflow_ok_p'.
122 Delete prototypes for cgen_set_flags() and cgen_get_flags().
123
124 2000-02-24 Andrew Haley <aph@cygnus.com>
125
126 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
127 (CGEN_CPU_TABLE): flags: new field.
128 Add prototypes for new functions.
129
130 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
131
132 * i386.h: Add some more UNIXWARE_COMPAT comments.
133
134 2000-02-23 Linas Vepstas <linas@linas.org>
135
136 * i370.h: New file.
137
138 2000-02-22 Andrew Haley <aph@cygnus.com>
139
140 * mips.h: (OPCODE_IS_MEMBER): Add comment.
141
142 1999-12-30 Andrew Haley <aph@cygnus.com>
143
144 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
145 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
146 insns.
147
148 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
149
150 * i386.h: Qualify intel mode far call and jmp with x_Suf.
151
152 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
153
154 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
155 indirect jumps and calls. Add FF/3 call for intel mode.
156
157 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
158
159 * mn10300.h: Add new operand types. Add new instruction formats.
160
161 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
162
163 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
164 instruction.
165
166 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
167
168 * mips.h (INSN_ISA5): New.
169
170 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
171
172 * mips.h (OPCODE_IS_MEMBER): New.
173
174 1999-10-29 Nick Clifton <nickc@cygnus.com>
175
176 * d30v.h (SHORT_AR): Define.
177
178 1999-10-18 Michael Meissner <meissner@cygnus.com>
179
180 * alpha.h (alpha_num_opcodes): Convert to unsigned.
181 (alpha_num_operands): Ditto.
182
183 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
184
185 * hppa.h (pa_opcodes): Add load and store cache control to
186 instructions. Add ordered access load and store.
187
188 * hppa.h (pa_opcode): Add new entries for addb and addib.
189
190 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
191
192 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
193
194 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
195
196 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
197
198 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
199
200 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
201 and "be" using completer prefixes.
202
203 * hppa.h (pa_opcodes): Add initializers to silence compiler.
204
205 * hppa.h: Update comments about character usage.
206
207 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
208
209 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
210 up the new fstw & bve instructions.
211
212 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
213
214 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
215 instructions.
216
217 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
218
219 * hppa.h (pa_opcodes): Add long offset double word load/store
220 instructions.
221
222 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
223 stores.
224
225 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
226
227 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
228
229 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
230
231 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
232
233 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
234
235 * hppa.h (pa_opcodes): Add support for "b,l".
236
237 * hppa.h (pa_opcodes): Add support for "b,gate".
238
239 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
240
241 * hppa.h (pa_opcodes): Use 'fX' for first register operand
242 in xmpyu.
243
244 * hppa.h (pa_opcodes): Fix mask for probe and probei.
245
246 * hppa.h (pa_opcodes): Fix mask for depwi.
247
248 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
249
250 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
251 an explicit output argument.
252
253 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
254
255 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
256 Add a few PA2.0 loads and store variants.
257
258 1999-09-04 Steve Chamberlain <sac@pobox.com>
259
260 * pj.h: New file.
261
262 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
263
264 * i386.h (i386_regtab): Move %st to top of table, and split off
265 other fp reg entries.
266 (i386_float_regtab): To here.
267
268 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
269
270 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
271 by 'f'.
272
273 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
274 Add supporting args.
275
276 * hppa.h: Document new completers and args.
277 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
278 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
279 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
280 pmenb and pmdis.
281
282 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
283 hshr, hsub, mixh, mixw, permh.
284
285 * hppa.h (pa_opcodes): Change completers in instructions to
286 use 'c' prefix.
287
288 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
289 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
290
291 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
292 fnegabs to use 'I' instead of 'F'.
293
294 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
295
296 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
297 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
298 Alphabetically sort PIII insns.
299
300 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
301
302 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
303
304 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
305
306 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
307 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
308
309 * hppa.h: Document 64 bit condition completers.
310
311 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
312
313 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
314
315 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
316
317 * i386.h (i386_optab): Add DefaultSize modifier to all insns
318 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
319 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
320
321 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
322 Jeff Law <law@cygnus.com>
323
324 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
325
326 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
327
328 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
329 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
330
331 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
332
333 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
334
335 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
336
337 * hppa.h (struct pa_opcode): Add new field "flags".
338 (FLAGS_STRICT): Define.
339
340 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
341 Jeff Law <law@cygnus.com>
342
343 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
344
345 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
346
347 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
348
349 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
350 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
351 flag to fcomi and friends.
352
353 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
354
355 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
356 integer logical instructions.
357
358 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
359
360 * m68k.h: Document new formats `E', `G', `H' and new places `N',
361 `n', `o'.
362
363 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
364 and new places `m', `M', `h'.
365
366 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
367
368 * hppa.h (pa_opcodes): Add several processor specific system
369 instructions.
370
371 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
372
373 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
374 "addb", and "addib" to be used by the disassembler.
375
376 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
377
378 * i386.h (ReverseModrm): Remove all occurences.
379 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
380 movmskps, pextrw, pmovmskb, maskmovq.
381 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
382 ignore the data size prefix.
383
384 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
385 Mostly stolen from Doug Ledford <dledford@redhat.com>
386
387 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
388
389 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
390
391 1999-04-14 Doug Evans <devans@casey.cygnus.com>
392
393 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
394 (CGEN_ATTR_TYPE): Update.
395 (CGEN_ATTR_MASK): Number booleans starting at 0.
396 (CGEN_ATTR_VALUE): Update.
397 (CGEN_INSN_ATTR): Update.
398
399 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
400
401 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
402 instructions.
403
404 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
405
406 * hppa.h (bb, bvb): Tweak opcode/mask.
407
408
409 1999-03-22 Doug Evans <devans@casey.cygnus.com>
410
411 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
412 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
413 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
414 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
415 Delete member max_insn_size.
416 (enum cgen_cpu_open_arg): New enum.
417 (cpu_open): Update prototype.
418 (cpu_open_1): Declare.
419 (cgen_set_cpu): Delete.
420
421 1999-03-11 Doug Evans <devans@casey.cygnus.com>
422
423 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
424 (CGEN_OPERAND_NIL): New macro.
425 (CGEN_OPERAND): New member `type'.
426 (@arch@_cgen_operand_table): Delete decl.
427 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
428 (CGEN_OPERAND_TABLE): New struct.
429 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
430 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
431 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
432 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
433 {get,set}_{int,vma}_operand.
434 (@arch@_cgen_cpu_open): New arg `isa'.
435 (cgen_set_cpu): Ditto.
436
437 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
438
439 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
440
441 1999-02-25 Doug Evans <devans@casey.cygnus.com>
442
443 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
444 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
445 enum cgen_hw_type.
446 (CGEN_HW_TABLE): New struct.
447 (hw_table): Delete declaration.
448 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
449 to table entry to enum.
450 (CGEN_OPINST): Ditto.
451 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
452
453 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
454
455 * alpha.h (AXP_OPCODE_EV6): New.
456 (AXP_OPCODE_NOPAL): Include it.
457
458 1999-02-09 Doug Evans <devans@casey.cygnus.com>
459
460 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
461 All uses updated. New members int_insn_p, max_insn_size,
462 parse_operand,insert_operand,extract_operand,print_operand,
463 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
464 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
465 extract_handlers,print_handlers.
466 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
467 (CGEN_ATTR_BOOL_OFFSET): New macro.
468 (CGEN_ATTR_MASK): Subtract it to compute bit number.
469 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
470 (cgen_opcode_handler): Renamed from cgen_base.
471 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
472 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
473 all uses updated.
474 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
475 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
476 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
477 (CGEN_OPCODE,CGEN_IBASE): New types.
478 (CGEN_INSN): Rewrite.
479 (CGEN_{ASM,DIS}_HASH*): Delete.
480 (init_opcode_table,init_ibld_table): Declare.
481 (CGEN_INSN_ATTR): New type.
482
483 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
484
485 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
486 (x_FP, d_FP, dls_FP, sldx_FP): Define.
487 Change *Suf definitions to include x and d suffixes.
488 (movsx): Use w_Suf and b_Suf.
489 (movzx): Likewise.
490 (movs): Use bwld_Suf.
491 (fld): Change ordering. Use sld_FP.
492 (fild): Add Intel Syntax equivalent of fildq.
493 (fst): Use sld_FP.
494 (fist): Use sld_FP.
495 (fstp): Use sld_FP. Add x_FP version.
496 (fistp): LLongMem version for Intel Syntax.
497 (fcom, fcomp): Use sld_FP.
498 (fadd, fiadd, fsub): Use sld_FP.
499 (fsubr): Use sld_FP.
500 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
501
502 1999-01-27 Doug Evans <devans@casey.cygnus.com>
503
504 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
505 CGEN_MODE_UINT.
506
507 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
508
509 * hppa.h (bv): Fix mask.
510
511 1999-01-05 Doug Evans <devans@casey.cygnus.com>
512
513 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
514 (CGEN_ATTR): Use it.
515 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
516 (CGEN_ATTR_TABLE): New member dfault.
517
518 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
519
520 * mips.h (MIPS16_INSN_BRANCH): New.
521
522 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
523
524 The following is part of a change made by Edith Epstein
525 <eepstein@sophia.cygnus.com> as part of a project to merge in
526 changes by HP; HP did not create ChangeLog entries.
527
528 * hppa.h (completer_chars): list of chars to not put a space
529 after.
530
531 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
532
533 * i386.h (i386_optab): Permit w suffix on processor control and
534 status word instructions.
535
536 1998-11-30 Doug Evans <devans@casey.cygnus.com>
537
538 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
539 (struct cgen_keyword_entry): Ditto.
540 (struct cgen_operand): Ditto.
541 (CGEN_IFLD): New typedef, with associated access macros.
542 (CGEN_IFMT): New typedef, with associated access macros.
543 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
544 (CGEN_IVALUE): New typedef.
545 (struct cgen_insn): Delete const on syntax,attrs members.
546 `format' now points to format data. Type of `value' is now
547 CGEN_IVALUE.
548 (struct cgen_opcode_table): New member ifld_table.
549
550 1998-11-18 Doug Evans <devans@casey.cygnus.com>
551
552 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
553 (CGEN_OPERAND_INSTANCE): New member `attrs'.
554 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
555 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
556 (cgen_opcode_table): Update type of dis_hash fn.
557 (extract_operand): Update type of `insn_value' arg.
558
559 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
560
561 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
562
563 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
564
565 * mips.h (INSN_MULT): Added.
566
567 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
568
569 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
570
571 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
572
573 * cgen.h (CGEN_INSN_INT): New typedef.
574 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
575 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
576 (CGEN_INSN_BYTES_PTR): New typedef.
577 (CGEN_EXTRACT_INFO): New typedef.
578 (cgen_insert_fn,cgen_extract_fn): Update.
579 (cgen_opcode_table): New member `insn_endian'.
580 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
581 (insert_operand,extract_operand): Update.
582 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
583
584 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
585
586 * cgen.h (CGEN_ATTR_BOOLS): New macro.
587 (struct CGEN_HW_ENTRY): New member `attrs'.
588 (CGEN_HW_ATTR): New macro.
589 (struct CGEN_OPERAND_INSTANCE): New member `name'.
590 (CGEN_INSN_INVALID_P): New macro.
591
592 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
593
594 * hppa.h: Add "fid".
595
596 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
597
598 From Robert Andrew Dale <rob@nb.net>
599 * i386.h (i386_optab): Add AMD 3DNow! instructions.
600 (AMD_3DNOW_OPCODE): Define.
601
602 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
603
604 * d30v.h (EITHER_BUT_PREFER_MU): Define.
605
606 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
607
608 * cgen.h (cgen_insn): #if 0 out element `cdx'.
609
610 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
611
612 Move all global state data into opcode table struct, and treat
613 opcode table as something that is "opened/closed".
614 * cgen.h (CGEN_OPCODE_DESC): New type.
615 (all fns): New first arg of opcode table descriptor.
616 (cgen_set_parse_operand_fn): Add prototype.
617 (cgen_current_machine,cgen_current_endian): Delete.
618 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
619 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
620 dis_hash_table,dis_hash_table_entries.
621 (opcode_open,opcode_close): Add prototypes.
622
623 * cgen.h (cgen_insn): New element `cdx'.
624
625 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
626
627 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
628
629 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
630
631 * mn10300.h: Add "no_match_operands" field for instructions.
632 (MN10300_MAX_OPERANDS): Define.
633
634 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
635
636 * cgen.h (cgen_macro_insn_count): Declare.
637
638 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
639
640 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
641 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
642 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
643 set_{int,vma}_operand.
644
645 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
646
647 * mn10300.h: Add "machine" field for instructions.
648 (MN103, AM30): Define machine types.
649
650 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
651
652 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
653
654 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
655
656 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
657
658 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
659
660 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
661 and ud2b.
662 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
663 those that happen to be implemented on pentiums.
664
665 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
666
667 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
668 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
669 with Size16|IgnoreSize or Size32|IgnoreSize.
670
671 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
672
673 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
674 (REPE): Rename to REPE_PREFIX_OPCODE.
675 (i386_regtab_end): Remove.
676 (i386_prefixtab, i386_prefixtab_end): Remove.
677 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
678 of md_begin.
679 (MAX_OPCODE_SIZE): Define.
680 (i386_optab_end): Remove.
681 (sl_Suf): Define.
682 (sl_FP): Use sl_Suf.
683
684 * i386.h (i386_optab): Allow 16 bit displacement for `mov
685 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
686 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
687 data32, dword, and adword prefixes.
688 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
689 regs.
690
691 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
692
693 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
694
695 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
696 register operands, because this is a common idiom. Flag them with
697 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
698 fdivrp because gcc erroneously generates them. Also flag with a
699 warning.
700
701 * i386.h: Add suffix modifiers to most insns, and tighter operand
702 checks in some cases. Fix a number of UnixWare compatibility
703 issues with float insns. Merge some floating point opcodes, using
704 new FloatMF modifier.
705 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
706 consistency.
707
708 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
709 IgnoreDataSize where appropriate.
710
711 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
712
713 * i386.h: (one_byte_segment_defaults): Remove.
714 (two_byte_segment_defaults): Remove.
715 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
716
717 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
718
719 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
720 (cgen_hw_lookup_by_num): Declare.
721
722 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
723
724 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
725 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
726
727 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
728
729 * cgen.h (cgen_asm_init_parse): Delete.
730 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
731 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
732
733 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
734
735 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
736 (cgen_asm_finish_insn): Update prototype.
737 (cgen_insn): New members num, data.
738 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
739 dis_hash, dis_hash_table_size moved to ...
740 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
741 All uses updated. New members asm_hash_p, dis_hash_p.
742 (CGEN_MINSN_EXPANSION): New struct.
743 (cgen_expand_macro_insn): Declare.
744 (cgen_macro_insn_count): Declare.
745 (get_insn_operands): Update prototype.
746 (lookup_get_insn_operands): Declare.
747
748 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
749
750 * i386.h (i386_optab): Change iclrKludge and imulKludge to
751 regKludge. Add operands types for string instructions.
752
753 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
754
755 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
756 table.
757
758 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
759
760 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
761 for `gettext'.
762
763 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
764
765 * i386.h: Remove NoModrm flag from all insns: it's never checked.
766 Add IsString flag to string instructions.
767 (IS_STRING): Don't define.
768 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
769 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
770 (SS_PREFIX_OPCODE): Define.
771
772 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
773
774 * i386.h: Revert March 24 patch; no more LinearAddress.
775
776 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
777
778 * i386.h (i386_optab): Remove fwait (9b) from all floating point
779 instructions, and instead add FWait opcode modifier. Add short
780 form of fldenv and fstenv.
781 (FWAIT_OPCODE): Define.
782
783 * i386.h (i386_optab): Change second operand constraint of `mov
784 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
785 allow legal instructions such as `movl %gs,%esi'
786
787 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
788
789 * h8300.h: Various changes to fully bracket initializers.
790
791 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
792
793 * i386.h: Set LinearAddress for lidt and lgdt.
794
795 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
796
797 * cgen.h (CGEN_BOOL_ATTR): New macro.
798
799 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
800
801 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
802
803 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
804
805 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
806 (cgen_insn): Record syntax and format entries here, rather than
807 separately.
808
809 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
810
811 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
812
813 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
814
815 * cgen.h (cgen_insert_fn): Change type of result to const char *.
816 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
817 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
818
819 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
820
821 * cgen.h (lookup_insn): New argument alias_p.
822
823 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
824
825 Fix rac to accept only a0:
826 * d10v.h (OPERAND_ACC): Split into:
827 (OPERAND_ACC0, OPERAND_ACC1) .
828 (OPERAND_GPR): Define.
829
830 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
831
832 * cgen.h (CGEN_FIELDS): Define here.
833 (CGEN_HW_ENTRY): New member `type'.
834 (hw_list): Delete decl.
835 (enum cgen_mode): Declare.
836 (CGEN_OPERAND): New member `hw'.
837 (enum cgen_operand_instance_type): Declare.
838 (CGEN_OPERAND_INSTANCE): New type.
839 (CGEN_INSN): New member `operands'.
840 (CGEN_OPCODE_DATA): Make hw_list const.
841 (get_insn_operands,lookup_insn): Add prototypes for.
842
843 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
844
845 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
846 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
847 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
848 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
849
850 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
851
852 * cgen.h: Correct typo in comment end marker.
853
854 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
855
856 * tic30.h: New file.
857
858 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
859
860 * cgen.h: Add prototypes for cgen_save_fixups(),
861 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
862 of cgen_asm_finish_insn() to return a char *.
863
864 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
865
866 * cgen.h: Formatting changes to improve readability.
867
868 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
869
870 * cgen.h (*): Clean up pass over `struct foo' usage.
871 (CGEN_ATTR): Make unsigned char.
872 (CGEN_ATTR_TYPE): Update.
873 (CGEN_ATTR_{ENTRY,TABLE}): New types.
874 (cgen_base): Move member `attrs' to cgen_insn.
875 (CGEN_KEYWORD): New member `null_entry'.
876 (CGEN_{SYNTAX,FORMAT}): New types.
877 (cgen_insn): Format and syntax separated from each other.
878
879 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
880
881 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
882 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
883 flags_{used,set} long.
884 (d30v_operand): Make flags field long.
885
886 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
887
888 * m68k.h: Fix comment describing operand types.
889
890 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
891
892 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
893 everything else after down.
894
895 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
896
897 * d10v.h (OPERAND_FLAG): Split into:
898 (OPERAND_FFLAG, OPERAND_CFLAG) .
899
900 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
901
902 * mips.h (struct mips_opcode): Changed comments to reflect new
903 field usage.
904
905 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
906
907 * mips.h: Added to comments a quick-ref list of all assigned
908 operand type characters.
909 (OP_{MASK,SH}_PERFREG): New macros.
910
911 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
912
913 * sparc.h: Add '_' and '/' for v9a asr's.
914 Patch from David Miller <davem@vger.rutgers.edu>
915
916 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
917
918 * h8300.h: Bit ops with absolute addresses not in the 8 bit
919 area are not available in the base model (H8/300).
920
921 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
922
923 * m68k.h: Remove documentation of ` operand specifier.
924
925 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
926
927 * m68k.h: Document q and v operand specifiers.
928
929 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
930
931 * v850.h (struct v850_opcode): Add processors field.
932 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
933 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
934 (PROCESSOR_V850EA): New bit constants.
935
936 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
937
938 Merge changes from Martin Hunt:
939
940 * d30v.h: Allow up to 64 control registers. Add
941 SHORT_A5S format.
942
943 * d30v.h (LONG_Db): New form for delayed branches.
944
945 * d30v.h: (LONG_Db): New form for repeati.
946
947 * d30v.h (SHORT_D2B): New form.
948
949 * d30v.h (SHORT_A2): New form.
950
951 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
952 registers are used. Needed for VLIW optimization.
953
954 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
955
956 * cgen.h: Move assembler interface section
957 up so cgen_parse_operand_result is defined for cgen_parse_address.
958 (cgen_parse_address): Update prototype.
959
960 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
961
962 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
963
964 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
965
966 * i386.h (two_byte_segment_defaults): Correct base register 5 in
967 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
968 <paubert@iram.es>.
969
970 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
971 <paubert@iram.es>.
972
973 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
974 <paubert@iram.es>.
975
976 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
977 (JUMP_ON_ECX_ZERO): Remove commented out macro.
978
979 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
980
981 * v850.h (V850_NOT_R0): New flag.
982
983 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
984
985 * v850.h (struct v850_opcode): Remove flags field.
986
987 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
988
989 * v850.h (struct v850_opcode): Add flags field.
990 (struct v850_operand): Extend meaning of 'bits' and 'shift'
991 fields.
992 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
993 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
994
995 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
996
997 * arc.h: New file.
998
999 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1000
1001 * sparc.h (sparc_opcodes): Declare as const.
1002
1003 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1004
1005 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1006 uses single or double precision floating point resources.
1007 (INSN_NO_ISA, INSN_ISA1): Define.
1008 (cpu specific INSN macros): Tweak into bitmasks outside the range
1009 of INSN_ISA field.
1010
1011 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1012
1013 * i386.h: Fix pand opcode.
1014
1015 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1016
1017 * mips.h: Widen INSN_ISA and move it to a more convenient
1018 bit position. Add INSN_3900.
1019
1020 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1021
1022 * mips.h (struct mips_opcode): added new field membership.
1023
1024 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1025
1026 * i386.h (movd): only Reg32 is allowed.
1027
1028 * i386.h: add fcomp and ud2. From Wayne Scott
1029 <wscott@ichips.intel.com>.
1030
1031 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1032
1033 * i386.h: Add MMX instructions.
1034
1035 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1036
1037 * i386.h: Remove W modifier from conditional move instructions.
1038
1039 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1040
1041 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1042 with no arguments to match that generated by the UnixWare
1043 assembler.
1044
1045 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1046
1047 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1048 (cgen_parse_operand_fn): Declare.
1049 (cgen_init_parse_operand): Declare.
1050 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1051 new argument `want'.
1052 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1053 (enum cgen_parse_operand_type): New enum.
1054
1055 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1056
1057 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1058
1059 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1060
1061 * cgen.h: New file.
1062
1063 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1064
1065 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1066 fdivrp.
1067
1068 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1069
1070 * v850.h (extract): Make unsigned.
1071
1072 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1073
1074 * i386.h: Add iclr.
1075
1076 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1077
1078 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1079 take a direction bit.
1080
1081 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1082
1083 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1084
1085 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1086
1087 * sparc.h: Include <ansidecl.h>. Update function declarations to
1088 use prototypes, and to use const when appropriate.
1089
1090 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1091
1092 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1093
1094 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1095
1096 * d10v.h: Change pre_defined_registers to
1097 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1098
1099 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1100
1101 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1102 Change mips_opcodes from const array to a pointer,
1103 and change bfd_mips_num_opcodes from const int to int,
1104 so that we can increase the size of the mips opcodes table
1105 dynamically.
1106
1107 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1108
1109 * d30v.h (FLAG_X): Remove unused flag.
1110
1111 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1112
1113 * d30v.h: New file.
1114
1115 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1116
1117 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1118 (PDS_VALUE): Macro to access value field of predefined symbols.
1119 (tic80_next_predefined_symbol): Add prototype.
1120
1121 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1122
1123 * tic80.h (tic80_symbol_to_value): Change prototype to match
1124 change in function, added class parameter.
1125
1126 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1127
1128 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1129 endmask fields, which are somewhat weird in that 0 and 32 are
1130 treated exactly the same.
1131
1132 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1133
1134 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1135 rather than a constant that is 2**X. Reorder them to put bits for
1136 operands that have symbolic names in the upper bits, so they can
1137 be packed into an int where the lower bits contain the value that
1138 corresponds to that symbolic name.
1139 (predefined_symbo): Add struct.
1140 (tic80_predefined_symbols): Declare array of translations.
1141 (tic80_num_predefined_symbols): Declare size of that array.
1142 (tic80_value_to_symbol): Declare function.
1143 (tic80_symbol_to_value): Declare function.
1144
1145 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1146
1147 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1148
1149 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1150
1151 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1152 be the destination register.
1153
1154 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1155
1156 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1157 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1158 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1159 that the opcode can have two vector instructions in a single
1160 32 bit word and we have to encode/decode both.
1161
1162 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1163
1164 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1165 TIC80_OPERAND_RELATIVE for PC relative.
1166 (TIC80_OPERAND_BASEREL): New flag bit for register
1167 base relative.
1168
1169 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1170
1171 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1172
1173 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1174
1175 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1176 ":s" modifier for scaling.
1177
1178 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1179
1180 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1181 (TIC80_OPERAND_M_LI): Ditto
1182
1183 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1184
1185 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1186 (TIC80_OPERAND_CC): New define for condition code operand.
1187 (TIC80_OPERAND_CR): New define for control register operand.
1188
1189 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1190
1191 * tic80.h (struct tic80_opcode): Name changed.
1192 (struct tic80_opcode): Remove format field.
1193 (struct tic80_operand): Add insertion and extraction functions.
1194 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1195 correct ones.
1196 (FMT_*): Ditto.
1197
1198 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1199
1200 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1201 type IV instruction offsets.
1202
1203 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1204
1205 * tic80.h: New file.
1206
1207 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1208
1209 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1210
1211 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1212
1213 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1214 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1215 * v850.h: Fix comment, v850_operand not powerpc_operand.
1216
1217 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1218
1219 * mn10200.h: Flesh out structures and definitions needed by
1220 the mn10200 assembler & disassembler.
1221
1222 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1223
1224 * mips.h: Add mips16 definitions.
1225
1226 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1227
1228 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1229
1230 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1231
1232 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1233 (MN10300_OPERAND_MEMADDR): Define.
1234
1235 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1236
1237 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1238
1239 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1240
1241 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1242
1243 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1244
1245 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1246
1247 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1248
1249 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1250
1251 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1252
1253 * alpha.h: Don't include "bfd.h"; private relocation types are now
1254 negative to minimize problems with shared libraries. Organize
1255 instruction subsets by AMASK extensions and PALcode
1256 implementation.
1257 (struct alpha_operand): Move flags slot for better packing.
1258
1259 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1260
1261 * v850.h (V850_OPERAND_RELAX): New operand flag.
1262
1263 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1264
1265 * mn10300.h (FMT_*): Move operand format definitions
1266 here.
1267
1268 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1269
1270 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1271
1272 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1273
1274 * mn10300.h (mn10300_opcode): Add "format" field.
1275 (MN10300_OPERAND_*): Define.
1276
1277 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1278
1279 * mn10x00.h: Delete.
1280 * mn10200.h, mn10300.h: New files.
1281
1282 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1283
1284 * mn10x00.h: New file.
1285
1286 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1287
1288 * v850.h: Add new flag to indicate this instruction uses a PC
1289 displacement.
1290
1291 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1292
1293 * h8300.h (stmac): Add missing instruction.
1294
1295 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1296
1297 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1298 field.
1299
1300 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1301
1302 * v850.h (V850_OPERAND_EP): Define.
1303
1304 * v850.h (v850_opcode): Add size field.
1305
1306 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1307
1308 * v850.h (v850_operands): Add insert and extract fields, pointers
1309 to functions used to handle unusual operand encoding.
1310 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1311 V850_OPERAND_SIGNED): Defined.
1312
1313 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1314
1315 * v850.h (v850_operands): Add flags field.
1316 (OPERAND_REG, OPERAND_NUM): Defined.
1317
1318 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1319
1320 * v850.h: New file.
1321
1322 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1323
1324 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1325 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1326 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1327 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1328 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1329 Defined.
1330
1331 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1332
1333 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1334 a 3 bit space id instead of a 2 bit space id.
1335
1336 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1337
1338 * d10v.h: Add some additional defines to support the
1339 assembler in determining which operations can be done in parallel.
1340
1341 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1342
1343 * h8300.h (SN): Define.
1344 (eepmov.b): Renamed from "eepmov"
1345 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1346 with them.
1347
1348 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1349
1350 * d10v.h (OPERAND_SHIFT): New operand flag.
1351
1352 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1353
1354 * d10v.h: Changes for divs, parallel-only instructions, and
1355 signed numbers.
1356
1357 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1358
1359 * d10v.h (pd_reg): Define. Putting the definition here allows
1360 the assembler and disassembler to share the same struct.
1361
1362 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1363
1364 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1365 Williams <steve@icarus.com>.
1366
1367 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1368
1369 * d10v.h: New file.
1370
1371 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1372
1373 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1374
1375 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1376
1377 * m68k.h (mcf5200): New macro.
1378 Document names of coldfire control registers.
1379
1380 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1381
1382 * h8300.h (SRC_IN_DST): Define.
1383
1384 * h8300.h (UNOP3): Mark the register operand in this insn
1385 as a source operand, not a destination operand.
1386 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1387 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1388 register operand with SRC_IN_DST.
1389
1390 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1391
1392 * alpha.h: New file.
1393
1394 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1395
1396 * rs6k.h: Remove obsolete file.
1397
1398 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1399
1400 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1401 fdivp, and fdivrp. Add ffreep.
1402
1403 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1404
1405 * h8300.h: Reorder various #defines for readability.
1406 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1407 (BITOP): Accept additional (unused) argument. All callers changed.
1408 (EBITOP): Likewise.
1409 (O_LAST): Bump.
1410 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1411
1412 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1413 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1414 (BITOP, EBITOP): Handle new H8/S addressing modes for
1415 bit insns.
1416 (UNOP3): Handle new shift/rotate insns on the H8/S.
1417 (insns using exr): New instructions.
1418 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1419
1420 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1421
1422 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1423 was incorrect.
1424
1425 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1426
1427 * h8300.h (START): Remove.
1428 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1429 and mov.l insns that can be relaxed.
1430
1431 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1432
1433 * i386.h: Remove Abs32 from lcall.
1434
1435 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1436
1437 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1438 (SLCPOP): New macro.
1439 Mark X,Y opcode letters as in use.
1440
1441 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1442
1443 * sparc.h (F_FLOAT, F_FBR): Define.
1444
1445 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1446
1447 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1448 from all insns.
1449 (ABS8SRC,ABS8DST): Add ABS8MEM.
1450 (add.l): Fix reg+reg variant.
1451 (eepmov.w): Renamed from eepmovw.
1452 (ldc,stc): Fix many cases.
1453
1454 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1455
1456 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1457
1458 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1459
1460 * sparc.h (O): Mark operand letter as in use.
1461
1462 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1463
1464 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1465 Mark operand letters uU as in use.
1466
1467 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1468
1469 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1470 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1471 (SPARC_OPCODE_SUPPORTED): New macro.
1472 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1473 (F_NOTV9): Delete.
1474
1475 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1476
1477 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1478 declaration consistent with return type in definition.
1479
1480 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1481
1482 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1483
1484 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1485
1486 * i386.h (i386_regtab): Add 80486 test registers.
1487
1488 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1489
1490 * i960.h (I_HX): Define.
1491 (i960_opcodes): Add HX instruction.
1492
1493 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1494
1495 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1496 and fclex.
1497
1498 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1499
1500 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1501 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1502 (bfd_* defines): Delete.
1503 (sparc_opcode_archs): Replaces architecture_pname.
1504 (sparc_opcode_lookup_arch): Declare.
1505 (NUMOPCODES): Delete.
1506
1507 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1508
1509 * sparc.h (enum sparc_architecture): Add v9a.
1510 (ARCHITECTURES_CONFLICT_P): Update.
1511
1512 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1513
1514 * i386.h: Added Pentium Pro instructions.
1515
1516 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1517
1518 * m68k.h: Document new 'W' operand place.
1519
1520 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1521
1522 * hppa.h: Add lci and syncdma instructions.
1523
1524 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1525
1526 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1527 instructions.
1528
1529 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1530
1531 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1532 assembler's -mcom and -many switches.
1533
1534 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1535
1536 * i386.h: Fix cmpxchg8b extension opcode description.
1537
1538 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1539
1540 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1541 and register cr4.
1542
1543 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1544
1545 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1546
1547 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1548
1549 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1550
1551 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1552
1553 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1554
1555 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1556
1557 * m68kmri.h: Remove.
1558
1559 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1560 declarations. Remove F_ALIAS and flag field of struct
1561 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1562 int. Make name and args fields of struct m68k_opcode const.
1563
1564 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1565
1566 * sparc.h (F_NOTV9): Define.
1567
1568 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1569
1570 * mips.h (INSN_4010): Define.
1571
1572 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1573
1574 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1575
1576 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1577 * m68k.h: Fix argument descriptions of coprocessor
1578 instructions to allow only alterable operands where appropriate.
1579 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1580 (m68k_opcode_aliases): Add more aliases.
1581
1582 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1583
1584 * m68k.h: Added explcitly short-sized conditional branches, and a
1585 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1586 svr4-based configurations.
1587
1588 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1589
1590 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1591 * i386.h: added missing Data16/Data32 flags to a few instructions.
1592
1593 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1594
1595 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1596 (OP_MASK_BCC, OP_SH_BCC): Define.
1597 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1598 (OP_MASK_CCC, OP_SH_CCC): Define.
1599 (INSN_READ_FPR_R): Define.
1600 (INSN_RFE): Delete.
1601
1602 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1603
1604 * m68k.h (enum m68k_architecture): Deleted.
1605 (struct m68k_opcode_alias): New type.
1606 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1607 matching constraints, values and flags. As a side effect of this,
1608 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1609 as I know were never used, now may need re-examining.
1610 (numopcodes): Now const.
1611 (m68k_opcode_aliases, numaliases): New variables.
1612 (endop): Deleted.
1613 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1614 m68k_opcode_aliases; update declaration of m68k_opcodes.
1615
1616 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1617
1618 * hppa.h (delay_type): Delete unused enumeration.
1619 (pa_opcode): Replace unused delayed field with an architecture
1620 field.
1621 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1622
1623 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1624
1625 * mips.h (INSN_ISA4): Define.
1626
1627 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1628
1629 * mips.h (M_DLA_AB, M_DLI): Define.
1630
1631 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1632
1633 * hppa.h (fstwx): Fix single-bit error.
1634
1635 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1636
1637 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1638
1639 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1640
1641 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1642 debug registers. From Charles Hannum (mycroft@netbsd.org).
1643
1644 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1645
1646 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1647 i386 support:
1648 * i386.h (MOV_AX_DISP32): New macro.
1649 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1650 of several call/return instructions.
1651 (ADDR_PREFIX_OPCODE): New macro.
1652
1653 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1654
1655 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1656
1657 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1658 it pointer to const char;
1659 (struct vot, field `name'): ditto.
1660
1661 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1662
1663 * vax.h: Supply and properly group all values in end sentinel.
1664
1665 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1666
1667 * mips.h (INSN_ISA, INSN_4650): Define.
1668
1669 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1670
1671 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1672 systems with a separate instruction and data cache, such as the
1673 29040, these instructions take an optional argument.
1674
1675 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1676
1677 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1678 INSN_TRAP.
1679
1680 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1681
1682 * mips.h (INSN_STORE_MEMORY): Define.
1683
1684 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1685
1686 * sparc.h: Document new operand type 'x'.
1687
1688 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1689
1690 * i960.h (I_CX2): New instruction category. It includes
1691 instructions available on Cx and Jx processors.
1692 (I_JX): New instruction category, for JX-only instructions.
1693 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1694 Jx-only instructions, in I_JX category.
1695
1696 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1697
1698 * ns32k.h (endop): Made pointer const too.
1699
1700 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1701
1702 * ns32k.h: Drop Q operand type as there is no correct use
1703 for it. Add I and Z operand types which allow better checking.
1704
1705 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1706
1707 * h8300.h (xor.l) :fix bit pattern.
1708 (L_2): New size of operand.
1709 (trapa): Use it.
1710
1711 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1712
1713 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1714
1715 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1716
1717 * sparc.h: Include v9 definitions.
1718
1719 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1720
1721 * m68k.h (m68060): Defined.
1722 (m68040up, mfloat, mmmu): Include it.
1723 (struct m68k_opcode): Widen `arch' field.
1724 (m68k_opcodes): Updated for M68060. Removed comments that were
1725 instructions commented out by "JF" years ago.
1726
1727 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1728
1729 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1730 add a one-bit `flags' field.
1731 (F_ALIAS): New macro.
1732
1733 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1734
1735 * h8300.h (dec, inc): Get encoding right.
1736
1737 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1738
1739 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1740 a flag instead.
1741 (PPC_OPERAND_SIGNED): Define.
1742 (PPC_OPERAND_SIGNOPT): Define.
1743
1744 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1745
1746 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1747 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1748
1749 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1750
1751 * i386.h: Reverse last change. It'll be handled in gas instead.
1752
1753 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1754
1755 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1756 slower on the 486 and used the implicit shift count despite the
1757 explicit operand. The one-operand form is still available to get
1758 the shorter form with the implicit shift count.
1759
1760 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1761
1762 * hppa.h: Fix typo in fstws arg string.
1763
1764 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1765
1766 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1767
1768 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1769
1770 * ppc.h (PPC_OPCODE_601): Define.
1771
1772 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1773
1774 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1775 (so we can determine valid completers for both addb and addb[tf].)
1776
1777 * hppa.h (xmpyu): No floating point format specifier for the
1778 xmpyu instruction.
1779
1780 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1781
1782 * ppc.h (PPC_OPERAND_NEXT): Define.
1783 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1784 (struct powerpc_macro): Define.
1785 (powerpc_macros, powerpc_num_macros): Declare.
1786
1787 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1788
1789 * ppc.h: New file. Header file for PowerPC opcode table.
1790
1791 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1792
1793 * hppa.h: More minor template fixes for sfu and copr (to allow
1794 for easier disassembly).
1795
1796 * hppa.h: Fix templates for all the sfu and copr instructions.
1797
1798 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1799
1800 * i386.h (push): Permit Imm16 operand too.
1801
1802 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1803
1804 * h8300.h (andc): Exists in base arch.
1805
1806 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1807
1808 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1809 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1810
1811 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1812
1813 * hppa.h: Add FP quadword store instructions.
1814
1815 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1816
1817 * mips.h: (M_J_A): Added.
1818 (M_LA): Removed.
1819
1820 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1821
1822 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1823 <mellon@pepper.ncd.com>.
1824
1825 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1826
1827 * hppa.h: Immediate field in probei instructions is unsigned,
1828 not low-sign extended.
1829
1830 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1831
1832 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1833
1834 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1835
1836 * i386.h: Add "fxch" without operand.
1837
1838 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1839
1840 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1841
1842 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1843
1844 * hppa.h: Add gfw and gfr to the opcode table.
1845
1846 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1847
1848 * m88k.h: extended to handle m88110.
1849
1850 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1851
1852 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1853 addresses.
1854
1855 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1856
1857 * i960.h (i960_opcodes): Properly bracket initializers.
1858
1859 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1860
1861 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1862
1863 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1864
1865 * m68k.h (two): Protect second argument with parentheses.
1866
1867 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1868
1869 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1870 Deleted old in/out instructions in "#if 0" section.
1871
1872 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1873
1874 * i386.h (i386_optab): Properly bracket initializers.
1875
1876 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1877
1878 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1879 Jeff Law, law@cs.utah.edu).
1880
1881 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1882
1883 * i386.h (lcall): Accept Imm32 operand also.
1884
1885 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1886
1887 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1888 (M_DABS): Added.
1889
1890 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1891
1892 * mips.h (INSN_*): Changed values. Removed unused definitions.
1893 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1894 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1895 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1896 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1897 (M_*): Added new values for r6000 and r4000 macros.
1898 (ANY_DELAY): Removed.
1899
1900 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1901
1902 * mips.h: Added M_LI_S and M_LI_SS.
1903
1904 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1905
1906 * h8300.h: Get some rare mov.bs correct.
1907
1908 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1909
1910 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1911 been included.
1912
1913 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1914
1915 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1916 jump instructions, for use in disassemblers.
1917
1918 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1919
1920 * m88k.h: Make bitfields just unsigned, not unsigned long or
1921 unsigned short.
1922
1923 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1924
1925 * hppa.h: New argument type 'y'. Use in various float instructions.
1926
1927 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1928
1929 * hppa.h (break): First immediate field is unsigned.
1930
1931 * hppa.h: Add rfir instruction.
1932
1933 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1934
1935 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1936
1937 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1938
1939 * mips.h: Reworked the hazard information somewhat, and fixed some
1940 bugs in the instruction hazard descriptions.
1941
1942 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1943
1944 * m88k.h: Corrected a couple of opcodes.
1945
1946 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1947
1948 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1949 new version includes instruction hazard information, but is
1950 otherwise reasonably similar.
1951
1952 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1953
1954 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1955
1956 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1957
1958 Patches from Jeff Law, law@cs.utah.edu:
1959 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1960 Make the tables be the same for the following instructions:
1961 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1962 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1963 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1964 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1965 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1966 "fcmp", and "ftest".
1967
1968 * hppa.h: Make new and old tables the same for "break", "mtctl",
1969 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1970 Fix typo in last patch. Collapse several #ifdefs into a
1971 single #ifdef.
1972
1973 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1974 of the comments up-to-date.
1975
1976 * hppa.h: Update "free list" of letters and update
1977 comments describing each letter's function.
1978
1979 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1980
1981 * h8300.h: checkpoint, includes H8/300-H opcodes.
1982
1983 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1984
1985 * Patches from Jeffrey Law <law@cs.utah.edu>.
1986 * hppa.h: Rework single precision FP
1987 instructions so that they correctly disassemble code
1988 PA1.1 code.
1989
1990 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1991
1992 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1993 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1994
1995 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1996
1997 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1998 gdb will define it for now.
1999
2000 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2001
2002 * sparc.h: Don't end enumerator list with comma.
2003
2004 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2005
2006 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2007 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2008 ("bc2t"): Correct typo.
2009 ("[ls]wc[023]"): Use T rather than t.
2010 ("c[0123]"): Define general coprocessor instructions.
2011
2012 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2013
2014 * m68k.h: Move split point for gcc compilation more towards
2015 middle.
2016
2017 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2018
2019 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2020 simply wrong, ics, rfi, & rfsvc were missing).
2021 Add "a" to opr_ext for "bb". Doc fix.
2022
2023 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2024
2025 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2026 * mips.h: Add casts, to suppress warnings about shifting too much.
2027 * m68k.h: Document the placement code '9'.
2028
2029 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2030
2031 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2032 allows callers to break up the large initialized struct full of
2033 opcodes into two half-sized ones. This permits GCC to compile
2034 this module, since it takes exponential space for initializers.
2035 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2036
2037 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2038
2039 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2040 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2041 initialized structs in it.
2042
2043 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2044
2045 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2046 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2047 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2048
2049 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2050
2051 * mips.h: document "i" and "j" operands correctly.
2052
2053 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2054
2055 * mips.h: Removed endianness dependency.
2056
2057 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2058
2059 * h8300.h: include info on number of cycles per instruction.
2060
2061 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2062
2063 * hppa.h: Move handy aliases to the front. Fix masks for extract
2064 and deposit instructions.
2065
2066 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2067
2068 * i386.h: accept shld and shrd both with and without the shift
2069 count argument, which is always %cl.
2070
2071 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2072
2073 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2074 (one_byte_segment_defaults, two_byte_segment_defaults,
2075 i386_prefixtab_end): Ditto.
2076
2077 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2078
2079 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2080 for operand 2; from John Carr, jfc@dsg.dec.com.
2081
2082 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2083
2084 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2085 always use 16-bit offsets. Makes calculated-size jump tables
2086 feasible.
2087
2088 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2089
2090 * i386.h: Fix one-operand forms of in* and out* patterns.
2091
2092 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2093
2094 * m68k.h: Added CPU32 support.
2095
2096 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2097
2098 * mips.h (break): Disassemble the argument. Patch from
2099 jonathan@cs.stanford.edu (Jonathan Stone).
2100
2101 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2102
2103 * m68k.h: merged Motorola and MIT syntax.
2104
2105 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2106
2107 * m68k.h (pmove): make the tests less strict, the 68k book is
2108 wrong.
2109
2110 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2111
2112 * m68k.h (m68ec030): Defined as alias for 68030.
2113 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2114 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2115 them. Tightened description of "fmovex" to distinguish it from
2116 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2117 up descriptions that claimed versions were available for chips not
2118 supporting them. Added "pmovefd".
2119
2120 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2121
2122 * m68k.h: fix where the . goes in divull
2123
2124 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2125
2126 * m68k.h: the cas2 instruction is supposed to be written with
2127 indirection on the last two operands, which can be either data or
2128 address registers. Added a new operand type 'r' which accepts
2129 either register type. Added new cases for cas2l and cas2w which
2130 use them. Corrected masks for cas2 which failed to recognize use
2131 of address register.
2132
2133 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2134
2135 * m68k.h: Merged in patches (mostly m68040-specific) from
2136 Colin Smith <colin@wrs.com>.
2137
2138 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2139 base). Also cleaned up duplicates, re-ordered instructions for
2140 the sake of dis-assembling (so aliases come after standard names).
2141 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2142
2143 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2144
2145 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2146 all missing .s
2147
2148 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2149
2150 * sparc.h: Moved tables to BFD library.
2151
2152 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2153
2154 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2155
2156 * h8300.h: Finish filling in all the holes in the opcode table,
2157 so that the Lucid C compiler can digest this as well...
2158
2159 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2160
2161 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2162 Fix opcodes on various sizes of fild/fist instructions
2163 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2164 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2165
2166 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2167
2168 * h8300.h: Fill in all the holes in the opcode table so that the
2169 losing HPUX C compiler can digest this...
2170
2171 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2172
2173 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2174 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2175
2176 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2177
2178 * sparc.h: Add new architecture variant sparclite; add its scan
2179 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2180
2181 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2182
2183 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2184 fy@lucid.com).
2185
2186 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2187
2188 * rs6k.h: New version from IBM (Metin).
2189
2190 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2191
2192 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2193 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2194
2195 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2196
2197 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2198
2199 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2200
2201 * m68k.h (one, two): Cast macro args to unsigned to suppress
2202 complaints from compiler and lint about integer overflow during
2203 shift.
2204
2205 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2206
2207 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2208
2209 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2210
2211 * mips.h: Make bitfield layout depend on the HOST compiler,
2212 not on the TARGET system.
2213
2214 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2215
2216 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2217 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2218 <TRANLE@INTELLICORP.COM>.
2219
2220 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2221
2222 * h8300.h: turned op_type enum into #define list
2223
2224 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2225
2226 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2227 similar instructions -- they've been renamed to "fitoq", etc.
2228 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2229 number of arguments.
2230 * h8300.h: Remove extra ; which produces compiler warning.
2231
2232 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2233
2234 * sparc.h: fix opcode for tsubcctv.
2235
2236 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2237
2238 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2239
2240 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2241
2242 * sparc.h (nop): Made the 'lose' field be even tighter,
2243 so only a standard 'nop' is disassembled as a nop.
2244
2245 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2246
2247 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2248 disassembled as a nop.
2249
2250 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2251
2252 * sparc.h: fix a typo.
2253
2254 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2255
2256 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2257 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2258 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2259
2260 \f
2261 Local Variables:
2262 version-control: never
2263 End:
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