2003-06-03 Michael Snyder <msnyder@redhat.com>
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2003-06-03 Michael Snyder <msnyder@redhat.com>
2 and Bernd Schmidt <bernds@redhat.com>
3 and Alexandre Oliva <aoliva@redhat.com>
4 * h8300.h: Add support for h8300sx instruction set.
5
6 2003-05-23 Jason Eckhardt <jle@rice.edu>
7
8 * i860.h (expand_type): Add XP_ONLY.
9 (scyc.b): New XP instruction.
10 (ldio.l): Likewise.
11 (ldio.s): Likewise.
12 (ldio.b): Likewise.
13 (ldint.l): Likewise.
14 (ldint.s): Likewise.
15 (ldint.b): Likewise.
16 (stio.l): Likewise.
17 (stio.s): Likewise.
18 (stio.b): Likewise.
19 (pfld.q): Likewise.
20
21 2003-05-20 Jason Eckhardt <jle@rice.edu>
22
23 * i860.h (flush): Set lower 3 bits properly and use 'L'
24 for the immediate operand type instead of 'i'.
25
26 2003-05-20 Jason Eckhardt <jle@rice.edu>
27
28 * i860.h (fzchks): Both S and R bits must be set.
29 (pfzchks): Likewise.
30 (faddp): Likewise.
31 (pfaddp): Likewise.
32 (fix.ss): Remove (invalid instruction).
33 (pfix.ss): Likewise.
34 (ftrunc.ss): Likewise.
35 (pftrunc.ss): Likewise.
36
37 2003-05-18 Jason Eckhardt <jle@rice.edu>
38
39 * i860.h (form, pform): Add missing .dd suffix.
40
41 2003-05-13 Stephane Carrez <stcarrez@nerim.fr>
42
43 * m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000
44
45 2003-04-07 Michael Snyder <msnyder@redhat.com>
46
47 * h8300.h (ldc/stc): Fix up src/dst swaps.
48
49 2003-04-09 J. Grant <jg-binutils@jguk.org>
50
51 * mips.h: Correct comment typo.
52
53 2003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
54
55 * s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
56 (S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH.
57 (s390_opcode): Remove architecture. Add modes and min_cpu.
58
59 2003-03-17 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
60
61 * h8300.h (O_SYS_CMDLINE): New pseudo opcode for command line
62 processing.
63
64 2003-02-21 Noida D.Venkatasubramanian <dvenkat@noida.hcltech.com>
65
66 * h8300.h (ldmac, stmac): Replace MACREG with MS32 and MD32.
67
68 2003-01-23 Alan Modra <amodra@bigpond.net.au>
69
70 * m68hc11.h (cpu6812s): Define.
71
72 2003-01-07 Chris Demetriou <cgd@broadcom.com>
73
74 * mips.h: Fix missing space in comment.
75 (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
76 (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
77 by four bits.
78
79 2003-01-02 Chris Demetriou <cgd@broadcom.com>
80
81 * mips.h: Update copyright years to include 2002 (which had
82 been missed previously) and 2003. Make comments about "+A",
83 "+B", and "+C" operand types more descriptive.
84
85 2002-12-31 Chris Demetriou <cgd@broadcom.com>
86
87 * mips.h: Note that the "+D" operand type name is now used.
88
89 2002-12-30 Chris Demetriou <cgd@broadcom.com>
90
91 * mips.h: Document "+" as the start of two-character operand
92 type names, and add new "K", "+A", "+B", and "+C" operand types.
93 (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
94 (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
95 defines.
96
97 2002-12-24 Dmitry Diky <diwil@mail.ru>
98
99 * msp430.h: New file. Defines msp430 opcodes.
100
101 2002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
102
103 * h8300.h: Added some more pseudo opcodes for system call
104 processing.
105
106 2002-12-19 Chris Demetriou <cgd@broadcom.com>
107
108 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
109 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
110 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
111 (OP_OP_SDC2, OP_OP_SDC3): Define.
112
113 2002-12-16 Alan Modra <amodra@bigpond.net.au>
114
115 * hppa.h (completer_chars): #if 0 out.
116
117 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
118 "default_args".
119 (struct not_wot): Constify "args".
120 (struct not): Constify "name".
121 (numopcodes): Delete.
122 (endop): Delete.
123
124 2002-12-13 Alan Modra <amodra@bigpond.net.au>
125
126 * pj.h (pj_opc_info_t): Add union.
127
128 2002-12-04 David Mosberger <davidm@hpl.hp.com>
129
130 * ia64.h: Fix copyright message.
131 (IA64_OPND_AR_CSD): New operand kind.
132
133 2002-12-03 Richard Henderson <rth@redhat.com>
134
135 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
136
137 2002-12-03 Alan Modra <amodra@bigpond.net.au>
138
139 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
140 Constify "leaf" and "multi".
141
142 2002-11-19 Klee Dienes <kdienes@apple.com>
143
144 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
145 fields.
146 (h8_opcodes). Modify initializer and initializer macros to no
147 longer initialize the removed fields.
148
149 2002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
150
151 * tic4x.h (c4x_insts): Fixed LDHI constraint
152
153 2002-11-18 Klee Dienes <kdienes@apple.com>
154
155 * h8300.h (h8_opcode): Remove 'length' field.
156 (h8_opcodes): Mark as 'const' (both the declaration and
157 definition). Modify initializer and initializer macros to no
158 longer initialize the length field.
159
160 2002-11-18 Klee Dienes <kdienes@apple.com>
161
162 * arc.h (arc_ext_opcodes): Declare as extern.
163 (arc_ext_operands): Declare as extern.
164 * i860.h (i860_opcodes): Declare as const.
165
166 2002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
167
168 * tic4x.h: File reordering. Added enhanced opcodes.
169
170 2002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
171
172 * tic4x.h: Major rewrite of entire file. Define instruction
173 classes, and put each instruction into a class.
174
175 2002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
176
177 * tic4x.h: Added new opcodes and corrected some bugs. Add support
178 for new DSP types.
179
180 2002-10-14 Alan Modra <amodra@bigpond.net.au>
181
182 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
183
184 2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
185 Ken Raeburn <raeburn@cygnus.com>
186 Aldy Hernandez <aldyh@redhat.com>
187 Eric Christopher <echristo@redhat.com>
188 Richard Sandiford <rsandifo@redhat.com>
189
190 * mips.h: Update comment for new opcodes.
191 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
192 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
193 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
194 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
195 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
196 Don't match CPU_R4111 with INSN_4100.
197
198 2002-08-19 Elena Zannoni <ezannoni@redhat.com>
199
200 From matthew green <mrg@redhat.com>
201
202 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
203 instructions.
204 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
205 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
206 e500x2 Integer select, branch locking, performance monitor,
207 cache locking and machine check APUs, respectively.
208 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
209 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
210
211 2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
212
213 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
214 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
215 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
216 memory banks.
217 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
218
219 2002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
220
221 * mips.h (INSN_MIPS16): New define.
222
223 2002-07-08 Alan Modra <amodra@bigpond.net.au>
224
225 * i386.h: Remove IgnoreSize from movsx and movzx.
226
227 2002-06-08 Alan Modra <amodra@bigpond.net.au>
228
229 * a29k.h: Replace CONST with const.
230 (CONST): Don't define.
231 * convex.h: Replace CONST with const.
232 (CONST): Don't define.
233 * dlx.h: Replace CONST with const.
234 * or32.h (CONST): Don't define.
235
236 2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
237
238 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
239 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
240 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
241 (INSN_MDMX): New constants, for MDMX support.
242 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
243
244 2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
245
246 * dlx.h: New file.
247
248 2002-05-25 Alan Modra <amodra@bigpond.net.au>
249
250 * ia64.h: Use #include "" instead of <> for local header files.
251 * sparc.h: Likewise.
252
253 2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
254
255 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
256
257 2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
258
259 * h8300.h: Corrected defs of all control regs
260 and eepmov instr.
261
262 2002-04-11 Alan Modra <amodra@bigpond.net.au>
263
264 * i386.h: Add intel mode cmpsd and movsd.
265 Put them before SSE2 insns, so that rep prefix works.
266
267 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
268
269 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
270 instructions.
271 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
272 may be passed along with the ISA bitmask.
273
274 2002-03-05 Paul Koning <pkoning@equallogic.com>
275
276 * pdp11.h: Add format codes for float instruction formats.
277
278 2002-02-25 Alan Modra <amodra@bigpond.net.au>
279
280 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
281
282 Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
283
284 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
285
286 Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
287
288 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
289 (xchg): Fix.
290 (in, out): Disable 64bit operands.
291 (call, jmp): Avoid REX prefixes.
292 (jcxz): Prohibit in 64bit mode
293 (jrcxz, loop): Add 64bit variants.
294 (movq): Fix patterns.
295 (movmskps, pextrw, pinstrw): Add 64bit variants.
296
297 2002-01-31 Ivan Guzvinec <ivang@opencores.org>
298
299 * or32.h: New file.
300
301 2002-01-22 Graydon Hoare <graydon@redhat.com>
302
303 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
304 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
305
306 2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
307
308 * h8300.h: Comment typo fix.
309
310 2002-01-03 matthew green <mrg@redhat.com>
311
312 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
313 (PPC_OPCODE_BOOKE64): Likewise.
314
315 Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
316
317 * hppa.h (call, ret): Move to end of table.
318 (addb, addib): PA2.0 variants should have been PA2.0W.
319 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
320 happy.
321 (fldw, fldd, fstw, fstd, bb): Likewise.
322 (short loads/stores): Tweak format specifier slightly to keep
323 disassembler happy.
324 (indexed loads/stores): Likewise.
325 (absolute loads/stores): Likewise.
326
327 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
328
329 * d10v.h (OPERAND_NOSP): New macro.
330
331 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
332
333 * d10v.h (OPERAND_SP): New macro.
334
335 2001-11-15 Alan Modra <amodra@bigpond.net.au>
336
337 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
338
339 2001-11-11 Timothy Wall <twall@alum.mit.edu>
340
341 * tic54x.h: Revise opcode layout; don't really need a separate
342 structure for parallel opcodes.
343
344 2001-11-13 Zack Weinberg <zack@codesourcery.com>
345 Alan Modra <amodra@bigpond.net.au>
346
347 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
348 accept WordReg.
349
350 2001-11-04 Chris Demetriou <cgd@broadcom.com>
351
352 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
353
354 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
355
356 * mmix.h: New file.
357
358 2001-10-18 Chris Demetriou <cgd@broadcom.com>
359
360 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
361 of the expression, to make source code merging easier.
362
363 2001-10-17 Chris Demetriou <cgd@broadcom.com>
364
365 * mips.h: Sort coprocessor instruction argument characters
366 in comment, add a few more words of description for "H".
367
368 2001-10-17 Chris Demetriou <cgd@broadcom.com>
369
370 * mips.h (INSN_SB1): New cpu-specific instruction bit.
371 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
372 if cpu is CPU_SB1.
373
374 2001-10-17 matthew green <mrg@redhat.com>
375
376 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
377
378 2001-10-12 matthew green <mrg@redhat.com>
379
380 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
381 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
382 instructions, respectively.
383
384 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
385
386 * v850.h: Remove spurious comment.
387
388 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
389
390 * h8300.h: Fix compile time warning messages
391
392 2001-09-04 Richard Henderson <rth@redhat.com>
393
394 * alpha.h (struct alpha_operand): Pack elements into bitfields.
395
396 2001-08-31 Eric Christopher <echristo@redhat.com>
397
398 * mips.h: Remove CPU_MIPS32_4K.
399
400 2001-08-27 Torbjorn Granlund <tege@swox.com>
401
402 * ppc.h (PPC_OPERAND_DS): Define.
403
404 2001-08-25 Andreas Jaeger <aj@suse.de>
405
406 * d30v.h: Fix declaration of reg_name_cnt.
407
408 * d10v.h: Fix declaration of d10v_reg_name_cnt.
409
410 * arc.h: Add prototypes from opcodes/arc-opc.c.
411
412 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
413
414 * mips.h (INSN_10000): Define.
415 (OPCODE_IS_MEMBER): Check for INSN_10000.
416
417 2001-08-10 Alan Modra <amodra@one.net.au>
418
419 * ppc.h: Revert 2001-08-08.
420
421 2001-08-10 Richard Sandiford <rsandifo@redhat.com>
422
423 * mips.h (INSN_GP32): Remove.
424 (OPCODE_IS_MEMBER): Remove gp32 parameter.
425 (M_MOVE): New macro identifier.
426
427 2001-08-08 Alan Modra <amodra@one.net.au>
428
429 1999-10-25 Torbjorn Granlund <tege@swox.com>
430 * ppc.h (struct powerpc_operand): New field `reloc'.
431
432 2001-08-01 Aldy Hernandez <aldyh@redhat.com>
433
434 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
435
436 2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
437
438 * cgen.h (CGEN_INSN): Add regex support.
439 (build_insn_regex): Declare.
440
441 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
442
443 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
444 (cgen_cpu_desc): Ditto.
445
446 2001-07-07 Ben Elliston <bje@redhat.com>
447
448 * m88k.h: Clean up and reformat. Remove unused code.
449
450 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
451
452 * cgen.h (cgen_keyword): Add nonalpha_chars field.
453
454 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
455
456 * mips.h (CPU_R12000): Define.
457
458 2001-05-23 John Healy <jhealy@redhat.com>
459
460 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
461
462 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
463
464 * mips.h (INSN_ISA_MASK): Define.
465
466 2001-05-12 Alan Modra <amodra@one.net.au>
467
468 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
469 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
470 and use InvMem as these insns must have register operands.
471
472 2001-05-04 Alan Modra <amodra@one.net.au>
473
474 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
475 and pextrw to swap reg/rm assignments.
476
477 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
478
479 * cris.h (enum cris_insn_version_usage): Correct comment for
480 cris_ver_v3p.
481
482 2001-03-24 Alan Modra <alan@linuxcare.com.au>
483
484 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
485 Add InvMem to first operand of "maskmovdqu".
486
487 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
488
489 * cris.h (ADD_PC_INCR_OPCODE): New macro.
490
491 2001-03-21 Kazu Hirata <kazu@hxi.com>
492
493 * h8300.h: Fix formatting.
494
495 2001-03-22 Alan Modra <alan@linuxcare.com.au>
496
497 * i386.h (i386_optab): Add paddq, psubq.
498
499 2001-03-19 Alan Modra <alan@linuxcare.com.au>
500
501 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
502
503 2001-02-28 Igor Shevlyakov <igor@windriver.com>
504
505 * m68k.h: new defines for Coldfire V4. Update mcf to know
506 about mcf5407.
507
508 2001-02-18 lars brinkhoff <lars@nocrew.org>
509
510 * pdp11.h: New file.
511
512 2001-02-12 Jan Hubicka <jh@suse.cz>
513
514 * i386.h (i386_optab): SSE integer converison instructions have
515 64bit versions on x86-64.
516
517 2001-02-10 Nick Clifton <nickc@redhat.com>
518
519 * mips.h: Remove extraneous whitespace. Formating change to allow
520 for future contribution.
521
522 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
523
524 * s390.h: New file.
525
526 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
527
528 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
529 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
530 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
531
532 2001-01-24 Karsten Keil <kkeil@suse.de>
533
534 * i386.h (i386_optab): Fix swapgs
535
536 2001-01-14 Alan Modra <alan@linuxcare.com.au>
537
538 * hppa.h: Describe new '<' and '>' operand types, and tidy
539 existing comments.
540 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
541 Remove duplicate "ldw j(s,b),x". Sort some entries.
542
543 2001-01-13 Jan Hubicka <jh@suse.cz>
544
545 * i386.h (i386_optab): Fix pusha and ret templates.
546
547 2001-01-11 Peter Targett <peter.targett@arccores.com>
548
549 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
550 definitions for masking cpu type.
551 (arc_ext_operand_value) New structure for storing extended
552 operands.
553 (ARC_OPERAND_*) Flags for operand values.
554
555 2001-01-10 Jan Hubicka <jh@suse.cz>
556
557 * i386.h (pinsrw): Add.
558 (pshufw): Remove.
559 (cvttpd2dq): Fix operands.
560 (cvttps2dq): Likewise.
561 (movq2q): Rename to movdq2q.
562
563 2001-01-10 Richard Schaal <richard.schaal@intel.com>
564
565 * i386.h: Correct movnti instruction.
566
567 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
568
569 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
570 of operands (unsigned char or unsigned short).
571 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
572 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
573
574 2001-01-05 Jan Hubicka <jh@suse.cz>
575
576 * i386.h (i386_optab): Make [sml]fence template to use immext field.
577
578 2001-01-03 Jan Hubicka <jh@suse.cz>
579
580 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
581 introduced by Pentium4
582
583 2000-12-30 Jan Hubicka <jh@suse.cz>
584
585 * i386.h (i386_optab): Add "rex*" instructions;
586 add swapgs; disable jmp/call far direct instructions for
587 64bit mode; add syscall and sysret; disable registers for 0xc6
588 template. Add 'q' suffixes to extendable instructions, disable
589 obsolete instructions, add new sign/zero extension ones.
590 (i386_regtab): Add extended registers.
591 (*Suf): Add No_qSuf.
592 (q_Suf, wlq_Suf, bwlq_Suf): New.
593
594 2000-12-20 Jan Hubicka <jh@suse.cz>
595
596 * i386.h (i386_optab): Replace "Imm" with "EncImm".
597 (i386_regtab): Add flags field.
598
599 2000-12-12 Nick Clifton <nickc@redhat.com>
600
601 * mips.h: Fix formatting.
602
603 2000-12-01 Chris Demetriou <cgd@sibyte.com>
604
605 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
606 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
607 OP_*_SYSCALL definitions.
608 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
609 19 bit wait codes.
610 (MIPS operand specifier comments): Remove 'm', add 'U' and
611 'J', and update the meaning of 'B' so that it's more general.
612
613 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
614 INSN_ISA5): Renumber, redefine to mean the ISA at which the
615 instruction was added.
616 (INSN_ISA32): New constant.
617 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
618 Renumber to avoid new and/or renumbered INSN_* constants.
619 (INSN_MIPS32): Delete.
620 (ISA_UNKNOWN): New constant to indicate unknown ISA.
621 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
622 ISA_MIPS32): New constants, defined to be the mask of INSN_*
623 constants available at that ISA level.
624 (CPU_UNKNOWN): New constant to indicate unknown CPU.
625 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
626 define it with a unique value.
627 (OPCODE_IS_MEMBER): Update for new ISA membership-related
628 constant meanings.
629
630 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
631 definitions.
632
633 * mips.h (CPU_SB1): New constant.
634
635 2000-10-20 Jakub Jelinek <jakub@redhat.com>
636
637 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
638 Note that '3' is used for siam operand.
639
640 2000-09-22 Jim Wilson <wilson@cygnus.com>
641
642 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
643
644 2000-09-13 Anders Norlander <anorland@acc.umu.se>
645
646 * mips.h: Use defines instead of hard-coded processor numbers.
647 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
648 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
649 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
650 CPU_4KC, CPU_4KM, CPU_4KP): Define..
651 (OPCODE_IS_MEMBER): Use new defines.
652 (OP_MASK_SEL, OP_SH_SEL): Define.
653 (OP_MASK_CODE20, OP_SH_CODE20): Define.
654 Add 'P' to used characters.
655 Use 'H' for coprocessor select field.
656 Use 'm' for 20 bit breakpoint code.
657 Document new arg characters and add to used characters.
658 (INSN_MIPS32): New define for MIPS32 extensions.
659 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
660
661 2000-09-05 Alan Modra <alan@linuxcare.com.au>
662
663 * hppa.h: Mention cz completer.
664
665 2000-08-16 Jim Wilson <wilson@cygnus.com>
666
667 * ia64.h (IA64_OPCODE_POSTINC): New.
668
669 2000-08-15 H.J. Lu <hjl@gnu.org>
670
671 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
672 IgnoreSize change.
673
674 2000-08-08 Jason Eckhardt <jle@cygnus.com>
675
676 * i860.h: Small formatting adjustments.
677
678 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
679
680 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
681 Move related opcodes closer to each other.
682 Minor changes in comments, list undefined opcodes.
683
684 2000-07-26 Dave Brolley <brolley@redhat.com>
685
686 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
687
688 2000-07-22 Jason Eckhardt <jle@cygnus.com>
689
690 * i860.h (btne, bte, bla): Changed these opcodes
691 to use sbroff ('r') instead of split16 ('s').
692 (J, K, L, M): New operand types for 16-bit aligned fields.
693 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
694 use I, J, K, L, M instead of just I.
695 (T, U): New operand types for split 16-bit aligned fields.
696 (st.x): Changed these opcodes to use S, T, U instead of just S.
697 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
698 exist on the i860.
699 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
700 (pfeq.ss, pfeq.dd): New opcodes.
701 (st.s): Fixed incorrect mask bits.
702 (fmlow): Fixed incorrect mask bits.
703 (fzchkl, pfzchkl): Fixed incorrect mask bits.
704 (faddz, pfaddz): Fixed incorrect mask bits.
705 (form, pform): Fixed incorrect mask bits.
706 (pfld.l): Fixed incorrect mask bits.
707 (fst.q): Fixed incorrect mask bits.
708 (all floating point opcodes): Fixed incorrect mask bits for
709 handling of dual bit.
710
711 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
712
713 cris.h: New file.
714
715 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
716
717 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
718 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
719 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
720 (AVR_ISA_M83): Define for ATmega83, ATmega85.
721 (espm): Remove, because ESPM removed in databook update.
722 (eicall, eijmp): Move to the end of opcode table.
723
724 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
725
726 * m68hc11.h: New file for support of Motorola 68hc11.
727
728 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
729
730 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
731
732 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
733
734 * avr.h: New file with AVR opcodes.
735
736 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
737
738 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
739
740 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
741
742 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
743
744 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
745
746 * i386.h: Use sl_FP, not sl_Suf for fild.
747
748 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
749
750 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
751 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
752 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
753 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
754
755 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
756
757 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
758
759 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
760 Alexander Sokolov <robocop@netlink.ru>
761
762 * i386.h (i386_optab): Add cpu_flags for all instructions.
763
764 2000-05-13 Alan Modra <alan@linuxcare.com.au>
765
766 From Gavin Romig-Koch <gavin@cygnus.com>
767 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
768
769 2000-05-04 Timothy Wall <twall@cygnus.com>
770
771 * tic54x.h: New.
772
773 2000-05-03 J.T. Conklin <jtc@redback.com>
774
775 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
776 (PPC_OPERAND_VR): New operand flag for vector registers.
777
778 2000-05-01 Kazu Hirata <kazu@hxi.com>
779
780 * h8300.h (EOP): Add missing initializer.
781
782 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
783
784 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
785 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
786 New operand types l,y,&,fe,fE,fx added to support above forms.
787 (pa_opcodes): Replaced usage of 'x' as source/target for
788 floating point double-word loads/stores with 'fx'.
789
790 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
791 David Mosberger <davidm@hpl.hp.com>
792 Timothy Wall <twall@cygnus.com>
793 Jim Wilson <wilson@cygnus.com>
794
795 * ia64.h: New file.
796
797 2000-03-27 Nick Clifton <nickc@cygnus.com>
798
799 * d30v.h (SHORT_A1): Fix value.
800 (SHORT_AR): Renumber so that it is at the end of the list of short
801 instructions, not the end of the list of long instructions.
802
803 2000-03-26 Alan Modra <alan@linuxcare.com>
804
805 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
806 problem isn't really specific to Unixware.
807 (OLDGCC_COMPAT): Define.
808 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
809 destination %st(0).
810 Fix lots of comments.
811
812 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
813
814 * d30v.h:
815 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
816 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
817 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
818 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
819 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
820 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
821 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
822
823 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
824
825 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
826 fistpd without suffix.
827
828 2000-02-24 Nick Clifton <nickc@cygnus.com>
829
830 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
831 'signed_overflow_ok_p'.
832 Delete prototypes for cgen_set_flags() and cgen_get_flags().
833
834 2000-02-24 Andrew Haley <aph@cygnus.com>
835
836 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
837 (CGEN_CPU_TABLE): flags: new field.
838 Add prototypes for new functions.
839
840 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
841
842 * i386.h: Add some more UNIXWARE_COMPAT comments.
843
844 2000-02-23 Linas Vepstas <linas@linas.org>
845
846 * i370.h: New file.
847
848 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
849
850 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
851 cannot be combined in parallel with ADD/SUBppp.
852
853 2000-02-22 Andrew Haley <aph@cygnus.com>
854
855 * mips.h: (OPCODE_IS_MEMBER): Add comment.
856
857 1999-12-30 Andrew Haley <aph@cygnus.com>
858
859 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
860 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
861 insns.
862
863 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
864
865 * i386.h: Qualify intel mode far call and jmp with x_Suf.
866
867 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
868
869 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
870 indirect jumps and calls. Add FF/3 call for intel mode.
871
872 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
873
874 * mn10300.h: Add new operand types. Add new instruction formats.
875
876 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
877
878 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
879 instruction.
880
881 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
882
883 * mips.h (INSN_ISA5): New.
884
885 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
886
887 * mips.h (OPCODE_IS_MEMBER): New.
888
889 1999-10-29 Nick Clifton <nickc@cygnus.com>
890
891 * d30v.h (SHORT_AR): Define.
892
893 1999-10-18 Michael Meissner <meissner@cygnus.com>
894
895 * alpha.h (alpha_num_opcodes): Convert to unsigned.
896 (alpha_num_operands): Ditto.
897
898 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
899
900 * hppa.h (pa_opcodes): Add load and store cache control to
901 instructions. Add ordered access load and store.
902
903 * hppa.h (pa_opcode): Add new entries for addb and addib.
904
905 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
906
907 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
908
909 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
910
911 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
912
913 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
914
915 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
916 and "be" using completer prefixes.
917
918 * hppa.h (pa_opcodes): Add initializers to silence compiler.
919
920 * hppa.h: Update comments about character usage.
921
922 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
923
924 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
925 up the new fstw & bve instructions.
926
927 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
928
929 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
930 instructions.
931
932 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
933
934 * hppa.h (pa_opcodes): Add long offset double word load/store
935 instructions.
936
937 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
938 stores.
939
940 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
941
942 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
943
944 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
945
946 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
947
948 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
949
950 * hppa.h (pa_opcodes): Add support for "b,l".
951
952 * hppa.h (pa_opcodes): Add support for "b,gate".
953
954 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
955
956 * hppa.h (pa_opcodes): Use 'fX' for first register operand
957 in xmpyu.
958
959 * hppa.h (pa_opcodes): Fix mask for probe and probei.
960
961 * hppa.h (pa_opcodes): Fix mask for depwi.
962
963 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
964
965 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
966 an explicit output argument.
967
968 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
969
970 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
971 Add a few PA2.0 loads and store variants.
972
973 1999-09-04 Steve Chamberlain <sac@pobox.com>
974
975 * pj.h: New file.
976
977 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
978
979 * i386.h (i386_regtab): Move %st to top of table, and split off
980 other fp reg entries.
981 (i386_float_regtab): To here.
982
983 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
984
985 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
986 by 'f'.
987
988 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
989 Add supporting args.
990
991 * hppa.h: Document new completers and args.
992 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
993 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
994 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
995 pmenb and pmdis.
996
997 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
998 hshr, hsub, mixh, mixw, permh.
999
1000 * hppa.h (pa_opcodes): Change completers in instructions to
1001 use 'c' prefix.
1002
1003 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
1004 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
1005
1006 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
1007 fnegabs to use 'I' instead of 'F'.
1008
1009 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
1010
1011 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
1012 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
1013 Alphabetically sort PIII insns.
1014
1015 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
1016
1017 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
1018
1019 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1020
1021 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
1022 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
1023
1024 * hppa.h: Document 64 bit condition completers.
1025
1026 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1027
1028 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
1029
1030 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
1031
1032 * i386.h (i386_optab): Add DefaultSize modifier to all insns
1033 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
1034 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
1035
1036 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1037 Jeff Law <law@cygnus.com>
1038
1039 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
1040
1041 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
1042
1043 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
1044 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
1045
1046 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
1047
1048 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
1049
1050 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
1051
1052 * hppa.h (struct pa_opcode): Add new field "flags".
1053 (FLAGS_STRICT): Define.
1054
1055 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1056 Jeff Law <law@cygnus.com>
1057
1058 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
1059
1060 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
1061
1062 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
1063
1064 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
1065 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
1066 flag to fcomi and friends.
1067
1068 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
1069
1070 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
1071 integer logical instructions.
1072
1073 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
1074
1075 * m68k.h: Document new formats `E', `G', `H' and new places `N',
1076 `n', `o'.
1077
1078 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
1079 and new places `m', `M', `h'.
1080
1081 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
1082
1083 * hppa.h (pa_opcodes): Add several processor specific system
1084 instructions.
1085
1086 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
1087
1088 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
1089 "addb", and "addib" to be used by the disassembler.
1090
1091 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1092
1093 * i386.h (ReverseModrm): Remove all occurences.
1094 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1095 movmskps, pextrw, pmovmskb, maskmovq.
1096 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1097 ignore the data size prefix.
1098
1099 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1100 Mostly stolen from Doug Ledford <dledford@redhat.com>
1101
1102 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1103
1104 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1105
1106 1999-04-14 Doug Evans <devans@casey.cygnus.com>
1107
1108 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1109 (CGEN_ATTR_TYPE): Update.
1110 (CGEN_ATTR_MASK): Number booleans starting at 0.
1111 (CGEN_ATTR_VALUE): Update.
1112 (CGEN_INSN_ATTR): Update.
1113
1114 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1115
1116 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1117 instructions.
1118
1119 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1120
1121 * hppa.h (bb, bvb): Tweak opcode/mask.
1122
1123
1124 1999-03-22 Doug Evans <devans@casey.cygnus.com>
1125
1126 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1127 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1128 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1129 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1130 Delete member max_insn_size.
1131 (enum cgen_cpu_open_arg): New enum.
1132 (cpu_open): Update prototype.
1133 (cpu_open_1): Declare.
1134 (cgen_set_cpu): Delete.
1135
1136 1999-03-11 Doug Evans <devans@casey.cygnus.com>
1137
1138 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1139 (CGEN_OPERAND_NIL): New macro.
1140 (CGEN_OPERAND): New member `type'.
1141 (@arch@_cgen_operand_table): Delete decl.
1142 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1143 (CGEN_OPERAND_TABLE): New struct.
1144 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1145 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1146 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1147 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1148 {get,set}_{int,vma}_operand.
1149 (@arch@_cgen_cpu_open): New arg `isa'.
1150 (cgen_set_cpu): Ditto.
1151
1152 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1153
1154 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1155
1156 1999-02-25 Doug Evans <devans@casey.cygnus.com>
1157
1158 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1159 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1160 enum cgen_hw_type.
1161 (CGEN_HW_TABLE): New struct.
1162 (hw_table): Delete declaration.
1163 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1164 to table entry to enum.
1165 (CGEN_OPINST): Ditto.
1166 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1167
1168 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1169
1170 * alpha.h (AXP_OPCODE_EV6): New.
1171 (AXP_OPCODE_NOPAL): Include it.
1172
1173 1999-02-09 Doug Evans <devans@casey.cygnus.com>
1174
1175 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1176 All uses updated. New members int_insn_p, max_insn_size,
1177 parse_operand,insert_operand,extract_operand,print_operand,
1178 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1179 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1180 extract_handlers,print_handlers.
1181 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1182 (CGEN_ATTR_BOOL_OFFSET): New macro.
1183 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1184 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1185 (cgen_opcode_handler): Renamed from cgen_base.
1186 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1187 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1188 all uses updated.
1189 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1190 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1191 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1192 (CGEN_OPCODE,CGEN_IBASE): New types.
1193 (CGEN_INSN): Rewrite.
1194 (CGEN_{ASM,DIS}_HASH*): Delete.
1195 (init_opcode_table,init_ibld_table): Declare.
1196 (CGEN_INSN_ATTR): New type.
1197
1198 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
1199
1200 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1201 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1202 Change *Suf definitions to include x and d suffixes.
1203 (movsx): Use w_Suf and b_Suf.
1204 (movzx): Likewise.
1205 (movs): Use bwld_Suf.
1206 (fld): Change ordering. Use sld_FP.
1207 (fild): Add Intel Syntax equivalent of fildq.
1208 (fst): Use sld_FP.
1209 (fist): Use sld_FP.
1210 (fstp): Use sld_FP. Add x_FP version.
1211 (fistp): LLongMem version for Intel Syntax.
1212 (fcom, fcomp): Use sld_FP.
1213 (fadd, fiadd, fsub): Use sld_FP.
1214 (fsubr): Use sld_FP.
1215 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1216
1217 1999-01-27 Doug Evans <devans@casey.cygnus.com>
1218
1219 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1220 CGEN_MODE_UINT.
1221
1222 1999-01-16 Jeffrey A Law (law@cygnus.com)
1223
1224 * hppa.h (bv): Fix mask.
1225
1226 1999-01-05 Doug Evans <devans@casey.cygnus.com>
1227
1228 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1229 (CGEN_ATTR): Use it.
1230 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1231 (CGEN_ATTR_TABLE): New member dfault.
1232
1233 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1234
1235 * mips.h (MIPS16_INSN_BRANCH): New.
1236
1237 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1238
1239 The following is part of a change made by Edith Epstein
1240 <eepstein@sophia.cygnus.com> as part of a project to merge in
1241 changes by HP; HP did not create ChangeLog entries.
1242
1243 * hppa.h (completer_chars): list of chars to not put a space
1244 after.
1245
1246 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1247
1248 * i386.h (i386_optab): Permit w suffix on processor control and
1249 status word instructions.
1250
1251 1998-11-30 Doug Evans <devans@casey.cygnus.com>
1252
1253 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1254 (struct cgen_keyword_entry): Ditto.
1255 (struct cgen_operand): Ditto.
1256 (CGEN_IFLD): New typedef, with associated access macros.
1257 (CGEN_IFMT): New typedef, with associated access macros.
1258 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1259 (CGEN_IVALUE): New typedef.
1260 (struct cgen_insn): Delete const on syntax,attrs members.
1261 `format' now points to format data. Type of `value' is now
1262 CGEN_IVALUE.
1263 (struct cgen_opcode_table): New member ifld_table.
1264
1265 1998-11-18 Doug Evans <devans@casey.cygnus.com>
1266
1267 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1268 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1269 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1270 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1271 (cgen_opcode_table): Update type of dis_hash fn.
1272 (extract_operand): Update type of `insn_value' arg.
1273
1274 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1275
1276 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1277
1278 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1279
1280 * mips.h (INSN_MULT): Added.
1281
1282 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1283
1284 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1285
1286 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1287
1288 * cgen.h (CGEN_INSN_INT): New typedef.
1289 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1290 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1291 (CGEN_INSN_BYTES_PTR): New typedef.
1292 (CGEN_EXTRACT_INFO): New typedef.
1293 (cgen_insert_fn,cgen_extract_fn): Update.
1294 (cgen_opcode_table): New member `insn_endian'.
1295 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1296 (insert_operand,extract_operand): Update.
1297 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1298
1299 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1300
1301 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1302 (struct CGEN_HW_ENTRY): New member `attrs'.
1303 (CGEN_HW_ATTR): New macro.
1304 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1305 (CGEN_INSN_INVALID_P): New macro.
1306
1307 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1308
1309 * hppa.h: Add "fid".
1310
1311 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1312
1313 From Robert Andrew Dale <rob@nb.net>
1314 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1315 (AMD_3DNOW_OPCODE): Define.
1316
1317 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1318
1319 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1320
1321 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1322
1323 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1324
1325 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1326
1327 Move all global state data into opcode table struct, and treat
1328 opcode table as something that is "opened/closed".
1329 * cgen.h (CGEN_OPCODE_DESC): New type.
1330 (all fns): New first arg of opcode table descriptor.
1331 (cgen_set_parse_operand_fn): Add prototype.
1332 (cgen_current_machine,cgen_current_endian): Delete.
1333 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1334 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1335 dis_hash_table,dis_hash_table_entries.
1336 (opcode_open,opcode_close): Add prototypes.
1337
1338 * cgen.h (cgen_insn): New element `cdx'.
1339
1340 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1341
1342 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1343
1344 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1345
1346 * mn10300.h: Add "no_match_operands" field for instructions.
1347 (MN10300_MAX_OPERANDS): Define.
1348
1349 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1350
1351 * cgen.h (cgen_macro_insn_count): Declare.
1352
1353 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1354
1355 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1356 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1357 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1358 set_{int,vma}_operand.
1359
1360 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1361
1362 * mn10300.h: Add "machine" field for instructions.
1363 (MN103, AM30): Define machine types.
1364
1365 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1366
1367 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1368
1369 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1370
1371 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1372
1373 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1374
1375 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1376 and ud2b.
1377 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1378 those that happen to be implemented on pentiums.
1379
1380 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1381
1382 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1383 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1384 with Size16|IgnoreSize or Size32|IgnoreSize.
1385
1386 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1387
1388 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1389 (REPE): Rename to REPE_PREFIX_OPCODE.
1390 (i386_regtab_end): Remove.
1391 (i386_prefixtab, i386_prefixtab_end): Remove.
1392 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1393 of md_begin.
1394 (MAX_OPCODE_SIZE): Define.
1395 (i386_optab_end): Remove.
1396 (sl_Suf): Define.
1397 (sl_FP): Use sl_Suf.
1398
1399 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1400 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1401 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1402 data32, dword, and adword prefixes.
1403 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1404 regs.
1405
1406 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1407
1408 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1409
1410 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1411 register operands, because this is a common idiom. Flag them with
1412 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1413 fdivrp because gcc erroneously generates them. Also flag with a
1414 warning.
1415
1416 * i386.h: Add suffix modifiers to most insns, and tighter operand
1417 checks in some cases. Fix a number of UnixWare compatibility
1418 issues with float insns. Merge some floating point opcodes, using
1419 new FloatMF modifier.
1420 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1421 consistency.
1422
1423 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1424 IgnoreDataSize where appropriate.
1425
1426 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1427
1428 * i386.h: (one_byte_segment_defaults): Remove.
1429 (two_byte_segment_defaults): Remove.
1430 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1431
1432 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1433
1434 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1435 (cgen_hw_lookup_by_num): Declare.
1436
1437 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1438
1439 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1440 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1441
1442 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1443
1444 * cgen.h (cgen_asm_init_parse): Delete.
1445 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1446 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1447
1448 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1449
1450 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1451 (cgen_asm_finish_insn): Update prototype.
1452 (cgen_insn): New members num, data.
1453 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1454 dis_hash, dis_hash_table_size moved to ...
1455 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1456 All uses updated. New members asm_hash_p, dis_hash_p.
1457 (CGEN_MINSN_EXPANSION): New struct.
1458 (cgen_expand_macro_insn): Declare.
1459 (cgen_macro_insn_count): Declare.
1460 (get_insn_operands): Update prototype.
1461 (lookup_get_insn_operands): Declare.
1462
1463 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1464
1465 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1466 regKludge. Add operands types for string instructions.
1467
1468 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1469
1470 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1471 table.
1472
1473 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1474
1475 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1476 for `gettext'.
1477
1478 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1479
1480 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1481 Add IsString flag to string instructions.
1482 (IS_STRING): Don't define.
1483 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1484 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1485 (SS_PREFIX_OPCODE): Define.
1486
1487 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1488
1489 * i386.h: Revert March 24 patch; no more LinearAddress.
1490
1491 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1492
1493 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1494 instructions, and instead add FWait opcode modifier. Add short
1495 form of fldenv and fstenv.
1496 (FWAIT_OPCODE): Define.
1497
1498 * i386.h (i386_optab): Change second operand constraint of `mov
1499 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1500 allow legal instructions such as `movl %gs,%esi'
1501
1502 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1503
1504 * h8300.h: Various changes to fully bracket initializers.
1505
1506 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1507
1508 * i386.h: Set LinearAddress for lidt and lgdt.
1509
1510 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1511
1512 * cgen.h (CGEN_BOOL_ATTR): New macro.
1513
1514 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1515
1516 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1517
1518 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1519
1520 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1521 (cgen_insn): Record syntax and format entries here, rather than
1522 separately.
1523
1524 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1525
1526 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1527
1528 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1529
1530 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1531 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1532 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1533
1534 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1535
1536 * cgen.h (lookup_insn): New argument alias_p.
1537
1538 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1539
1540 Fix rac to accept only a0:
1541 * d10v.h (OPERAND_ACC): Split into:
1542 (OPERAND_ACC0, OPERAND_ACC1) .
1543 (OPERAND_GPR): Define.
1544
1545 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1546
1547 * cgen.h (CGEN_FIELDS): Define here.
1548 (CGEN_HW_ENTRY): New member `type'.
1549 (hw_list): Delete decl.
1550 (enum cgen_mode): Declare.
1551 (CGEN_OPERAND): New member `hw'.
1552 (enum cgen_operand_instance_type): Declare.
1553 (CGEN_OPERAND_INSTANCE): New type.
1554 (CGEN_INSN): New member `operands'.
1555 (CGEN_OPCODE_DATA): Make hw_list const.
1556 (get_insn_operands,lookup_insn): Add prototypes for.
1557
1558 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1559
1560 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1561 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1562 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1563 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1564
1565 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1566
1567 * cgen.h: Correct typo in comment end marker.
1568
1569 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1570
1571 * tic30.h: New file.
1572
1573 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1574
1575 * cgen.h: Add prototypes for cgen_save_fixups(),
1576 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1577 of cgen_asm_finish_insn() to return a char *.
1578
1579 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1580
1581 * cgen.h: Formatting changes to improve readability.
1582
1583 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1584
1585 * cgen.h (*): Clean up pass over `struct foo' usage.
1586 (CGEN_ATTR): Make unsigned char.
1587 (CGEN_ATTR_TYPE): Update.
1588 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1589 (cgen_base): Move member `attrs' to cgen_insn.
1590 (CGEN_KEYWORD): New member `null_entry'.
1591 (CGEN_{SYNTAX,FORMAT}): New types.
1592 (cgen_insn): Format and syntax separated from each other.
1593
1594 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1595
1596 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1597 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1598 flags_{used,set} long.
1599 (d30v_operand): Make flags field long.
1600
1601 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1602
1603 * m68k.h: Fix comment describing operand types.
1604
1605 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1606
1607 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1608 everything else after down.
1609
1610 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1611
1612 * d10v.h (OPERAND_FLAG): Split into:
1613 (OPERAND_FFLAG, OPERAND_CFLAG) .
1614
1615 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1616
1617 * mips.h (struct mips_opcode): Changed comments to reflect new
1618 field usage.
1619
1620 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1621
1622 * mips.h: Added to comments a quick-ref list of all assigned
1623 operand type characters.
1624 (OP_{MASK,SH}_PERFREG): New macros.
1625
1626 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1627
1628 * sparc.h: Add '_' and '/' for v9a asr's.
1629 Patch from David Miller <davem@vger.rutgers.edu>
1630
1631 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1632
1633 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1634 area are not available in the base model (H8/300).
1635
1636 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1637
1638 * m68k.h: Remove documentation of ` operand specifier.
1639
1640 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1641
1642 * m68k.h: Document q and v operand specifiers.
1643
1644 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1645
1646 * v850.h (struct v850_opcode): Add processors field.
1647 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1648 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1649 (PROCESSOR_V850EA): New bit constants.
1650
1651 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1652
1653 Merge changes from Martin Hunt:
1654
1655 * d30v.h: Allow up to 64 control registers. Add
1656 SHORT_A5S format.
1657
1658 * d30v.h (LONG_Db): New form for delayed branches.
1659
1660 * d30v.h: (LONG_Db): New form for repeati.
1661
1662 * d30v.h (SHORT_D2B): New form.
1663
1664 * d30v.h (SHORT_A2): New form.
1665
1666 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1667 registers are used. Needed for VLIW optimization.
1668
1669 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1670
1671 * cgen.h: Move assembler interface section
1672 up so cgen_parse_operand_result is defined for cgen_parse_address.
1673 (cgen_parse_address): Update prototype.
1674
1675 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1676
1677 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1678
1679 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1680
1681 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1682 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1683 <paubert@iram.es>.
1684
1685 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1686 <paubert@iram.es>.
1687
1688 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1689 <paubert@iram.es>.
1690
1691 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1692 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1693
1694 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1695
1696 * v850.h (V850_NOT_R0): New flag.
1697
1698 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1699
1700 * v850.h (struct v850_opcode): Remove flags field.
1701
1702 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1703
1704 * v850.h (struct v850_opcode): Add flags field.
1705 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1706 fields.
1707 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1708 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1709
1710 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1711
1712 * arc.h: New file.
1713
1714 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1715
1716 * sparc.h (sparc_opcodes): Declare as const.
1717
1718 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1719
1720 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1721 uses single or double precision floating point resources.
1722 (INSN_NO_ISA, INSN_ISA1): Define.
1723 (cpu specific INSN macros): Tweak into bitmasks outside the range
1724 of INSN_ISA field.
1725
1726 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1727
1728 * i386.h: Fix pand opcode.
1729
1730 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1731
1732 * mips.h: Widen INSN_ISA and move it to a more convenient
1733 bit position. Add INSN_3900.
1734
1735 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1736
1737 * mips.h (struct mips_opcode): added new field membership.
1738
1739 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1740
1741 * i386.h (movd): only Reg32 is allowed.
1742
1743 * i386.h: add fcomp and ud2. From Wayne Scott
1744 <wscott@ichips.intel.com>.
1745
1746 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1747
1748 * i386.h: Add MMX instructions.
1749
1750 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1751
1752 * i386.h: Remove W modifier from conditional move instructions.
1753
1754 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1755
1756 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1757 with no arguments to match that generated by the UnixWare
1758 assembler.
1759
1760 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1761
1762 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1763 (cgen_parse_operand_fn): Declare.
1764 (cgen_init_parse_operand): Declare.
1765 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1766 new argument `want'.
1767 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1768 (enum cgen_parse_operand_type): New enum.
1769
1770 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1771
1772 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1773
1774 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1775
1776 * cgen.h: New file.
1777
1778 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1779
1780 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1781 fdivrp.
1782
1783 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1784
1785 * v850.h (extract): Make unsigned.
1786
1787 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1788
1789 * i386.h: Add iclr.
1790
1791 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1792
1793 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1794 take a direction bit.
1795
1796 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1797
1798 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1799
1800 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1801
1802 * sparc.h: Include <ansidecl.h>. Update function declarations to
1803 use prototypes, and to use const when appropriate.
1804
1805 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1806
1807 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1808
1809 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1810
1811 * d10v.h: Change pre_defined_registers to
1812 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1813
1814 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1815
1816 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1817 Change mips_opcodes from const array to a pointer,
1818 and change bfd_mips_num_opcodes from const int to int,
1819 so that we can increase the size of the mips opcodes table
1820 dynamically.
1821
1822 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1823
1824 * d30v.h (FLAG_X): Remove unused flag.
1825
1826 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1827
1828 * d30v.h: New file.
1829
1830 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1831
1832 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1833 (PDS_VALUE): Macro to access value field of predefined symbols.
1834 (tic80_next_predefined_symbol): Add prototype.
1835
1836 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1837
1838 * tic80.h (tic80_symbol_to_value): Change prototype to match
1839 change in function, added class parameter.
1840
1841 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1842
1843 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1844 endmask fields, which are somewhat weird in that 0 and 32 are
1845 treated exactly the same.
1846
1847 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1848
1849 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1850 rather than a constant that is 2**X. Reorder them to put bits for
1851 operands that have symbolic names in the upper bits, so they can
1852 be packed into an int where the lower bits contain the value that
1853 corresponds to that symbolic name.
1854 (predefined_symbo): Add struct.
1855 (tic80_predefined_symbols): Declare array of translations.
1856 (tic80_num_predefined_symbols): Declare size of that array.
1857 (tic80_value_to_symbol): Declare function.
1858 (tic80_symbol_to_value): Declare function.
1859
1860 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1861
1862 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1863
1864 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1865
1866 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1867 be the destination register.
1868
1869 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1870
1871 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1872 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1873 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1874 that the opcode can have two vector instructions in a single
1875 32 bit word and we have to encode/decode both.
1876
1877 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1878
1879 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1880 TIC80_OPERAND_RELATIVE for PC relative.
1881 (TIC80_OPERAND_BASEREL): New flag bit for register
1882 base relative.
1883
1884 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1885
1886 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1887
1888 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1889
1890 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1891 ":s" modifier for scaling.
1892
1893 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1894
1895 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1896 (TIC80_OPERAND_M_LI): Ditto
1897
1898 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1899
1900 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1901 (TIC80_OPERAND_CC): New define for condition code operand.
1902 (TIC80_OPERAND_CR): New define for control register operand.
1903
1904 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1905
1906 * tic80.h (struct tic80_opcode): Name changed.
1907 (struct tic80_opcode): Remove format field.
1908 (struct tic80_operand): Add insertion and extraction functions.
1909 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1910 correct ones.
1911 (FMT_*): Ditto.
1912
1913 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1914
1915 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1916 type IV instruction offsets.
1917
1918 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1919
1920 * tic80.h: New file.
1921
1922 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1923
1924 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1925
1926 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1927
1928 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1929 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1930 * v850.h: Fix comment, v850_operand not powerpc_operand.
1931
1932 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1933
1934 * mn10200.h: Flesh out structures and definitions needed by
1935 the mn10200 assembler & disassembler.
1936
1937 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1938
1939 * mips.h: Add mips16 definitions.
1940
1941 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1942
1943 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1944
1945 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1946
1947 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1948 (MN10300_OPERAND_MEMADDR): Define.
1949
1950 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1951
1952 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1953
1954 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1955
1956 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1957
1958 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1959
1960 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1961
1962 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1963
1964 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1965
1966 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1967
1968 * alpha.h: Don't include "bfd.h"; private relocation types are now
1969 negative to minimize problems with shared libraries. Organize
1970 instruction subsets by AMASK extensions and PALcode
1971 implementation.
1972 (struct alpha_operand): Move flags slot for better packing.
1973
1974 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1975
1976 * v850.h (V850_OPERAND_RELAX): New operand flag.
1977
1978 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1979
1980 * mn10300.h (FMT_*): Move operand format definitions
1981 here.
1982
1983 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1984
1985 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1986
1987 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1988
1989 * mn10300.h (mn10300_opcode): Add "format" field.
1990 (MN10300_OPERAND_*): Define.
1991
1992 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1993
1994 * mn10x00.h: Delete.
1995 * mn10200.h, mn10300.h: New files.
1996
1997 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1998
1999 * mn10x00.h: New file.
2000
2001 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
2002
2003 * v850.h: Add new flag to indicate this instruction uses a PC
2004 displacement.
2005
2006 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
2007
2008 * h8300.h (stmac): Add missing instruction.
2009
2010 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
2011
2012 * v850.h (v850_opcode): Remove "size" field. Add "memop"
2013 field.
2014
2015 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
2016
2017 * v850.h (V850_OPERAND_EP): Define.
2018
2019 * v850.h (v850_opcode): Add size field.
2020
2021 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2022
2023 * v850.h (v850_operands): Add insert and extract fields, pointers
2024 to functions used to handle unusual operand encoding.
2025 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
2026 V850_OPERAND_SIGNED): Defined.
2027
2028 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2029
2030 * v850.h (v850_operands): Add flags field.
2031 (OPERAND_REG, OPERAND_NUM): Defined.
2032
2033 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2034
2035 * v850.h: New file.
2036
2037 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
2038
2039 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
2040 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
2041 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
2042 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
2043 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
2044 Defined.
2045
2046 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
2047
2048 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
2049 a 3 bit space id instead of a 2 bit space id.
2050
2051 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2052
2053 * d10v.h: Add some additional defines to support the
2054 assembler in determining which operations can be done in parallel.
2055
2056 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
2057
2058 * h8300.h (SN): Define.
2059 (eepmov.b): Renamed from "eepmov"
2060 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
2061 with them.
2062
2063 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2064
2065 * d10v.h (OPERAND_SHIFT): New operand flag.
2066
2067 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2068
2069 * d10v.h: Changes for divs, parallel-only instructions, and
2070 signed numbers.
2071
2072 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2073
2074 * d10v.h (pd_reg): Define. Putting the definition here allows
2075 the assembler and disassembler to share the same struct.
2076
2077 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
2078
2079 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
2080 Williams <steve@icarus.com>.
2081
2082 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2083
2084 * d10v.h: New file.
2085
2086 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
2087
2088 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2089
2090 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2091
2092 * m68k.h (mcf5200): New macro.
2093 Document names of coldfire control registers.
2094
2095 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2096
2097 * h8300.h (SRC_IN_DST): Define.
2098
2099 * h8300.h (UNOP3): Mark the register operand in this insn
2100 as a source operand, not a destination operand.
2101 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2102 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2103 register operand with SRC_IN_DST.
2104
2105 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2106
2107 * alpha.h: New file.
2108
2109 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2110
2111 * rs6k.h: Remove obsolete file.
2112
2113 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2114
2115 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2116 fdivp, and fdivrp. Add ffreep.
2117
2118 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2119
2120 * h8300.h: Reorder various #defines for readability.
2121 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2122 (BITOP): Accept additional (unused) argument. All callers changed.
2123 (EBITOP): Likewise.
2124 (O_LAST): Bump.
2125 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2126
2127 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2128 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2129 (BITOP, EBITOP): Handle new H8/S addressing modes for
2130 bit insns.
2131 (UNOP3): Handle new shift/rotate insns on the H8/S.
2132 (insns using exr): New instructions.
2133 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2134
2135 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2136
2137 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2138 was incorrect.
2139
2140 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2141
2142 * h8300.h (START): Remove.
2143 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2144 and mov.l insns that can be relaxed.
2145
2146 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2147
2148 * i386.h: Remove Abs32 from lcall.
2149
2150 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2151
2152 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2153 (SLCPOP): New macro.
2154 Mark X,Y opcode letters as in use.
2155
2156 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2157
2158 * sparc.h (F_FLOAT, F_FBR): Define.
2159
2160 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2161
2162 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2163 from all insns.
2164 (ABS8SRC,ABS8DST): Add ABS8MEM.
2165 (add.l): Fix reg+reg variant.
2166 (eepmov.w): Renamed from eepmovw.
2167 (ldc,stc): Fix many cases.
2168
2169 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2170
2171 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2172
2173 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2174
2175 * sparc.h (O): Mark operand letter as in use.
2176
2177 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2178
2179 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2180 Mark operand letters uU as in use.
2181
2182 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2183
2184 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2185 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2186 (SPARC_OPCODE_SUPPORTED): New macro.
2187 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2188 (F_NOTV9): Delete.
2189
2190 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2191
2192 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2193 declaration consistent with return type in definition.
2194
2195 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2196
2197 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2198
2199 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2200
2201 * i386.h (i386_regtab): Add 80486 test registers.
2202
2203 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2204
2205 * i960.h (I_HX): Define.
2206 (i960_opcodes): Add HX instruction.
2207
2208 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2209
2210 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2211 and fclex.
2212
2213 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2214
2215 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2216 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2217 (bfd_* defines): Delete.
2218 (sparc_opcode_archs): Replaces architecture_pname.
2219 (sparc_opcode_lookup_arch): Declare.
2220 (NUMOPCODES): Delete.
2221
2222 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2223
2224 * sparc.h (enum sparc_architecture): Add v9a.
2225 (ARCHITECTURES_CONFLICT_P): Update.
2226
2227 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2228
2229 * i386.h: Added Pentium Pro instructions.
2230
2231 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2232
2233 * m68k.h: Document new 'W' operand place.
2234
2235 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2236
2237 * hppa.h: Add lci and syncdma instructions.
2238
2239 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2240
2241 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
2242 instructions.
2243
2244 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2245
2246 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2247 assembler's -mcom and -many switches.
2248
2249 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2250
2251 * i386.h: Fix cmpxchg8b extension opcode description.
2252
2253 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2254
2255 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2256 and register cr4.
2257
2258 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2259
2260 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2261
2262 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2263
2264 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2265
2266 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2267
2268 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2269
2270 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2271
2272 * m68kmri.h: Remove.
2273
2274 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2275 declarations. Remove F_ALIAS and flag field of struct
2276 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2277 int. Make name and args fields of struct m68k_opcode const.
2278
2279 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2280
2281 * sparc.h (F_NOTV9): Define.
2282
2283 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2284
2285 * mips.h (INSN_4010): Define.
2286
2287 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2288
2289 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2290
2291 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2292 * m68k.h: Fix argument descriptions of coprocessor
2293 instructions to allow only alterable operands where appropriate.
2294 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2295 (m68k_opcode_aliases): Add more aliases.
2296
2297 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2298
2299 * m68k.h: Added explcitly short-sized conditional branches, and a
2300 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2301 svr4-based configurations.
2302
2303 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2304
2305 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2306 * i386.h: added missing Data16/Data32 flags to a few instructions.
2307
2308 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2309
2310 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2311 (OP_MASK_BCC, OP_SH_BCC): Define.
2312 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2313 (OP_MASK_CCC, OP_SH_CCC): Define.
2314 (INSN_READ_FPR_R): Define.
2315 (INSN_RFE): Delete.
2316
2317 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2318
2319 * m68k.h (enum m68k_architecture): Deleted.
2320 (struct m68k_opcode_alias): New type.
2321 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2322 matching constraints, values and flags. As a side effect of this,
2323 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2324 as I know were never used, now may need re-examining.
2325 (numopcodes): Now const.
2326 (m68k_opcode_aliases, numaliases): New variables.
2327 (endop): Deleted.
2328 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2329 m68k_opcode_aliases; update declaration of m68k_opcodes.
2330
2331 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2332
2333 * hppa.h (delay_type): Delete unused enumeration.
2334 (pa_opcode): Replace unused delayed field with an architecture
2335 field.
2336 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2337
2338 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2339
2340 * mips.h (INSN_ISA4): Define.
2341
2342 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2343
2344 * mips.h (M_DLA_AB, M_DLI): Define.
2345
2346 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2347
2348 * hppa.h (fstwx): Fix single-bit error.
2349
2350 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2351
2352 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2353
2354 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2355
2356 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2357 debug registers. From Charles Hannum (mycroft@netbsd.org).
2358
2359 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2360
2361 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2362 i386 support:
2363 * i386.h (MOV_AX_DISP32): New macro.
2364 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2365 of several call/return instructions.
2366 (ADDR_PREFIX_OPCODE): New macro.
2367
2368 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2369
2370 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2371
2372 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2373 char.
2374 (struct vot, field `name'): ditto.
2375
2376 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2377
2378 * vax.h: Supply and properly group all values in end sentinel.
2379
2380 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2381
2382 * mips.h (INSN_ISA, INSN_4650): Define.
2383
2384 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2385
2386 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2387 systems with a separate instruction and data cache, such as the
2388 29040, these instructions take an optional argument.
2389
2390 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2391
2392 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2393 INSN_TRAP.
2394
2395 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2396
2397 * mips.h (INSN_STORE_MEMORY): Define.
2398
2399 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2400
2401 * sparc.h: Document new operand type 'x'.
2402
2403 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2404
2405 * i960.h (I_CX2): New instruction category. It includes
2406 instructions available on Cx and Jx processors.
2407 (I_JX): New instruction category, for JX-only instructions.
2408 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2409 Jx-only instructions, in I_JX category.
2410
2411 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2412
2413 * ns32k.h (endop): Made pointer const too.
2414
2415 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2416
2417 * ns32k.h: Drop Q operand type as there is no correct use
2418 for it. Add I and Z operand types which allow better checking.
2419
2420 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2421
2422 * h8300.h (xor.l) :fix bit pattern.
2423 (L_2): New size of operand.
2424 (trapa): Use it.
2425
2426 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2427
2428 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2429
2430 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2431
2432 * sparc.h: Include v9 definitions.
2433
2434 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2435
2436 * m68k.h (m68060): Defined.
2437 (m68040up, mfloat, mmmu): Include it.
2438 (struct m68k_opcode): Widen `arch' field.
2439 (m68k_opcodes): Updated for M68060. Removed comments that were
2440 instructions commented out by "JF" years ago.
2441
2442 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2443
2444 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2445 add a one-bit `flags' field.
2446 (F_ALIAS): New macro.
2447
2448 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2449
2450 * h8300.h (dec, inc): Get encoding right.
2451
2452 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2453
2454 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2455 a flag instead.
2456 (PPC_OPERAND_SIGNED): Define.
2457 (PPC_OPERAND_SIGNOPT): Define.
2458
2459 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2460
2461 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2462 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2463
2464 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2465
2466 * i386.h: Reverse last change. It'll be handled in gas instead.
2467
2468 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2469
2470 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2471 slower on the 486 and used the implicit shift count despite the
2472 explicit operand. The one-operand form is still available to get
2473 the shorter form with the implicit shift count.
2474
2475 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2476
2477 * hppa.h: Fix typo in fstws arg string.
2478
2479 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2480
2481 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2482
2483 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2484
2485 * ppc.h (PPC_OPCODE_601): Define.
2486
2487 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2488
2489 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2490 (so we can determine valid completers for both addb and addb[tf].)
2491
2492 * hppa.h (xmpyu): No floating point format specifier for the
2493 xmpyu instruction.
2494
2495 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2496
2497 * ppc.h (PPC_OPERAND_NEXT): Define.
2498 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2499 (struct powerpc_macro): Define.
2500 (powerpc_macros, powerpc_num_macros): Declare.
2501
2502 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2503
2504 * ppc.h: New file. Header file for PowerPC opcode table.
2505
2506 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2507
2508 * hppa.h: More minor template fixes for sfu and copr (to allow
2509 for easier disassembly).
2510
2511 * hppa.h: Fix templates for all the sfu and copr instructions.
2512
2513 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2514
2515 * i386.h (push): Permit Imm16 operand too.
2516
2517 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2518
2519 * h8300.h (andc): Exists in base arch.
2520
2521 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2522
2523 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2524 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2525
2526 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2527
2528 * hppa.h: Add FP quadword store instructions.
2529
2530 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2531
2532 * mips.h: (M_J_A): Added.
2533 (M_LA): Removed.
2534
2535 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2536
2537 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2538 <mellon@pepper.ncd.com>.
2539
2540 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2541
2542 * hppa.h: Immediate field in probei instructions is unsigned,
2543 not low-sign extended.
2544
2545 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2546
2547 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2548
2549 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2550
2551 * i386.h: Add "fxch" without operand.
2552
2553 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2554
2555 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2556
2557 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2558
2559 * hppa.h: Add gfw and gfr to the opcode table.
2560
2561 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2562
2563 * m88k.h: extended to handle m88110.
2564
2565 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2566
2567 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2568 addresses.
2569
2570 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2571
2572 * i960.h (i960_opcodes): Properly bracket initializers.
2573
2574 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2575
2576 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2577
2578 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2579
2580 * m68k.h (two): Protect second argument with parentheses.
2581
2582 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2583
2584 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2585 Deleted old in/out instructions in "#if 0" section.
2586
2587 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2588
2589 * i386.h (i386_optab): Properly bracket initializers.
2590
2591 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2592
2593 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2594 Jeff Law, law@cs.utah.edu).
2595
2596 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2597
2598 * i386.h (lcall): Accept Imm32 operand also.
2599
2600 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2601
2602 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2603 (M_DABS): Added.
2604
2605 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2606
2607 * mips.h (INSN_*): Changed values. Removed unused definitions.
2608 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2609 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2610 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2611 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2612 (M_*): Added new values for r6000 and r4000 macros.
2613 (ANY_DELAY): Removed.
2614
2615 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2616
2617 * mips.h: Added M_LI_S and M_LI_SS.
2618
2619 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2620
2621 * h8300.h: Get some rare mov.bs correct.
2622
2623 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2624
2625 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2626 been included.
2627
2628 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2629
2630 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2631 jump instructions, for use in disassemblers.
2632
2633 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2634
2635 * m88k.h: Make bitfields just unsigned, not unsigned long or
2636 unsigned short.
2637
2638 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2639
2640 * hppa.h: New argument type 'y'. Use in various float instructions.
2641
2642 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2643
2644 * hppa.h (break): First immediate field is unsigned.
2645
2646 * hppa.h: Add rfir instruction.
2647
2648 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2649
2650 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2651
2652 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2653
2654 * mips.h: Reworked the hazard information somewhat, and fixed some
2655 bugs in the instruction hazard descriptions.
2656
2657 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2658
2659 * m88k.h: Corrected a couple of opcodes.
2660
2661 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2662
2663 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2664 new version includes instruction hazard information, but is
2665 otherwise reasonably similar.
2666
2667 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2668
2669 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2670
2671 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2672
2673 Patches from Jeff Law, law@cs.utah.edu:
2674 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2675 Make the tables be the same for the following instructions:
2676 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2677 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2678 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2679 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2680 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2681 "fcmp", and "ftest".
2682
2683 * hppa.h: Make new and old tables the same for "break", "mtctl",
2684 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2685 Fix typo in last patch. Collapse several #ifdefs into a
2686 single #ifdef.
2687
2688 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2689 of the comments up-to-date.
2690
2691 * hppa.h: Update "free list" of letters and update
2692 comments describing each letter's function.
2693
2694 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2695
2696 * h8300.h: Lots of little fixes for the h8/300h.
2697
2698 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2699
2700 Support for H8/300-H
2701 * h8300.h: Lots of new opcodes.
2702
2703 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2704
2705 * h8300.h: checkpoint, includes H8/300-H opcodes.
2706
2707 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2708
2709 * Patches from Jeffrey Law <law@cs.utah.edu>.
2710 * hppa.h: Rework single precision FP
2711 instructions so that they correctly disassemble code
2712 PA1.1 code.
2713
2714 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2715
2716 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2717 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2718
2719 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2720
2721 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2722 gdb will define it for now.
2723
2724 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2725
2726 * sparc.h: Don't end enumerator list with comma.
2727
2728 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2729
2730 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2731 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2732 ("bc2t"): Correct typo.
2733 ("[ls]wc[023]"): Use T rather than t.
2734 ("c[0123]"): Define general coprocessor instructions.
2735
2736 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2737
2738 * m68k.h: Move split point for gcc compilation more towards
2739 middle.
2740
2741 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2742
2743 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2744 simply wrong, ics, rfi, & rfsvc were missing).
2745 Add "a" to opr_ext for "bb". Doc fix.
2746
2747 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2748
2749 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2750 * mips.h: Add casts, to suppress warnings about shifting too much.
2751 * m68k.h: Document the placement code '9'.
2752
2753 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2754
2755 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2756 allows callers to break up the large initialized struct full of
2757 opcodes into two half-sized ones. This permits GCC to compile
2758 this module, since it takes exponential space for initializers.
2759 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2760
2761 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2762
2763 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2764 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2765 initialized structs in it.
2766
2767 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2768
2769 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2770 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2771 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2772
2773 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2774
2775 * mips.h: document "i" and "j" operands correctly.
2776
2777 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2778
2779 * mips.h: Removed endianness dependency.
2780
2781 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2782
2783 * h8300.h: include info on number of cycles per instruction.
2784
2785 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2786
2787 * hppa.h: Move handy aliases to the front. Fix masks for extract
2788 and deposit instructions.
2789
2790 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2791
2792 * i386.h: accept shld and shrd both with and without the shift
2793 count argument, which is always %cl.
2794
2795 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2796
2797 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2798 (one_byte_segment_defaults, two_byte_segment_defaults,
2799 i386_prefixtab_end): Ditto.
2800
2801 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2802
2803 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2804 for operand 2; from John Carr, jfc@dsg.dec.com.
2805
2806 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2807
2808 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2809 always use 16-bit offsets. Makes calculated-size jump tables
2810 feasible.
2811
2812 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2813
2814 * i386.h: Fix one-operand forms of in* and out* patterns.
2815
2816 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2817
2818 * m68k.h: Added CPU32 support.
2819
2820 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2821
2822 * mips.h (break): Disassemble the argument. Patch from
2823 jonathan@cs.stanford.edu (Jonathan Stone).
2824
2825 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2826
2827 * m68k.h: merged Motorola and MIT syntax.
2828
2829 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2830
2831 * m68k.h (pmove): make the tests less strict, the 68k book is
2832 wrong.
2833
2834 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2835
2836 * m68k.h (m68ec030): Defined as alias for 68030.
2837 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2838 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2839 them. Tightened description of "fmovex" to distinguish it from
2840 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2841 up descriptions that claimed versions were available for chips not
2842 supporting them. Added "pmovefd".
2843
2844 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2845
2846 * m68k.h: fix where the . goes in divull
2847
2848 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2849
2850 * m68k.h: the cas2 instruction is supposed to be written with
2851 indirection on the last two operands, which can be either data or
2852 address registers. Added a new operand type 'r' which accepts
2853 either register type. Added new cases for cas2l and cas2w which
2854 use them. Corrected masks for cas2 which failed to recognize use
2855 of address register.
2856
2857 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2858
2859 * m68k.h: Merged in patches (mostly m68040-specific) from
2860 Colin Smith <colin@wrs.com>.
2861
2862 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2863 base). Also cleaned up duplicates, re-ordered instructions for
2864 the sake of dis-assembling (so aliases come after standard names).
2865 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2866
2867 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2868
2869 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2870 all missing .s
2871
2872 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2873
2874 * sparc.h: Moved tables to BFD library.
2875
2876 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2877
2878 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2879
2880 * h8300.h: Finish filling in all the holes in the opcode table,
2881 so that the Lucid C compiler can digest this as well...
2882
2883 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2884
2885 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2886 Fix opcodes on various sizes of fild/fist instructions
2887 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2888 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2889
2890 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2891
2892 * h8300.h: Fill in all the holes in the opcode table so that the
2893 losing HPUX C compiler can digest this...
2894
2895 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2896
2897 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2898 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2899
2900 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2901
2902 * sparc.h: Add new architecture variant sparclite; add its scan
2903 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2904
2905 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2906
2907 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2908 fy@lucid.com).
2909
2910 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2911
2912 * rs6k.h: New version from IBM (Metin).
2913
2914 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2915
2916 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2917 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2918
2919 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2920
2921 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2922
2923 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2924
2925 * m68k.h (one, two): Cast macro args to unsigned to suppress
2926 complaints from compiler and lint about integer overflow during
2927 shift.
2928
2929 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2930
2931 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2932
2933 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2934
2935 * mips.h: Make bitfield layout depend on the HOST compiler,
2936 not on the TARGET system.
2937
2938 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2939
2940 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2941 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2942 <TRANLE@INTELLICORP.COM>.
2943
2944 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2945
2946 * h8300.h: turned op_type enum into #define list
2947
2948 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2949
2950 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2951 similar instructions -- they've been renamed to "fitoq", etc.
2952 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2953 number of arguments.
2954 * h8300.h: Remove extra ; which produces compiler warning.
2955
2956 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2957
2958 * sparc.h: fix opcode for tsubcctv.
2959
2960 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2961
2962 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2963
2964 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2965
2966 * sparc.h (nop): Made the 'lose' field be even tighter,
2967 so only a standard 'nop' is disassembled as a nop.
2968
2969 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2970
2971 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2972 disassembled as a nop.
2973
2974 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2975
2976 * m68k.h, sparc.h: ANSIfy enums.
2977
2978 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2979
2980 * sparc.h: fix a typo.
2981
2982 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2983
2984 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2985 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2986 vax.h: Renamed from ../<foo>-opcode.h.
2987
2988 \f
2989 Local Variables:
2990 version-control: never
2991 End:
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