* d10v.h (OPERAND_NOSP): New macro.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
2
3 * d10v.h (OPERAND_NOSP): New macro.
4
5 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
6
7 * d10v.h (OPERAND_SP): New macro.
8
9 2001-11-15 Alan Modra <amodra@bigpond.net.au>
10
11 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
12
13 2001-11-11 Timothy Wall <twall@alum.mit.edu>
14
15 * tic54x.h: Revise opcode layout; don't really need a separate
16 structure for parallel opcodes.
17
18 2001-11-13 Zack Weinberg <zack@codesourcery.com>
19 Alan Modra <amodra@bigpond.net.au>
20
21 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
22 accept WordReg.
23
24 2001-11-04 Chris Demetriou <cgd@broadcom.com>
25
26 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
27
28 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
29
30 * mmix.h: New file.
31
32 2001-10-18 Chris Demetriou <cgd@broadcom.com>
33
34 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
35 of the expression, to make source code merging easier.
36
37 2001-10-17 Chris Demetriou <cgd@broadcom.com>
38
39 * mips.h: Sort coprocessor instruction argument characters
40 in comment, add a few more words of description for "H".
41
42 2001-10-17 Chris Demetriou <cgd@broadcom.com>
43
44 * mips.h (INSN_SB1): New cpu-specific instruction bit.
45 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
46 if cpu is CPU_SB1.
47
48 2001-10-17 matthew green <mrg@redhat.com>
49
50 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
51
52 2001-10-12 matthew green <mrg@redhat.com>
53
54 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
55 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
56 instructions, respectively.
57
58 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
59
60 * v850.h: Remove spurious comment.
61
62 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
63
64 * h8300.h: Fix compile time warning messages
65
66 2001-09-04 Richard Henderson <rth@redhat.com>
67
68 * alpha.h (struct alpha_operand): Pack elements into bitfields.
69
70 2001-08-31 Eric Christopher <echristo@redhat.com>
71
72 * mips.h: Remove CPU_MIPS32_4K.
73
74 2001-08-27 Torbjorn Granlund <tege@swox.com>
75
76 * ppc.h (PPC_OPERAND_DS): Define.
77
78 2001-08-25 Andreas Jaeger <aj@suse.de>
79
80 * d30v.h: Fix declaration of reg_name_cnt.
81
82 * d10v.h: Fix declaration of d10v_reg_name_cnt.
83
84 * arc.h: Add prototypes from opcodes/arc-opc.c.
85
86 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
87
88 * mips.h (INSN_10000): Define.
89 (OPCODE_IS_MEMBER): Check for INSN_10000.
90
91 2001-08-10 Alan Modra <amodra@one.net.au>
92
93 * ppc.h: Revert 2001-08-08.
94
95 2001-08-08 Alan Modra <amodra@one.net.au>
96
97 1999-10-25 Torbjorn Granlund <tege@swox.com>
98 * ppc.h (struct powerpc_operand): New field `reloc'.
99
100 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
101
102 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
103 (cgen_cpu_desc): Ditto.
104
105 2001-07-07 Ben Elliston <bje@redhat.com>
106
107 * m88k.h: Clean up and reformat. Remove unused code.
108
109 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
110
111 * cgen.h (cgen_keyword): Add nonalpha_chars field.
112
113 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
114
115 * mips.h (CPU_R12000): Define.
116
117 2001-05-23 John Healy <jhealy@redhat.com>
118
119 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
120
121 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
122
123 * mips.h (INSN_ISA_MASK): Define.
124
125 2001-05-12 Alan Modra <amodra@one.net.au>
126
127 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
128 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
129 and use InvMem as these insns must have register operands.
130
131 2001-05-04 Alan Modra <amodra@one.net.au>
132
133 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
134 and pextrw to swap reg/rm assignments.
135
136 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
137
138 * cris.h (enum cris_insn_version_usage): Correct comment for
139 cris_ver_v3p.
140
141 2001-03-24 Alan Modra <alan@linuxcare.com.au>
142
143 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
144 Add InvMem to first operand of "maskmovdqu".
145
146 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
147
148 * cris.h (ADD_PC_INCR_OPCODE): New macro.
149
150 2001-03-21 Kazu Hirata <kazu@hxi.com>
151
152 * h8300.h: Fix formatting.
153
154 2001-03-22 Alan Modra <alan@linuxcare.com.au>
155
156 * i386.h (i386_optab): Add paddq, psubq.
157
158 2001-03-19 Alan Modra <alan@linuxcare.com.au>
159
160 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
161
162 2001-02-28 Igor Shevlyakov <igor@windriver.com>
163
164 * m68k.h: new defines for Coldfire V4. Update mcf to know
165 about mcf5407.
166
167 2001-02-18 lars brinkhoff <lars@nocrew.org>
168
169 * pdp11.h: New file.
170
171 2001-02-12 Jan Hubicka <jh@suse.cz>
172
173 * i386.h (i386_optab): SSE integer converison instructions have
174 64bit versions on x86-64.
175
176 2001-02-10 Nick Clifton <nickc@redhat.com>
177
178 * mips.h: Remove extraneous whitespace. Formating change to allow
179 for future contribution.
180
181 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
182
183 * s390.h: New file.
184
185 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
186
187 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
188 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
189 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
190
191 2001-01-24 Karsten Keil <kkeil@suse.de>
192
193 * i386.h (i386_optab): Fix swapgs
194
195 2001-01-14 Alan Modra <alan@linuxcare.com.au>
196
197 * hppa.h: Describe new '<' and '>' operand types, and tidy
198 existing comments.
199 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
200 Remove duplicate "ldw j(s,b),x". Sort some entries.
201
202 2001-01-13 Jan Hubicka <jh@suse.cz>
203
204 * i386.h (i386_optab): Fix pusha and ret templates.
205
206 2001-01-11 Peter Targett <peter.targett@arccores.com>
207
208 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
209 definitions for masking cpu type.
210 (arc_ext_operand_value) New structure for storing extended
211 operands.
212 (ARC_OPERAND_*) Flags for operand values.
213
214 2001-01-10 Jan Hubicka <jh@suse.cz>
215
216 * i386.h (pinsrw): Add.
217 (pshufw): Remove.
218 (cvttpd2dq): Fix operands.
219 (cvttps2dq): Likewise.
220 (movq2q): Rename to movdq2q.
221
222 2001-01-10 Richard Schaal <richard.schaal@intel.com>
223
224 * i386.h: Correct movnti instruction.
225
226 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
227
228 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
229 of operands (unsigned char or unsigned short).
230 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
231 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
232
233 2001-01-05 Jan Hubicka <jh@suse.cz>
234
235 * i386.h (i386_optab): Make [sml]fence template to use immext field.
236
237 2001-01-03 Jan Hubicka <jh@suse.cz>
238
239 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
240 introduced by Pentium4
241
242 2000-12-30 Jan Hubicka <jh@suse.cz>
243
244 * i386.h (i386_optab): Add "rex*" instructions;
245 add swapgs; disable jmp/call far direct instructions for
246 64bit mode; add syscall and sysret; disable registers for 0xc6
247 template. Add 'q' suffixes to extendable instructions, disable
248 obsolete instructions, add new sign/zero extension ones.
249 (i386_regtab): Add extended registers.
250 (*Suf): Add No_qSuf.
251 (q_Suf, wlq_Suf, bwlq_Suf): New.
252
253 2000-12-20 Jan Hubicka <jh@suse.cz>
254
255 * i386.h (i386_optab): Replace "Imm" with "EncImm".
256 (i386_regtab): Add flags field.
257
258 2000-12-12 Nick Clifton <nickc@redhat.com>
259
260 * mips.h: Fix formatting.
261
262 2000-12-01 Chris Demetriou <cgd@sibyte.com>
263
264 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
265 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
266 OP_*_SYSCALL definitions.
267 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
268 19 bit wait codes.
269 (MIPS operand specifier comments): Remove 'm', add 'U' and
270 'J', and update the meaning of 'B' so that it's more general.
271
272 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
273 INSN_ISA5): Renumber, redefine to mean the ISA at which the
274 instruction was added.
275 (INSN_ISA32): New constant.
276 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
277 Renumber to avoid new and/or renumbered INSN_* constants.
278 (INSN_MIPS32): Delete.
279 (ISA_UNKNOWN): New constant to indicate unknown ISA.
280 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
281 ISA_MIPS32): New constants, defined to be the mask of INSN_*
282 constants available at that ISA level.
283 (CPU_UNKNOWN): New constant to indicate unknown CPU.
284 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
285 define it with a unique value.
286 (OPCODE_IS_MEMBER): Update for new ISA membership-related
287 constant meanings.
288
289 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
290 definitions.
291
292 * mips.h (CPU_SB1): New constant.
293
294 2000-10-20 Jakub Jelinek <jakub@redhat.com>
295
296 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
297 Note that '3' is used for siam operand.
298
299 2000-09-22 Jim Wilson <wilson@cygnus.com>
300
301 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
302
303 2000-09-13 Anders Norlander <anorland@acc.umu.se>
304
305 * mips.h: Use defines instead of hard-coded processor numbers.
306 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
307 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
308 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
309 CPU_4KC, CPU_4KM, CPU_4KP): Define..
310 (OPCODE_IS_MEMBER): Use new defines.
311 (OP_MASK_SEL, OP_SH_SEL): Define.
312 (OP_MASK_CODE20, OP_SH_CODE20): Define.
313 Add 'P' to used characters.
314 Use 'H' for coprocessor select field.
315 Use 'm' for 20 bit breakpoint code.
316 Document new arg characters and add to used characters.
317 (INSN_MIPS32): New define for MIPS32 extensions.
318 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
319
320 2000-09-05 Alan Modra <alan@linuxcare.com.au>
321
322 * hppa.h: Mention cz completer.
323
324 2000-08-16 Jim Wilson <wilson@cygnus.com>
325
326 * ia64.h (IA64_OPCODE_POSTINC): New.
327
328 2000-08-15 H.J. Lu <hjl@gnu.org>
329
330 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
331 IgnoreSize change.
332
333 2000-08-08 Jason Eckhardt <jle@cygnus.com>
334
335 * i860.h: Small formatting adjustments.
336
337 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
338
339 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
340 Move related opcodes closer to each other.
341 Minor changes in comments, list undefined opcodes.
342
343 2000-07-26 Dave Brolley <brolley@redhat.com>
344
345 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
346
347 2000-07-22 Jason Eckhardt <jle@cygnus.com>
348
349 * i860.h (btne, bte, bla): Changed these opcodes
350 to use sbroff ('r') instead of split16 ('s').
351 (J, K, L, M): New operand types for 16-bit aligned fields.
352 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
353 use I, J, K, L, M instead of just I.
354 (T, U): New operand types for split 16-bit aligned fields.
355 (st.x): Changed these opcodes to use S, T, U instead of just S.
356 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
357 exist on the i860.
358 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
359 (pfeq.ss, pfeq.dd): New opcodes.
360 (st.s): Fixed incorrect mask bits.
361 (fmlow): Fixed incorrect mask bits.
362 (fzchkl, pfzchkl): Fixed incorrect mask bits.
363 (faddz, pfaddz): Fixed incorrect mask bits.
364 (form, pform): Fixed incorrect mask bits.
365 (pfld.l): Fixed incorrect mask bits.
366 (fst.q): Fixed incorrect mask bits.
367 (all floating point opcodes): Fixed incorrect mask bits for
368 handling of dual bit.
369
370 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
371
372 cris.h: New file.
373
374 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
375
376 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
377 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
378 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
379 (AVR_ISA_M83): Define for ATmega83, ATmega85.
380 (espm): Remove, because ESPM removed in databook update.
381 (eicall, eijmp): Move to the end of opcode table.
382
383 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
384
385 * m68hc11.h: New file for support of Motorola 68hc11.
386
387 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
388
389 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
390
391 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
392
393 * avr.h: New file with AVR opcodes.
394
395 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
396
397 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
398
399 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
400
401 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
402
403 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
404
405 * i386.h: Use sl_FP, not sl_Suf for fild.
406
407 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
408
409 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
410 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
411 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
412 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
413
414 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
415
416 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
417
418 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
419 Alexander Sokolov <robocop@netlink.ru>
420
421 * i386.h (i386_optab): Add cpu_flags for all instructions.
422
423 2000-05-13 Alan Modra <alan@linuxcare.com.au>
424
425 From Gavin Romig-Koch <gavin@cygnus.com>
426 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
427
428 2000-05-04 Timothy Wall <twall@cygnus.com>
429
430 * tic54x.h: New.
431
432 2000-05-03 J.T. Conklin <jtc@redback.com>
433
434 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
435 (PPC_OPERAND_VR): New operand flag for vector registers.
436
437 2000-05-01 Kazu Hirata <kazu@hxi.com>
438
439 * h8300.h (EOP): Add missing initializer.
440
441 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
442
443 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
444 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
445 New operand types l,y,&,fe,fE,fx added to support above forms.
446 (pa_opcodes): Replaced usage of 'x' as source/target for
447 floating point double-word loads/stores with 'fx'.
448
449 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
450 David Mosberger <davidm@hpl.hp.com>
451 Timothy Wall <twall@cygnus.com>
452 Jim Wilson <wilson@cygnus.com>
453
454 * ia64.h: New file.
455
456 2000-03-27 Nick Clifton <nickc@cygnus.com>
457
458 * d30v.h (SHORT_A1): Fix value.
459 (SHORT_AR): Renumber so that it is at the end of the list of short
460 instructions, not the end of the list of long instructions.
461
462 2000-03-26 Alan Modra <alan@linuxcare.com>
463
464 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
465 problem isn't really specific to Unixware.
466 (OLDGCC_COMPAT): Define.
467 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
468 destination %st(0).
469 Fix lots of comments.
470
471 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
472
473 * d30v.h:
474 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
475 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
476 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
477 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
478 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
479 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
480 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
481
482 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
483
484 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
485 fistpd without suffix.
486
487 2000-02-24 Nick Clifton <nickc@cygnus.com>
488
489 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
490 'signed_overflow_ok_p'.
491 Delete prototypes for cgen_set_flags() and cgen_get_flags().
492
493 2000-02-24 Andrew Haley <aph@cygnus.com>
494
495 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
496 (CGEN_CPU_TABLE): flags: new field.
497 Add prototypes for new functions.
498
499 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
500
501 * i386.h: Add some more UNIXWARE_COMPAT comments.
502
503 2000-02-23 Linas Vepstas <linas@linas.org>
504
505 * i370.h: New file.
506
507 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
508
509 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
510 cannot be combined in parallel with ADD/SUBppp.
511
512 2000-02-22 Andrew Haley <aph@cygnus.com>
513
514 * mips.h: (OPCODE_IS_MEMBER): Add comment.
515
516 1999-12-30 Andrew Haley <aph@cygnus.com>
517
518 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
519 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
520 insns.
521
522 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
523
524 * i386.h: Qualify intel mode far call and jmp with x_Suf.
525
526 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
527
528 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
529 indirect jumps and calls. Add FF/3 call for intel mode.
530
531 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
532
533 * mn10300.h: Add new operand types. Add new instruction formats.
534
535 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
536
537 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
538 instruction.
539
540 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
541
542 * mips.h (INSN_ISA5): New.
543
544 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
545
546 * mips.h (OPCODE_IS_MEMBER): New.
547
548 1999-10-29 Nick Clifton <nickc@cygnus.com>
549
550 * d30v.h (SHORT_AR): Define.
551
552 1999-10-18 Michael Meissner <meissner@cygnus.com>
553
554 * alpha.h (alpha_num_opcodes): Convert to unsigned.
555 (alpha_num_operands): Ditto.
556
557 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
558
559 * hppa.h (pa_opcodes): Add load and store cache control to
560 instructions. Add ordered access load and store.
561
562 * hppa.h (pa_opcode): Add new entries for addb and addib.
563
564 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
565
566 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
567
568 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
569
570 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
571
572 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
573
574 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
575 and "be" using completer prefixes.
576
577 * hppa.h (pa_opcodes): Add initializers to silence compiler.
578
579 * hppa.h: Update comments about character usage.
580
581 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
582
583 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
584 up the new fstw & bve instructions.
585
586 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
587
588 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
589 instructions.
590
591 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
592
593 * hppa.h (pa_opcodes): Add long offset double word load/store
594 instructions.
595
596 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
597 stores.
598
599 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
600
601 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
602
603 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
604
605 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
606
607 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
608
609 * hppa.h (pa_opcodes): Add support for "b,l".
610
611 * hppa.h (pa_opcodes): Add support for "b,gate".
612
613 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
614
615 * hppa.h (pa_opcodes): Use 'fX' for first register operand
616 in xmpyu.
617
618 * hppa.h (pa_opcodes): Fix mask for probe and probei.
619
620 * hppa.h (pa_opcodes): Fix mask for depwi.
621
622 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
623
624 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
625 an explicit output argument.
626
627 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
628
629 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
630 Add a few PA2.0 loads and store variants.
631
632 1999-09-04 Steve Chamberlain <sac@pobox.com>
633
634 * pj.h: New file.
635
636 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
637
638 * i386.h (i386_regtab): Move %st to top of table, and split off
639 other fp reg entries.
640 (i386_float_regtab): To here.
641
642 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
643
644 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
645 by 'f'.
646
647 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
648 Add supporting args.
649
650 * hppa.h: Document new completers and args.
651 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
652 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
653 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
654 pmenb and pmdis.
655
656 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
657 hshr, hsub, mixh, mixw, permh.
658
659 * hppa.h (pa_opcodes): Change completers in instructions to
660 use 'c' prefix.
661
662 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
663 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
664
665 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
666 fnegabs to use 'I' instead of 'F'.
667
668 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
669
670 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
671 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
672 Alphabetically sort PIII insns.
673
674 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
675
676 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
677
678 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
679
680 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
681 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
682
683 * hppa.h: Document 64 bit condition completers.
684
685 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
686
687 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
688
689 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
690
691 * i386.h (i386_optab): Add DefaultSize modifier to all insns
692 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
693 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
694
695 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
696 Jeff Law <law@cygnus.com>
697
698 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
699
700 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
701
702 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
703 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
704
705 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
706
707 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
708
709 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
710
711 * hppa.h (struct pa_opcode): Add new field "flags".
712 (FLAGS_STRICT): Define.
713
714 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
715 Jeff Law <law@cygnus.com>
716
717 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
718
719 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
720
721 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
722
723 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
724 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
725 flag to fcomi and friends.
726
727 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
728
729 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
730 integer logical instructions.
731
732 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
733
734 * m68k.h: Document new formats `E', `G', `H' and new places `N',
735 `n', `o'.
736
737 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
738 and new places `m', `M', `h'.
739
740 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
741
742 * hppa.h (pa_opcodes): Add several processor specific system
743 instructions.
744
745 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
746
747 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
748 "addb", and "addib" to be used by the disassembler.
749
750 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
751
752 * i386.h (ReverseModrm): Remove all occurences.
753 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
754 movmskps, pextrw, pmovmskb, maskmovq.
755 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
756 ignore the data size prefix.
757
758 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
759 Mostly stolen from Doug Ledford <dledford@redhat.com>
760
761 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
762
763 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
764
765 1999-04-14 Doug Evans <devans@casey.cygnus.com>
766
767 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
768 (CGEN_ATTR_TYPE): Update.
769 (CGEN_ATTR_MASK): Number booleans starting at 0.
770 (CGEN_ATTR_VALUE): Update.
771 (CGEN_INSN_ATTR): Update.
772
773 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
774
775 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
776 instructions.
777
778 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
779
780 * hppa.h (bb, bvb): Tweak opcode/mask.
781
782
783 1999-03-22 Doug Evans <devans@casey.cygnus.com>
784
785 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
786 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
787 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
788 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
789 Delete member max_insn_size.
790 (enum cgen_cpu_open_arg): New enum.
791 (cpu_open): Update prototype.
792 (cpu_open_1): Declare.
793 (cgen_set_cpu): Delete.
794
795 1999-03-11 Doug Evans <devans@casey.cygnus.com>
796
797 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
798 (CGEN_OPERAND_NIL): New macro.
799 (CGEN_OPERAND): New member `type'.
800 (@arch@_cgen_operand_table): Delete decl.
801 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
802 (CGEN_OPERAND_TABLE): New struct.
803 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
804 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
805 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
806 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
807 {get,set}_{int,vma}_operand.
808 (@arch@_cgen_cpu_open): New arg `isa'.
809 (cgen_set_cpu): Ditto.
810
811 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
812
813 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
814
815 1999-02-25 Doug Evans <devans@casey.cygnus.com>
816
817 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
818 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
819 enum cgen_hw_type.
820 (CGEN_HW_TABLE): New struct.
821 (hw_table): Delete declaration.
822 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
823 to table entry to enum.
824 (CGEN_OPINST): Ditto.
825 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
826
827 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
828
829 * alpha.h (AXP_OPCODE_EV6): New.
830 (AXP_OPCODE_NOPAL): Include it.
831
832 1999-02-09 Doug Evans <devans@casey.cygnus.com>
833
834 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
835 All uses updated. New members int_insn_p, max_insn_size,
836 parse_operand,insert_operand,extract_operand,print_operand,
837 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
838 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
839 extract_handlers,print_handlers.
840 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
841 (CGEN_ATTR_BOOL_OFFSET): New macro.
842 (CGEN_ATTR_MASK): Subtract it to compute bit number.
843 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
844 (cgen_opcode_handler): Renamed from cgen_base.
845 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
846 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
847 all uses updated.
848 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
849 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
850 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
851 (CGEN_OPCODE,CGEN_IBASE): New types.
852 (CGEN_INSN): Rewrite.
853 (CGEN_{ASM,DIS}_HASH*): Delete.
854 (init_opcode_table,init_ibld_table): Declare.
855 (CGEN_INSN_ATTR): New type.
856
857 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
858
859 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
860 (x_FP, d_FP, dls_FP, sldx_FP): Define.
861 Change *Suf definitions to include x and d suffixes.
862 (movsx): Use w_Suf and b_Suf.
863 (movzx): Likewise.
864 (movs): Use bwld_Suf.
865 (fld): Change ordering. Use sld_FP.
866 (fild): Add Intel Syntax equivalent of fildq.
867 (fst): Use sld_FP.
868 (fist): Use sld_FP.
869 (fstp): Use sld_FP. Add x_FP version.
870 (fistp): LLongMem version for Intel Syntax.
871 (fcom, fcomp): Use sld_FP.
872 (fadd, fiadd, fsub): Use sld_FP.
873 (fsubr): Use sld_FP.
874 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
875
876 1999-01-27 Doug Evans <devans@casey.cygnus.com>
877
878 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
879 CGEN_MODE_UINT.
880
881 1999-01-16 Jeffrey A Law (law@cygnus.com)
882
883 * hppa.h (bv): Fix mask.
884
885 1999-01-05 Doug Evans <devans@casey.cygnus.com>
886
887 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
888 (CGEN_ATTR): Use it.
889 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
890 (CGEN_ATTR_TABLE): New member dfault.
891
892 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
893
894 * mips.h (MIPS16_INSN_BRANCH): New.
895
896 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
897
898 The following is part of a change made by Edith Epstein
899 <eepstein@sophia.cygnus.com> as part of a project to merge in
900 changes by HP; HP did not create ChangeLog entries.
901
902 * hppa.h (completer_chars): list of chars to not put a space
903 after.
904
905 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
906
907 * i386.h (i386_optab): Permit w suffix on processor control and
908 status word instructions.
909
910 1998-11-30 Doug Evans <devans@casey.cygnus.com>
911
912 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
913 (struct cgen_keyword_entry): Ditto.
914 (struct cgen_operand): Ditto.
915 (CGEN_IFLD): New typedef, with associated access macros.
916 (CGEN_IFMT): New typedef, with associated access macros.
917 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
918 (CGEN_IVALUE): New typedef.
919 (struct cgen_insn): Delete const on syntax,attrs members.
920 `format' now points to format data. Type of `value' is now
921 CGEN_IVALUE.
922 (struct cgen_opcode_table): New member ifld_table.
923
924 1998-11-18 Doug Evans <devans@casey.cygnus.com>
925
926 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
927 (CGEN_OPERAND_INSTANCE): New member `attrs'.
928 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
929 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
930 (cgen_opcode_table): Update type of dis_hash fn.
931 (extract_operand): Update type of `insn_value' arg.
932
933 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
934
935 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
936
937 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
938
939 * mips.h (INSN_MULT): Added.
940
941 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
942
943 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
944
945 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
946
947 * cgen.h (CGEN_INSN_INT): New typedef.
948 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
949 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
950 (CGEN_INSN_BYTES_PTR): New typedef.
951 (CGEN_EXTRACT_INFO): New typedef.
952 (cgen_insert_fn,cgen_extract_fn): Update.
953 (cgen_opcode_table): New member `insn_endian'.
954 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
955 (insert_operand,extract_operand): Update.
956 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
957
958 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
959
960 * cgen.h (CGEN_ATTR_BOOLS): New macro.
961 (struct CGEN_HW_ENTRY): New member `attrs'.
962 (CGEN_HW_ATTR): New macro.
963 (struct CGEN_OPERAND_INSTANCE): New member `name'.
964 (CGEN_INSN_INVALID_P): New macro.
965
966 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
967
968 * hppa.h: Add "fid".
969
970 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
971
972 From Robert Andrew Dale <rob@nb.net>
973 * i386.h (i386_optab): Add AMD 3DNow! instructions.
974 (AMD_3DNOW_OPCODE): Define.
975
976 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
977
978 * d30v.h (EITHER_BUT_PREFER_MU): Define.
979
980 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
981
982 * cgen.h (cgen_insn): #if 0 out element `cdx'.
983
984 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
985
986 Move all global state data into opcode table struct, and treat
987 opcode table as something that is "opened/closed".
988 * cgen.h (CGEN_OPCODE_DESC): New type.
989 (all fns): New first arg of opcode table descriptor.
990 (cgen_set_parse_operand_fn): Add prototype.
991 (cgen_current_machine,cgen_current_endian): Delete.
992 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
993 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
994 dis_hash_table,dis_hash_table_entries.
995 (opcode_open,opcode_close): Add prototypes.
996
997 * cgen.h (cgen_insn): New element `cdx'.
998
999 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1000
1001 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1002
1003 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1004
1005 * mn10300.h: Add "no_match_operands" field for instructions.
1006 (MN10300_MAX_OPERANDS): Define.
1007
1008 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1009
1010 * cgen.h (cgen_macro_insn_count): Declare.
1011
1012 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1013
1014 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1015 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1016 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1017 set_{int,vma}_operand.
1018
1019 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1020
1021 * mn10300.h: Add "machine" field for instructions.
1022 (MN103, AM30): Define machine types.
1023
1024 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1025
1026 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1027
1028 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1029
1030 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1031
1032 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1033
1034 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1035 and ud2b.
1036 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1037 those that happen to be implemented on pentiums.
1038
1039 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1040
1041 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1042 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1043 with Size16|IgnoreSize or Size32|IgnoreSize.
1044
1045 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1046
1047 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1048 (REPE): Rename to REPE_PREFIX_OPCODE.
1049 (i386_regtab_end): Remove.
1050 (i386_prefixtab, i386_prefixtab_end): Remove.
1051 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1052 of md_begin.
1053 (MAX_OPCODE_SIZE): Define.
1054 (i386_optab_end): Remove.
1055 (sl_Suf): Define.
1056 (sl_FP): Use sl_Suf.
1057
1058 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1059 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1060 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1061 data32, dword, and adword prefixes.
1062 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1063 regs.
1064
1065 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1066
1067 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1068
1069 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1070 register operands, because this is a common idiom. Flag them with
1071 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1072 fdivrp because gcc erroneously generates them. Also flag with a
1073 warning.
1074
1075 * i386.h: Add suffix modifiers to most insns, and tighter operand
1076 checks in some cases. Fix a number of UnixWare compatibility
1077 issues with float insns. Merge some floating point opcodes, using
1078 new FloatMF modifier.
1079 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1080 consistency.
1081
1082 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1083 IgnoreDataSize where appropriate.
1084
1085 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1086
1087 * i386.h: (one_byte_segment_defaults): Remove.
1088 (two_byte_segment_defaults): Remove.
1089 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1090
1091 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1092
1093 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1094 (cgen_hw_lookup_by_num): Declare.
1095
1096 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1097
1098 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1099 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1100
1101 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1102
1103 * cgen.h (cgen_asm_init_parse): Delete.
1104 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1105 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1106
1107 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1108
1109 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1110 (cgen_asm_finish_insn): Update prototype.
1111 (cgen_insn): New members num, data.
1112 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1113 dis_hash, dis_hash_table_size moved to ...
1114 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1115 All uses updated. New members asm_hash_p, dis_hash_p.
1116 (CGEN_MINSN_EXPANSION): New struct.
1117 (cgen_expand_macro_insn): Declare.
1118 (cgen_macro_insn_count): Declare.
1119 (get_insn_operands): Update prototype.
1120 (lookup_get_insn_operands): Declare.
1121
1122 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1123
1124 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1125 regKludge. Add operands types for string instructions.
1126
1127 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1128
1129 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1130 table.
1131
1132 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1133
1134 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1135 for `gettext'.
1136
1137 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1138
1139 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1140 Add IsString flag to string instructions.
1141 (IS_STRING): Don't define.
1142 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1143 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1144 (SS_PREFIX_OPCODE): Define.
1145
1146 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1147
1148 * i386.h: Revert March 24 patch; no more LinearAddress.
1149
1150 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1151
1152 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1153 instructions, and instead add FWait opcode modifier. Add short
1154 form of fldenv and fstenv.
1155 (FWAIT_OPCODE): Define.
1156
1157 * i386.h (i386_optab): Change second operand constraint of `mov
1158 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1159 allow legal instructions such as `movl %gs,%esi'
1160
1161 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1162
1163 * h8300.h: Various changes to fully bracket initializers.
1164
1165 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1166
1167 * i386.h: Set LinearAddress for lidt and lgdt.
1168
1169 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1170
1171 * cgen.h (CGEN_BOOL_ATTR): New macro.
1172
1173 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1174
1175 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1176
1177 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1178
1179 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1180 (cgen_insn): Record syntax and format entries here, rather than
1181 separately.
1182
1183 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1184
1185 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1186
1187 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1188
1189 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1190 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1191 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1192
1193 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1194
1195 * cgen.h (lookup_insn): New argument alias_p.
1196
1197 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1198
1199 Fix rac to accept only a0:
1200 * d10v.h (OPERAND_ACC): Split into:
1201 (OPERAND_ACC0, OPERAND_ACC1) .
1202 (OPERAND_GPR): Define.
1203
1204 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1205
1206 * cgen.h (CGEN_FIELDS): Define here.
1207 (CGEN_HW_ENTRY): New member `type'.
1208 (hw_list): Delete decl.
1209 (enum cgen_mode): Declare.
1210 (CGEN_OPERAND): New member `hw'.
1211 (enum cgen_operand_instance_type): Declare.
1212 (CGEN_OPERAND_INSTANCE): New type.
1213 (CGEN_INSN): New member `operands'.
1214 (CGEN_OPCODE_DATA): Make hw_list const.
1215 (get_insn_operands,lookup_insn): Add prototypes for.
1216
1217 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1218
1219 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1220 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1221 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1222 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1223
1224 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1225
1226 * cgen.h: Correct typo in comment end marker.
1227
1228 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1229
1230 * tic30.h: New file.
1231
1232 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1233
1234 * cgen.h: Add prototypes for cgen_save_fixups(),
1235 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1236 of cgen_asm_finish_insn() to return a char *.
1237
1238 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1239
1240 * cgen.h: Formatting changes to improve readability.
1241
1242 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1243
1244 * cgen.h (*): Clean up pass over `struct foo' usage.
1245 (CGEN_ATTR): Make unsigned char.
1246 (CGEN_ATTR_TYPE): Update.
1247 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1248 (cgen_base): Move member `attrs' to cgen_insn.
1249 (CGEN_KEYWORD): New member `null_entry'.
1250 (CGEN_{SYNTAX,FORMAT}): New types.
1251 (cgen_insn): Format and syntax separated from each other.
1252
1253 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1254
1255 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1256 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1257 flags_{used,set} long.
1258 (d30v_operand): Make flags field long.
1259
1260 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1261
1262 * m68k.h: Fix comment describing operand types.
1263
1264 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1265
1266 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1267 everything else after down.
1268
1269 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1270
1271 * d10v.h (OPERAND_FLAG): Split into:
1272 (OPERAND_FFLAG, OPERAND_CFLAG) .
1273
1274 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1275
1276 * mips.h (struct mips_opcode): Changed comments to reflect new
1277 field usage.
1278
1279 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1280
1281 * mips.h: Added to comments a quick-ref list of all assigned
1282 operand type characters.
1283 (OP_{MASK,SH}_PERFREG): New macros.
1284
1285 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1286
1287 * sparc.h: Add '_' and '/' for v9a asr's.
1288 Patch from David Miller <davem@vger.rutgers.edu>
1289
1290 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1291
1292 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1293 area are not available in the base model (H8/300).
1294
1295 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1296
1297 * m68k.h: Remove documentation of ` operand specifier.
1298
1299 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1300
1301 * m68k.h: Document q and v operand specifiers.
1302
1303 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1304
1305 * v850.h (struct v850_opcode): Add processors field.
1306 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1307 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1308 (PROCESSOR_V850EA): New bit constants.
1309
1310 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1311
1312 Merge changes from Martin Hunt:
1313
1314 * d30v.h: Allow up to 64 control registers. Add
1315 SHORT_A5S format.
1316
1317 * d30v.h (LONG_Db): New form for delayed branches.
1318
1319 * d30v.h: (LONG_Db): New form for repeati.
1320
1321 * d30v.h (SHORT_D2B): New form.
1322
1323 * d30v.h (SHORT_A2): New form.
1324
1325 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1326 registers are used. Needed for VLIW optimization.
1327
1328 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1329
1330 * cgen.h: Move assembler interface section
1331 up so cgen_parse_operand_result is defined for cgen_parse_address.
1332 (cgen_parse_address): Update prototype.
1333
1334 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1335
1336 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1337
1338 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1339
1340 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1341 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1342 <paubert@iram.es>.
1343
1344 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1345 <paubert@iram.es>.
1346
1347 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1348 <paubert@iram.es>.
1349
1350 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1351 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1352
1353 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1354
1355 * v850.h (V850_NOT_R0): New flag.
1356
1357 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1358
1359 * v850.h (struct v850_opcode): Remove flags field.
1360
1361 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1362
1363 * v850.h (struct v850_opcode): Add flags field.
1364 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1365 fields.
1366 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1367 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1368
1369 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1370
1371 * arc.h: New file.
1372
1373 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1374
1375 * sparc.h (sparc_opcodes): Declare as const.
1376
1377 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1378
1379 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1380 uses single or double precision floating point resources.
1381 (INSN_NO_ISA, INSN_ISA1): Define.
1382 (cpu specific INSN macros): Tweak into bitmasks outside the range
1383 of INSN_ISA field.
1384
1385 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1386
1387 * i386.h: Fix pand opcode.
1388
1389 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1390
1391 * mips.h: Widen INSN_ISA and move it to a more convenient
1392 bit position. Add INSN_3900.
1393
1394 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1395
1396 * mips.h (struct mips_opcode): added new field membership.
1397
1398 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1399
1400 * i386.h (movd): only Reg32 is allowed.
1401
1402 * i386.h: add fcomp and ud2. From Wayne Scott
1403 <wscott@ichips.intel.com>.
1404
1405 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1406
1407 * i386.h: Add MMX instructions.
1408
1409 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1410
1411 * i386.h: Remove W modifier from conditional move instructions.
1412
1413 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1414
1415 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1416 with no arguments to match that generated by the UnixWare
1417 assembler.
1418
1419 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1420
1421 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1422 (cgen_parse_operand_fn): Declare.
1423 (cgen_init_parse_operand): Declare.
1424 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1425 new argument `want'.
1426 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1427 (enum cgen_parse_operand_type): New enum.
1428
1429 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1430
1431 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1432
1433 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1434
1435 * cgen.h: New file.
1436
1437 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1438
1439 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1440 fdivrp.
1441
1442 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1443
1444 * v850.h (extract): Make unsigned.
1445
1446 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1447
1448 * i386.h: Add iclr.
1449
1450 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1451
1452 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1453 take a direction bit.
1454
1455 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1456
1457 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1458
1459 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1460
1461 * sparc.h: Include <ansidecl.h>. Update function declarations to
1462 use prototypes, and to use const when appropriate.
1463
1464 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1465
1466 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1467
1468 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1469
1470 * d10v.h: Change pre_defined_registers to
1471 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1472
1473 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1474
1475 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1476 Change mips_opcodes from const array to a pointer,
1477 and change bfd_mips_num_opcodes from const int to int,
1478 so that we can increase the size of the mips opcodes table
1479 dynamically.
1480
1481 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1482
1483 * d30v.h (FLAG_X): Remove unused flag.
1484
1485 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1486
1487 * d30v.h: New file.
1488
1489 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1490
1491 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1492 (PDS_VALUE): Macro to access value field of predefined symbols.
1493 (tic80_next_predefined_symbol): Add prototype.
1494
1495 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1496
1497 * tic80.h (tic80_symbol_to_value): Change prototype to match
1498 change in function, added class parameter.
1499
1500 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1501
1502 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1503 endmask fields, which are somewhat weird in that 0 and 32 are
1504 treated exactly the same.
1505
1506 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1507
1508 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1509 rather than a constant that is 2**X. Reorder them to put bits for
1510 operands that have symbolic names in the upper bits, so they can
1511 be packed into an int where the lower bits contain the value that
1512 corresponds to that symbolic name.
1513 (predefined_symbo): Add struct.
1514 (tic80_predefined_symbols): Declare array of translations.
1515 (tic80_num_predefined_symbols): Declare size of that array.
1516 (tic80_value_to_symbol): Declare function.
1517 (tic80_symbol_to_value): Declare function.
1518
1519 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1520
1521 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1522
1523 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1524
1525 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1526 be the destination register.
1527
1528 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1529
1530 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1531 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1532 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1533 that the opcode can have two vector instructions in a single
1534 32 bit word and we have to encode/decode both.
1535
1536 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1537
1538 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1539 TIC80_OPERAND_RELATIVE for PC relative.
1540 (TIC80_OPERAND_BASEREL): New flag bit for register
1541 base relative.
1542
1543 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1544
1545 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1546
1547 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1548
1549 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1550 ":s" modifier for scaling.
1551
1552 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1553
1554 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1555 (TIC80_OPERAND_M_LI): Ditto
1556
1557 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1558
1559 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1560 (TIC80_OPERAND_CC): New define for condition code operand.
1561 (TIC80_OPERAND_CR): New define for control register operand.
1562
1563 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1564
1565 * tic80.h (struct tic80_opcode): Name changed.
1566 (struct tic80_opcode): Remove format field.
1567 (struct tic80_operand): Add insertion and extraction functions.
1568 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1569 correct ones.
1570 (FMT_*): Ditto.
1571
1572 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1573
1574 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1575 type IV instruction offsets.
1576
1577 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1578
1579 * tic80.h: New file.
1580
1581 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1582
1583 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1584
1585 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1586
1587 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1588 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1589 * v850.h: Fix comment, v850_operand not powerpc_operand.
1590
1591 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1592
1593 * mn10200.h: Flesh out structures and definitions needed by
1594 the mn10200 assembler & disassembler.
1595
1596 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1597
1598 * mips.h: Add mips16 definitions.
1599
1600 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1601
1602 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1603
1604 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1605
1606 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1607 (MN10300_OPERAND_MEMADDR): Define.
1608
1609 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1610
1611 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1612
1613 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1614
1615 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1616
1617 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1618
1619 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1620
1621 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1622
1623 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1624
1625 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1626
1627 * alpha.h: Don't include "bfd.h"; private relocation types are now
1628 negative to minimize problems with shared libraries. Organize
1629 instruction subsets by AMASK extensions and PALcode
1630 implementation.
1631 (struct alpha_operand): Move flags slot for better packing.
1632
1633 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1634
1635 * v850.h (V850_OPERAND_RELAX): New operand flag.
1636
1637 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1638
1639 * mn10300.h (FMT_*): Move operand format definitions
1640 here.
1641
1642 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1643
1644 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1645
1646 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1647
1648 * mn10300.h (mn10300_opcode): Add "format" field.
1649 (MN10300_OPERAND_*): Define.
1650
1651 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1652
1653 * mn10x00.h: Delete.
1654 * mn10200.h, mn10300.h: New files.
1655
1656 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1657
1658 * mn10x00.h: New file.
1659
1660 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1661
1662 * v850.h: Add new flag to indicate this instruction uses a PC
1663 displacement.
1664
1665 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1666
1667 * h8300.h (stmac): Add missing instruction.
1668
1669 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1670
1671 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1672 field.
1673
1674 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1675
1676 * v850.h (V850_OPERAND_EP): Define.
1677
1678 * v850.h (v850_opcode): Add size field.
1679
1680 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1681
1682 * v850.h (v850_operands): Add insert and extract fields, pointers
1683 to functions used to handle unusual operand encoding.
1684 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1685 V850_OPERAND_SIGNED): Defined.
1686
1687 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1688
1689 * v850.h (v850_operands): Add flags field.
1690 (OPERAND_REG, OPERAND_NUM): Defined.
1691
1692 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1693
1694 * v850.h: New file.
1695
1696 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1697
1698 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1699 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1700 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1701 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1702 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1703 Defined.
1704
1705 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1706
1707 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1708 a 3 bit space id instead of a 2 bit space id.
1709
1710 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1711
1712 * d10v.h: Add some additional defines to support the
1713 assembler in determining which operations can be done in parallel.
1714
1715 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1716
1717 * h8300.h (SN): Define.
1718 (eepmov.b): Renamed from "eepmov"
1719 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1720 with them.
1721
1722 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1723
1724 * d10v.h (OPERAND_SHIFT): New operand flag.
1725
1726 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1727
1728 * d10v.h: Changes for divs, parallel-only instructions, and
1729 signed numbers.
1730
1731 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1732
1733 * d10v.h (pd_reg): Define. Putting the definition here allows
1734 the assembler and disassembler to share the same struct.
1735
1736 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1737
1738 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1739 Williams <steve@icarus.com>.
1740
1741 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1742
1743 * d10v.h: New file.
1744
1745 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1746
1747 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1748
1749 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1750
1751 * m68k.h (mcf5200): New macro.
1752 Document names of coldfire control registers.
1753
1754 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1755
1756 * h8300.h (SRC_IN_DST): Define.
1757
1758 * h8300.h (UNOP3): Mark the register operand in this insn
1759 as a source operand, not a destination operand.
1760 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1761 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1762 register operand with SRC_IN_DST.
1763
1764 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1765
1766 * alpha.h: New file.
1767
1768 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1769
1770 * rs6k.h: Remove obsolete file.
1771
1772 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1773
1774 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1775 fdivp, and fdivrp. Add ffreep.
1776
1777 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1778
1779 * h8300.h: Reorder various #defines for readability.
1780 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1781 (BITOP): Accept additional (unused) argument. All callers changed.
1782 (EBITOP): Likewise.
1783 (O_LAST): Bump.
1784 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1785
1786 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1787 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1788 (BITOP, EBITOP): Handle new H8/S addressing modes for
1789 bit insns.
1790 (UNOP3): Handle new shift/rotate insns on the H8/S.
1791 (insns using exr): New instructions.
1792 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1793
1794 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1795
1796 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1797 was incorrect.
1798
1799 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1800
1801 * h8300.h (START): Remove.
1802 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1803 and mov.l insns that can be relaxed.
1804
1805 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1806
1807 * i386.h: Remove Abs32 from lcall.
1808
1809 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1810
1811 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1812 (SLCPOP): New macro.
1813 Mark X,Y opcode letters as in use.
1814
1815 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1816
1817 * sparc.h (F_FLOAT, F_FBR): Define.
1818
1819 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1820
1821 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1822 from all insns.
1823 (ABS8SRC,ABS8DST): Add ABS8MEM.
1824 (add.l): Fix reg+reg variant.
1825 (eepmov.w): Renamed from eepmovw.
1826 (ldc,stc): Fix many cases.
1827
1828 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1829
1830 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1831
1832 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1833
1834 * sparc.h (O): Mark operand letter as in use.
1835
1836 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1837
1838 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1839 Mark operand letters uU as in use.
1840
1841 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1842
1843 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1844 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1845 (SPARC_OPCODE_SUPPORTED): New macro.
1846 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1847 (F_NOTV9): Delete.
1848
1849 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1850
1851 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1852 declaration consistent with return type in definition.
1853
1854 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1855
1856 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1857
1858 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1859
1860 * i386.h (i386_regtab): Add 80486 test registers.
1861
1862 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1863
1864 * i960.h (I_HX): Define.
1865 (i960_opcodes): Add HX instruction.
1866
1867 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1868
1869 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1870 and fclex.
1871
1872 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1873
1874 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1875 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1876 (bfd_* defines): Delete.
1877 (sparc_opcode_archs): Replaces architecture_pname.
1878 (sparc_opcode_lookup_arch): Declare.
1879 (NUMOPCODES): Delete.
1880
1881 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1882
1883 * sparc.h (enum sparc_architecture): Add v9a.
1884 (ARCHITECTURES_CONFLICT_P): Update.
1885
1886 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1887
1888 * i386.h: Added Pentium Pro instructions.
1889
1890 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1891
1892 * m68k.h: Document new 'W' operand place.
1893
1894 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1895
1896 * hppa.h: Add lci and syncdma instructions.
1897
1898 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1899
1900 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1901 instructions.
1902
1903 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1904
1905 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1906 assembler's -mcom and -many switches.
1907
1908 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1909
1910 * i386.h: Fix cmpxchg8b extension opcode description.
1911
1912 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1913
1914 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1915 and register cr4.
1916
1917 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1918
1919 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1920
1921 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1922
1923 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1924
1925 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1926
1927 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1928
1929 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1930
1931 * m68kmri.h: Remove.
1932
1933 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1934 declarations. Remove F_ALIAS and flag field of struct
1935 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1936 int. Make name and args fields of struct m68k_opcode const.
1937
1938 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1939
1940 * sparc.h (F_NOTV9): Define.
1941
1942 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1943
1944 * mips.h (INSN_4010): Define.
1945
1946 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1947
1948 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1949
1950 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1951 * m68k.h: Fix argument descriptions of coprocessor
1952 instructions to allow only alterable operands where appropriate.
1953 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1954 (m68k_opcode_aliases): Add more aliases.
1955
1956 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1957
1958 * m68k.h: Added explcitly short-sized conditional branches, and a
1959 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1960 svr4-based configurations.
1961
1962 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1963
1964 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1965 * i386.h: added missing Data16/Data32 flags to a few instructions.
1966
1967 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1968
1969 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1970 (OP_MASK_BCC, OP_SH_BCC): Define.
1971 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1972 (OP_MASK_CCC, OP_SH_CCC): Define.
1973 (INSN_READ_FPR_R): Define.
1974 (INSN_RFE): Delete.
1975
1976 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1977
1978 * m68k.h (enum m68k_architecture): Deleted.
1979 (struct m68k_opcode_alias): New type.
1980 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1981 matching constraints, values and flags. As a side effect of this,
1982 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1983 as I know were never used, now may need re-examining.
1984 (numopcodes): Now const.
1985 (m68k_opcode_aliases, numaliases): New variables.
1986 (endop): Deleted.
1987 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1988 m68k_opcode_aliases; update declaration of m68k_opcodes.
1989
1990 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1991
1992 * hppa.h (delay_type): Delete unused enumeration.
1993 (pa_opcode): Replace unused delayed field with an architecture
1994 field.
1995 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1996
1997 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1998
1999 * mips.h (INSN_ISA4): Define.
2000
2001 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2002
2003 * mips.h (M_DLA_AB, M_DLI): Define.
2004
2005 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2006
2007 * hppa.h (fstwx): Fix single-bit error.
2008
2009 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2010
2011 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2012
2013 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2014
2015 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2016 debug registers. From Charles Hannum (mycroft@netbsd.org).
2017
2018 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2019
2020 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2021 i386 support:
2022 * i386.h (MOV_AX_DISP32): New macro.
2023 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2024 of several call/return instructions.
2025 (ADDR_PREFIX_OPCODE): New macro.
2026
2027 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2028
2029 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2030
2031 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2032 char.
2033 (struct vot, field `name'): ditto.
2034
2035 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2036
2037 * vax.h: Supply and properly group all values in end sentinel.
2038
2039 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2040
2041 * mips.h (INSN_ISA, INSN_4650): Define.
2042
2043 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2044
2045 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2046 systems with a separate instruction and data cache, such as the
2047 29040, these instructions take an optional argument.
2048
2049 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2050
2051 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2052 INSN_TRAP.
2053
2054 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2055
2056 * mips.h (INSN_STORE_MEMORY): Define.
2057
2058 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2059
2060 * sparc.h: Document new operand type 'x'.
2061
2062 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2063
2064 * i960.h (I_CX2): New instruction category. It includes
2065 instructions available on Cx and Jx processors.
2066 (I_JX): New instruction category, for JX-only instructions.
2067 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2068 Jx-only instructions, in I_JX category.
2069
2070 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2071
2072 * ns32k.h (endop): Made pointer const too.
2073
2074 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2075
2076 * ns32k.h: Drop Q operand type as there is no correct use
2077 for it. Add I and Z operand types which allow better checking.
2078
2079 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2080
2081 * h8300.h (xor.l) :fix bit pattern.
2082 (L_2): New size of operand.
2083 (trapa): Use it.
2084
2085 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2086
2087 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2088
2089 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2090
2091 * sparc.h: Include v9 definitions.
2092
2093 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2094
2095 * m68k.h (m68060): Defined.
2096 (m68040up, mfloat, mmmu): Include it.
2097 (struct m68k_opcode): Widen `arch' field.
2098 (m68k_opcodes): Updated for M68060. Removed comments that were
2099 instructions commented out by "JF" years ago.
2100
2101 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2102
2103 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2104 add a one-bit `flags' field.
2105 (F_ALIAS): New macro.
2106
2107 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2108
2109 * h8300.h (dec, inc): Get encoding right.
2110
2111 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2112
2113 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2114 a flag instead.
2115 (PPC_OPERAND_SIGNED): Define.
2116 (PPC_OPERAND_SIGNOPT): Define.
2117
2118 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2119
2120 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2121 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2122
2123 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2124
2125 * i386.h: Reverse last change. It'll be handled in gas instead.
2126
2127 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2128
2129 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2130 slower on the 486 and used the implicit shift count despite the
2131 explicit operand. The one-operand form is still available to get
2132 the shorter form with the implicit shift count.
2133
2134 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2135
2136 * hppa.h: Fix typo in fstws arg string.
2137
2138 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2139
2140 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2141
2142 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2143
2144 * ppc.h (PPC_OPCODE_601): Define.
2145
2146 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2147
2148 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2149 (so we can determine valid completers for both addb and addb[tf].)
2150
2151 * hppa.h (xmpyu): No floating point format specifier for the
2152 xmpyu instruction.
2153
2154 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2155
2156 * ppc.h (PPC_OPERAND_NEXT): Define.
2157 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2158 (struct powerpc_macro): Define.
2159 (powerpc_macros, powerpc_num_macros): Declare.
2160
2161 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2162
2163 * ppc.h: New file. Header file for PowerPC opcode table.
2164
2165 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2166
2167 * hppa.h: More minor template fixes for sfu and copr (to allow
2168 for easier disassembly).
2169
2170 * hppa.h: Fix templates for all the sfu and copr instructions.
2171
2172 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2173
2174 * i386.h (push): Permit Imm16 operand too.
2175
2176 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2177
2178 * h8300.h (andc): Exists in base arch.
2179
2180 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2181
2182 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2183 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2184
2185 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2186
2187 * hppa.h: Add FP quadword store instructions.
2188
2189 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2190
2191 * mips.h: (M_J_A): Added.
2192 (M_LA): Removed.
2193
2194 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2195
2196 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2197 <mellon@pepper.ncd.com>.
2198
2199 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2200
2201 * hppa.h: Immediate field in probei instructions is unsigned,
2202 not low-sign extended.
2203
2204 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2205
2206 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2207
2208 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2209
2210 * i386.h: Add "fxch" without operand.
2211
2212 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2213
2214 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2215
2216 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2217
2218 * hppa.h: Add gfw and gfr to the opcode table.
2219
2220 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2221
2222 * m88k.h: extended to handle m88110.
2223
2224 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2225
2226 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2227 addresses.
2228
2229 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2230
2231 * i960.h (i960_opcodes): Properly bracket initializers.
2232
2233 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2234
2235 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2236
2237 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2238
2239 * m68k.h (two): Protect second argument with parentheses.
2240
2241 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2242
2243 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2244 Deleted old in/out instructions in "#if 0" section.
2245
2246 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2247
2248 * i386.h (i386_optab): Properly bracket initializers.
2249
2250 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2251
2252 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2253 Jeff Law, law@cs.utah.edu).
2254
2255 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2256
2257 * i386.h (lcall): Accept Imm32 operand also.
2258
2259 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2260
2261 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2262 (M_DABS): Added.
2263
2264 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2265
2266 * mips.h (INSN_*): Changed values. Removed unused definitions.
2267 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2268 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2269 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2270 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2271 (M_*): Added new values for r6000 and r4000 macros.
2272 (ANY_DELAY): Removed.
2273
2274 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2275
2276 * mips.h: Added M_LI_S and M_LI_SS.
2277
2278 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2279
2280 * h8300.h: Get some rare mov.bs correct.
2281
2282 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2283
2284 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2285 been included.
2286
2287 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2288
2289 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2290 jump instructions, for use in disassemblers.
2291
2292 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2293
2294 * m88k.h: Make bitfields just unsigned, not unsigned long or
2295 unsigned short.
2296
2297 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2298
2299 * hppa.h: New argument type 'y'. Use in various float instructions.
2300
2301 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2302
2303 * hppa.h (break): First immediate field is unsigned.
2304
2305 * hppa.h: Add rfir instruction.
2306
2307 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2308
2309 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2310
2311 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2312
2313 * mips.h: Reworked the hazard information somewhat, and fixed some
2314 bugs in the instruction hazard descriptions.
2315
2316 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2317
2318 * m88k.h: Corrected a couple of opcodes.
2319
2320 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2321
2322 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2323 new version includes instruction hazard information, but is
2324 otherwise reasonably similar.
2325
2326 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2327
2328 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2329
2330 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2331
2332 Patches from Jeff Law, law@cs.utah.edu:
2333 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2334 Make the tables be the same for the following instructions:
2335 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2336 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2337 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2338 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2339 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2340 "fcmp", and "ftest".
2341
2342 * hppa.h: Make new and old tables the same for "break", "mtctl",
2343 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2344 Fix typo in last patch. Collapse several #ifdefs into a
2345 single #ifdef.
2346
2347 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2348 of the comments up-to-date.
2349
2350 * hppa.h: Update "free list" of letters and update
2351 comments describing each letter's function.
2352
2353 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2354
2355 * h8300.h: Lots of little fixes for the h8/300h.
2356
2357 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2358
2359 Support for H8/300-H
2360 * h8300.h: Lots of new opcodes.
2361
2362 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2363
2364 * h8300.h: checkpoint, includes H8/300-H opcodes.
2365
2366 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2367
2368 * Patches from Jeffrey Law <law@cs.utah.edu>.
2369 * hppa.h: Rework single precision FP
2370 instructions so that they correctly disassemble code
2371 PA1.1 code.
2372
2373 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2374
2375 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2376 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2377
2378 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2379
2380 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2381 gdb will define it for now.
2382
2383 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2384
2385 * sparc.h: Don't end enumerator list with comma.
2386
2387 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2388
2389 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2390 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2391 ("bc2t"): Correct typo.
2392 ("[ls]wc[023]"): Use T rather than t.
2393 ("c[0123]"): Define general coprocessor instructions.
2394
2395 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2396
2397 * m68k.h: Move split point for gcc compilation more towards
2398 middle.
2399
2400 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2401
2402 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2403 simply wrong, ics, rfi, & rfsvc were missing).
2404 Add "a" to opr_ext for "bb". Doc fix.
2405
2406 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2407
2408 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2409 * mips.h: Add casts, to suppress warnings about shifting too much.
2410 * m68k.h: Document the placement code '9'.
2411
2412 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2413
2414 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2415 allows callers to break up the large initialized struct full of
2416 opcodes into two half-sized ones. This permits GCC to compile
2417 this module, since it takes exponential space for initializers.
2418 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2419
2420 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2421
2422 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2423 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2424 initialized structs in it.
2425
2426 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2427
2428 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2429 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2430 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2431
2432 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2433
2434 * mips.h: document "i" and "j" operands correctly.
2435
2436 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2437
2438 * mips.h: Removed endianness dependency.
2439
2440 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2441
2442 * h8300.h: include info on number of cycles per instruction.
2443
2444 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2445
2446 * hppa.h: Move handy aliases to the front. Fix masks for extract
2447 and deposit instructions.
2448
2449 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2450
2451 * i386.h: accept shld and shrd both with and without the shift
2452 count argument, which is always %cl.
2453
2454 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2455
2456 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2457 (one_byte_segment_defaults, two_byte_segment_defaults,
2458 i386_prefixtab_end): Ditto.
2459
2460 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2461
2462 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2463 for operand 2; from John Carr, jfc@dsg.dec.com.
2464
2465 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2466
2467 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2468 always use 16-bit offsets. Makes calculated-size jump tables
2469 feasible.
2470
2471 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2472
2473 * i386.h: Fix one-operand forms of in* and out* patterns.
2474
2475 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2476
2477 * m68k.h: Added CPU32 support.
2478
2479 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2480
2481 * mips.h (break): Disassemble the argument. Patch from
2482 jonathan@cs.stanford.edu (Jonathan Stone).
2483
2484 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2485
2486 * m68k.h: merged Motorola and MIT syntax.
2487
2488 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2489
2490 * m68k.h (pmove): make the tests less strict, the 68k book is
2491 wrong.
2492
2493 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2494
2495 * m68k.h (m68ec030): Defined as alias for 68030.
2496 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2497 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2498 them. Tightened description of "fmovex" to distinguish it from
2499 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2500 up descriptions that claimed versions were available for chips not
2501 supporting them. Added "pmovefd".
2502
2503 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2504
2505 * m68k.h: fix where the . goes in divull
2506
2507 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2508
2509 * m68k.h: the cas2 instruction is supposed to be written with
2510 indirection on the last two operands, which can be either data or
2511 address registers. Added a new operand type 'r' which accepts
2512 either register type. Added new cases for cas2l and cas2w which
2513 use them. Corrected masks for cas2 which failed to recognize use
2514 of address register.
2515
2516 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2517
2518 * m68k.h: Merged in patches (mostly m68040-specific) from
2519 Colin Smith <colin@wrs.com>.
2520
2521 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2522 base). Also cleaned up duplicates, re-ordered instructions for
2523 the sake of dis-assembling (so aliases come after standard names).
2524 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2525
2526 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2527
2528 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2529 all missing .s
2530
2531 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2532
2533 * sparc.h: Moved tables to BFD library.
2534
2535 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2536
2537 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2538
2539 * h8300.h: Finish filling in all the holes in the opcode table,
2540 so that the Lucid C compiler can digest this as well...
2541
2542 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2543
2544 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2545 Fix opcodes on various sizes of fild/fist instructions
2546 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2547 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2548
2549 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2550
2551 * h8300.h: Fill in all the holes in the opcode table so that the
2552 losing HPUX C compiler can digest this...
2553
2554 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2555
2556 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2557 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2558
2559 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2560
2561 * sparc.h: Add new architecture variant sparclite; add its scan
2562 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2563
2564 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2565
2566 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2567 fy@lucid.com).
2568
2569 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2570
2571 * rs6k.h: New version from IBM (Metin).
2572
2573 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2574
2575 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2576 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2577
2578 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2579
2580 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2581
2582 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2583
2584 * m68k.h (one, two): Cast macro args to unsigned to suppress
2585 complaints from compiler and lint about integer overflow during
2586 shift.
2587
2588 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2589
2590 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2591
2592 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2593
2594 * mips.h: Make bitfield layout depend on the HOST compiler,
2595 not on the TARGET system.
2596
2597 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2598
2599 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2600 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2601 <TRANLE@INTELLICORP.COM>.
2602
2603 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2604
2605 * h8300.h: turned op_type enum into #define list
2606
2607 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2608
2609 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2610 similar instructions -- they've been renamed to "fitoq", etc.
2611 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2612 number of arguments.
2613 * h8300.h: Remove extra ; which produces compiler warning.
2614
2615 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2616
2617 * sparc.h: fix opcode for tsubcctv.
2618
2619 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2620
2621 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2622
2623 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2624
2625 * sparc.h (nop): Made the 'lose' field be even tighter,
2626 so only a standard 'nop' is disassembled as a nop.
2627
2628 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2629
2630 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2631 disassembled as a nop.
2632
2633 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2634
2635 * m68k.h, sparc.h: ANSIfy enums.
2636
2637 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2638
2639 * sparc.h: fix a typo.
2640
2641 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2642
2643 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2644 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2645 vax.h: Renamed from ../<foo>-opcode.h.
2646
2647 \f
2648 Local Variables:
2649 version-control: never
2650 End:
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