ec40ddf4d3938779b3b0b17694da49e09f110fa9
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-05-23 John Healy <jhealy@redhat.com>
2
3 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
4
5 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
6
7 * mips.h (INSN_ISA_MASK): Define.
8
9 2001-05-12 Alan Modra <amodra@one.net.au>
10
11 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
12 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
13 and use InvMem as these insns must have register operands.
14
15 2001-05-04 Alan Modra <amodra@one.net.au>
16
17 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
18 and pextrw to swap reg/rm assignments.
19
20 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
21
22 * cris.h (enum cris_insn_version_usage): Correct comment for
23 cris_ver_v3p.
24
25 2001-03-24 Alan Modra <alan@linuxcare.com.au>
26
27 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
28 Add InvMem to first operand of "maskmovdqu".
29
30 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
31
32 * cris.h (ADD_PC_INCR_OPCODE): New macro.
33
34 2001-03-21 Kazu Hirata <kazu@hxi.com>
35
36 * h8300.h: Fix formatting.
37
38 2001-03-22 Alan Modra <alan@linuxcare.com.au>
39
40 * i386.h (i386_optab): Add paddq, psubq.
41
42 2001-03-19 Alan Modra <alan@linuxcare.com.au>
43
44 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
45
46 2001-02-28 Igor Shevlyakov <igor@windriver.com>
47
48 * m68k.h: new defines for Coldfire V4. Update mcf to know
49 about mcf5407.
50
51 2001-02-18 lars brinkhoff <lars@nocrew.org>
52
53 * pdp11.h: New file.
54
55 2001-02-12 Jan Hubicka <jh@suse.cz>
56
57 * i386.h (i386_optab): SSE integer converison instructions have
58 64bit versions on x86-64.
59
60 2001-02-10 Nick Clifton <nickc@redhat.com>
61
62 * mips.h: Remove extraneous whitespace. Formating change to allow
63 for future contribution.
64
65 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
66
67 * s390.h: New file.
68
69 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
70
71 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
72 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
73 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
74
75 2001-01-24 Karsten Keil <kkeil@suse.de>
76
77 * i386.h (i386_optab): Fix swapgs
78
79 2001-01-14 Alan Modra <alan@linuxcare.com.au>
80
81 * hppa.h: Describe new '<' and '>' operand types, and tidy
82 existing comments.
83 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
84 Remove duplicate "ldw j(s,b),x". Sort some entries.
85
86 2001-01-13 Jan Hubicka <jh@suse.cz>
87
88 * i386.h (i386_optab): Fix pusha and ret templates.
89
90 2001-01-11 Peter Targett <peter.targett@arccores.com>
91
92 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
93 definitions for masking cpu type.
94 (arc_ext_operand_value) New structure for storing extended
95 operands.
96 (ARC_OPERAND_*) Flags for operand values.
97
98 2001-01-10 Jan Hubicka <jh@suse.cz>
99
100 * i386.h (pinsrw): Add.
101 (pshufw): Remove.
102 (cvttpd2dq): Fix operands.
103 (cvttps2dq): Likewise.
104 (movq2q): Rename to movdq2q.
105
106 2001-01-10 Richard Schaal <richard.schaal@intel.com>
107
108 * i386.h: Correct movnti instruction.
109
110 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
111
112 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
113 of operands (unsigned char or unsigned short).
114 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
115 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
116
117 2001-01-05 Jan Hubicka <jh@suse.cz>
118
119 * i386.h (i386_optab): Make [sml]fence template to use immext field.
120
121 2001-01-03 Jan Hubicka <jh@suse.cz>
122
123 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
124 introduced by Pentium4
125
126 2000-12-30 Jan Hubicka <jh@suse.cz>
127
128 * i386.h (i386_optab): Add "rex*" instructions;
129 add swapgs; disable jmp/call far direct instructions for
130 64bit mode; add syscall and sysret; disable registers for 0xc6
131 template. Add 'q' suffixes to extendable instructions, disable
132 obsolete instructions, add new sign/zero extension ones.
133 (i386_regtab): Add extended registers.
134 (*Suf): Add No_qSuf.
135 (q_Suf, wlq_Suf, bwlq_Suf): New.
136
137 2000-12-20 Jan Hubicka <jh@suse.cz>
138
139 * i386.h (i386_optab): Replace "Imm" with "EncImm".
140 (i386_regtab): Add flags field.
141
142 2000-12-12 Nick Clifton <nickc@redhat.com>
143
144 * mips.h: Fix formatting.
145
146 2000-12-01 Chris Demetriou <cgd@sibyte.com>
147
148 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
149 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
150 OP_*_SYSCALL definitions.
151 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
152 19 bit wait codes.
153 (MIPS operand specifier comments): Remove 'm', add 'U' and
154 'J', and update the meaning of 'B' so that it's more general.
155
156 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
157 INSN_ISA5): Renumber, redefine to mean the ISA at which the
158 instruction was added.
159 (INSN_ISA32): New constant.
160 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
161 Renumber to avoid new and/or renumbered INSN_* constants.
162 (INSN_MIPS32): Delete.
163 (ISA_UNKNOWN): New constant to indicate unknown ISA.
164 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
165 ISA_MIPS32): New constants, defined to be the mask of INSN_*
166 constants available at that ISA level.
167 (CPU_UNKNOWN): New constant to indicate unknown CPU.
168 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
169 define it with a unique value.
170 (OPCODE_IS_MEMBER): Update for new ISA membership-related
171 constant meanings.
172
173 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
174 definitions.
175
176 * mips.h (CPU_SB1): New constant.
177
178 2000-10-20 Jakub Jelinek <jakub@redhat.com>
179
180 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
181 Note that '3' is used for siam operand.
182
183 2000-09-22 Jim Wilson <wilson@cygnus.com>
184
185 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
186
187 2000-09-13 Anders Norlander <anorland@acc.umu.se>
188
189 * mips.h: Use defines instead of hard-coded processor numbers.
190 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
191 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
192 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
193 CPU_4KC, CPU_4KM, CPU_4KP): Define..
194 (OPCODE_IS_MEMBER): Use new defines.
195 (OP_MASK_SEL, OP_SH_SEL): Define.
196 (OP_MASK_CODE20, OP_SH_CODE20): Define.
197 Add 'P' to used characters.
198 Use 'H' for coprocessor select field.
199 Use 'm' for 20 bit breakpoint code.
200 Document new arg characters and add to used characters.
201 (INSN_MIPS32): New define for MIPS32 extensions.
202 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
203
204 2000-09-05 Alan Modra <alan@linuxcare.com.au>
205
206 * hppa.h: Mention cz completer.
207
208 2000-08-16 Jim Wilson <wilson@cygnus.com>
209
210 * ia64.h (IA64_OPCODE_POSTINC): New.
211
212 2000-08-15 H.J. Lu <hjl@gnu.org>
213
214 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
215 IgnoreSize change.
216
217 2000-08-08 Jason Eckhardt <jle@cygnus.com>
218
219 * i860.h: Small formatting adjustments.
220
221 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
222
223 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
224 Move related opcodes closer to each other.
225 Minor changes in comments, list undefined opcodes.
226
227 2000-07-26 Dave Brolley <brolley@redhat.com>
228
229 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
230
231 2000-07-22 Jason Eckhardt <jle@cygnus.com>
232
233 * i860.h (btne, bte, bla): Changed these opcodes
234 to use sbroff ('r') instead of split16 ('s').
235 (J, K, L, M): New operand types for 16-bit aligned fields.
236 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
237 use I, J, K, L, M instead of just I.
238 (T, U): New operand types for split 16-bit aligned fields.
239 (st.x): Changed these opcodes to use S, T, U instead of just S.
240 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
241 exist on the i860.
242 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
243 (pfeq.ss, pfeq.dd): New opcodes.
244 (st.s): Fixed incorrect mask bits.
245 (fmlow): Fixed incorrect mask bits.
246 (fzchkl, pfzchkl): Fixed incorrect mask bits.
247 (faddz, pfaddz): Fixed incorrect mask bits.
248 (form, pform): Fixed incorrect mask bits.
249 (pfld.l): Fixed incorrect mask bits.
250 (fst.q): Fixed incorrect mask bits.
251 (all floating point opcodes): Fixed incorrect mask bits for
252 handling of dual bit.
253
254 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
255
256 cris.h: New file.
257
258 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
259
260 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
261 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
262 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
263 (AVR_ISA_M83): Define for ATmega83, ATmega85.
264 (espm): Remove, because ESPM removed in databook update.
265 (eicall, eijmp): Move to the end of opcode table.
266
267 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
268
269 * m68hc11.h: New file for support of Motorola 68hc11.
270
271 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
272
273 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
274
275 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
276
277 * avr.h: New file with AVR opcodes.
278
279 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
280
281 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
282
283 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
284
285 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
286
287 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
288
289 * i386.h: Use sl_FP, not sl_Suf for fild.
290
291 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
292
293 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
294 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
295 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
296 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
297
298 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
299
300 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
301
302 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
303 Alexander Sokolov <robocop@netlink.ru>
304
305 * i386.h (i386_optab): Add cpu_flags for all instructions.
306
307 2000-05-13 Alan Modra <alan@linuxcare.com.au>
308
309 From Gavin Romig-Koch <gavin@cygnus.com>
310 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
311
312 2000-05-04 Timothy Wall <twall@cygnus.com>
313
314 * tic54x.h: New.
315
316 2000-05-03 J.T. Conklin <jtc@redback.com>
317
318 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
319 (PPC_OPERAND_VR): New operand flag for vector registers.
320
321 2000-05-01 Kazu Hirata <kazu@hxi.com>
322
323 * h8300.h (EOP): Add missing initializer.
324
325 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
326
327 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
328 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
329 New operand types l,y,&,fe,fE,fx added to support above forms.
330 (pa_opcodes): Replaced usage of 'x' as source/target for
331 floating point double-word loads/stores with 'fx'.
332
333 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
334 David Mosberger <davidm@hpl.hp.com>
335 Timothy Wall <twall@cygnus.com>
336 Jim Wilson <wilson@cygnus.com>
337
338 * ia64.h: New file.
339
340 2000-03-27 Nick Clifton <nickc@cygnus.com>
341
342 * d30v.h (SHORT_A1): Fix value.
343 (SHORT_AR): Renumber so that it is at the end of the list of short
344 instructions, not the end of the list of long instructions.
345
346 2000-03-26 Alan Modra <alan@linuxcare.com>
347
348 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
349 problem isn't really specific to Unixware.
350 (OLDGCC_COMPAT): Define.
351 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
352 destination %st(0).
353 Fix lots of comments.
354
355 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
356
357 * d30v.h:
358 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
359 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
360 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
361 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
362 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
363 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
364 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
365
366 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
367
368 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
369 fistpd without suffix.
370
371 2000-02-24 Nick Clifton <nickc@cygnus.com>
372
373 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
374 'signed_overflow_ok_p'.
375 Delete prototypes for cgen_set_flags() and cgen_get_flags().
376
377 2000-02-24 Andrew Haley <aph@cygnus.com>
378
379 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
380 (CGEN_CPU_TABLE): flags: new field.
381 Add prototypes for new functions.
382
383 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
384
385 * i386.h: Add some more UNIXWARE_COMPAT comments.
386
387 2000-02-23 Linas Vepstas <linas@linas.org>
388
389 * i370.h: New file.
390
391 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
392
393 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
394 cannot be combined in parallel with ADD/SUBppp.
395
396 2000-02-22 Andrew Haley <aph@cygnus.com>
397
398 * mips.h: (OPCODE_IS_MEMBER): Add comment.
399
400 1999-12-30 Andrew Haley <aph@cygnus.com>
401
402 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
403 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
404 insns.
405
406 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
407
408 * i386.h: Qualify intel mode far call and jmp with x_Suf.
409
410 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
411
412 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
413 indirect jumps and calls. Add FF/3 call for intel mode.
414
415 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
416
417 * mn10300.h: Add new operand types. Add new instruction formats.
418
419 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
420
421 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
422 instruction.
423
424 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
425
426 * mips.h (INSN_ISA5): New.
427
428 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
429
430 * mips.h (OPCODE_IS_MEMBER): New.
431
432 1999-10-29 Nick Clifton <nickc@cygnus.com>
433
434 * d30v.h (SHORT_AR): Define.
435
436 1999-10-18 Michael Meissner <meissner@cygnus.com>
437
438 * alpha.h (alpha_num_opcodes): Convert to unsigned.
439 (alpha_num_operands): Ditto.
440
441 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
442
443 * hppa.h (pa_opcodes): Add load and store cache control to
444 instructions. Add ordered access load and store.
445
446 * hppa.h (pa_opcode): Add new entries for addb and addib.
447
448 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
449
450 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
451
452 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
453
454 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
455
456 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
457
458 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
459 and "be" using completer prefixes.
460
461 * hppa.h (pa_opcodes): Add initializers to silence compiler.
462
463 * hppa.h: Update comments about character usage.
464
465 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
466
467 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
468 up the new fstw & bve instructions.
469
470 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
471
472 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
473 instructions.
474
475 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
476
477 * hppa.h (pa_opcodes): Add long offset double word load/store
478 instructions.
479
480 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
481 stores.
482
483 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
484
485 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
486
487 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
488
489 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
490
491 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
492
493 * hppa.h (pa_opcodes): Add support for "b,l".
494
495 * hppa.h (pa_opcodes): Add support for "b,gate".
496
497 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
498
499 * hppa.h (pa_opcodes): Use 'fX' for first register operand
500 in xmpyu.
501
502 * hppa.h (pa_opcodes): Fix mask for probe and probei.
503
504 * hppa.h (pa_opcodes): Fix mask for depwi.
505
506 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
507
508 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
509 an explicit output argument.
510
511 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
512
513 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
514 Add a few PA2.0 loads and store variants.
515
516 1999-09-04 Steve Chamberlain <sac@pobox.com>
517
518 * pj.h: New file.
519
520 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
521
522 * i386.h (i386_regtab): Move %st to top of table, and split off
523 other fp reg entries.
524 (i386_float_regtab): To here.
525
526 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
527
528 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
529 by 'f'.
530
531 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
532 Add supporting args.
533
534 * hppa.h: Document new completers and args.
535 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
536 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
537 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
538 pmenb and pmdis.
539
540 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
541 hshr, hsub, mixh, mixw, permh.
542
543 * hppa.h (pa_opcodes): Change completers in instructions to
544 use 'c' prefix.
545
546 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
547 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
548
549 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
550 fnegabs to use 'I' instead of 'F'.
551
552 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
553
554 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
555 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
556 Alphabetically sort PIII insns.
557
558 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
559
560 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
561
562 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
563
564 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
565 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
566
567 * hppa.h: Document 64 bit condition completers.
568
569 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
570
571 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
572
573 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
574
575 * i386.h (i386_optab): Add DefaultSize modifier to all insns
576 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
577 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
578
579 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
580 Jeff Law <law@cygnus.com>
581
582 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
583
584 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
585
586 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
587 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
588
589 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
590
591 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
592
593 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
594
595 * hppa.h (struct pa_opcode): Add new field "flags".
596 (FLAGS_STRICT): Define.
597
598 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
599 Jeff Law <law@cygnus.com>
600
601 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
602
603 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
604
605 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
606
607 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
608 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
609 flag to fcomi and friends.
610
611 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
612
613 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
614 integer logical instructions.
615
616 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
617
618 * m68k.h: Document new formats `E', `G', `H' and new places `N',
619 `n', `o'.
620
621 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
622 and new places `m', `M', `h'.
623
624 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
625
626 * hppa.h (pa_opcodes): Add several processor specific system
627 instructions.
628
629 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
630
631 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
632 "addb", and "addib" to be used by the disassembler.
633
634 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
635
636 * i386.h (ReverseModrm): Remove all occurences.
637 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
638 movmskps, pextrw, pmovmskb, maskmovq.
639 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
640 ignore the data size prefix.
641
642 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
643 Mostly stolen from Doug Ledford <dledford@redhat.com>
644
645 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
646
647 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
648
649 1999-04-14 Doug Evans <devans@casey.cygnus.com>
650
651 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
652 (CGEN_ATTR_TYPE): Update.
653 (CGEN_ATTR_MASK): Number booleans starting at 0.
654 (CGEN_ATTR_VALUE): Update.
655 (CGEN_INSN_ATTR): Update.
656
657 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
658
659 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
660 instructions.
661
662 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
663
664 * hppa.h (bb, bvb): Tweak opcode/mask.
665
666
667 1999-03-22 Doug Evans <devans@casey.cygnus.com>
668
669 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
670 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
671 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
672 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
673 Delete member max_insn_size.
674 (enum cgen_cpu_open_arg): New enum.
675 (cpu_open): Update prototype.
676 (cpu_open_1): Declare.
677 (cgen_set_cpu): Delete.
678
679 1999-03-11 Doug Evans <devans@casey.cygnus.com>
680
681 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
682 (CGEN_OPERAND_NIL): New macro.
683 (CGEN_OPERAND): New member `type'.
684 (@arch@_cgen_operand_table): Delete decl.
685 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
686 (CGEN_OPERAND_TABLE): New struct.
687 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
688 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
689 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
690 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
691 {get,set}_{int,vma}_operand.
692 (@arch@_cgen_cpu_open): New arg `isa'.
693 (cgen_set_cpu): Ditto.
694
695 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
696
697 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
698
699 1999-02-25 Doug Evans <devans@casey.cygnus.com>
700
701 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
702 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
703 enum cgen_hw_type.
704 (CGEN_HW_TABLE): New struct.
705 (hw_table): Delete declaration.
706 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
707 to table entry to enum.
708 (CGEN_OPINST): Ditto.
709 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
710
711 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
712
713 * alpha.h (AXP_OPCODE_EV6): New.
714 (AXP_OPCODE_NOPAL): Include it.
715
716 1999-02-09 Doug Evans <devans@casey.cygnus.com>
717
718 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
719 All uses updated. New members int_insn_p, max_insn_size,
720 parse_operand,insert_operand,extract_operand,print_operand,
721 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
722 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
723 extract_handlers,print_handlers.
724 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
725 (CGEN_ATTR_BOOL_OFFSET): New macro.
726 (CGEN_ATTR_MASK): Subtract it to compute bit number.
727 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
728 (cgen_opcode_handler): Renamed from cgen_base.
729 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
730 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
731 all uses updated.
732 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
733 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
734 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
735 (CGEN_OPCODE,CGEN_IBASE): New types.
736 (CGEN_INSN): Rewrite.
737 (CGEN_{ASM,DIS}_HASH*): Delete.
738 (init_opcode_table,init_ibld_table): Declare.
739 (CGEN_INSN_ATTR): New type.
740
741 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
742
743 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
744 (x_FP, d_FP, dls_FP, sldx_FP): Define.
745 Change *Suf definitions to include x and d suffixes.
746 (movsx): Use w_Suf and b_Suf.
747 (movzx): Likewise.
748 (movs): Use bwld_Suf.
749 (fld): Change ordering. Use sld_FP.
750 (fild): Add Intel Syntax equivalent of fildq.
751 (fst): Use sld_FP.
752 (fist): Use sld_FP.
753 (fstp): Use sld_FP. Add x_FP version.
754 (fistp): LLongMem version for Intel Syntax.
755 (fcom, fcomp): Use sld_FP.
756 (fadd, fiadd, fsub): Use sld_FP.
757 (fsubr): Use sld_FP.
758 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
759
760 1999-01-27 Doug Evans <devans@casey.cygnus.com>
761
762 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
763 CGEN_MODE_UINT.
764
765 1999-01-16 Jeffrey A Law (law@cygnus.com)
766
767 * hppa.h (bv): Fix mask.
768
769 1999-01-05 Doug Evans <devans@casey.cygnus.com>
770
771 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
772 (CGEN_ATTR): Use it.
773 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
774 (CGEN_ATTR_TABLE): New member dfault.
775
776 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
777
778 * mips.h (MIPS16_INSN_BRANCH): New.
779
780 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
781
782 The following is part of a change made by Edith Epstein
783 <eepstein@sophia.cygnus.com> as part of a project to merge in
784 changes by HP; HP did not create ChangeLog entries.
785
786 * hppa.h (completer_chars): list of chars to not put a space
787 after.
788
789 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
790
791 * i386.h (i386_optab): Permit w suffix on processor control and
792 status word instructions.
793
794 1998-11-30 Doug Evans <devans@casey.cygnus.com>
795
796 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
797 (struct cgen_keyword_entry): Ditto.
798 (struct cgen_operand): Ditto.
799 (CGEN_IFLD): New typedef, with associated access macros.
800 (CGEN_IFMT): New typedef, with associated access macros.
801 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
802 (CGEN_IVALUE): New typedef.
803 (struct cgen_insn): Delete const on syntax,attrs members.
804 `format' now points to format data. Type of `value' is now
805 CGEN_IVALUE.
806 (struct cgen_opcode_table): New member ifld_table.
807
808 1998-11-18 Doug Evans <devans@casey.cygnus.com>
809
810 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
811 (CGEN_OPERAND_INSTANCE): New member `attrs'.
812 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
813 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
814 (cgen_opcode_table): Update type of dis_hash fn.
815 (extract_operand): Update type of `insn_value' arg.
816
817 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
818
819 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
820
821 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
822
823 * mips.h (INSN_MULT): Added.
824
825 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
826
827 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
828
829 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
830
831 * cgen.h (CGEN_INSN_INT): New typedef.
832 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
833 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
834 (CGEN_INSN_BYTES_PTR): New typedef.
835 (CGEN_EXTRACT_INFO): New typedef.
836 (cgen_insert_fn,cgen_extract_fn): Update.
837 (cgen_opcode_table): New member `insn_endian'.
838 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
839 (insert_operand,extract_operand): Update.
840 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
841
842 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
843
844 * cgen.h (CGEN_ATTR_BOOLS): New macro.
845 (struct CGEN_HW_ENTRY): New member `attrs'.
846 (CGEN_HW_ATTR): New macro.
847 (struct CGEN_OPERAND_INSTANCE): New member `name'.
848 (CGEN_INSN_INVALID_P): New macro.
849
850 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
851
852 * hppa.h: Add "fid".
853
854 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
855
856 From Robert Andrew Dale <rob@nb.net>
857 * i386.h (i386_optab): Add AMD 3DNow! instructions.
858 (AMD_3DNOW_OPCODE): Define.
859
860 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
861
862 * d30v.h (EITHER_BUT_PREFER_MU): Define.
863
864 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
865
866 * cgen.h (cgen_insn): #if 0 out element `cdx'.
867
868 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
869
870 Move all global state data into opcode table struct, and treat
871 opcode table as something that is "opened/closed".
872 * cgen.h (CGEN_OPCODE_DESC): New type.
873 (all fns): New first arg of opcode table descriptor.
874 (cgen_set_parse_operand_fn): Add prototype.
875 (cgen_current_machine,cgen_current_endian): Delete.
876 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
877 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
878 dis_hash_table,dis_hash_table_entries.
879 (opcode_open,opcode_close): Add prototypes.
880
881 * cgen.h (cgen_insn): New element `cdx'.
882
883 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
884
885 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
886
887 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
888
889 * mn10300.h: Add "no_match_operands" field for instructions.
890 (MN10300_MAX_OPERANDS): Define.
891
892 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
893
894 * cgen.h (cgen_macro_insn_count): Declare.
895
896 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
897
898 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
899 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
900 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
901 set_{int,vma}_operand.
902
903 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
904
905 * mn10300.h: Add "machine" field for instructions.
906 (MN103, AM30): Define machine types.
907
908 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
909
910 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
911
912 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
913
914 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
915
916 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
917
918 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
919 and ud2b.
920 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
921 those that happen to be implemented on pentiums.
922
923 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
924
925 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
926 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
927 with Size16|IgnoreSize or Size32|IgnoreSize.
928
929 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
930
931 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
932 (REPE): Rename to REPE_PREFIX_OPCODE.
933 (i386_regtab_end): Remove.
934 (i386_prefixtab, i386_prefixtab_end): Remove.
935 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
936 of md_begin.
937 (MAX_OPCODE_SIZE): Define.
938 (i386_optab_end): Remove.
939 (sl_Suf): Define.
940 (sl_FP): Use sl_Suf.
941
942 * i386.h (i386_optab): Allow 16 bit displacement for `mov
943 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
944 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
945 data32, dword, and adword prefixes.
946 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
947 regs.
948
949 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
950
951 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
952
953 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
954 register operands, because this is a common idiom. Flag them with
955 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
956 fdivrp because gcc erroneously generates them. Also flag with a
957 warning.
958
959 * i386.h: Add suffix modifiers to most insns, and tighter operand
960 checks in some cases. Fix a number of UnixWare compatibility
961 issues with float insns. Merge some floating point opcodes, using
962 new FloatMF modifier.
963 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
964 consistency.
965
966 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
967 IgnoreDataSize where appropriate.
968
969 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
970
971 * i386.h: (one_byte_segment_defaults): Remove.
972 (two_byte_segment_defaults): Remove.
973 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
974
975 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
976
977 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
978 (cgen_hw_lookup_by_num): Declare.
979
980 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
981
982 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
983 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
984
985 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
986
987 * cgen.h (cgen_asm_init_parse): Delete.
988 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
989 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
990
991 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
992
993 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
994 (cgen_asm_finish_insn): Update prototype.
995 (cgen_insn): New members num, data.
996 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
997 dis_hash, dis_hash_table_size moved to ...
998 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
999 All uses updated. New members asm_hash_p, dis_hash_p.
1000 (CGEN_MINSN_EXPANSION): New struct.
1001 (cgen_expand_macro_insn): Declare.
1002 (cgen_macro_insn_count): Declare.
1003 (get_insn_operands): Update prototype.
1004 (lookup_get_insn_operands): Declare.
1005
1006 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1007
1008 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1009 regKludge. Add operands types for string instructions.
1010
1011 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1012
1013 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1014 table.
1015
1016 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1017
1018 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1019 for `gettext'.
1020
1021 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1022
1023 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1024 Add IsString flag to string instructions.
1025 (IS_STRING): Don't define.
1026 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1027 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1028 (SS_PREFIX_OPCODE): Define.
1029
1030 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1031
1032 * i386.h: Revert March 24 patch; no more LinearAddress.
1033
1034 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1035
1036 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1037 instructions, and instead add FWait opcode modifier. Add short
1038 form of fldenv and fstenv.
1039 (FWAIT_OPCODE): Define.
1040
1041 * i386.h (i386_optab): Change second operand constraint of `mov
1042 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1043 allow legal instructions such as `movl %gs,%esi'
1044
1045 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1046
1047 * h8300.h: Various changes to fully bracket initializers.
1048
1049 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1050
1051 * i386.h: Set LinearAddress for lidt and lgdt.
1052
1053 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1054
1055 * cgen.h (CGEN_BOOL_ATTR): New macro.
1056
1057 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1058
1059 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1060
1061 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1062
1063 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1064 (cgen_insn): Record syntax and format entries here, rather than
1065 separately.
1066
1067 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1068
1069 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1070
1071 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1072
1073 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1074 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1075 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1076
1077 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1078
1079 * cgen.h (lookup_insn): New argument alias_p.
1080
1081 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1082
1083 Fix rac to accept only a0:
1084 * d10v.h (OPERAND_ACC): Split into:
1085 (OPERAND_ACC0, OPERAND_ACC1) .
1086 (OPERAND_GPR): Define.
1087
1088 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1089
1090 * cgen.h (CGEN_FIELDS): Define here.
1091 (CGEN_HW_ENTRY): New member `type'.
1092 (hw_list): Delete decl.
1093 (enum cgen_mode): Declare.
1094 (CGEN_OPERAND): New member `hw'.
1095 (enum cgen_operand_instance_type): Declare.
1096 (CGEN_OPERAND_INSTANCE): New type.
1097 (CGEN_INSN): New member `operands'.
1098 (CGEN_OPCODE_DATA): Make hw_list const.
1099 (get_insn_operands,lookup_insn): Add prototypes for.
1100
1101 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1102
1103 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1104 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1105 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1106 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1107
1108 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1109
1110 * cgen.h: Correct typo in comment end marker.
1111
1112 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1113
1114 * tic30.h: New file.
1115
1116 Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1117
1118 * cgen.h: Add prototypes for cgen_save_fixups(),
1119 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1120 of cgen_asm_finish_insn() to return a char *.
1121
1122 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1123
1124 * cgen.h: Formatting changes to improve readability.
1125
1126 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1127
1128 * cgen.h (*): Clean up pass over `struct foo' usage.
1129 (CGEN_ATTR): Make unsigned char.
1130 (CGEN_ATTR_TYPE): Update.
1131 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1132 (cgen_base): Move member `attrs' to cgen_insn.
1133 (CGEN_KEYWORD): New member `null_entry'.
1134 (CGEN_{SYNTAX,FORMAT}): New types.
1135 (cgen_insn): Format and syntax separated from each other.
1136
1137 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1138
1139 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1140 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1141 flags_{used,set} long.
1142 (d30v_operand): Make flags field long.
1143
1144 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1145
1146 * m68k.h: Fix comment describing operand types.
1147
1148 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1149
1150 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1151 everything else after down.
1152
1153 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1154
1155 * d10v.h (OPERAND_FLAG): Split into:
1156 (OPERAND_FFLAG, OPERAND_CFLAG) .
1157
1158 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1159
1160 * mips.h (struct mips_opcode): Changed comments to reflect new
1161 field usage.
1162
1163 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1164
1165 * mips.h: Added to comments a quick-ref list of all assigned
1166 operand type characters.
1167 (OP_{MASK,SH}_PERFREG): New macros.
1168
1169 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1170
1171 * sparc.h: Add '_' and '/' for v9a asr's.
1172 Patch from David Miller <davem@vger.rutgers.edu>
1173
1174 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1175
1176 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1177 area are not available in the base model (H8/300).
1178
1179 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1180
1181 * m68k.h: Remove documentation of ` operand specifier.
1182
1183 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1184
1185 * m68k.h: Document q and v operand specifiers.
1186
1187 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1188
1189 * v850.h (struct v850_opcode): Add processors field.
1190 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1191 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1192 (PROCESSOR_V850EA): New bit constants.
1193
1194 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1195
1196 Merge changes from Martin Hunt:
1197
1198 * d30v.h: Allow up to 64 control registers. Add
1199 SHORT_A5S format.
1200
1201 * d30v.h (LONG_Db): New form for delayed branches.
1202
1203 * d30v.h: (LONG_Db): New form for repeati.
1204
1205 * d30v.h (SHORT_D2B): New form.
1206
1207 * d30v.h (SHORT_A2): New form.
1208
1209 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1210 registers are used. Needed for VLIW optimization.
1211
1212 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1213
1214 * cgen.h: Move assembler interface section
1215 up so cgen_parse_operand_result is defined for cgen_parse_address.
1216 (cgen_parse_address): Update prototype.
1217
1218 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1219
1220 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1221
1222 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1223
1224 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1225 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1226 <paubert@iram.es>.
1227
1228 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1229 <paubert@iram.es>.
1230
1231 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1232 <paubert@iram.es>.
1233
1234 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1235 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1236
1237 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1238
1239 * v850.h (V850_NOT_R0): New flag.
1240
1241 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1242
1243 * v850.h (struct v850_opcode): Remove flags field.
1244
1245 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1246
1247 * v850.h (struct v850_opcode): Add flags field.
1248 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1249 fields.
1250 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1251 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1252
1253 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1254
1255 * arc.h: New file.
1256
1257 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1258
1259 * sparc.h (sparc_opcodes): Declare as const.
1260
1261 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1262
1263 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1264 uses single or double precision floating point resources.
1265 (INSN_NO_ISA, INSN_ISA1): Define.
1266 (cpu specific INSN macros): Tweak into bitmasks outside the range
1267 of INSN_ISA field.
1268
1269 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1270
1271 * i386.h: Fix pand opcode.
1272
1273 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1274
1275 * mips.h: Widen INSN_ISA and move it to a more convenient
1276 bit position. Add INSN_3900.
1277
1278 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1279
1280 * mips.h (struct mips_opcode): added new field membership.
1281
1282 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1283
1284 * i386.h (movd): only Reg32 is allowed.
1285
1286 * i386.h: add fcomp and ud2. From Wayne Scott
1287 <wscott@ichips.intel.com>.
1288
1289 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1290
1291 * i386.h: Add MMX instructions.
1292
1293 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1294
1295 * i386.h: Remove W modifier from conditional move instructions.
1296
1297 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1298
1299 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1300 with no arguments to match that generated by the UnixWare
1301 assembler.
1302
1303 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1304
1305 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1306 (cgen_parse_operand_fn): Declare.
1307 (cgen_init_parse_operand): Declare.
1308 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1309 new argument `want'.
1310 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1311 (enum cgen_parse_operand_type): New enum.
1312
1313 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1314
1315 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1316
1317 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1318
1319 * cgen.h: New file.
1320
1321 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1322
1323 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1324 fdivrp.
1325
1326 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1327
1328 * v850.h (extract): Make unsigned.
1329
1330 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1331
1332 * i386.h: Add iclr.
1333
1334 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1335
1336 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1337 take a direction bit.
1338
1339 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1340
1341 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1342
1343 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1344
1345 * sparc.h: Include <ansidecl.h>. Update function declarations to
1346 use prototypes, and to use const when appropriate.
1347
1348 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1349
1350 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1351
1352 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1353
1354 * d10v.h: Change pre_defined_registers to
1355 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1356
1357 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1358
1359 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1360 Change mips_opcodes from const array to a pointer,
1361 and change bfd_mips_num_opcodes from const int to int,
1362 so that we can increase the size of the mips opcodes table
1363 dynamically.
1364
1365 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1366
1367 * d30v.h (FLAG_X): Remove unused flag.
1368
1369 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1370
1371 * d30v.h: New file.
1372
1373 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1374
1375 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1376 (PDS_VALUE): Macro to access value field of predefined symbols.
1377 (tic80_next_predefined_symbol): Add prototype.
1378
1379 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1380
1381 * tic80.h (tic80_symbol_to_value): Change prototype to match
1382 change in function, added class parameter.
1383
1384 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1385
1386 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1387 endmask fields, which are somewhat weird in that 0 and 32 are
1388 treated exactly the same.
1389
1390 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1391
1392 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1393 rather than a constant that is 2**X. Reorder them to put bits for
1394 operands that have symbolic names in the upper bits, so they can
1395 be packed into an int where the lower bits contain the value that
1396 corresponds to that symbolic name.
1397 (predefined_symbo): Add struct.
1398 (tic80_predefined_symbols): Declare array of translations.
1399 (tic80_num_predefined_symbols): Declare size of that array.
1400 (tic80_value_to_symbol): Declare function.
1401 (tic80_symbol_to_value): Declare function.
1402
1403 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1404
1405 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1406
1407 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1408
1409 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1410 be the destination register.
1411
1412 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1413
1414 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1415 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1416 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1417 that the opcode can have two vector instructions in a single
1418 32 bit word and we have to encode/decode both.
1419
1420 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1421
1422 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1423 TIC80_OPERAND_RELATIVE for PC relative.
1424 (TIC80_OPERAND_BASEREL): New flag bit for register
1425 base relative.
1426
1427 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1428
1429 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1430
1431 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1432
1433 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1434 ":s" modifier for scaling.
1435
1436 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1437
1438 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1439 (TIC80_OPERAND_M_LI): Ditto
1440
1441 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1442
1443 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1444 (TIC80_OPERAND_CC): New define for condition code operand.
1445 (TIC80_OPERAND_CR): New define for control register operand.
1446
1447 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1448
1449 * tic80.h (struct tic80_opcode): Name changed.
1450 (struct tic80_opcode): Remove format field.
1451 (struct tic80_operand): Add insertion and extraction functions.
1452 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1453 correct ones.
1454 (FMT_*): Ditto.
1455
1456 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1457
1458 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1459 type IV instruction offsets.
1460
1461 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1462
1463 * tic80.h: New file.
1464
1465 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1466
1467 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1468
1469 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1470
1471 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1472 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1473 * v850.h: Fix comment, v850_operand not powerpc_operand.
1474
1475 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1476
1477 * mn10200.h: Flesh out structures and definitions needed by
1478 the mn10200 assembler & disassembler.
1479
1480 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1481
1482 * mips.h: Add mips16 definitions.
1483
1484 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1485
1486 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1487
1488 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1489
1490 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1491 (MN10300_OPERAND_MEMADDR): Define.
1492
1493 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1494
1495 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1496
1497 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1498
1499 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1500
1501 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1502
1503 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1504
1505 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1506
1507 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1508
1509 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1510
1511 * alpha.h: Don't include "bfd.h"; private relocation types are now
1512 negative to minimize problems with shared libraries. Organize
1513 instruction subsets by AMASK extensions and PALcode
1514 implementation.
1515 (struct alpha_operand): Move flags slot for better packing.
1516
1517 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1518
1519 * v850.h (V850_OPERAND_RELAX): New operand flag.
1520
1521 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1522
1523 * mn10300.h (FMT_*): Move operand format definitions
1524 here.
1525
1526 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1527
1528 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1529
1530 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1531
1532 * mn10300.h (mn10300_opcode): Add "format" field.
1533 (MN10300_OPERAND_*): Define.
1534
1535 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1536
1537 * mn10x00.h: Delete.
1538 * mn10200.h, mn10300.h: New files.
1539
1540 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1541
1542 * mn10x00.h: New file.
1543
1544 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1545
1546 * v850.h: Add new flag to indicate this instruction uses a PC
1547 displacement.
1548
1549 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1550
1551 * h8300.h (stmac): Add missing instruction.
1552
1553 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1554
1555 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1556 field.
1557
1558 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1559
1560 * v850.h (V850_OPERAND_EP): Define.
1561
1562 * v850.h (v850_opcode): Add size field.
1563
1564 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1565
1566 * v850.h (v850_operands): Add insert and extract fields, pointers
1567 to functions used to handle unusual operand encoding.
1568 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1569 V850_OPERAND_SIGNED): Defined.
1570
1571 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1572
1573 * v850.h (v850_operands): Add flags field.
1574 (OPERAND_REG, OPERAND_NUM): Defined.
1575
1576 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1577
1578 * v850.h: New file.
1579
1580 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1581
1582 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1583 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1584 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1585 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1586 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1587 Defined.
1588
1589 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1590
1591 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1592 a 3 bit space id instead of a 2 bit space id.
1593
1594 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1595
1596 * d10v.h: Add some additional defines to support the
1597 assembler in determining which operations can be done in parallel.
1598
1599 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1600
1601 * h8300.h (SN): Define.
1602 (eepmov.b): Renamed from "eepmov"
1603 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1604 with them.
1605
1606 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1607
1608 * d10v.h (OPERAND_SHIFT): New operand flag.
1609
1610 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1611
1612 * d10v.h: Changes for divs, parallel-only instructions, and
1613 signed numbers.
1614
1615 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1616
1617 * d10v.h (pd_reg): Define. Putting the definition here allows
1618 the assembler and disassembler to share the same struct.
1619
1620 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1621
1622 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1623 Williams <steve@icarus.com>.
1624
1625 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1626
1627 * d10v.h: New file.
1628
1629 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1630
1631 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1632
1633 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1634
1635 * m68k.h (mcf5200): New macro.
1636 Document names of coldfire control registers.
1637
1638 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1639
1640 * h8300.h (SRC_IN_DST): Define.
1641
1642 * h8300.h (UNOP3): Mark the register operand in this insn
1643 as a source operand, not a destination operand.
1644 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1645 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1646 register operand with SRC_IN_DST.
1647
1648 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1649
1650 * alpha.h: New file.
1651
1652 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1653
1654 * rs6k.h: Remove obsolete file.
1655
1656 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1657
1658 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1659 fdivp, and fdivrp. Add ffreep.
1660
1661 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1662
1663 * h8300.h: Reorder various #defines for readability.
1664 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1665 (BITOP): Accept additional (unused) argument. All callers changed.
1666 (EBITOP): Likewise.
1667 (O_LAST): Bump.
1668 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1669
1670 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1671 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1672 (BITOP, EBITOP): Handle new H8/S addressing modes for
1673 bit insns.
1674 (UNOP3): Handle new shift/rotate insns on the H8/S.
1675 (insns using exr): New instructions.
1676 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1677
1678 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1679
1680 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1681 was incorrect.
1682
1683 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1684
1685 * h8300.h (START): Remove.
1686 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1687 and mov.l insns that can be relaxed.
1688
1689 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1690
1691 * i386.h: Remove Abs32 from lcall.
1692
1693 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1694
1695 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1696 (SLCPOP): New macro.
1697 Mark X,Y opcode letters as in use.
1698
1699 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1700
1701 * sparc.h (F_FLOAT, F_FBR): Define.
1702
1703 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1704
1705 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1706 from all insns.
1707 (ABS8SRC,ABS8DST): Add ABS8MEM.
1708 (add.l): Fix reg+reg variant.
1709 (eepmov.w): Renamed from eepmovw.
1710 (ldc,stc): Fix many cases.
1711
1712 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1713
1714 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1715
1716 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1717
1718 * sparc.h (O): Mark operand letter as in use.
1719
1720 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1721
1722 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1723 Mark operand letters uU as in use.
1724
1725 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1726
1727 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1728 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1729 (SPARC_OPCODE_SUPPORTED): New macro.
1730 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1731 (F_NOTV9): Delete.
1732
1733 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1734
1735 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1736 declaration consistent with return type in definition.
1737
1738 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1739
1740 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1741
1742 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1743
1744 * i386.h (i386_regtab): Add 80486 test registers.
1745
1746 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1747
1748 * i960.h (I_HX): Define.
1749 (i960_opcodes): Add HX instruction.
1750
1751 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1752
1753 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1754 and fclex.
1755
1756 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1757
1758 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1759 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1760 (bfd_* defines): Delete.
1761 (sparc_opcode_archs): Replaces architecture_pname.
1762 (sparc_opcode_lookup_arch): Declare.
1763 (NUMOPCODES): Delete.
1764
1765 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1766
1767 * sparc.h (enum sparc_architecture): Add v9a.
1768 (ARCHITECTURES_CONFLICT_P): Update.
1769
1770 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1771
1772 * i386.h: Added Pentium Pro instructions.
1773
1774 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1775
1776 * m68k.h: Document new 'W' operand place.
1777
1778 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1779
1780 * hppa.h: Add lci and syncdma instructions.
1781
1782 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1783
1784 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1785 instructions.
1786
1787 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1788
1789 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1790 assembler's -mcom and -many switches.
1791
1792 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1793
1794 * i386.h: Fix cmpxchg8b extension opcode description.
1795
1796 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1797
1798 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1799 and register cr4.
1800
1801 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1802
1803 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1804
1805 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1806
1807 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1808
1809 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1810
1811 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1812
1813 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1814
1815 * m68kmri.h: Remove.
1816
1817 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1818 declarations. Remove F_ALIAS and flag field of struct
1819 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1820 int. Make name and args fields of struct m68k_opcode const.
1821
1822 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1823
1824 * sparc.h (F_NOTV9): Define.
1825
1826 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1827
1828 * mips.h (INSN_4010): Define.
1829
1830 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1831
1832 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1833
1834 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1835 * m68k.h: Fix argument descriptions of coprocessor
1836 instructions to allow only alterable operands where appropriate.
1837 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1838 (m68k_opcode_aliases): Add more aliases.
1839
1840 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1841
1842 * m68k.h: Added explcitly short-sized conditional branches, and a
1843 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1844 svr4-based configurations.
1845
1846 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1847
1848 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1849 * i386.h: added missing Data16/Data32 flags to a few instructions.
1850
1851 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1852
1853 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1854 (OP_MASK_BCC, OP_SH_BCC): Define.
1855 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1856 (OP_MASK_CCC, OP_SH_CCC): Define.
1857 (INSN_READ_FPR_R): Define.
1858 (INSN_RFE): Delete.
1859
1860 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1861
1862 * m68k.h (enum m68k_architecture): Deleted.
1863 (struct m68k_opcode_alias): New type.
1864 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1865 matching constraints, values and flags. As a side effect of this,
1866 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1867 as I know were never used, now may need re-examining.
1868 (numopcodes): Now const.
1869 (m68k_opcode_aliases, numaliases): New variables.
1870 (endop): Deleted.
1871 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1872 m68k_opcode_aliases; update declaration of m68k_opcodes.
1873
1874 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1875
1876 * hppa.h (delay_type): Delete unused enumeration.
1877 (pa_opcode): Replace unused delayed field with an architecture
1878 field.
1879 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1880
1881 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1882
1883 * mips.h (INSN_ISA4): Define.
1884
1885 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1886
1887 * mips.h (M_DLA_AB, M_DLI): Define.
1888
1889 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1890
1891 * hppa.h (fstwx): Fix single-bit error.
1892
1893 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1894
1895 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1896
1897 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1898
1899 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1900 debug registers. From Charles Hannum (mycroft@netbsd.org).
1901
1902 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1903
1904 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1905 i386 support:
1906 * i386.h (MOV_AX_DISP32): New macro.
1907 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1908 of several call/return instructions.
1909 (ADDR_PREFIX_OPCODE): New macro.
1910
1911 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1912
1913 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1914
1915 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1916 char.
1917 (struct vot, field `name'): ditto.
1918
1919 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1920
1921 * vax.h: Supply and properly group all values in end sentinel.
1922
1923 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1924
1925 * mips.h (INSN_ISA, INSN_4650): Define.
1926
1927 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1928
1929 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1930 systems with a separate instruction and data cache, such as the
1931 29040, these instructions take an optional argument.
1932
1933 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1934
1935 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1936 INSN_TRAP.
1937
1938 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1939
1940 * mips.h (INSN_STORE_MEMORY): Define.
1941
1942 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1943
1944 * sparc.h: Document new operand type 'x'.
1945
1946 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1947
1948 * i960.h (I_CX2): New instruction category. It includes
1949 instructions available on Cx and Jx processors.
1950 (I_JX): New instruction category, for JX-only instructions.
1951 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1952 Jx-only instructions, in I_JX category.
1953
1954 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1955
1956 * ns32k.h (endop): Made pointer const too.
1957
1958 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1959
1960 * ns32k.h: Drop Q operand type as there is no correct use
1961 for it. Add I and Z operand types which allow better checking.
1962
1963 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1964
1965 * h8300.h (xor.l) :fix bit pattern.
1966 (L_2): New size of operand.
1967 (trapa): Use it.
1968
1969 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1970
1971 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1972
1973 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1974
1975 * sparc.h: Include v9 definitions.
1976
1977 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1978
1979 * m68k.h (m68060): Defined.
1980 (m68040up, mfloat, mmmu): Include it.
1981 (struct m68k_opcode): Widen `arch' field.
1982 (m68k_opcodes): Updated for M68060. Removed comments that were
1983 instructions commented out by "JF" years ago.
1984
1985 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1986
1987 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1988 add a one-bit `flags' field.
1989 (F_ALIAS): New macro.
1990
1991 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1992
1993 * h8300.h (dec, inc): Get encoding right.
1994
1995 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1996
1997 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1998 a flag instead.
1999 (PPC_OPERAND_SIGNED): Define.
2000 (PPC_OPERAND_SIGNOPT): Define.
2001
2002 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2003
2004 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2005 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2006
2007 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2008
2009 * i386.h: Reverse last change. It'll be handled in gas instead.
2010
2011 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2012
2013 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2014 slower on the 486 and used the implicit shift count despite the
2015 explicit operand. The one-operand form is still available to get
2016 the shorter form with the implicit shift count.
2017
2018 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2019
2020 * hppa.h: Fix typo in fstws arg string.
2021
2022 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2023
2024 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2025
2026 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2027
2028 * ppc.h (PPC_OPCODE_601): Define.
2029
2030 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2031
2032 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2033 (so we can determine valid completers for both addb and addb[tf].)
2034
2035 * hppa.h (xmpyu): No floating point format specifier for the
2036 xmpyu instruction.
2037
2038 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2039
2040 * ppc.h (PPC_OPERAND_NEXT): Define.
2041 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2042 (struct powerpc_macro): Define.
2043 (powerpc_macros, powerpc_num_macros): Declare.
2044
2045 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2046
2047 * ppc.h: New file. Header file for PowerPC opcode table.
2048
2049 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2050
2051 * hppa.h: More minor template fixes for sfu and copr (to allow
2052 for easier disassembly).
2053
2054 * hppa.h: Fix templates for all the sfu and copr instructions.
2055
2056 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2057
2058 * i386.h (push): Permit Imm16 operand too.
2059
2060 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2061
2062 * h8300.h (andc): Exists in base arch.
2063
2064 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2065
2066 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2067 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2068
2069 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2070
2071 * hppa.h: Add FP quadword store instructions.
2072
2073 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2074
2075 * mips.h: (M_J_A): Added.
2076 (M_LA): Removed.
2077
2078 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2079
2080 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2081 <mellon@pepper.ncd.com>.
2082
2083 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2084
2085 * hppa.h: Immediate field in probei instructions is unsigned,
2086 not low-sign extended.
2087
2088 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2089
2090 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2091
2092 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2093
2094 * i386.h: Add "fxch" without operand.
2095
2096 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2097
2098 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2099
2100 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2101
2102 * hppa.h: Add gfw and gfr to the opcode table.
2103
2104 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2105
2106 * m88k.h: extended to handle m88110.
2107
2108 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2109
2110 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2111 addresses.
2112
2113 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2114
2115 * i960.h (i960_opcodes): Properly bracket initializers.
2116
2117 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2118
2119 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2120
2121 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2122
2123 * m68k.h (two): Protect second argument with parentheses.
2124
2125 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2126
2127 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2128 Deleted old in/out instructions in "#if 0" section.
2129
2130 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2131
2132 * i386.h (i386_optab): Properly bracket initializers.
2133
2134 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2135
2136 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2137 Jeff Law, law@cs.utah.edu).
2138
2139 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2140
2141 * i386.h (lcall): Accept Imm32 operand also.
2142
2143 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2144
2145 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2146 (M_DABS): Added.
2147
2148 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2149
2150 * mips.h (INSN_*): Changed values. Removed unused definitions.
2151 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2152 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2153 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2154 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2155 (M_*): Added new values for r6000 and r4000 macros.
2156 (ANY_DELAY): Removed.
2157
2158 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2159
2160 * mips.h: Added M_LI_S and M_LI_SS.
2161
2162 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2163
2164 * h8300.h: Get some rare mov.bs correct.
2165
2166 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2167
2168 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2169 been included.
2170
2171 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2172
2173 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2174 jump instructions, for use in disassemblers.
2175
2176 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2177
2178 * m88k.h: Make bitfields just unsigned, not unsigned long or
2179 unsigned short.
2180
2181 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2182
2183 * hppa.h: New argument type 'y'. Use in various float instructions.
2184
2185 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2186
2187 * hppa.h (break): First immediate field is unsigned.
2188
2189 * hppa.h: Add rfir instruction.
2190
2191 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2192
2193 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2194
2195 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2196
2197 * mips.h: Reworked the hazard information somewhat, and fixed some
2198 bugs in the instruction hazard descriptions.
2199
2200 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2201
2202 * m88k.h: Corrected a couple of opcodes.
2203
2204 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2205
2206 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2207 new version includes instruction hazard information, but is
2208 otherwise reasonably similar.
2209
2210 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2211
2212 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2213
2214 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2215
2216 Patches from Jeff Law, law@cs.utah.edu:
2217 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2218 Make the tables be the same for the following instructions:
2219 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2220 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2221 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2222 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2223 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2224 "fcmp", and "ftest".
2225
2226 * hppa.h: Make new and old tables the same for "break", "mtctl",
2227 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2228 Fix typo in last patch. Collapse several #ifdefs into a
2229 single #ifdef.
2230
2231 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2232 of the comments up-to-date.
2233
2234 * hppa.h: Update "free list" of letters and update
2235 comments describing each letter's function.
2236
2237 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2238
2239 * h8300.h: Lots of little fixes for the h8/300h.
2240
2241 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2242
2243 Support for H8/300-H
2244 * h8300.h: Lots of new opcodes.
2245
2246 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2247
2248 * h8300.h: checkpoint, includes H8/300-H opcodes.
2249
2250 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2251
2252 * Patches from Jeffrey Law <law@cs.utah.edu>.
2253 * hppa.h: Rework single precision FP
2254 instructions so that they correctly disassemble code
2255 PA1.1 code.
2256
2257 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2258
2259 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2260 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2261
2262 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2263
2264 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2265 gdb will define it for now.
2266
2267 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2268
2269 * sparc.h: Don't end enumerator list with comma.
2270
2271 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2272
2273 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2274 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2275 ("bc2t"): Correct typo.
2276 ("[ls]wc[023]"): Use T rather than t.
2277 ("c[0123]"): Define general coprocessor instructions.
2278
2279 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2280
2281 * m68k.h: Move split point for gcc compilation more towards
2282 middle.
2283
2284 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2285
2286 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2287 simply wrong, ics, rfi, & rfsvc were missing).
2288 Add "a" to opr_ext for "bb". Doc fix.
2289
2290 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2291
2292 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2293 * mips.h: Add casts, to suppress warnings about shifting too much.
2294 * m68k.h: Document the placement code '9'.
2295
2296 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2297
2298 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2299 allows callers to break up the large initialized struct full of
2300 opcodes into two half-sized ones. This permits GCC to compile
2301 this module, since it takes exponential space for initializers.
2302 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2303
2304 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2305
2306 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2307 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2308 initialized structs in it.
2309
2310 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2311
2312 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2313 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2314 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2315
2316 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2317
2318 * mips.h: document "i" and "j" operands correctly.
2319
2320 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2321
2322 * mips.h: Removed endianness dependency.
2323
2324 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2325
2326 * h8300.h: include info on number of cycles per instruction.
2327
2328 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2329
2330 * hppa.h: Move handy aliases to the front. Fix masks for extract
2331 and deposit instructions.
2332
2333 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2334
2335 * i386.h: accept shld and shrd both with and without the shift
2336 count argument, which is always %cl.
2337
2338 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2339
2340 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2341 (one_byte_segment_defaults, two_byte_segment_defaults,
2342 i386_prefixtab_end): Ditto.
2343
2344 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2345
2346 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2347 for operand 2; from John Carr, jfc@dsg.dec.com.
2348
2349 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2350
2351 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2352 always use 16-bit offsets. Makes calculated-size jump tables
2353 feasible.
2354
2355 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2356
2357 * i386.h: Fix one-operand forms of in* and out* patterns.
2358
2359 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2360
2361 * m68k.h: Added CPU32 support.
2362
2363 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2364
2365 * mips.h (break): Disassemble the argument. Patch from
2366 jonathan@cs.stanford.edu (Jonathan Stone).
2367
2368 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2369
2370 * m68k.h: merged Motorola and MIT syntax.
2371
2372 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2373
2374 * m68k.h (pmove): make the tests less strict, the 68k book is
2375 wrong.
2376
2377 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2378
2379 * m68k.h (m68ec030): Defined as alias for 68030.
2380 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2381 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2382 them. Tightened description of "fmovex" to distinguish it from
2383 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2384 up descriptions that claimed versions were available for chips not
2385 supporting them. Added "pmovefd".
2386
2387 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2388
2389 * m68k.h: fix where the . goes in divull
2390
2391 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2392
2393 * m68k.h: the cas2 instruction is supposed to be written with
2394 indirection on the last two operands, which can be either data or
2395 address registers. Added a new operand type 'r' which accepts
2396 either register type. Added new cases for cas2l and cas2w which
2397 use them. Corrected masks for cas2 which failed to recognize use
2398 of address register.
2399
2400 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2401
2402 * m68k.h: Merged in patches (mostly m68040-specific) from
2403 Colin Smith <colin@wrs.com>.
2404
2405 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2406 base). Also cleaned up duplicates, re-ordered instructions for
2407 the sake of dis-assembling (so aliases come after standard names).
2408 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2409
2410 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2411
2412 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2413 all missing .s
2414
2415 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2416
2417 * sparc.h: Moved tables to BFD library.
2418
2419 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2420
2421 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2422
2423 * h8300.h: Finish filling in all the holes in the opcode table,
2424 so that the Lucid C compiler can digest this as well...
2425
2426 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2427
2428 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2429 Fix opcodes on various sizes of fild/fist instructions
2430 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2431 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2432
2433 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2434
2435 * h8300.h: Fill in all the holes in the opcode table so that the
2436 losing HPUX C compiler can digest this...
2437
2438 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2439
2440 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2441 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2442
2443 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2444
2445 * sparc.h: Add new architecture variant sparclite; add its scan
2446 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2447
2448 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2449
2450 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2451 fy@lucid.com).
2452
2453 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2454
2455 * rs6k.h: New version from IBM (Metin).
2456
2457 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2458
2459 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2460 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2461
2462 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2463
2464 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2465
2466 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2467
2468 * m68k.h (one, two): Cast macro args to unsigned to suppress
2469 complaints from compiler and lint about integer overflow during
2470 shift.
2471
2472 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2473
2474 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2475
2476 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2477
2478 * mips.h: Make bitfield layout depend on the HOST compiler,
2479 not on the TARGET system.
2480
2481 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2482
2483 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2484 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2485 <TRANLE@INTELLICORP.COM>.
2486
2487 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2488
2489 * h8300.h: turned op_type enum into #define list
2490
2491 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2492
2493 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2494 similar instructions -- they've been renamed to "fitoq", etc.
2495 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2496 number of arguments.
2497 * h8300.h: Remove extra ; which produces compiler warning.
2498
2499 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2500
2501 * sparc.h: fix opcode for tsubcctv.
2502
2503 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2504
2505 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2506
2507 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2508
2509 * sparc.h (nop): Made the 'lose' field be even tighter,
2510 so only a standard 'nop' is disassembled as a nop.
2511
2512 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2513
2514 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2515 disassembled as a nop.
2516
2517 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2518
2519 * m68k.h, sparc.h: ANSIfy enums.
2520
2521 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2522
2523 * sparc.h: fix a typo.
2524
2525 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2526
2527 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2528 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2529 vax.h: Renamed from ../<foo>-opcode.h.
2530
2531 \f
2532 Local Variables:
2533 version-control: never
2534 End:
This page took 0.082135 seconds and 4 git commands to generate.