Fix register name printed in warning message.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-03-19 Alan Modra <alan@linuxcare.com.au>
2
3 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
4
5 2001-02-28 Igor Shevlyakov <igor@windriver.com>
6
7 * m68k.h: new defines for Coldfire V4. Update mcf to know
8 about mcf5407.
9
10 2001-02-18 lars brinkhoff <lars@nocrew.org>
11
12 * pdp11.h: New file.
13
14 2001-02-12 Jan Hubicka <jh@suse.cz>
15
16 * i386.h (i386_optab): SSE integer converison instructions have
17 64bit versions on x86-64.
18
19 2001-02-10 Nick Clifton <nickc@redhat.com>
20
21 * mips.h: Remove extraneous whitespace. Formating change to allow
22 for future contribution.
23
24 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
25
26 * s390.h: New file.
27
28 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
29
30 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
31 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
32 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
33
34 2001-01-24 Karsten Keil <kkeil@suse.de>
35
36 * i386.h (i386_optab): Fix swapgs
37
38 2001-01-14 Alan Modra <alan@linuxcare.com.au>
39
40 * hppa.h: Describe new '<' and '>' operand types, and tidy
41 existing comments.
42 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
43 Remove duplicate "ldw j(s,b),x". Sort some entries.
44
45 2001-01-13 Jan Hubicka <jh@suse.cz>
46
47 * i386.h (i386_optab): Fix pusha and ret templates.
48
49 2001-01-11 Peter Targett <peter.targett@arccores.com>
50
51 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
52 definitions for masking cpu type.
53 (arc_ext_operand_value) New structure for storing extended
54 operands.
55 (ARC_OPERAND_*) Flags for operand values.
56
57 2001-01-10 Jan Hubicka <jh@suse.cz>
58
59 * i386.h (pinsrw): Add.
60 (pshufw): Remove.
61 (cvttpd2dq): Fix operands.
62 (cvttps2dq): Likewise.
63 (movq2q): Rename to movdq2q.
64
65 2001-01-10 Richard Schaal <richard.schaal@intel.com>
66
67 * i386.h: Correct movnti instruction.
68
69 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
70
71 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
72 of operands (unsigned char or unsigned short).
73 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
74 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
75
76 2001-01-05 Jan Hubicka <jh@suse.cz>
77
78 * i386.h (i386_optab): Make [sml]fence template to use immext field.
79
80 2001-01-03 Jan Hubicka <jh@suse.cz>
81
82 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
83 introduced by Pentium4
84
85 2000-12-30 Jan Hubicka <jh@suse.cz>
86
87 * i386.h (i386_optab): Add "rex*" instructions;
88 add swapgs; disable jmp/call far direct instructions for
89 64bit mode; add syscall and sysret; disable registers for 0xc6
90 template. Add 'q' suffixes to extendable instructions, disable
91 obsolete instructions, add new sign/zero extension ones.
92 (i386_regtab): Add extended registers.
93 (*Suf): Add No_qSuf.
94 (q_Suf, wlq_Suf, bwlq_Suf): New.
95
96 2000-12-20 Jan Hubicka <jh@suse.cz>
97
98 * i386.h (i386_optab): Replace "Imm" with "EncImm".
99 (i386_regtab): Add flags field.
100
101 2000-12-12 Nick Clifton <nickc@redhat.com>
102
103 * mips.h: Fix formatting.
104
105 2000-12-01 Chris Demetriou <cgd@sibyte.com>
106
107 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
108 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
109 OP_*_SYSCALL definitions.
110 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
111 19 bit wait codes.
112 (MIPS operand specifier comments): Remove 'm', add 'U' and
113 'J', and update the meaning of 'B' so that it's more general.
114
115 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
116 INSN_ISA5): Renumber, redefine to mean the ISA at which the
117 instruction was added.
118 (INSN_ISA32): New constant.
119 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
120 Renumber to avoid new and/or renumbered INSN_* constants.
121 (INSN_MIPS32): Delete.
122 (ISA_UNKNOWN): New constant to indicate unknown ISA.
123 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
124 ISA_MIPS32): New constants, defined to be the mask of INSN_*
125 constants available at that ISA level.
126 (CPU_UNKNOWN): New constant to indicate unknown CPU.
127 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
128 define it with a unique value.
129 (OPCODE_IS_MEMBER): Update for new ISA membership-related
130 constant meanings.
131
132 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
133 definitions.
134
135 * mips.h (CPU_SB1): New constant.
136
137 2000-10-20 Jakub Jelinek <jakub@redhat.com>
138
139 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
140 Note that '3' is used for siam operand.
141
142 2000-09-22 Jim Wilson <wilson@cygnus.com>
143
144 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
145
146 2000-09-13 Anders Norlander <anorland@acc.umu.se>
147
148 * mips.h: Use defines instead of hard-coded processor numbers.
149 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
150 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
151 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
152 CPU_4KC, CPU_4KM, CPU_4KP): Define..
153 (OPCODE_IS_MEMBER): Use new defines.
154 (OP_MASK_SEL, OP_SH_SEL): Define.
155 (OP_MASK_CODE20, OP_SH_CODE20): Define.
156 Add 'P' to used characters.
157 Use 'H' for coprocessor select field.
158 Use 'm' for 20 bit breakpoint code.
159 Document new arg characters and add to used characters.
160 (INSN_MIPS32): New define for MIPS32 extensions.
161 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
162
163 2000-09-05 Alan Modra <alan@linuxcare.com.au>
164
165 * hppa.h: Mention cz completer.
166
167 2000-08-16 Jim Wilson <wilson@cygnus.com>
168
169 * ia64.h (IA64_OPCODE_POSTINC): New.
170
171 2000-08-15 H.J. Lu <hjl@gnu.org>
172
173 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
174 IgnoreSize change.
175
176 2000-08-08 Jason Eckhardt <jle@cygnus.com>
177
178 * i860.h: Small formatting adjustments.
179
180 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
181
182 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
183 Move related opcodes closer to each other.
184 Minor changes in comments, list undefined opcodes.
185
186 2000-07-26 Dave Brolley <brolley@redhat.com>
187
188 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
189
190 2000-07-22 Jason Eckhardt <jle@cygnus.com>
191
192 * i860.h (btne, bte, bla): Changed these opcodes
193 to use sbroff ('r') instead of split16 ('s').
194 (J, K, L, M): New operand types for 16-bit aligned fields.
195 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
196 use I, J, K, L, M instead of just I.
197 (T, U): New operand types for split 16-bit aligned fields.
198 (st.x): Changed these opcodes to use S, T, U instead of just S.
199 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
200 exist on the i860.
201 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
202 (pfeq.ss, pfeq.dd): New opcodes.
203 (st.s): Fixed incorrect mask bits.
204 (fmlow): Fixed incorrect mask bits.
205 (fzchkl, pfzchkl): Fixed incorrect mask bits.
206 (faddz, pfaddz): Fixed incorrect mask bits.
207 (form, pform): Fixed incorrect mask bits.
208 (pfld.l): Fixed incorrect mask bits.
209 (fst.q): Fixed incorrect mask bits.
210 (all floating point opcodes): Fixed incorrect mask bits for
211 handling of dual bit.
212
213 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
214
215 cris.h: New file.
216
217 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
218
219 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
220 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
221 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
222 (AVR_ISA_M83): Define for ATmega83, ATmega85.
223 (espm): Remove, because ESPM removed in databook update.
224 (eicall, eijmp): Move to the end of opcode table.
225
226 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
227
228 * m68hc11.h: New file for support of Motorola 68hc11.
229
230 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
231
232 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
233
234 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
235
236 * avr.h: New file with AVR opcodes.
237
238 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
239
240 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
241
242 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
243
244 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
245
246 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
247
248 * i386.h: Use sl_FP, not sl_Suf for fild.
249
250 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
251
252 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
253 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
254 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
255 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
256
257 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
258
259 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
260
261 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
262 Alexander Sokolov <robocop@netlink.ru>
263
264 * i386.h (i386_optab): Add cpu_flags for all instructions.
265
266 2000-05-13 Alan Modra <alan@linuxcare.com.au>
267
268 From Gavin Romig-Koch <gavin@cygnus.com>
269 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
270
271 2000-05-04 Timothy Wall <twall@cygnus.com>
272
273 * tic54x.h: New.
274
275 2000-05-03 J.T. Conklin <jtc@redback.com>
276
277 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
278 (PPC_OPERAND_VR): New operand flag for vector registers.
279
280 2000-05-01 Kazu Hirata <kazu@hxi.com>
281
282 * h8300.h (EOP): Add missing initializer.
283
284 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
285
286 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
287 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
288 New operand types l,y,&,fe,fE,fx added to support above forms.
289 (pa_opcodes): Replaced usage of 'x' as source/target for
290 floating point double-word loads/stores with 'fx'.
291
292 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
293 David Mosberger <davidm@hpl.hp.com>
294 Timothy Wall <twall@cygnus.com>
295 Jim Wilson <wilson@cygnus.com>
296
297 * ia64.h: New file.
298
299 2000-03-27 Nick Clifton <nickc@cygnus.com>
300
301 * d30v.h (SHORT_A1): Fix value.
302 (SHORT_AR): Renumber so that it is at the end of the list of short
303 instructions, not the end of the list of long instructions.
304
305 2000-03-26 Alan Modra <alan@linuxcare.com>
306
307 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
308 problem isn't really specific to Unixware.
309 (OLDGCC_COMPAT): Define.
310 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
311 destination %st(0).
312 Fix lots of comments.
313
314 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
315
316 * d30v.h:
317 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
318 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
319 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
320 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
321 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
322 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
323 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
324
325 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
326
327 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
328 fistpd without suffix.
329
330 2000-02-24 Nick Clifton <nickc@cygnus.com>
331
332 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
333 'signed_overflow_ok_p'.
334 Delete prototypes for cgen_set_flags() and cgen_get_flags().
335
336 2000-02-24 Andrew Haley <aph@cygnus.com>
337
338 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
339 (CGEN_CPU_TABLE): flags: new field.
340 Add prototypes for new functions.
341
342 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
343
344 * i386.h: Add some more UNIXWARE_COMPAT comments.
345
346 2000-02-23 Linas Vepstas <linas@linas.org>
347
348 * i370.h: New file.
349
350 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
351
352 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
353 cannot be combined in parallel with ADD/SUBppp.
354
355 2000-02-22 Andrew Haley <aph@cygnus.com>
356
357 * mips.h: (OPCODE_IS_MEMBER): Add comment.
358
359 1999-12-30 Andrew Haley <aph@cygnus.com>
360
361 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
362 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
363 insns.
364
365 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
366
367 * i386.h: Qualify intel mode far call and jmp with x_Suf.
368
369 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
370
371 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
372 indirect jumps and calls. Add FF/3 call for intel mode.
373
374 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
375
376 * mn10300.h: Add new operand types. Add new instruction formats.
377
378 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
379
380 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
381 instruction.
382
383 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
384
385 * mips.h (INSN_ISA5): New.
386
387 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
388
389 * mips.h (OPCODE_IS_MEMBER): New.
390
391 1999-10-29 Nick Clifton <nickc@cygnus.com>
392
393 * d30v.h (SHORT_AR): Define.
394
395 1999-10-18 Michael Meissner <meissner@cygnus.com>
396
397 * alpha.h (alpha_num_opcodes): Convert to unsigned.
398 (alpha_num_operands): Ditto.
399
400 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
401
402 * hppa.h (pa_opcodes): Add load and store cache control to
403 instructions. Add ordered access load and store.
404
405 * hppa.h (pa_opcode): Add new entries for addb and addib.
406
407 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
408
409 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
410
411 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
412
413 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
414
415 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
416
417 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
418 and "be" using completer prefixes.
419
420 * hppa.h (pa_opcodes): Add initializers to silence compiler.
421
422 * hppa.h: Update comments about character usage.
423
424 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
425
426 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
427 up the new fstw & bve instructions.
428
429 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
430
431 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
432 instructions.
433
434 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
435
436 * hppa.h (pa_opcodes): Add long offset double word load/store
437 instructions.
438
439 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
440 stores.
441
442 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
443
444 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
445
446 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
447
448 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
449
450 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
451
452 * hppa.h (pa_opcodes): Add support for "b,l".
453
454 * hppa.h (pa_opcodes): Add support for "b,gate".
455
456 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
457
458 * hppa.h (pa_opcodes): Use 'fX' for first register operand
459 in xmpyu.
460
461 * hppa.h (pa_opcodes): Fix mask for probe and probei.
462
463 * hppa.h (pa_opcodes): Fix mask for depwi.
464
465 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
466
467 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
468 an explicit output argument.
469
470 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
471
472 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
473 Add a few PA2.0 loads and store variants.
474
475 1999-09-04 Steve Chamberlain <sac@pobox.com>
476
477 * pj.h: New file.
478
479 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
480
481 * i386.h (i386_regtab): Move %st to top of table, and split off
482 other fp reg entries.
483 (i386_float_regtab): To here.
484
485 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
486
487 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
488 by 'f'.
489
490 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
491 Add supporting args.
492
493 * hppa.h: Document new completers and args.
494 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
495 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
496 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
497 pmenb and pmdis.
498
499 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
500 hshr, hsub, mixh, mixw, permh.
501
502 * hppa.h (pa_opcodes): Change completers in instructions to
503 use 'c' prefix.
504
505 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
506 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
507
508 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
509 fnegabs to use 'I' instead of 'F'.
510
511 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
512
513 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
514 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
515 Alphabetically sort PIII insns.
516
517 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
518
519 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
520
521 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
522
523 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
524 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
525
526 * hppa.h: Document 64 bit condition completers.
527
528 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
529
530 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
531
532 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
533
534 * i386.h (i386_optab): Add DefaultSize modifier to all insns
535 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
536 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
537
538 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
539 Jeff Law <law@cygnus.com>
540
541 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
542
543 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
544
545 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
546 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
547
548 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
549
550 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
551
552 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
553
554 * hppa.h (struct pa_opcode): Add new field "flags".
555 (FLAGS_STRICT): Define.
556
557 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
558 Jeff Law <law@cygnus.com>
559
560 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
561
562 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
563
564 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
565
566 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
567 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
568 flag to fcomi and friends.
569
570 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
571
572 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
573 integer logical instructions.
574
575 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
576
577 * m68k.h: Document new formats `E', `G', `H' and new places `N',
578 `n', `o'.
579
580 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
581 and new places `m', `M', `h'.
582
583 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
584
585 * hppa.h (pa_opcodes): Add several processor specific system
586 instructions.
587
588 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
589
590 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
591 "addb", and "addib" to be used by the disassembler.
592
593 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
594
595 * i386.h (ReverseModrm): Remove all occurences.
596 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
597 movmskps, pextrw, pmovmskb, maskmovq.
598 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
599 ignore the data size prefix.
600
601 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
602 Mostly stolen from Doug Ledford <dledford@redhat.com>
603
604 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
605
606 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
607
608 1999-04-14 Doug Evans <devans@casey.cygnus.com>
609
610 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
611 (CGEN_ATTR_TYPE): Update.
612 (CGEN_ATTR_MASK): Number booleans starting at 0.
613 (CGEN_ATTR_VALUE): Update.
614 (CGEN_INSN_ATTR): Update.
615
616 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
617
618 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
619 instructions.
620
621 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
622
623 * hppa.h (bb, bvb): Tweak opcode/mask.
624
625
626 1999-03-22 Doug Evans <devans@casey.cygnus.com>
627
628 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
629 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
630 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
631 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
632 Delete member max_insn_size.
633 (enum cgen_cpu_open_arg): New enum.
634 (cpu_open): Update prototype.
635 (cpu_open_1): Declare.
636 (cgen_set_cpu): Delete.
637
638 1999-03-11 Doug Evans <devans@casey.cygnus.com>
639
640 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
641 (CGEN_OPERAND_NIL): New macro.
642 (CGEN_OPERAND): New member `type'.
643 (@arch@_cgen_operand_table): Delete decl.
644 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
645 (CGEN_OPERAND_TABLE): New struct.
646 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
647 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
648 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
649 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
650 {get,set}_{int,vma}_operand.
651 (@arch@_cgen_cpu_open): New arg `isa'.
652 (cgen_set_cpu): Ditto.
653
654 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
655
656 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
657
658 1999-02-25 Doug Evans <devans@casey.cygnus.com>
659
660 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
661 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
662 enum cgen_hw_type.
663 (CGEN_HW_TABLE): New struct.
664 (hw_table): Delete declaration.
665 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
666 to table entry to enum.
667 (CGEN_OPINST): Ditto.
668 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
669
670 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
671
672 * alpha.h (AXP_OPCODE_EV6): New.
673 (AXP_OPCODE_NOPAL): Include it.
674
675 1999-02-09 Doug Evans <devans@casey.cygnus.com>
676
677 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
678 All uses updated. New members int_insn_p, max_insn_size,
679 parse_operand,insert_operand,extract_operand,print_operand,
680 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
681 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
682 extract_handlers,print_handlers.
683 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
684 (CGEN_ATTR_BOOL_OFFSET): New macro.
685 (CGEN_ATTR_MASK): Subtract it to compute bit number.
686 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
687 (cgen_opcode_handler): Renamed from cgen_base.
688 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
689 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
690 all uses updated.
691 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
692 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
693 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
694 (CGEN_OPCODE,CGEN_IBASE): New types.
695 (CGEN_INSN): Rewrite.
696 (CGEN_{ASM,DIS}_HASH*): Delete.
697 (init_opcode_table,init_ibld_table): Declare.
698 (CGEN_INSN_ATTR): New type.
699
700 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
701
702 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
703 (x_FP, d_FP, dls_FP, sldx_FP): Define.
704 Change *Suf definitions to include x and d suffixes.
705 (movsx): Use w_Suf and b_Suf.
706 (movzx): Likewise.
707 (movs): Use bwld_Suf.
708 (fld): Change ordering. Use sld_FP.
709 (fild): Add Intel Syntax equivalent of fildq.
710 (fst): Use sld_FP.
711 (fist): Use sld_FP.
712 (fstp): Use sld_FP. Add x_FP version.
713 (fistp): LLongMem version for Intel Syntax.
714 (fcom, fcomp): Use sld_FP.
715 (fadd, fiadd, fsub): Use sld_FP.
716 (fsubr): Use sld_FP.
717 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
718
719 1999-01-27 Doug Evans <devans@casey.cygnus.com>
720
721 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
722 CGEN_MODE_UINT.
723
724 1999-01-16 Jeffrey A Law (law@cygnus.com)
725
726 * hppa.h (bv): Fix mask.
727
728 1999-01-05 Doug Evans <devans@casey.cygnus.com>
729
730 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
731 (CGEN_ATTR): Use it.
732 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
733 (CGEN_ATTR_TABLE): New member dfault.
734
735 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
736
737 * mips.h (MIPS16_INSN_BRANCH): New.
738
739 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
740
741 The following is part of a change made by Edith Epstein
742 <eepstein@sophia.cygnus.com> as part of a project to merge in
743 changes by HP; HP did not create ChangeLog entries.
744
745 * hppa.h (completer_chars): list of chars to not put a space
746 after.
747
748 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
749
750 * i386.h (i386_optab): Permit w suffix on processor control and
751 status word instructions.
752
753 1998-11-30 Doug Evans <devans@casey.cygnus.com>
754
755 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
756 (struct cgen_keyword_entry): Ditto.
757 (struct cgen_operand): Ditto.
758 (CGEN_IFLD): New typedef, with associated access macros.
759 (CGEN_IFMT): New typedef, with associated access macros.
760 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
761 (CGEN_IVALUE): New typedef.
762 (struct cgen_insn): Delete const on syntax,attrs members.
763 `format' now points to format data. Type of `value' is now
764 CGEN_IVALUE.
765 (struct cgen_opcode_table): New member ifld_table.
766
767 1998-11-18 Doug Evans <devans@casey.cygnus.com>
768
769 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
770 (CGEN_OPERAND_INSTANCE): New member `attrs'.
771 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
772 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
773 (cgen_opcode_table): Update type of dis_hash fn.
774 (extract_operand): Update type of `insn_value' arg.
775
776 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
777
778 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
779
780 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
781
782 * mips.h (INSN_MULT): Added.
783
784 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
785
786 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
787
788 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
789
790 * cgen.h (CGEN_INSN_INT): New typedef.
791 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
792 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
793 (CGEN_INSN_BYTES_PTR): New typedef.
794 (CGEN_EXTRACT_INFO): New typedef.
795 (cgen_insert_fn,cgen_extract_fn): Update.
796 (cgen_opcode_table): New member `insn_endian'.
797 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
798 (insert_operand,extract_operand): Update.
799 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
800
801 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
802
803 * cgen.h (CGEN_ATTR_BOOLS): New macro.
804 (struct CGEN_HW_ENTRY): New member `attrs'.
805 (CGEN_HW_ATTR): New macro.
806 (struct CGEN_OPERAND_INSTANCE): New member `name'.
807 (CGEN_INSN_INVALID_P): New macro.
808
809 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
810
811 * hppa.h: Add "fid".
812
813 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
814
815 From Robert Andrew Dale <rob@nb.net>
816 * i386.h (i386_optab): Add AMD 3DNow! instructions.
817 (AMD_3DNOW_OPCODE): Define.
818
819 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
820
821 * d30v.h (EITHER_BUT_PREFER_MU): Define.
822
823 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
824
825 * cgen.h (cgen_insn): #if 0 out element `cdx'.
826
827 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
828
829 Move all global state data into opcode table struct, and treat
830 opcode table as something that is "opened/closed".
831 * cgen.h (CGEN_OPCODE_DESC): New type.
832 (all fns): New first arg of opcode table descriptor.
833 (cgen_set_parse_operand_fn): Add prototype.
834 (cgen_current_machine,cgen_current_endian): Delete.
835 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
836 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
837 dis_hash_table,dis_hash_table_entries.
838 (opcode_open,opcode_close): Add prototypes.
839
840 * cgen.h (cgen_insn): New element `cdx'.
841
842 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
843
844 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
845
846 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
847
848 * mn10300.h: Add "no_match_operands" field for instructions.
849 (MN10300_MAX_OPERANDS): Define.
850
851 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
852
853 * cgen.h (cgen_macro_insn_count): Declare.
854
855 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
856
857 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
858 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
859 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
860 set_{int,vma}_operand.
861
862 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
863
864 * mn10300.h: Add "machine" field for instructions.
865 (MN103, AM30): Define machine types.
866
867 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
868
869 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
870
871 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
872
873 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
874
875 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
876
877 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
878 and ud2b.
879 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
880 those that happen to be implemented on pentiums.
881
882 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
883
884 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
885 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
886 with Size16|IgnoreSize or Size32|IgnoreSize.
887
888 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
889
890 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
891 (REPE): Rename to REPE_PREFIX_OPCODE.
892 (i386_regtab_end): Remove.
893 (i386_prefixtab, i386_prefixtab_end): Remove.
894 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
895 of md_begin.
896 (MAX_OPCODE_SIZE): Define.
897 (i386_optab_end): Remove.
898 (sl_Suf): Define.
899 (sl_FP): Use sl_Suf.
900
901 * i386.h (i386_optab): Allow 16 bit displacement for `mov
902 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
903 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
904 data32, dword, and adword prefixes.
905 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
906 regs.
907
908 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
909
910 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
911
912 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
913 register operands, because this is a common idiom. Flag them with
914 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
915 fdivrp because gcc erroneously generates them. Also flag with a
916 warning.
917
918 * i386.h: Add suffix modifiers to most insns, and tighter operand
919 checks in some cases. Fix a number of UnixWare compatibility
920 issues with float insns. Merge some floating point opcodes, using
921 new FloatMF modifier.
922 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
923 consistency.
924
925 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
926 IgnoreDataSize where appropriate.
927
928 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
929
930 * i386.h: (one_byte_segment_defaults): Remove.
931 (two_byte_segment_defaults): Remove.
932 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
933
934 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
935
936 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
937 (cgen_hw_lookup_by_num): Declare.
938
939 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
940
941 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
942 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
943
944 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
945
946 * cgen.h (cgen_asm_init_parse): Delete.
947 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
948 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
949
950 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
951
952 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
953 (cgen_asm_finish_insn): Update prototype.
954 (cgen_insn): New members num, data.
955 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
956 dis_hash, dis_hash_table_size moved to ...
957 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
958 All uses updated. New members asm_hash_p, dis_hash_p.
959 (CGEN_MINSN_EXPANSION): New struct.
960 (cgen_expand_macro_insn): Declare.
961 (cgen_macro_insn_count): Declare.
962 (get_insn_operands): Update prototype.
963 (lookup_get_insn_operands): Declare.
964
965 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
966
967 * i386.h (i386_optab): Change iclrKludge and imulKludge to
968 regKludge. Add operands types for string instructions.
969
970 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
971
972 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
973 table.
974
975 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
976
977 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
978 for `gettext'.
979
980 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
981
982 * i386.h: Remove NoModrm flag from all insns: it's never checked.
983 Add IsString flag to string instructions.
984 (IS_STRING): Don't define.
985 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
986 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
987 (SS_PREFIX_OPCODE): Define.
988
989 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
990
991 * i386.h: Revert March 24 patch; no more LinearAddress.
992
993 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
994
995 * i386.h (i386_optab): Remove fwait (9b) from all floating point
996 instructions, and instead add FWait opcode modifier. Add short
997 form of fldenv and fstenv.
998 (FWAIT_OPCODE): Define.
999
1000 * i386.h (i386_optab): Change second operand constraint of `mov
1001 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1002 allow legal instructions such as `movl %gs,%esi'
1003
1004 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1005
1006 * h8300.h: Various changes to fully bracket initializers.
1007
1008 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1009
1010 * i386.h: Set LinearAddress for lidt and lgdt.
1011
1012 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1013
1014 * cgen.h (CGEN_BOOL_ATTR): New macro.
1015
1016 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1017
1018 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1019
1020 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1021
1022 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1023 (cgen_insn): Record syntax and format entries here, rather than
1024 separately.
1025
1026 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1027
1028 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1029
1030 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1031
1032 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1033 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1034 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1035
1036 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1037
1038 * cgen.h (lookup_insn): New argument alias_p.
1039
1040 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1041
1042 Fix rac to accept only a0:
1043 * d10v.h (OPERAND_ACC): Split into:
1044 (OPERAND_ACC0, OPERAND_ACC1) .
1045 (OPERAND_GPR): Define.
1046
1047 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1048
1049 * cgen.h (CGEN_FIELDS): Define here.
1050 (CGEN_HW_ENTRY): New member `type'.
1051 (hw_list): Delete decl.
1052 (enum cgen_mode): Declare.
1053 (CGEN_OPERAND): New member `hw'.
1054 (enum cgen_operand_instance_type): Declare.
1055 (CGEN_OPERAND_INSTANCE): New type.
1056 (CGEN_INSN): New member `operands'.
1057 (CGEN_OPCODE_DATA): Make hw_list const.
1058 (get_insn_operands,lookup_insn): Add prototypes for.
1059
1060 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1061
1062 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1063 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1064 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1065 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1066
1067 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1068
1069 * cgen.h: Correct typo in comment end marker.
1070
1071 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1072
1073 * tic30.h: New file.
1074
1075 Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1076
1077 * cgen.h: Add prototypes for cgen_save_fixups(),
1078 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1079 of cgen_asm_finish_insn() to return a char *.
1080
1081 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1082
1083 * cgen.h: Formatting changes to improve readability.
1084
1085 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1086
1087 * cgen.h (*): Clean up pass over `struct foo' usage.
1088 (CGEN_ATTR): Make unsigned char.
1089 (CGEN_ATTR_TYPE): Update.
1090 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1091 (cgen_base): Move member `attrs' to cgen_insn.
1092 (CGEN_KEYWORD): New member `null_entry'.
1093 (CGEN_{SYNTAX,FORMAT}): New types.
1094 (cgen_insn): Format and syntax separated from each other.
1095
1096 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1097
1098 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1099 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1100 flags_{used,set} long.
1101 (d30v_operand): Make flags field long.
1102
1103 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1104
1105 * m68k.h: Fix comment describing operand types.
1106
1107 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1108
1109 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1110 everything else after down.
1111
1112 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1113
1114 * d10v.h (OPERAND_FLAG): Split into:
1115 (OPERAND_FFLAG, OPERAND_CFLAG) .
1116
1117 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1118
1119 * mips.h (struct mips_opcode): Changed comments to reflect new
1120 field usage.
1121
1122 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1123
1124 * mips.h: Added to comments a quick-ref list of all assigned
1125 operand type characters.
1126 (OP_{MASK,SH}_PERFREG): New macros.
1127
1128 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1129
1130 * sparc.h: Add '_' and '/' for v9a asr's.
1131 Patch from David Miller <davem@vger.rutgers.edu>
1132
1133 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1134
1135 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1136 area are not available in the base model (H8/300).
1137
1138 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1139
1140 * m68k.h: Remove documentation of ` operand specifier.
1141
1142 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1143
1144 * m68k.h: Document q and v operand specifiers.
1145
1146 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1147
1148 * v850.h (struct v850_opcode): Add processors field.
1149 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1150 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1151 (PROCESSOR_V850EA): New bit constants.
1152
1153 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1154
1155 Merge changes from Martin Hunt:
1156
1157 * d30v.h: Allow up to 64 control registers. Add
1158 SHORT_A5S format.
1159
1160 * d30v.h (LONG_Db): New form for delayed branches.
1161
1162 * d30v.h: (LONG_Db): New form for repeati.
1163
1164 * d30v.h (SHORT_D2B): New form.
1165
1166 * d30v.h (SHORT_A2): New form.
1167
1168 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1169 registers are used. Needed for VLIW optimization.
1170
1171 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1172
1173 * cgen.h: Move assembler interface section
1174 up so cgen_parse_operand_result is defined for cgen_parse_address.
1175 (cgen_parse_address): Update prototype.
1176
1177 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1178
1179 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1180
1181 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1182
1183 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1184 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1185 <paubert@iram.es>.
1186
1187 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1188 <paubert@iram.es>.
1189
1190 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1191 <paubert@iram.es>.
1192
1193 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1194 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1195
1196 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1197
1198 * v850.h (V850_NOT_R0): New flag.
1199
1200 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1201
1202 * v850.h (struct v850_opcode): Remove flags field.
1203
1204 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1205
1206 * v850.h (struct v850_opcode): Add flags field.
1207 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1208 fields.
1209 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1210 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1211
1212 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1213
1214 * arc.h: New file.
1215
1216 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1217
1218 * sparc.h (sparc_opcodes): Declare as const.
1219
1220 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1221
1222 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1223 uses single or double precision floating point resources.
1224 (INSN_NO_ISA, INSN_ISA1): Define.
1225 (cpu specific INSN macros): Tweak into bitmasks outside the range
1226 of INSN_ISA field.
1227
1228 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1229
1230 * i386.h: Fix pand opcode.
1231
1232 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1233
1234 * mips.h: Widen INSN_ISA and move it to a more convenient
1235 bit position. Add INSN_3900.
1236
1237 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1238
1239 * mips.h (struct mips_opcode): added new field membership.
1240
1241 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1242
1243 * i386.h (movd): only Reg32 is allowed.
1244
1245 * i386.h: add fcomp and ud2. From Wayne Scott
1246 <wscott@ichips.intel.com>.
1247
1248 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1249
1250 * i386.h: Add MMX instructions.
1251
1252 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1253
1254 * i386.h: Remove W modifier from conditional move instructions.
1255
1256 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1257
1258 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1259 with no arguments to match that generated by the UnixWare
1260 assembler.
1261
1262 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1263
1264 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1265 (cgen_parse_operand_fn): Declare.
1266 (cgen_init_parse_operand): Declare.
1267 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1268 new argument `want'.
1269 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1270 (enum cgen_parse_operand_type): New enum.
1271
1272 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1273
1274 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1275
1276 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1277
1278 * cgen.h: New file.
1279
1280 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1281
1282 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1283 fdivrp.
1284
1285 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1286
1287 * v850.h (extract): Make unsigned.
1288
1289 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1290
1291 * i386.h: Add iclr.
1292
1293 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1294
1295 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1296 take a direction bit.
1297
1298 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1299
1300 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1301
1302 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1303
1304 * sparc.h: Include <ansidecl.h>. Update function declarations to
1305 use prototypes, and to use const when appropriate.
1306
1307 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1308
1309 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1310
1311 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1312
1313 * d10v.h: Change pre_defined_registers to
1314 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1315
1316 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1317
1318 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1319 Change mips_opcodes from const array to a pointer,
1320 and change bfd_mips_num_opcodes from const int to int,
1321 so that we can increase the size of the mips opcodes table
1322 dynamically.
1323
1324 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1325
1326 * d30v.h (FLAG_X): Remove unused flag.
1327
1328 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1329
1330 * d30v.h: New file.
1331
1332 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1333
1334 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1335 (PDS_VALUE): Macro to access value field of predefined symbols.
1336 (tic80_next_predefined_symbol): Add prototype.
1337
1338 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1339
1340 * tic80.h (tic80_symbol_to_value): Change prototype to match
1341 change in function, added class parameter.
1342
1343 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1344
1345 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1346 endmask fields, which are somewhat weird in that 0 and 32 are
1347 treated exactly the same.
1348
1349 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1350
1351 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1352 rather than a constant that is 2**X. Reorder them to put bits for
1353 operands that have symbolic names in the upper bits, so they can
1354 be packed into an int where the lower bits contain the value that
1355 corresponds to that symbolic name.
1356 (predefined_symbo): Add struct.
1357 (tic80_predefined_symbols): Declare array of translations.
1358 (tic80_num_predefined_symbols): Declare size of that array.
1359 (tic80_value_to_symbol): Declare function.
1360 (tic80_symbol_to_value): Declare function.
1361
1362 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1363
1364 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1365
1366 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1367
1368 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1369 be the destination register.
1370
1371 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1372
1373 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1374 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1375 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1376 that the opcode can have two vector instructions in a single
1377 32 bit word and we have to encode/decode both.
1378
1379 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1380
1381 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1382 TIC80_OPERAND_RELATIVE for PC relative.
1383 (TIC80_OPERAND_BASEREL): New flag bit for register
1384 base relative.
1385
1386 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1387
1388 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1389
1390 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1391
1392 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1393 ":s" modifier for scaling.
1394
1395 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1396
1397 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1398 (TIC80_OPERAND_M_LI): Ditto
1399
1400 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1401
1402 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1403 (TIC80_OPERAND_CC): New define for condition code operand.
1404 (TIC80_OPERAND_CR): New define for control register operand.
1405
1406 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1407
1408 * tic80.h (struct tic80_opcode): Name changed.
1409 (struct tic80_opcode): Remove format field.
1410 (struct tic80_operand): Add insertion and extraction functions.
1411 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1412 correct ones.
1413 (FMT_*): Ditto.
1414
1415 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1416
1417 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1418 type IV instruction offsets.
1419
1420 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1421
1422 * tic80.h: New file.
1423
1424 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1425
1426 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1427
1428 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1429
1430 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1431 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1432 * v850.h: Fix comment, v850_operand not powerpc_operand.
1433
1434 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1435
1436 * mn10200.h: Flesh out structures and definitions needed by
1437 the mn10200 assembler & disassembler.
1438
1439 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1440
1441 * mips.h: Add mips16 definitions.
1442
1443 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1444
1445 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1446
1447 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1448
1449 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1450 (MN10300_OPERAND_MEMADDR): Define.
1451
1452 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1453
1454 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1455
1456 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1457
1458 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1459
1460 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1461
1462 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1463
1464 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1465
1466 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1467
1468 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1469
1470 * alpha.h: Don't include "bfd.h"; private relocation types are now
1471 negative to minimize problems with shared libraries. Organize
1472 instruction subsets by AMASK extensions and PALcode
1473 implementation.
1474 (struct alpha_operand): Move flags slot for better packing.
1475
1476 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1477
1478 * v850.h (V850_OPERAND_RELAX): New operand flag.
1479
1480 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1481
1482 * mn10300.h (FMT_*): Move operand format definitions
1483 here.
1484
1485 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1486
1487 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1488
1489 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1490
1491 * mn10300.h (mn10300_opcode): Add "format" field.
1492 (MN10300_OPERAND_*): Define.
1493
1494 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1495
1496 * mn10x00.h: Delete.
1497 * mn10200.h, mn10300.h: New files.
1498
1499 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1500
1501 * mn10x00.h: New file.
1502
1503 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1504
1505 * v850.h: Add new flag to indicate this instruction uses a PC
1506 displacement.
1507
1508 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1509
1510 * h8300.h (stmac): Add missing instruction.
1511
1512 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1513
1514 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1515 field.
1516
1517 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1518
1519 * v850.h (V850_OPERAND_EP): Define.
1520
1521 * v850.h (v850_opcode): Add size field.
1522
1523 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1524
1525 * v850.h (v850_operands): Add insert and extract fields, pointers
1526 to functions used to handle unusual operand encoding.
1527 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1528 V850_OPERAND_SIGNED): Defined.
1529
1530 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1531
1532 * v850.h (v850_operands): Add flags field.
1533 (OPERAND_REG, OPERAND_NUM): Defined.
1534
1535 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1536
1537 * v850.h: New file.
1538
1539 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1540
1541 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1542 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1543 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1544 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1545 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1546 Defined.
1547
1548 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1549
1550 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1551 a 3 bit space id instead of a 2 bit space id.
1552
1553 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1554
1555 * d10v.h: Add some additional defines to support the
1556 assembler in determining which operations can be done in parallel.
1557
1558 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1559
1560 * h8300.h (SN): Define.
1561 (eepmov.b): Renamed from "eepmov"
1562 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1563 with them.
1564
1565 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1566
1567 * d10v.h (OPERAND_SHIFT): New operand flag.
1568
1569 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1570
1571 * d10v.h: Changes for divs, parallel-only instructions, and
1572 signed numbers.
1573
1574 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1575
1576 * d10v.h (pd_reg): Define. Putting the definition here allows
1577 the assembler and disassembler to share the same struct.
1578
1579 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1580
1581 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1582 Williams <steve@icarus.com>.
1583
1584 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1585
1586 * d10v.h: New file.
1587
1588 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1589
1590 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1591
1592 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1593
1594 * m68k.h (mcf5200): New macro.
1595 Document names of coldfire control registers.
1596
1597 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1598
1599 * h8300.h (SRC_IN_DST): Define.
1600
1601 * h8300.h (UNOP3): Mark the register operand in this insn
1602 as a source operand, not a destination operand.
1603 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1604 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1605 register operand with SRC_IN_DST.
1606
1607 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1608
1609 * alpha.h: New file.
1610
1611 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1612
1613 * rs6k.h: Remove obsolete file.
1614
1615 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1616
1617 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1618 fdivp, and fdivrp. Add ffreep.
1619
1620 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1621
1622 * h8300.h: Reorder various #defines for readability.
1623 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1624 (BITOP): Accept additional (unused) argument. All callers changed.
1625 (EBITOP): Likewise.
1626 (O_LAST): Bump.
1627 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1628
1629 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1630 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1631 (BITOP, EBITOP): Handle new H8/S addressing modes for
1632 bit insns.
1633 (UNOP3): Handle new shift/rotate insns on the H8/S.
1634 (insns using exr): New instructions.
1635 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1636
1637 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1638
1639 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1640 was incorrect.
1641
1642 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1643
1644 * h8300.h (START): Remove.
1645 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1646 and mov.l insns that can be relaxed.
1647
1648 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1649
1650 * i386.h: Remove Abs32 from lcall.
1651
1652 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1653
1654 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1655 (SLCPOP): New macro.
1656 Mark X,Y opcode letters as in use.
1657
1658 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1659
1660 * sparc.h (F_FLOAT, F_FBR): Define.
1661
1662 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1663
1664 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1665 from all insns.
1666 (ABS8SRC,ABS8DST): Add ABS8MEM.
1667 (add.l): Fix reg+reg variant.
1668 (eepmov.w): Renamed from eepmovw.
1669 (ldc,stc): Fix many cases.
1670
1671 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1672
1673 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1674
1675 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1676
1677 * sparc.h (O): Mark operand letter as in use.
1678
1679 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1680
1681 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1682 Mark operand letters uU as in use.
1683
1684 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1685
1686 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1687 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1688 (SPARC_OPCODE_SUPPORTED): New macro.
1689 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1690 (F_NOTV9): Delete.
1691
1692 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1693
1694 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1695 declaration consistent with return type in definition.
1696
1697 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1698
1699 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1700
1701 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1702
1703 * i386.h (i386_regtab): Add 80486 test registers.
1704
1705 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1706
1707 * i960.h (I_HX): Define.
1708 (i960_opcodes): Add HX instruction.
1709
1710 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1711
1712 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1713 and fclex.
1714
1715 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1716
1717 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1718 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1719 (bfd_* defines): Delete.
1720 (sparc_opcode_archs): Replaces architecture_pname.
1721 (sparc_opcode_lookup_arch): Declare.
1722 (NUMOPCODES): Delete.
1723
1724 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1725
1726 * sparc.h (enum sparc_architecture): Add v9a.
1727 (ARCHITECTURES_CONFLICT_P): Update.
1728
1729 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1730
1731 * i386.h: Added Pentium Pro instructions.
1732
1733 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1734
1735 * m68k.h: Document new 'W' operand place.
1736
1737 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1738
1739 * hppa.h: Add lci and syncdma instructions.
1740
1741 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1742
1743 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1744 instructions.
1745
1746 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1747
1748 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1749 assembler's -mcom and -many switches.
1750
1751 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1752
1753 * i386.h: Fix cmpxchg8b extension opcode description.
1754
1755 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1756
1757 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1758 and register cr4.
1759
1760 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1761
1762 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1763
1764 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1765
1766 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1767
1768 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1769
1770 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1771
1772 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1773
1774 * m68kmri.h: Remove.
1775
1776 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1777 declarations. Remove F_ALIAS and flag field of struct
1778 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1779 int. Make name and args fields of struct m68k_opcode const.
1780
1781 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1782
1783 * sparc.h (F_NOTV9): Define.
1784
1785 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1786
1787 * mips.h (INSN_4010): Define.
1788
1789 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1790
1791 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1792
1793 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1794 * m68k.h: Fix argument descriptions of coprocessor
1795 instructions to allow only alterable operands where appropriate.
1796 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1797 (m68k_opcode_aliases): Add more aliases.
1798
1799 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1800
1801 * m68k.h: Added explcitly short-sized conditional branches, and a
1802 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1803 svr4-based configurations.
1804
1805 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1806
1807 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1808 * i386.h: added missing Data16/Data32 flags to a few instructions.
1809
1810 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1811
1812 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1813 (OP_MASK_BCC, OP_SH_BCC): Define.
1814 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1815 (OP_MASK_CCC, OP_SH_CCC): Define.
1816 (INSN_READ_FPR_R): Define.
1817 (INSN_RFE): Delete.
1818
1819 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1820
1821 * m68k.h (enum m68k_architecture): Deleted.
1822 (struct m68k_opcode_alias): New type.
1823 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1824 matching constraints, values and flags. As a side effect of this,
1825 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1826 as I know were never used, now may need re-examining.
1827 (numopcodes): Now const.
1828 (m68k_opcode_aliases, numaliases): New variables.
1829 (endop): Deleted.
1830 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1831 m68k_opcode_aliases; update declaration of m68k_opcodes.
1832
1833 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1834
1835 * hppa.h (delay_type): Delete unused enumeration.
1836 (pa_opcode): Replace unused delayed field with an architecture
1837 field.
1838 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1839
1840 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1841
1842 * mips.h (INSN_ISA4): Define.
1843
1844 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1845
1846 * mips.h (M_DLA_AB, M_DLI): Define.
1847
1848 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1849
1850 * hppa.h (fstwx): Fix single-bit error.
1851
1852 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1853
1854 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1855
1856 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1857
1858 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1859 debug registers. From Charles Hannum (mycroft@netbsd.org).
1860
1861 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1862
1863 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1864 i386 support:
1865 * i386.h (MOV_AX_DISP32): New macro.
1866 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1867 of several call/return instructions.
1868 (ADDR_PREFIX_OPCODE): New macro.
1869
1870 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1871
1872 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1873
1874 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1875 char.
1876 (struct vot, field `name'): ditto.
1877
1878 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1879
1880 * vax.h: Supply and properly group all values in end sentinel.
1881
1882 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1883
1884 * mips.h (INSN_ISA, INSN_4650): Define.
1885
1886 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1887
1888 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1889 systems with a separate instruction and data cache, such as the
1890 29040, these instructions take an optional argument.
1891
1892 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1893
1894 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1895 INSN_TRAP.
1896
1897 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1898
1899 * mips.h (INSN_STORE_MEMORY): Define.
1900
1901 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1902
1903 * sparc.h: Document new operand type 'x'.
1904
1905 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1906
1907 * i960.h (I_CX2): New instruction category. It includes
1908 instructions available on Cx and Jx processors.
1909 (I_JX): New instruction category, for JX-only instructions.
1910 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1911 Jx-only instructions, in I_JX category.
1912
1913 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1914
1915 * ns32k.h (endop): Made pointer const too.
1916
1917 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1918
1919 * ns32k.h: Drop Q operand type as there is no correct use
1920 for it. Add I and Z operand types which allow better checking.
1921
1922 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1923
1924 * h8300.h (xor.l) :fix bit pattern.
1925 (L_2): New size of operand.
1926 (trapa): Use it.
1927
1928 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1929
1930 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1931
1932 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1933
1934 * sparc.h: Include v9 definitions.
1935
1936 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1937
1938 * m68k.h (m68060): Defined.
1939 (m68040up, mfloat, mmmu): Include it.
1940 (struct m68k_opcode): Widen `arch' field.
1941 (m68k_opcodes): Updated for M68060. Removed comments that were
1942 instructions commented out by "JF" years ago.
1943
1944 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1945
1946 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1947 add a one-bit `flags' field.
1948 (F_ALIAS): New macro.
1949
1950 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1951
1952 * h8300.h (dec, inc): Get encoding right.
1953
1954 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1955
1956 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1957 a flag instead.
1958 (PPC_OPERAND_SIGNED): Define.
1959 (PPC_OPERAND_SIGNOPT): Define.
1960
1961 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1962
1963 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1964 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1965
1966 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1967
1968 * i386.h: Reverse last change. It'll be handled in gas instead.
1969
1970 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1971
1972 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1973 slower on the 486 and used the implicit shift count despite the
1974 explicit operand. The one-operand form is still available to get
1975 the shorter form with the implicit shift count.
1976
1977 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1978
1979 * hppa.h: Fix typo in fstws arg string.
1980
1981 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1982
1983 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1984
1985 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1986
1987 * ppc.h (PPC_OPCODE_601): Define.
1988
1989 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1990
1991 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1992 (so we can determine valid completers for both addb and addb[tf].)
1993
1994 * hppa.h (xmpyu): No floating point format specifier for the
1995 xmpyu instruction.
1996
1997 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1998
1999 * ppc.h (PPC_OPERAND_NEXT): Define.
2000 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2001 (struct powerpc_macro): Define.
2002 (powerpc_macros, powerpc_num_macros): Declare.
2003
2004 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2005
2006 * ppc.h: New file. Header file for PowerPC opcode table.
2007
2008 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2009
2010 * hppa.h: More minor template fixes for sfu and copr (to allow
2011 for easier disassembly).
2012
2013 * hppa.h: Fix templates for all the sfu and copr instructions.
2014
2015 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2016
2017 * i386.h (push): Permit Imm16 operand too.
2018
2019 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2020
2021 * h8300.h (andc): Exists in base arch.
2022
2023 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2024
2025 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2026 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2027
2028 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2029
2030 * hppa.h: Add FP quadword store instructions.
2031
2032 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2033
2034 * mips.h: (M_J_A): Added.
2035 (M_LA): Removed.
2036
2037 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2038
2039 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2040 <mellon@pepper.ncd.com>.
2041
2042 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2043
2044 * hppa.h: Immediate field in probei instructions is unsigned,
2045 not low-sign extended.
2046
2047 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2048
2049 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2050
2051 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2052
2053 * i386.h: Add "fxch" without operand.
2054
2055 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2056
2057 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2058
2059 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2060
2061 * hppa.h: Add gfw and gfr to the opcode table.
2062
2063 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2064
2065 * m88k.h: extended to handle m88110.
2066
2067 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2068
2069 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2070 addresses.
2071
2072 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2073
2074 * i960.h (i960_opcodes): Properly bracket initializers.
2075
2076 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2077
2078 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2079
2080 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2081
2082 * m68k.h (two): Protect second argument with parentheses.
2083
2084 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2085
2086 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2087 Deleted old in/out instructions in "#if 0" section.
2088
2089 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2090
2091 * i386.h (i386_optab): Properly bracket initializers.
2092
2093 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2094
2095 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2096 Jeff Law, law@cs.utah.edu).
2097
2098 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2099
2100 * i386.h (lcall): Accept Imm32 operand also.
2101
2102 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2103
2104 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2105 (M_DABS): Added.
2106
2107 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2108
2109 * mips.h (INSN_*): Changed values. Removed unused definitions.
2110 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2111 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2112 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2113 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2114 (M_*): Added new values for r6000 and r4000 macros.
2115 (ANY_DELAY): Removed.
2116
2117 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2118
2119 * mips.h: Added M_LI_S and M_LI_SS.
2120
2121 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2122
2123 * h8300.h: Get some rare mov.bs correct.
2124
2125 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2126
2127 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2128 been included.
2129
2130 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2131
2132 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2133 jump instructions, for use in disassemblers.
2134
2135 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2136
2137 * m88k.h: Make bitfields just unsigned, not unsigned long or
2138 unsigned short.
2139
2140 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2141
2142 * hppa.h: New argument type 'y'. Use in various float instructions.
2143
2144 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2145
2146 * hppa.h (break): First immediate field is unsigned.
2147
2148 * hppa.h: Add rfir instruction.
2149
2150 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2151
2152 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2153
2154 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2155
2156 * mips.h: Reworked the hazard information somewhat, and fixed some
2157 bugs in the instruction hazard descriptions.
2158
2159 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2160
2161 * m88k.h: Corrected a couple of opcodes.
2162
2163 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2164
2165 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2166 new version includes instruction hazard information, but is
2167 otherwise reasonably similar.
2168
2169 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2170
2171 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2172
2173 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2174
2175 Patches from Jeff Law, law@cs.utah.edu:
2176 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2177 Make the tables be the same for the following instructions:
2178 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2179 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2180 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2181 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2182 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2183 "fcmp", and "ftest".
2184
2185 * hppa.h: Make new and old tables the same for "break", "mtctl",
2186 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2187 Fix typo in last patch. Collapse several #ifdefs into a
2188 single #ifdef.
2189
2190 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2191 of the comments up-to-date.
2192
2193 * hppa.h: Update "free list" of letters and update
2194 comments describing each letter's function.
2195
2196 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2197
2198 * h8300.h: Lots of little fixes for the h8/300h.
2199
2200 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2201
2202 Support for H8/300-H
2203 * h8300.h: Lots of new opcodes.
2204
2205 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2206
2207 * h8300.h: checkpoint, includes H8/300-H opcodes.
2208
2209 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2210
2211 * Patches from Jeffrey Law <law@cs.utah.edu>.
2212 * hppa.h: Rework single precision FP
2213 instructions so that they correctly disassemble code
2214 PA1.1 code.
2215
2216 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2217
2218 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2219 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2220
2221 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2222
2223 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2224 gdb will define it for now.
2225
2226 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2227
2228 * sparc.h: Don't end enumerator list with comma.
2229
2230 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2231
2232 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2233 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2234 ("bc2t"): Correct typo.
2235 ("[ls]wc[023]"): Use T rather than t.
2236 ("c[0123]"): Define general coprocessor instructions.
2237
2238 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2239
2240 * m68k.h: Move split point for gcc compilation more towards
2241 middle.
2242
2243 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2244
2245 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2246 simply wrong, ics, rfi, & rfsvc were missing).
2247 Add "a" to opr_ext for "bb". Doc fix.
2248
2249 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2250
2251 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2252 * mips.h: Add casts, to suppress warnings about shifting too much.
2253 * m68k.h: Document the placement code '9'.
2254
2255 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2256
2257 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2258 allows callers to break up the large initialized struct full of
2259 opcodes into two half-sized ones. This permits GCC to compile
2260 this module, since it takes exponential space for initializers.
2261 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2262
2263 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2264
2265 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2266 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2267 initialized structs in it.
2268
2269 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2270
2271 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2272 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2273 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2274
2275 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2276
2277 * mips.h: document "i" and "j" operands correctly.
2278
2279 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2280
2281 * mips.h: Removed endianness dependency.
2282
2283 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2284
2285 * h8300.h: include info on number of cycles per instruction.
2286
2287 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2288
2289 * hppa.h: Move handy aliases to the front. Fix masks for extract
2290 and deposit instructions.
2291
2292 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2293
2294 * i386.h: accept shld and shrd both with and without the shift
2295 count argument, which is always %cl.
2296
2297 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2298
2299 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2300 (one_byte_segment_defaults, two_byte_segment_defaults,
2301 i386_prefixtab_end): Ditto.
2302
2303 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2304
2305 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2306 for operand 2; from John Carr, jfc@dsg.dec.com.
2307
2308 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2309
2310 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2311 always use 16-bit offsets. Makes calculated-size jump tables
2312 feasible.
2313
2314 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2315
2316 * i386.h: Fix one-operand forms of in* and out* patterns.
2317
2318 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2319
2320 * m68k.h: Added CPU32 support.
2321
2322 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2323
2324 * mips.h (break): Disassemble the argument. Patch from
2325 jonathan@cs.stanford.edu (Jonathan Stone).
2326
2327 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2328
2329 * m68k.h: merged Motorola and MIT syntax.
2330
2331 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2332
2333 * m68k.h (pmove): make the tests less strict, the 68k book is
2334 wrong.
2335
2336 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2337
2338 * m68k.h (m68ec030): Defined as alias for 68030.
2339 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2340 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2341 them. Tightened description of "fmovex" to distinguish it from
2342 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2343 up descriptions that claimed versions were available for chips not
2344 supporting them. Added "pmovefd".
2345
2346 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2347
2348 * m68k.h: fix where the . goes in divull
2349
2350 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2351
2352 * m68k.h: the cas2 instruction is supposed to be written with
2353 indirection on the last two operands, which can be either data or
2354 address registers. Added a new operand type 'r' which accepts
2355 either register type. Added new cases for cas2l and cas2w which
2356 use them. Corrected masks for cas2 which failed to recognize use
2357 of address register.
2358
2359 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2360
2361 * m68k.h: Merged in patches (mostly m68040-specific) from
2362 Colin Smith <colin@wrs.com>.
2363
2364 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2365 base). Also cleaned up duplicates, re-ordered instructions for
2366 the sake of dis-assembling (so aliases come after standard names).
2367 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2368
2369 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2370
2371 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2372 all missing .s
2373
2374 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2375
2376 * sparc.h: Moved tables to BFD library.
2377
2378 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2379
2380 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2381
2382 * h8300.h: Finish filling in all the holes in the opcode table,
2383 so that the Lucid C compiler can digest this as well...
2384
2385 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2386
2387 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2388 Fix opcodes on various sizes of fild/fist instructions
2389 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2390 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2391
2392 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2393
2394 * h8300.h: Fill in all the holes in the opcode table so that the
2395 losing HPUX C compiler can digest this...
2396
2397 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2398
2399 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2400 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2401
2402 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2403
2404 * sparc.h: Add new architecture variant sparclite; add its scan
2405 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2406
2407 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2408
2409 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2410 fy@lucid.com).
2411
2412 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2413
2414 * rs6k.h: New version from IBM (Metin).
2415
2416 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2417
2418 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2419 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2420
2421 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2422
2423 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2424
2425 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2426
2427 * m68k.h (one, two): Cast macro args to unsigned to suppress
2428 complaints from compiler and lint about integer overflow during
2429 shift.
2430
2431 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2432
2433 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2434
2435 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2436
2437 * mips.h: Make bitfield layout depend on the HOST compiler,
2438 not on the TARGET system.
2439
2440 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2441
2442 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2443 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2444 <TRANLE@INTELLICORP.COM>.
2445
2446 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2447
2448 * h8300.h: turned op_type enum into #define list
2449
2450 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2451
2452 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2453 similar instructions -- they've been renamed to "fitoq", etc.
2454 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2455 number of arguments.
2456 * h8300.h: Remove extra ; which produces compiler warning.
2457
2458 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2459
2460 * sparc.h: fix opcode for tsubcctv.
2461
2462 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2463
2464 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2465
2466 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2467
2468 * sparc.h (nop): Made the 'lose' field be even tighter,
2469 so only a standard 'nop' is disassembled as a nop.
2470
2471 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2472
2473 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2474 disassembled as a nop.
2475
2476 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2477
2478 * m68k.h, sparc.h: ANSIfy enums.
2479
2480 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2481
2482 * sparc.h: fix a typo.
2483
2484 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2485
2486 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2487 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2488 vax.h: Renamed from ../<foo>-opcode.h.
2489
2490 \f
2491 Local Variables:
2492 version-control: never
2493 End:
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