Fix ia64 gas testsuite. Update ia64 DV tables. Fix ia64 gas testsuite again.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2000-09-22 Jim Wilson <wilson@cygnus.com>
2
3 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
4
5 2000-09-13 Anders Norlander <anorland@acc.umu.se>
6
7 * mips.h: Use defines instead of hard-coded processor numbers.
8 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
9 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
10 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
11 CPU_4KC, CPU_4KM, CPU_4KP): Define..
12 (OPCODE_IS_MEMBER): Use new defines.
13 (OP_MASK_SEL, OP_SH_SEL): Define.
14 (OP_MASK_CODE20, OP_SH_CODE20): Define.
15 Add 'P' to used characters.
16 Use 'H' for coprocessor select field.
17 Use 'm' for 20 bit breakpoint code.
18 Document new arg characters and add to used characters.
19 (INSN_MIPS32): New define for MIPS32 extensions.
20 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
21
22 2000-09-05 Alan Modra <alan@linuxcare.com.au>
23
24 * hppa.h: Mention cz completer.
25
26 2000-08-16 Jim Wilson <wilson@cygnus.com>
27
28 * ia64.h (IA64_OPCODE_POSTINC): New.
29
30 2000-08-15 H.J. Lu <hjl@gnu.org>
31
32 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
33 IgnoreSize change.
34
35 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
36
37 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
38 Move related opcodes closer to each other.
39 Minor changes in comments, list undefined opcodes.
40
41 2000-07-26 Dave Brolley <brolley@redhat.com>
42
43 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
44
45 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
46
47 cris.h: New file.
48
49 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
50
51 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
52 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
53 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
54 (AVR_ISA_M83): Define for ATmega83, ATmega85.
55 (espm): Remove, because ESPM removed in databook update.
56 (eicall, eijmp): Move to the end of opcode table.
57
58 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
59
60 * m68hc11.h: New file for support of Motorola 68hc11.
61
62 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
63
64 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
65
66 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
67
68 * avr.h: New file with AVR opcodes.
69
70 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
71
72 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
73
74 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
75
76 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
77
78 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
79
80 * i386.h: Use sl_FP, not sl_Suf for fild.
81
82 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
83
84 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
85 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
86 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
87 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
88
89 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
90
91 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
92
93 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
94 Alexander Sokolov <robocop@netlink.ru>
95
96 * i386.h (i386_optab): Add cpu_flags for all instructions.
97
98 2000-05-13 Alan Modra <alan@linuxcare.com.au>
99
100 From Gavin Romig-Koch <gavin@cygnus.com>
101 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
102
103 2000-05-04 Timothy Wall <twall@cygnus.com>
104
105 * tic54x.h: New.
106
107 2000-05-03 J.T. Conklin <jtc@redback.com>
108
109 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
110 (PPC_OPERAND_VR): New operand flag for vector registers.
111
112 2000-05-01 Kazu Hirata <kazu@hxi.com>
113
114 * h8300.h (EOP): Add missing initializer.
115
116 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
117
118 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
119 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
120 New operand types l,y,&,fe,fE,fx added to support above forms.
121 (pa_opcodes): Replaced usage of 'x' as source/target for
122 floating point double-word loads/stores with 'fx'.
123
124 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
125 David Mosberger <davidm@hpl.hp.com>
126 Timothy Wall <twall@cygnus.com>
127 Jim Wilson <wilson@cygnus.com>
128
129 * ia64.h: New file.
130
131 2000-03-27 Nick Clifton <nickc@cygnus.com>
132
133 * d30v.h (SHORT_A1): Fix value.
134 (SHORT_AR): Renumber so that it is at the end of the list of short
135 instructions, not the end of the list of long instructions.
136
137 2000-03-26 Alan Modra <alan@linuxcare.com>
138
139 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
140 problem isn't really specific to Unixware.
141 (OLDGCC_COMPAT): Define.
142 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
143 destination %st(0).
144 Fix lots of comments.
145
146 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
147
148 * d30v.h:
149 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
150 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
151 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
152 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
153 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
154 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
155 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
156
157 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
158
159 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
160 fistpd without suffix.
161
162 2000-02-24 Nick Clifton <nickc@cygnus.com>
163
164 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
165 'signed_overflow_ok_p'.
166 Delete prototypes for cgen_set_flags() and cgen_get_flags().
167
168 2000-02-24 Andrew Haley <aph@cygnus.com>
169
170 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
171 (CGEN_CPU_TABLE): flags: new field.
172 Add prototypes for new functions.
173
174 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
175
176 * i386.h: Add some more UNIXWARE_COMPAT comments.
177
178 2000-02-23 Linas Vepstas <linas@linas.org>
179
180 * i370.h: New file.
181
182 2000-02-22 Andrew Haley <aph@cygnus.com>
183
184 * mips.h: (OPCODE_IS_MEMBER): Add comment.
185
186 1999-12-30 Andrew Haley <aph@cygnus.com>
187
188 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
189 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
190 insns.
191
192 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
193
194 * i386.h: Qualify intel mode far call and jmp with x_Suf.
195
196 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
197
198 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
199 indirect jumps and calls. Add FF/3 call for intel mode.
200
201 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
202
203 * mn10300.h: Add new operand types. Add new instruction formats.
204
205 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
206
207 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
208 instruction.
209
210 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
211
212 * mips.h (INSN_ISA5): New.
213
214 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
215
216 * mips.h (OPCODE_IS_MEMBER): New.
217
218 1999-10-29 Nick Clifton <nickc@cygnus.com>
219
220 * d30v.h (SHORT_AR): Define.
221
222 1999-10-18 Michael Meissner <meissner@cygnus.com>
223
224 * alpha.h (alpha_num_opcodes): Convert to unsigned.
225 (alpha_num_operands): Ditto.
226
227 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
228
229 * hppa.h (pa_opcodes): Add load and store cache control to
230 instructions. Add ordered access load and store.
231
232 * hppa.h (pa_opcode): Add new entries for addb and addib.
233
234 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
235
236 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
237
238 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
239
240 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
241
242 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
243
244 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
245 and "be" using completer prefixes.
246
247 * hppa.h (pa_opcodes): Add initializers to silence compiler.
248
249 * hppa.h: Update comments about character usage.
250
251 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
252
253 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
254 up the new fstw & bve instructions.
255
256 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
257
258 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
259 instructions.
260
261 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
262
263 * hppa.h (pa_opcodes): Add long offset double word load/store
264 instructions.
265
266 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
267 stores.
268
269 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
270
271 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
272
273 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
274
275 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
276
277 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
278
279 * hppa.h (pa_opcodes): Add support for "b,l".
280
281 * hppa.h (pa_opcodes): Add support for "b,gate".
282
283 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
284
285 * hppa.h (pa_opcodes): Use 'fX' for first register operand
286 in xmpyu.
287
288 * hppa.h (pa_opcodes): Fix mask for probe and probei.
289
290 * hppa.h (pa_opcodes): Fix mask for depwi.
291
292 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
293
294 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
295 an explicit output argument.
296
297 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
298
299 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
300 Add a few PA2.0 loads and store variants.
301
302 1999-09-04 Steve Chamberlain <sac@pobox.com>
303
304 * pj.h: New file.
305
306 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
307
308 * i386.h (i386_regtab): Move %st to top of table, and split off
309 other fp reg entries.
310 (i386_float_regtab): To here.
311
312 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
313
314 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
315 by 'f'.
316
317 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
318 Add supporting args.
319
320 * hppa.h: Document new completers and args.
321 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
322 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
323 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
324 pmenb and pmdis.
325
326 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
327 hshr, hsub, mixh, mixw, permh.
328
329 * hppa.h (pa_opcodes): Change completers in instructions to
330 use 'c' prefix.
331
332 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
333 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
334
335 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
336 fnegabs to use 'I' instead of 'F'.
337
338 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
339
340 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
341 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
342 Alphabetically sort PIII insns.
343
344 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
345
346 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
347
348 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
349
350 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
351 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
352
353 * hppa.h: Document 64 bit condition completers.
354
355 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
356
357 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
358
359 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
360
361 * i386.h (i386_optab): Add DefaultSize modifier to all insns
362 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
363 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
364
365 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
366 Jeff Law <law@cygnus.com>
367
368 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
369
370 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
371
372 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
373 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
374
375 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
376
377 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
378
379 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
380
381 * hppa.h (struct pa_opcode): Add new field "flags".
382 (FLAGS_STRICT): Define.
383
384 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
385 Jeff Law <law@cygnus.com>
386
387 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
388
389 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
390
391 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
392
393 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
394 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
395 flag to fcomi and friends.
396
397 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
398
399 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
400 integer logical instructions.
401
402 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
403
404 * m68k.h: Document new formats `E', `G', `H' and new places `N',
405 `n', `o'.
406
407 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
408 and new places `m', `M', `h'.
409
410 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
411
412 * hppa.h (pa_opcodes): Add several processor specific system
413 instructions.
414
415 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
416
417 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
418 "addb", and "addib" to be used by the disassembler.
419
420 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
421
422 * i386.h (ReverseModrm): Remove all occurences.
423 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
424 movmskps, pextrw, pmovmskb, maskmovq.
425 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
426 ignore the data size prefix.
427
428 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
429 Mostly stolen from Doug Ledford <dledford@redhat.com>
430
431 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
432
433 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
434
435 1999-04-14 Doug Evans <devans@casey.cygnus.com>
436
437 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
438 (CGEN_ATTR_TYPE): Update.
439 (CGEN_ATTR_MASK): Number booleans starting at 0.
440 (CGEN_ATTR_VALUE): Update.
441 (CGEN_INSN_ATTR): Update.
442
443 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
444
445 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
446 instructions.
447
448 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
449
450 * hppa.h (bb, bvb): Tweak opcode/mask.
451
452
453 1999-03-22 Doug Evans <devans@casey.cygnus.com>
454
455 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
456 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
457 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
458 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
459 Delete member max_insn_size.
460 (enum cgen_cpu_open_arg): New enum.
461 (cpu_open): Update prototype.
462 (cpu_open_1): Declare.
463 (cgen_set_cpu): Delete.
464
465 1999-03-11 Doug Evans <devans@casey.cygnus.com>
466
467 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
468 (CGEN_OPERAND_NIL): New macro.
469 (CGEN_OPERAND): New member `type'.
470 (@arch@_cgen_operand_table): Delete decl.
471 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
472 (CGEN_OPERAND_TABLE): New struct.
473 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
474 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
475 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
476 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
477 {get,set}_{int,vma}_operand.
478 (@arch@_cgen_cpu_open): New arg `isa'.
479 (cgen_set_cpu): Ditto.
480
481 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
482
483 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
484
485 1999-02-25 Doug Evans <devans@casey.cygnus.com>
486
487 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
488 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
489 enum cgen_hw_type.
490 (CGEN_HW_TABLE): New struct.
491 (hw_table): Delete declaration.
492 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
493 to table entry to enum.
494 (CGEN_OPINST): Ditto.
495 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
496
497 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
498
499 * alpha.h (AXP_OPCODE_EV6): New.
500 (AXP_OPCODE_NOPAL): Include it.
501
502 1999-02-09 Doug Evans <devans@casey.cygnus.com>
503
504 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
505 All uses updated. New members int_insn_p, max_insn_size,
506 parse_operand,insert_operand,extract_operand,print_operand,
507 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
508 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
509 extract_handlers,print_handlers.
510 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
511 (CGEN_ATTR_BOOL_OFFSET): New macro.
512 (CGEN_ATTR_MASK): Subtract it to compute bit number.
513 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
514 (cgen_opcode_handler): Renamed from cgen_base.
515 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
516 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
517 all uses updated.
518 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
519 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
520 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
521 (CGEN_OPCODE,CGEN_IBASE): New types.
522 (CGEN_INSN): Rewrite.
523 (CGEN_{ASM,DIS}_HASH*): Delete.
524 (init_opcode_table,init_ibld_table): Declare.
525 (CGEN_INSN_ATTR): New type.
526
527 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
528
529 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
530 (x_FP, d_FP, dls_FP, sldx_FP): Define.
531 Change *Suf definitions to include x and d suffixes.
532 (movsx): Use w_Suf and b_Suf.
533 (movzx): Likewise.
534 (movs): Use bwld_Suf.
535 (fld): Change ordering. Use sld_FP.
536 (fild): Add Intel Syntax equivalent of fildq.
537 (fst): Use sld_FP.
538 (fist): Use sld_FP.
539 (fstp): Use sld_FP. Add x_FP version.
540 (fistp): LLongMem version for Intel Syntax.
541 (fcom, fcomp): Use sld_FP.
542 (fadd, fiadd, fsub): Use sld_FP.
543 (fsubr): Use sld_FP.
544 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
545
546 1999-01-27 Doug Evans <devans@casey.cygnus.com>
547
548 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
549 CGEN_MODE_UINT.
550
551 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
552
553 * hppa.h (bv): Fix mask.
554
555 1999-01-05 Doug Evans <devans@casey.cygnus.com>
556
557 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
558 (CGEN_ATTR): Use it.
559 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
560 (CGEN_ATTR_TABLE): New member dfault.
561
562 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
563
564 * mips.h (MIPS16_INSN_BRANCH): New.
565
566 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
567
568 The following is part of a change made by Edith Epstein
569 <eepstein@sophia.cygnus.com> as part of a project to merge in
570 changes by HP; HP did not create ChangeLog entries.
571
572 * hppa.h (completer_chars): list of chars to not put a space
573 after.
574
575 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
576
577 * i386.h (i386_optab): Permit w suffix on processor control and
578 status word instructions.
579
580 1998-11-30 Doug Evans <devans@casey.cygnus.com>
581
582 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
583 (struct cgen_keyword_entry): Ditto.
584 (struct cgen_operand): Ditto.
585 (CGEN_IFLD): New typedef, with associated access macros.
586 (CGEN_IFMT): New typedef, with associated access macros.
587 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
588 (CGEN_IVALUE): New typedef.
589 (struct cgen_insn): Delete const on syntax,attrs members.
590 `format' now points to format data. Type of `value' is now
591 CGEN_IVALUE.
592 (struct cgen_opcode_table): New member ifld_table.
593
594 1998-11-18 Doug Evans <devans@casey.cygnus.com>
595
596 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
597 (CGEN_OPERAND_INSTANCE): New member `attrs'.
598 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
599 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
600 (cgen_opcode_table): Update type of dis_hash fn.
601 (extract_operand): Update type of `insn_value' arg.
602
603 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
604
605 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
606
607 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
608
609 * mips.h (INSN_MULT): Added.
610
611 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
612
613 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
614
615 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
616
617 * cgen.h (CGEN_INSN_INT): New typedef.
618 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
619 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
620 (CGEN_INSN_BYTES_PTR): New typedef.
621 (CGEN_EXTRACT_INFO): New typedef.
622 (cgen_insert_fn,cgen_extract_fn): Update.
623 (cgen_opcode_table): New member `insn_endian'.
624 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
625 (insert_operand,extract_operand): Update.
626 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
627
628 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
629
630 * cgen.h (CGEN_ATTR_BOOLS): New macro.
631 (struct CGEN_HW_ENTRY): New member `attrs'.
632 (CGEN_HW_ATTR): New macro.
633 (struct CGEN_OPERAND_INSTANCE): New member `name'.
634 (CGEN_INSN_INVALID_P): New macro.
635
636 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
637
638 * hppa.h: Add "fid".
639
640 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
641
642 From Robert Andrew Dale <rob@nb.net>
643 * i386.h (i386_optab): Add AMD 3DNow! instructions.
644 (AMD_3DNOW_OPCODE): Define.
645
646 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
647
648 * d30v.h (EITHER_BUT_PREFER_MU): Define.
649
650 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
651
652 * cgen.h (cgen_insn): #if 0 out element `cdx'.
653
654 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
655
656 Move all global state data into opcode table struct, and treat
657 opcode table as something that is "opened/closed".
658 * cgen.h (CGEN_OPCODE_DESC): New type.
659 (all fns): New first arg of opcode table descriptor.
660 (cgen_set_parse_operand_fn): Add prototype.
661 (cgen_current_machine,cgen_current_endian): Delete.
662 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
663 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
664 dis_hash_table,dis_hash_table_entries.
665 (opcode_open,opcode_close): Add prototypes.
666
667 * cgen.h (cgen_insn): New element `cdx'.
668
669 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
670
671 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
672
673 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
674
675 * mn10300.h: Add "no_match_operands" field for instructions.
676 (MN10300_MAX_OPERANDS): Define.
677
678 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
679
680 * cgen.h (cgen_macro_insn_count): Declare.
681
682 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
683
684 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
685 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
686 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
687 set_{int,vma}_operand.
688
689 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
690
691 * mn10300.h: Add "machine" field for instructions.
692 (MN103, AM30): Define machine types.
693
694 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
695
696 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
697
698 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
699
700 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
701
702 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
703
704 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
705 and ud2b.
706 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
707 those that happen to be implemented on pentiums.
708
709 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
710
711 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
712 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
713 with Size16|IgnoreSize or Size32|IgnoreSize.
714
715 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
716
717 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
718 (REPE): Rename to REPE_PREFIX_OPCODE.
719 (i386_regtab_end): Remove.
720 (i386_prefixtab, i386_prefixtab_end): Remove.
721 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
722 of md_begin.
723 (MAX_OPCODE_SIZE): Define.
724 (i386_optab_end): Remove.
725 (sl_Suf): Define.
726 (sl_FP): Use sl_Suf.
727
728 * i386.h (i386_optab): Allow 16 bit displacement for `mov
729 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
730 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
731 data32, dword, and adword prefixes.
732 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
733 regs.
734
735 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
736
737 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
738
739 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
740 register operands, because this is a common idiom. Flag them with
741 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
742 fdivrp because gcc erroneously generates them. Also flag with a
743 warning.
744
745 * i386.h: Add suffix modifiers to most insns, and tighter operand
746 checks in some cases. Fix a number of UnixWare compatibility
747 issues with float insns. Merge some floating point opcodes, using
748 new FloatMF modifier.
749 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
750 consistency.
751
752 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
753 IgnoreDataSize where appropriate.
754
755 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
756
757 * i386.h: (one_byte_segment_defaults): Remove.
758 (two_byte_segment_defaults): Remove.
759 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
760
761 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
762
763 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
764 (cgen_hw_lookup_by_num): Declare.
765
766 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
767
768 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
769 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
770
771 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
772
773 * cgen.h (cgen_asm_init_parse): Delete.
774 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
775 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
776
777 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
778
779 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
780 (cgen_asm_finish_insn): Update prototype.
781 (cgen_insn): New members num, data.
782 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
783 dis_hash, dis_hash_table_size moved to ...
784 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
785 All uses updated. New members asm_hash_p, dis_hash_p.
786 (CGEN_MINSN_EXPANSION): New struct.
787 (cgen_expand_macro_insn): Declare.
788 (cgen_macro_insn_count): Declare.
789 (get_insn_operands): Update prototype.
790 (lookup_get_insn_operands): Declare.
791
792 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
793
794 * i386.h (i386_optab): Change iclrKludge and imulKludge to
795 regKludge. Add operands types for string instructions.
796
797 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
798
799 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
800 table.
801
802 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
803
804 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
805 for `gettext'.
806
807 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
808
809 * i386.h: Remove NoModrm flag from all insns: it's never checked.
810 Add IsString flag to string instructions.
811 (IS_STRING): Don't define.
812 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
813 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
814 (SS_PREFIX_OPCODE): Define.
815
816 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
817
818 * i386.h: Revert March 24 patch; no more LinearAddress.
819
820 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
821
822 * i386.h (i386_optab): Remove fwait (9b) from all floating point
823 instructions, and instead add FWait opcode modifier. Add short
824 form of fldenv and fstenv.
825 (FWAIT_OPCODE): Define.
826
827 * i386.h (i386_optab): Change second operand constraint of `mov
828 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
829 allow legal instructions such as `movl %gs,%esi'
830
831 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
832
833 * h8300.h: Various changes to fully bracket initializers.
834
835 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
836
837 * i386.h: Set LinearAddress for lidt and lgdt.
838
839 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
840
841 * cgen.h (CGEN_BOOL_ATTR): New macro.
842
843 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
844
845 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
846
847 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
848
849 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
850 (cgen_insn): Record syntax and format entries here, rather than
851 separately.
852
853 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
854
855 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
856
857 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
858
859 * cgen.h (cgen_insert_fn): Change type of result to const char *.
860 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
861 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
862
863 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
864
865 * cgen.h (lookup_insn): New argument alias_p.
866
867 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
868
869 Fix rac to accept only a0:
870 * d10v.h (OPERAND_ACC): Split into:
871 (OPERAND_ACC0, OPERAND_ACC1) .
872 (OPERAND_GPR): Define.
873
874 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
875
876 * cgen.h (CGEN_FIELDS): Define here.
877 (CGEN_HW_ENTRY): New member `type'.
878 (hw_list): Delete decl.
879 (enum cgen_mode): Declare.
880 (CGEN_OPERAND): New member `hw'.
881 (enum cgen_operand_instance_type): Declare.
882 (CGEN_OPERAND_INSTANCE): New type.
883 (CGEN_INSN): New member `operands'.
884 (CGEN_OPCODE_DATA): Make hw_list const.
885 (get_insn_operands,lookup_insn): Add prototypes for.
886
887 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
888
889 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
890 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
891 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
892 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
893
894 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
895
896 * cgen.h: Correct typo in comment end marker.
897
898 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
899
900 * tic30.h: New file.
901
902 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
903
904 * cgen.h: Add prototypes for cgen_save_fixups(),
905 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
906 of cgen_asm_finish_insn() to return a char *.
907
908 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
909
910 * cgen.h: Formatting changes to improve readability.
911
912 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
913
914 * cgen.h (*): Clean up pass over `struct foo' usage.
915 (CGEN_ATTR): Make unsigned char.
916 (CGEN_ATTR_TYPE): Update.
917 (CGEN_ATTR_{ENTRY,TABLE}): New types.
918 (cgen_base): Move member `attrs' to cgen_insn.
919 (CGEN_KEYWORD): New member `null_entry'.
920 (CGEN_{SYNTAX,FORMAT}): New types.
921 (cgen_insn): Format and syntax separated from each other.
922
923 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
924
925 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
926 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
927 flags_{used,set} long.
928 (d30v_operand): Make flags field long.
929
930 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
931
932 * m68k.h: Fix comment describing operand types.
933
934 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
935
936 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
937 everything else after down.
938
939 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
940
941 * d10v.h (OPERAND_FLAG): Split into:
942 (OPERAND_FFLAG, OPERAND_CFLAG) .
943
944 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
945
946 * mips.h (struct mips_opcode): Changed comments to reflect new
947 field usage.
948
949 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
950
951 * mips.h: Added to comments a quick-ref list of all assigned
952 operand type characters.
953 (OP_{MASK,SH}_PERFREG): New macros.
954
955 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
956
957 * sparc.h: Add '_' and '/' for v9a asr's.
958 Patch from David Miller <davem@vger.rutgers.edu>
959
960 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
961
962 * h8300.h: Bit ops with absolute addresses not in the 8 bit
963 area are not available in the base model (H8/300).
964
965 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
966
967 * m68k.h: Remove documentation of ` operand specifier.
968
969 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
970
971 * m68k.h: Document q and v operand specifiers.
972
973 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
974
975 * v850.h (struct v850_opcode): Add processors field.
976 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
977 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
978 (PROCESSOR_V850EA): New bit constants.
979
980 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
981
982 Merge changes from Martin Hunt:
983
984 * d30v.h: Allow up to 64 control registers. Add
985 SHORT_A5S format.
986
987 * d30v.h (LONG_Db): New form for delayed branches.
988
989 * d30v.h: (LONG_Db): New form for repeati.
990
991 * d30v.h (SHORT_D2B): New form.
992
993 * d30v.h (SHORT_A2): New form.
994
995 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
996 registers are used. Needed for VLIW optimization.
997
998 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
999
1000 * cgen.h: Move assembler interface section
1001 up so cgen_parse_operand_result is defined for cgen_parse_address.
1002 (cgen_parse_address): Update prototype.
1003
1004 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1005
1006 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1007
1008 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1009
1010 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1011 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1012 <paubert@iram.es>.
1013
1014 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1015 <paubert@iram.es>.
1016
1017 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1018 <paubert@iram.es>.
1019
1020 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1021 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1022
1023 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1024
1025 * v850.h (V850_NOT_R0): New flag.
1026
1027 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1028
1029 * v850.h (struct v850_opcode): Remove flags field.
1030
1031 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1032
1033 * v850.h (struct v850_opcode): Add flags field.
1034 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1035 fields.
1036 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1037 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1038
1039 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1040
1041 * arc.h: New file.
1042
1043 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1044
1045 * sparc.h (sparc_opcodes): Declare as const.
1046
1047 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1048
1049 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1050 uses single or double precision floating point resources.
1051 (INSN_NO_ISA, INSN_ISA1): Define.
1052 (cpu specific INSN macros): Tweak into bitmasks outside the range
1053 of INSN_ISA field.
1054
1055 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1056
1057 * i386.h: Fix pand opcode.
1058
1059 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1060
1061 * mips.h: Widen INSN_ISA and move it to a more convenient
1062 bit position. Add INSN_3900.
1063
1064 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1065
1066 * mips.h (struct mips_opcode): added new field membership.
1067
1068 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1069
1070 * i386.h (movd): only Reg32 is allowed.
1071
1072 * i386.h: add fcomp and ud2. From Wayne Scott
1073 <wscott@ichips.intel.com>.
1074
1075 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1076
1077 * i386.h: Add MMX instructions.
1078
1079 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1080
1081 * i386.h: Remove W modifier from conditional move instructions.
1082
1083 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1084
1085 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1086 with no arguments to match that generated by the UnixWare
1087 assembler.
1088
1089 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1090
1091 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1092 (cgen_parse_operand_fn): Declare.
1093 (cgen_init_parse_operand): Declare.
1094 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1095 new argument `want'.
1096 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1097 (enum cgen_parse_operand_type): New enum.
1098
1099 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1100
1101 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1102
1103 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1104
1105 * cgen.h: New file.
1106
1107 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1108
1109 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1110 fdivrp.
1111
1112 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1113
1114 * v850.h (extract): Make unsigned.
1115
1116 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1117
1118 * i386.h: Add iclr.
1119
1120 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1121
1122 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1123 take a direction bit.
1124
1125 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1126
1127 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1128
1129 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1130
1131 * sparc.h: Include <ansidecl.h>. Update function declarations to
1132 use prototypes, and to use const when appropriate.
1133
1134 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1135
1136 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1137
1138 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1139
1140 * d10v.h: Change pre_defined_registers to
1141 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1142
1143 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1144
1145 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1146 Change mips_opcodes from const array to a pointer,
1147 and change bfd_mips_num_opcodes from const int to int,
1148 so that we can increase the size of the mips opcodes table
1149 dynamically.
1150
1151 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1152
1153 * d30v.h (FLAG_X): Remove unused flag.
1154
1155 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1156
1157 * d30v.h: New file.
1158
1159 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1160
1161 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1162 (PDS_VALUE): Macro to access value field of predefined symbols.
1163 (tic80_next_predefined_symbol): Add prototype.
1164
1165 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1166
1167 * tic80.h (tic80_symbol_to_value): Change prototype to match
1168 change in function, added class parameter.
1169
1170 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1171
1172 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1173 endmask fields, which are somewhat weird in that 0 and 32 are
1174 treated exactly the same.
1175
1176 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1177
1178 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1179 rather than a constant that is 2**X. Reorder them to put bits for
1180 operands that have symbolic names in the upper bits, so they can
1181 be packed into an int where the lower bits contain the value that
1182 corresponds to that symbolic name.
1183 (predefined_symbo): Add struct.
1184 (tic80_predefined_symbols): Declare array of translations.
1185 (tic80_num_predefined_symbols): Declare size of that array.
1186 (tic80_value_to_symbol): Declare function.
1187 (tic80_symbol_to_value): Declare function.
1188
1189 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1190
1191 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1192
1193 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1194
1195 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1196 be the destination register.
1197
1198 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1199
1200 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1201 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1202 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1203 that the opcode can have two vector instructions in a single
1204 32 bit word and we have to encode/decode both.
1205
1206 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1207
1208 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1209 TIC80_OPERAND_RELATIVE for PC relative.
1210 (TIC80_OPERAND_BASEREL): New flag bit for register
1211 base relative.
1212
1213 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1214
1215 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1216
1217 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1218
1219 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1220 ":s" modifier for scaling.
1221
1222 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1223
1224 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1225 (TIC80_OPERAND_M_LI): Ditto
1226
1227 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1228
1229 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1230 (TIC80_OPERAND_CC): New define for condition code operand.
1231 (TIC80_OPERAND_CR): New define for control register operand.
1232
1233 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1234
1235 * tic80.h (struct tic80_opcode): Name changed.
1236 (struct tic80_opcode): Remove format field.
1237 (struct tic80_operand): Add insertion and extraction functions.
1238 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1239 correct ones.
1240 (FMT_*): Ditto.
1241
1242 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1243
1244 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1245 type IV instruction offsets.
1246
1247 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1248
1249 * tic80.h: New file.
1250
1251 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1252
1253 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1254
1255 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1256
1257 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1258 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1259 * v850.h: Fix comment, v850_operand not powerpc_operand.
1260
1261 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1262
1263 * mn10200.h: Flesh out structures and definitions needed by
1264 the mn10200 assembler & disassembler.
1265
1266 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1267
1268 * mips.h: Add mips16 definitions.
1269
1270 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1271
1272 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1273
1274 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1275
1276 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1277 (MN10300_OPERAND_MEMADDR): Define.
1278
1279 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1280
1281 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1282
1283 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1284
1285 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1286
1287 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1288
1289 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1290
1291 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1292
1293 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1294
1295 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1296
1297 * alpha.h: Don't include "bfd.h"; private relocation types are now
1298 negative to minimize problems with shared libraries. Organize
1299 instruction subsets by AMASK extensions and PALcode
1300 implementation.
1301 (struct alpha_operand): Move flags slot for better packing.
1302
1303 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1304
1305 * v850.h (V850_OPERAND_RELAX): New operand flag.
1306
1307 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1308
1309 * mn10300.h (FMT_*): Move operand format definitions
1310 here.
1311
1312 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1313
1314 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1315
1316 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1317
1318 * mn10300.h (mn10300_opcode): Add "format" field.
1319 (MN10300_OPERAND_*): Define.
1320
1321 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1322
1323 * mn10x00.h: Delete.
1324 * mn10200.h, mn10300.h: New files.
1325
1326 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1327
1328 * mn10x00.h: New file.
1329
1330 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1331
1332 * v850.h: Add new flag to indicate this instruction uses a PC
1333 displacement.
1334
1335 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1336
1337 * h8300.h (stmac): Add missing instruction.
1338
1339 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1340
1341 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1342 field.
1343
1344 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1345
1346 * v850.h (V850_OPERAND_EP): Define.
1347
1348 * v850.h (v850_opcode): Add size field.
1349
1350 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1351
1352 * v850.h (v850_operands): Add insert and extract fields, pointers
1353 to functions used to handle unusual operand encoding.
1354 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1355 V850_OPERAND_SIGNED): Defined.
1356
1357 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1358
1359 * v850.h (v850_operands): Add flags field.
1360 (OPERAND_REG, OPERAND_NUM): Defined.
1361
1362 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1363
1364 * v850.h: New file.
1365
1366 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1367
1368 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1369 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1370 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1371 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1372 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1373 Defined.
1374
1375 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1376
1377 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1378 a 3 bit space id instead of a 2 bit space id.
1379
1380 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1381
1382 * d10v.h: Add some additional defines to support the
1383 assembler in determining which operations can be done in parallel.
1384
1385 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1386
1387 * h8300.h (SN): Define.
1388 (eepmov.b): Renamed from "eepmov"
1389 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1390 with them.
1391
1392 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1393
1394 * d10v.h (OPERAND_SHIFT): New operand flag.
1395
1396 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1397
1398 * d10v.h: Changes for divs, parallel-only instructions, and
1399 signed numbers.
1400
1401 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1402
1403 * d10v.h (pd_reg): Define. Putting the definition here allows
1404 the assembler and disassembler to share the same struct.
1405
1406 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1407
1408 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1409 Williams <steve@icarus.com>.
1410
1411 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1412
1413 * d10v.h: New file.
1414
1415 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1416
1417 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1418
1419 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1420
1421 * m68k.h (mcf5200): New macro.
1422 Document names of coldfire control registers.
1423
1424 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1425
1426 * h8300.h (SRC_IN_DST): Define.
1427
1428 * h8300.h (UNOP3): Mark the register operand in this insn
1429 as a source operand, not a destination operand.
1430 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1431 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1432 register operand with SRC_IN_DST.
1433
1434 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1435
1436 * alpha.h: New file.
1437
1438 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1439
1440 * rs6k.h: Remove obsolete file.
1441
1442 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1443
1444 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1445 fdivp, and fdivrp. Add ffreep.
1446
1447 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1448
1449 * h8300.h: Reorder various #defines for readability.
1450 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1451 (BITOP): Accept additional (unused) argument. All callers changed.
1452 (EBITOP): Likewise.
1453 (O_LAST): Bump.
1454 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1455
1456 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1457 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1458 (BITOP, EBITOP): Handle new H8/S addressing modes for
1459 bit insns.
1460 (UNOP3): Handle new shift/rotate insns on the H8/S.
1461 (insns using exr): New instructions.
1462 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1463
1464 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1465
1466 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1467 was incorrect.
1468
1469 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1470
1471 * h8300.h (START): Remove.
1472 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1473 and mov.l insns that can be relaxed.
1474
1475 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1476
1477 * i386.h: Remove Abs32 from lcall.
1478
1479 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1480
1481 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1482 (SLCPOP): New macro.
1483 Mark X,Y opcode letters as in use.
1484
1485 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1486
1487 * sparc.h (F_FLOAT, F_FBR): Define.
1488
1489 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1490
1491 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1492 from all insns.
1493 (ABS8SRC,ABS8DST): Add ABS8MEM.
1494 (add.l): Fix reg+reg variant.
1495 (eepmov.w): Renamed from eepmovw.
1496 (ldc,stc): Fix many cases.
1497
1498 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1499
1500 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1501
1502 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1503
1504 * sparc.h (O): Mark operand letter as in use.
1505
1506 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1507
1508 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1509 Mark operand letters uU as in use.
1510
1511 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1512
1513 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1514 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1515 (SPARC_OPCODE_SUPPORTED): New macro.
1516 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1517 (F_NOTV9): Delete.
1518
1519 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1520
1521 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1522 declaration consistent with return type in definition.
1523
1524 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1525
1526 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1527
1528 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1529
1530 * i386.h (i386_regtab): Add 80486 test registers.
1531
1532 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1533
1534 * i960.h (I_HX): Define.
1535 (i960_opcodes): Add HX instruction.
1536
1537 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1538
1539 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1540 and fclex.
1541
1542 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1543
1544 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1545 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1546 (bfd_* defines): Delete.
1547 (sparc_opcode_archs): Replaces architecture_pname.
1548 (sparc_opcode_lookup_arch): Declare.
1549 (NUMOPCODES): Delete.
1550
1551 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1552
1553 * sparc.h (enum sparc_architecture): Add v9a.
1554 (ARCHITECTURES_CONFLICT_P): Update.
1555
1556 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1557
1558 * i386.h: Added Pentium Pro instructions.
1559
1560 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1561
1562 * m68k.h: Document new 'W' operand place.
1563
1564 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1565
1566 * hppa.h: Add lci and syncdma instructions.
1567
1568 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1569
1570 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1571 instructions.
1572
1573 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1574
1575 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1576 assembler's -mcom and -many switches.
1577
1578 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1579
1580 * i386.h: Fix cmpxchg8b extension opcode description.
1581
1582 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1583
1584 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1585 and register cr4.
1586
1587 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1588
1589 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1590
1591 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1592
1593 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1594
1595 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1596
1597 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1598
1599 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1600
1601 * m68kmri.h: Remove.
1602
1603 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1604 declarations. Remove F_ALIAS and flag field of struct
1605 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1606 int. Make name and args fields of struct m68k_opcode const.
1607
1608 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1609
1610 * sparc.h (F_NOTV9): Define.
1611
1612 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1613
1614 * mips.h (INSN_4010): Define.
1615
1616 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1617
1618 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1619
1620 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1621 * m68k.h: Fix argument descriptions of coprocessor
1622 instructions to allow only alterable operands where appropriate.
1623 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1624 (m68k_opcode_aliases): Add more aliases.
1625
1626 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1627
1628 * m68k.h: Added explcitly short-sized conditional branches, and a
1629 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1630 svr4-based configurations.
1631
1632 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1633
1634 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1635 * i386.h: added missing Data16/Data32 flags to a few instructions.
1636
1637 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1638
1639 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1640 (OP_MASK_BCC, OP_SH_BCC): Define.
1641 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1642 (OP_MASK_CCC, OP_SH_CCC): Define.
1643 (INSN_READ_FPR_R): Define.
1644 (INSN_RFE): Delete.
1645
1646 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1647
1648 * m68k.h (enum m68k_architecture): Deleted.
1649 (struct m68k_opcode_alias): New type.
1650 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1651 matching constraints, values and flags. As a side effect of this,
1652 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1653 as I know were never used, now may need re-examining.
1654 (numopcodes): Now const.
1655 (m68k_opcode_aliases, numaliases): New variables.
1656 (endop): Deleted.
1657 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1658 m68k_opcode_aliases; update declaration of m68k_opcodes.
1659
1660 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1661
1662 * hppa.h (delay_type): Delete unused enumeration.
1663 (pa_opcode): Replace unused delayed field with an architecture
1664 field.
1665 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1666
1667 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1668
1669 * mips.h (INSN_ISA4): Define.
1670
1671 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1672
1673 * mips.h (M_DLA_AB, M_DLI): Define.
1674
1675 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1676
1677 * hppa.h (fstwx): Fix single-bit error.
1678
1679 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1680
1681 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1682
1683 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1684
1685 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1686 debug registers. From Charles Hannum (mycroft@netbsd.org).
1687
1688 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1689
1690 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1691 i386 support:
1692 * i386.h (MOV_AX_DISP32): New macro.
1693 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1694 of several call/return instructions.
1695 (ADDR_PREFIX_OPCODE): New macro.
1696
1697 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1698
1699 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1700
1701 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1702 it pointer to const char;
1703 (struct vot, field `name'): ditto.
1704
1705 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1706
1707 * vax.h: Supply and properly group all values in end sentinel.
1708
1709 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1710
1711 * mips.h (INSN_ISA, INSN_4650): Define.
1712
1713 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1714
1715 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1716 systems with a separate instruction and data cache, such as the
1717 29040, these instructions take an optional argument.
1718
1719 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1720
1721 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1722 INSN_TRAP.
1723
1724 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1725
1726 * mips.h (INSN_STORE_MEMORY): Define.
1727
1728 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1729
1730 * sparc.h: Document new operand type 'x'.
1731
1732 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1733
1734 * i960.h (I_CX2): New instruction category. It includes
1735 instructions available on Cx and Jx processors.
1736 (I_JX): New instruction category, for JX-only instructions.
1737 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1738 Jx-only instructions, in I_JX category.
1739
1740 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1741
1742 * ns32k.h (endop): Made pointer const too.
1743
1744 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1745
1746 * ns32k.h: Drop Q operand type as there is no correct use
1747 for it. Add I and Z operand types which allow better checking.
1748
1749 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1750
1751 * h8300.h (xor.l) :fix bit pattern.
1752 (L_2): New size of operand.
1753 (trapa): Use it.
1754
1755 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1756
1757 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1758
1759 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1760
1761 * sparc.h: Include v9 definitions.
1762
1763 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1764
1765 * m68k.h (m68060): Defined.
1766 (m68040up, mfloat, mmmu): Include it.
1767 (struct m68k_opcode): Widen `arch' field.
1768 (m68k_opcodes): Updated for M68060. Removed comments that were
1769 instructions commented out by "JF" years ago.
1770
1771 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1772
1773 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1774 add a one-bit `flags' field.
1775 (F_ALIAS): New macro.
1776
1777 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1778
1779 * h8300.h (dec, inc): Get encoding right.
1780
1781 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1782
1783 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1784 a flag instead.
1785 (PPC_OPERAND_SIGNED): Define.
1786 (PPC_OPERAND_SIGNOPT): Define.
1787
1788 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1789
1790 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1791 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1792
1793 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1794
1795 * i386.h: Reverse last change. It'll be handled in gas instead.
1796
1797 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1798
1799 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1800 slower on the 486 and used the implicit shift count despite the
1801 explicit operand. The one-operand form is still available to get
1802 the shorter form with the implicit shift count.
1803
1804 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1805
1806 * hppa.h: Fix typo in fstws arg string.
1807
1808 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1809
1810 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1811
1812 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1813
1814 * ppc.h (PPC_OPCODE_601): Define.
1815
1816 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1817
1818 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1819 (so we can determine valid completers for both addb and addb[tf].)
1820
1821 * hppa.h (xmpyu): No floating point format specifier for the
1822 xmpyu instruction.
1823
1824 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1825
1826 * ppc.h (PPC_OPERAND_NEXT): Define.
1827 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1828 (struct powerpc_macro): Define.
1829 (powerpc_macros, powerpc_num_macros): Declare.
1830
1831 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1832
1833 * ppc.h: New file. Header file for PowerPC opcode table.
1834
1835 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1836
1837 * hppa.h: More minor template fixes for sfu and copr (to allow
1838 for easier disassembly).
1839
1840 * hppa.h: Fix templates for all the sfu and copr instructions.
1841
1842 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1843
1844 * i386.h (push): Permit Imm16 operand too.
1845
1846 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1847
1848 * h8300.h (andc): Exists in base arch.
1849
1850 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1851
1852 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1853 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1854
1855 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1856
1857 * hppa.h: Add FP quadword store instructions.
1858
1859 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1860
1861 * mips.h: (M_J_A): Added.
1862 (M_LA): Removed.
1863
1864 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1865
1866 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1867 <mellon@pepper.ncd.com>.
1868
1869 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1870
1871 * hppa.h: Immediate field in probei instructions is unsigned,
1872 not low-sign extended.
1873
1874 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1875
1876 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1877
1878 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1879
1880 * i386.h: Add "fxch" without operand.
1881
1882 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1883
1884 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1885
1886 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1887
1888 * hppa.h: Add gfw and gfr to the opcode table.
1889
1890 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1891
1892 * m88k.h: extended to handle m88110.
1893
1894 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1895
1896 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1897 addresses.
1898
1899 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1900
1901 * i960.h (i960_opcodes): Properly bracket initializers.
1902
1903 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1904
1905 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1906
1907 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1908
1909 * m68k.h (two): Protect second argument with parentheses.
1910
1911 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1912
1913 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1914 Deleted old in/out instructions in "#if 0" section.
1915
1916 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1917
1918 * i386.h (i386_optab): Properly bracket initializers.
1919
1920 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1921
1922 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1923 Jeff Law, law@cs.utah.edu).
1924
1925 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1926
1927 * i386.h (lcall): Accept Imm32 operand also.
1928
1929 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1930
1931 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1932 (M_DABS): Added.
1933
1934 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1935
1936 * mips.h (INSN_*): Changed values. Removed unused definitions.
1937 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1938 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1939 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1940 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1941 (M_*): Added new values for r6000 and r4000 macros.
1942 (ANY_DELAY): Removed.
1943
1944 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1945
1946 * mips.h: Added M_LI_S and M_LI_SS.
1947
1948 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1949
1950 * h8300.h: Get some rare mov.bs correct.
1951
1952 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1953
1954 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1955 been included.
1956
1957 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1958
1959 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1960 jump instructions, for use in disassemblers.
1961
1962 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1963
1964 * m88k.h: Make bitfields just unsigned, not unsigned long or
1965 unsigned short.
1966
1967 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1968
1969 * hppa.h: New argument type 'y'. Use in various float instructions.
1970
1971 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1972
1973 * hppa.h (break): First immediate field is unsigned.
1974
1975 * hppa.h: Add rfir instruction.
1976
1977 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1978
1979 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1980
1981 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1982
1983 * mips.h: Reworked the hazard information somewhat, and fixed some
1984 bugs in the instruction hazard descriptions.
1985
1986 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1987
1988 * m88k.h: Corrected a couple of opcodes.
1989
1990 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1991
1992 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1993 new version includes instruction hazard information, but is
1994 otherwise reasonably similar.
1995
1996 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1997
1998 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1999
2000 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2001
2002 Patches from Jeff Law, law@cs.utah.edu:
2003 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2004 Make the tables be the same for the following instructions:
2005 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2006 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2007 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2008 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2009 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2010 "fcmp", and "ftest".
2011
2012 * hppa.h: Make new and old tables the same for "break", "mtctl",
2013 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2014 Fix typo in last patch. Collapse several #ifdefs into a
2015 single #ifdef.
2016
2017 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2018 of the comments up-to-date.
2019
2020 * hppa.h: Update "free list" of letters and update
2021 comments describing each letter's function.
2022
2023 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2024
2025 * h8300.h: checkpoint, includes H8/300-H opcodes.
2026
2027 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2028
2029 * Patches from Jeffrey Law <law@cs.utah.edu>.
2030 * hppa.h: Rework single precision FP
2031 instructions so that they correctly disassemble code
2032 PA1.1 code.
2033
2034 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2035
2036 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2037 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2038
2039 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2040
2041 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2042 gdb will define it for now.
2043
2044 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2045
2046 * sparc.h: Don't end enumerator list with comma.
2047
2048 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2049
2050 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2051 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2052 ("bc2t"): Correct typo.
2053 ("[ls]wc[023]"): Use T rather than t.
2054 ("c[0123]"): Define general coprocessor instructions.
2055
2056 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2057
2058 * m68k.h: Move split point for gcc compilation more towards
2059 middle.
2060
2061 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2062
2063 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2064 simply wrong, ics, rfi, & rfsvc were missing).
2065 Add "a" to opr_ext for "bb". Doc fix.
2066
2067 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2068
2069 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2070 * mips.h: Add casts, to suppress warnings about shifting too much.
2071 * m68k.h: Document the placement code '9'.
2072
2073 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2074
2075 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2076 allows callers to break up the large initialized struct full of
2077 opcodes into two half-sized ones. This permits GCC to compile
2078 this module, since it takes exponential space for initializers.
2079 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2080
2081 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2082
2083 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2084 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2085 initialized structs in it.
2086
2087 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2088
2089 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2090 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2091 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2092
2093 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2094
2095 * mips.h: document "i" and "j" operands correctly.
2096
2097 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2098
2099 * mips.h: Removed endianness dependency.
2100
2101 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2102
2103 * h8300.h: include info on number of cycles per instruction.
2104
2105 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2106
2107 * hppa.h: Move handy aliases to the front. Fix masks for extract
2108 and deposit instructions.
2109
2110 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2111
2112 * i386.h: accept shld and shrd both with and without the shift
2113 count argument, which is always %cl.
2114
2115 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2116
2117 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2118 (one_byte_segment_defaults, two_byte_segment_defaults,
2119 i386_prefixtab_end): Ditto.
2120
2121 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2122
2123 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2124 for operand 2; from John Carr, jfc@dsg.dec.com.
2125
2126 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2127
2128 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2129 always use 16-bit offsets. Makes calculated-size jump tables
2130 feasible.
2131
2132 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2133
2134 * i386.h: Fix one-operand forms of in* and out* patterns.
2135
2136 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2137
2138 * m68k.h: Added CPU32 support.
2139
2140 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2141
2142 * mips.h (break): Disassemble the argument. Patch from
2143 jonathan@cs.stanford.edu (Jonathan Stone).
2144
2145 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2146
2147 * m68k.h: merged Motorola and MIT syntax.
2148
2149 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2150
2151 * m68k.h (pmove): make the tests less strict, the 68k book is
2152 wrong.
2153
2154 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2155
2156 * m68k.h (m68ec030): Defined as alias for 68030.
2157 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2158 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2159 them. Tightened description of "fmovex" to distinguish it from
2160 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2161 up descriptions that claimed versions were available for chips not
2162 supporting them. Added "pmovefd".
2163
2164 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2165
2166 * m68k.h: fix where the . goes in divull
2167
2168 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2169
2170 * m68k.h: the cas2 instruction is supposed to be written with
2171 indirection on the last two operands, which can be either data or
2172 address registers. Added a new operand type 'r' which accepts
2173 either register type. Added new cases for cas2l and cas2w which
2174 use them. Corrected masks for cas2 which failed to recognize use
2175 of address register.
2176
2177 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2178
2179 * m68k.h: Merged in patches (mostly m68040-specific) from
2180 Colin Smith <colin@wrs.com>.
2181
2182 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2183 base). Also cleaned up duplicates, re-ordered instructions for
2184 the sake of dis-assembling (so aliases come after standard names).
2185 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2186
2187 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2188
2189 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2190 all missing .s
2191
2192 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2193
2194 * sparc.h: Moved tables to BFD library.
2195
2196 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2197
2198 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2199
2200 * h8300.h: Finish filling in all the holes in the opcode table,
2201 so that the Lucid C compiler can digest this as well...
2202
2203 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2204
2205 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2206 Fix opcodes on various sizes of fild/fist instructions
2207 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2208 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2209
2210 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2211
2212 * h8300.h: Fill in all the holes in the opcode table so that the
2213 losing HPUX C compiler can digest this...
2214
2215 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2216
2217 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2218 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2219
2220 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2221
2222 * sparc.h: Add new architecture variant sparclite; add its scan
2223 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2224
2225 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2226
2227 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2228 fy@lucid.com).
2229
2230 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2231
2232 * rs6k.h: New version from IBM (Metin).
2233
2234 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2235
2236 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2237 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2238
2239 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2240
2241 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2242
2243 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2244
2245 * m68k.h (one, two): Cast macro args to unsigned to suppress
2246 complaints from compiler and lint about integer overflow during
2247 shift.
2248
2249 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2250
2251 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2252
2253 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2254
2255 * mips.h: Make bitfield layout depend on the HOST compiler,
2256 not on the TARGET system.
2257
2258 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2259
2260 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2261 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2262 <TRANLE@INTELLICORP.COM>.
2263
2264 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2265
2266 * h8300.h: turned op_type enum into #define list
2267
2268 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2269
2270 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2271 similar instructions -- they've been renamed to "fitoq", etc.
2272 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2273 number of arguments.
2274 * h8300.h: Remove extra ; which produces compiler warning.
2275
2276 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2277
2278 * sparc.h: fix opcode for tsubcctv.
2279
2280 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2281
2282 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2283
2284 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2285
2286 * sparc.h (nop): Made the 'lose' field be even tighter,
2287 so only a standard 'nop' is disassembled as a nop.
2288
2289 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2290
2291 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2292 disassembled as a nop.
2293
2294 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2295
2296 * sparc.h: fix a typo.
2297
2298 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2299
2300 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2301 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2302 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2303
2304 \f
2305 Local Variables:
2306 version-control: never
2307 End:
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