gas/
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2000-10-20 Jakub Jelinek <jakub@redhat.com>
2
3 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
4 Note that '3' is used for siam operand.
5
6 2000-09-22 Jim Wilson <wilson@cygnus.com>
7
8 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
9
10 2000-09-13 Anders Norlander <anorland@acc.umu.se>
11
12 * mips.h: Use defines instead of hard-coded processor numbers.
13 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
14 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
15 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
16 CPU_4KC, CPU_4KM, CPU_4KP): Define..
17 (OPCODE_IS_MEMBER): Use new defines.
18 (OP_MASK_SEL, OP_SH_SEL): Define.
19 (OP_MASK_CODE20, OP_SH_CODE20): Define.
20 Add 'P' to used characters.
21 Use 'H' for coprocessor select field.
22 Use 'm' for 20 bit breakpoint code.
23 Document new arg characters and add to used characters.
24 (INSN_MIPS32): New define for MIPS32 extensions.
25 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
26
27 2000-09-05 Alan Modra <alan@linuxcare.com.au>
28
29 * hppa.h: Mention cz completer.
30
31 2000-08-16 Jim Wilson <wilson@cygnus.com>
32
33 * ia64.h (IA64_OPCODE_POSTINC): New.
34
35 2000-08-15 H.J. Lu <hjl@gnu.org>
36
37 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
38 IgnoreSize change.
39
40 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
41
42 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
43 Move related opcodes closer to each other.
44 Minor changes in comments, list undefined opcodes.
45
46 2000-07-26 Dave Brolley <brolley@redhat.com>
47
48 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
49
50 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
51
52 cris.h: New file.
53
54 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
55
56 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
57 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
58 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
59 (AVR_ISA_M83): Define for ATmega83, ATmega85.
60 (espm): Remove, because ESPM removed in databook update.
61 (eicall, eijmp): Move to the end of opcode table.
62
63 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
64
65 * m68hc11.h: New file for support of Motorola 68hc11.
66
67 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
68
69 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
70
71 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
72
73 * avr.h: New file with AVR opcodes.
74
75 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
76
77 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
78
79 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
80
81 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
82
83 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
84
85 * i386.h: Use sl_FP, not sl_Suf for fild.
86
87 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
88
89 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
90 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
91 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
92 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
93
94 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
95
96 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
97
98 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
99 Alexander Sokolov <robocop@netlink.ru>
100
101 * i386.h (i386_optab): Add cpu_flags for all instructions.
102
103 2000-05-13 Alan Modra <alan@linuxcare.com.au>
104
105 From Gavin Romig-Koch <gavin@cygnus.com>
106 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
107
108 2000-05-04 Timothy Wall <twall@cygnus.com>
109
110 * tic54x.h: New.
111
112 2000-05-03 J.T. Conklin <jtc@redback.com>
113
114 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
115 (PPC_OPERAND_VR): New operand flag for vector registers.
116
117 2000-05-01 Kazu Hirata <kazu@hxi.com>
118
119 * h8300.h (EOP): Add missing initializer.
120
121 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
122
123 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
124 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
125 New operand types l,y,&,fe,fE,fx added to support above forms.
126 (pa_opcodes): Replaced usage of 'x' as source/target for
127 floating point double-word loads/stores with 'fx'.
128
129 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
130 David Mosberger <davidm@hpl.hp.com>
131 Timothy Wall <twall@cygnus.com>
132 Jim Wilson <wilson@cygnus.com>
133
134 * ia64.h: New file.
135
136 2000-03-27 Nick Clifton <nickc@cygnus.com>
137
138 * d30v.h (SHORT_A1): Fix value.
139 (SHORT_AR): Renumber so that it is at the end of the list of short
140 instructions, not the end of the list of long instructions.
141
142 2000-03-26 Alan Modra <alan@linuxcare.com>
143
144 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
145 problem isn't really specific to Unixware.
146 (OLDGCC_COMPAT): Define.
147 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
148 destination %st(0).
149 Fix lots of comments.
150
151 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
152
153 * d30v.h:
154 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
155 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
156 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
157 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
158 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
159 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
160 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
161
162 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
163
164 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
165 fistpd without suffix.
166
167 2000-02-24 Nick Clifton <nickc@cygnus.com>
168
169 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
170 'signed_overflow_ok_p'.
171 Delete prototypes for cgen_set_flags() and cgen_get_flags().
172
173 2000-02-24 Andrew Haley <aph@cygnus.com>
174
175 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
176 (CGEN_CPU_TABLE): flags: new field.
177 Add prototypes for new functions.
178
179 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
180
181 * i386.h: Add some more UNIXWARE_COMPAT comments.
182
183 2000-02-23 Linas Vepstas <linas@linas.org>
184
185 * i370.h: New file.
186
187 2000-02-22 Andrew Haley <aph@cygnus.com>
188
189 * mips.h: (OPCODE_IS_MEMBER): Add comment.
190
191 1999-12-30 Andrew Haley <aph@cygnus.com>
192
193 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
194 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
195 insns.
196
197 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
198
199 * i386.h: Qualify intel mode far call and jmp with x_Suf.
200
201 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
202
203 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
204 indirect jumps and calls. Add FF/3 call for intel mode.
205
206 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
207
208 * mn10300.h: Add new operand types. Add new instruction formats.
209
210 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
211
212 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
213 instruction.
214
215 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
216
217 * mips.h (INSN_ISA5): New.
218
219 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
220
221 * mips.h (OPCODE_IS_MEMBER): New.
222
223 1999-10-29 Nick Clifton <nickc@cygnus.com>
224
225 * d30v.h (SHORT_AR): Define.
226
227 1999-10-18 Michael Meissner <meissner@cygnus.com>
228
229 * alpha.h (alpha_num_opcodes): Convert to unsigned.
230 (alpha_num_operands): Ditto.
231
232 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
233
234 * hppa.h (pa_opcodes): Add load and store cache control to
235 instructions. Add ordered access load and store.
236
237 * hppa.h (pa_opcode): Add new entries for addb and addib.
238
239 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
240
241 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
242
243 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
244
245 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
246
247 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
248
249 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
250 and "be" using completer prefixes.
251
252 * hppa.h (pa_opcodes): Add initializers to silence compiler.
253
254 * hppa.h: Update comments about character usage.
255
256 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
257
258 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
259 up the new fstw & bve instructions.
260
261 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
262
263 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
264 instructions.
265
266 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
267
268 * hppa.h (pa_opcodes): Add long offset double word load/store
269 instructions.
270
271 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
272 stores.
273
274 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
275
276 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
277
278 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
279
280 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
281
282 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
283
284 * hppa.h (pa_opcodes): Add support for "b,l".
285
286 * hppa.h (pa_opcodes): Add support for "b,gate".
287
288 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
289
290 * hppa.h (pa_opcodes): Use 'fX' for first register operand
291 in xmpyu.
292
293 * hppa.h (pa_opcodes): Fix mask for probe and probei.
294
295 * hppa.h (pa_opcodes): Fix mask for depwi.
296
297 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
298
299 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
300 an explicit output argument.
301
302 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
303
304 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
305 Add a few PA2.0 loads and store variants.
306
307 1999-09-04 Steve Chamberlain <sac@pobox.com>
308
309 * pj.h: New file.
310
311 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
312
313 * i386.h (i386_regtab): Move %st to top of table, and split off
314 other fp reg entries.
315 (i386_float_regtab): To here.
316
317 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
318
319 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
320 by 'f'.
321
322 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
323 Add supporting args.
324
325 * hppa.h: Document new completers and args.
326 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
327 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
328 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
329 pmenb and pmdis.
330
331 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
332 hshr, hsub, mixh, mixw, permh.
333
334 * hppa.h (pa_opcodes): Change completers in instructions to
335 use 'c' prefix.
336
337 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
338 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
339
340 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
341 fnegabs to use 'I' instead of 'F'.
342
343 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
344
345 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
346 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
347 Alphabetically sort PIII insns.
348
349 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
350
351 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
352
353 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
354
355 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
356 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
357
358 * hppa.h: Document 64 bit condition completers.
359
360 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
361
362 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
363
364 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
365
366 * i386.h (i386_optab): Add DefaultSize modifier to all insns
367 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
368 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
369
370 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
371 Jeff Law <law@cygnus.com>
372
373 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
374
375 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
376
377 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
378 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
379
380 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
381
382 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
383
384 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
385
386 * hppa.h (struct pa_opcode): Add new field "flags".
387 (FLAGS_STRICT): Define.
388
389 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
390 Jeff Law <law@cygnus.com>
391
392 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
393
394 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
395
396 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
397
398 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
399 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
400 flag to fcomi and friends.
401
402 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
403
404 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
405 integer logical instructions.
406
407 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
408
409 * m68k.h: Document new formats `E', `G', `H' and new places `N',
410 `n', `o'.
411
412 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
413 and new places `m', `M', `h'.
414
415 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
416
417 * hppa.h (pa_opcodes): Add several processor specific system
418 instructions.
419
420 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
421
422 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
423 "addb", and "addib" to be used by the disassembler.
424
425 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
426
427 * i386.h (ReverseModrm): Remove all occurences.
428 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
429 movmskps, pextrw, pmovmskb, maskmovq.
430 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
431 ignore the data size prefix.
432
433 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
434 Mostly stolen from Doug Ledford <dledford@redhat.com>
435
436 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
437
438 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
439
440 1999-04-14 Doug Evans <devans@casey.cygnus.com>
441
442 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
443 (CGEN_ATTR_TYPE): Update.
444 (CGEN_ATTR_MASK): Number booleans starting at 0.
445 (CGEN_ATTR_VALUE): Update.
446 (CGEN_INSN_ATTR): Update.
447
448 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
449
450 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
451 instructions.
452
453 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
454
455 * hppa.h (bb, bvb): Tweak opcode/mask.
456
457
458 1999-03-22 Doug Evans <devans@casey.cygnus.com>
459
460 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
461 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
462 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
463 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
464 Delete member max_insn_size.
465 (enum cgen_cpu_open_arg): New enum.
466 (cpu_open): Update prototype.
467 (cpu_open_1): Declare.
468 (cgen_set_cpu): Delete.
469
470 1999-03-11 Doug Evans <devans@casey.cygnus.com>
471
472 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
473 (CGEN_OPERAND_NIL): New macro.
474 (CGEN_OPERAND): New member `type'.
475 (@arch@_cgen_operand_table): Delete decl.
476 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
477 (CGEN_OPERAND_TABLE): New struct.
478 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
479 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
480 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
481 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
482 {get,set}_{int,vma}_operand.
483 (@arch@_cgen_cpu_open): New arg `isa'.
484 (cgen_set_cpu): Ditto.
485
486 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
487
488 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
489
490 1999-02-25 Doug Evans <devans@casey.cygnus.com>
491
492 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
493 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
494 enum cgen_hw_type.
495 (CGEN_HW_TABLE): New struct.
496 (hw_table): Delete declaration.
497 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
498 to table entry to enum.
499 (CGEN_OPINST): Ditto.
500 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
501
502 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
503
504 * alpha.h (AXP_OPCODE_EV6): New.
505 (AXP_OPCODE_NOPAL): Include it.
506
507 1999-02-09 Doug Evans <devans@casey.cygnus.com>
508
509 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
510 All uses updated. New members int_insn_p, max_insn_size,
511 parse_operand,insert_operand,extract_operand,print_operand,
512 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
513 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
514 extract_handlers,print_handlers.
515 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
516 (CGEN_ATTR_BOOL_OFFSET): New macro.
517 (CGEN_ATTR_MASK): Subtract it to compute bit number.
518 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
519 (cgen_opcode_handler): Renamed from cgen_base.
520 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
521 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
522 all uses updated.
523 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
524 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
525 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
526 (CGEN_OPCODE,CGEN_IBASE): New types.
527 (CGEN_INSN): Rewrite.
528 (CGEN_{ASM,DIS}_HASH*): Delete.
529 (init_opcode_table,init_ibld_table): Declare.
530 (CGEN_INSN_ATTR): New type.
531
532 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
533
534 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
535 (x_FP, d_FP, dls_FP, sldx_FP): Define.
536 Change *Suf definitions to include x and d suffixes.
537 (movsx): Use w_Suf and b_Suf.
538 (movzx): Likewise.
539 (movs): Use bwld_Suf.
540 (fld): Change ordering. Use sld_FP.
541 (fild): Add Intel Syntax equivalent of fildq.
542 (fst): Use sld_FP.
543 (fist): Use sld_FP.
544 (fstp): Use sld_FP. Add x_FP version.
545 (fistp): LLongMem version for Intel Syntax.
546 (fcom, fcomp): Use sld_FP.
547 (fadd, fiadd, fsub): Use sld_FP.
548 (fsubr): Use sld_FP.
549 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
550
551 1999-01-27 Doug Evans <devans@casey.cygnus.com>
552
553 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
554 CGEN_MODE_UINT.
555
556 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
557
558 * hppa.h (bv): Fix mask.
559
560 1999-01-05 Doug Evans <devans@casey.cygnus.com>
561
562 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
563 (CGEN_ATTR): Use it.
564 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
565 (CGEN_ATTR_TABLE): New member dfault.
566
567 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
568
569 * mips.h (MIPS16_INSN_BRANCH): New.
570
571 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
572
573 The following is part of a change made by Edith Epstein
574 <eepstein@sophia.cygnus.com> as part of a project to merge in
575 changes by HP; HP did not create ChangeLog entries.
576
577 * hppa.h (completer_chars): list of chars to not put a space
578 after.
579
580 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
581
582 * i386.h (i386_optab): Permit w suffix on processor control and
583 status word instructions.
584
585 1998-11-30 Doug Evans <devans@casey.cygnus.com>
586
587 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
588 (struct cgen_keyword_entry): Ditto.
589 (struct cgen_operand): Ditto.
590 (CGEN_IFLD): New typedef, with associated access macros.
591 (CGEN_IFMT): New typedef, with associated access macros.
592 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
593 (CGEN_IVALUE): New typedef.
594 (struct cgen_insn): Delete const on syntax,attrs members.
595 `format' now points to format data. Type of `value' is now
596 CGEN_IVALUE.
597 (struct cgen_opcode_table): New member ifld_table.
598
599 1998-11-18 Doug Evans <devans@casey.cygnus.com>
600
601 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
602 (CGEN_OPERAND_INSTANCE): New member `attrs'.
603 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
604 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
605 (cgen_opcode_table): Update type of dis_hash fn.
606 (extract_operand): Update type of `insn_value' arg.
607
608 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
609
610 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
611
612 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
613
614 * mips.h (INSN_MULT): Added.
615
616 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
617
618 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
619
620 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
621
622 * cgen.h (CGEN_INSN_INT): New typedef.
623 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
624 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
625 (CGEN_INSN_BYTES_PTR): New typedef.
626 (CGEN_EXTRACT_INFO): New typedef.
627 (cgen_insert_fn,cgen_extract_fn): Update.
628 (cgen_opcode_table): New member `insn_endian'.
629 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
630 (insert_operand,extract_operand): Update.
631 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
632
633 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
634
635 * cgen.h (CGEN_ATTR_BOOLS): New macro.
636 (struct CGEN_HW_ENTRY): New member `attrs'.
637 (CGEN_HW_ATTR): New macro.
638 (struct CGEN_OPERAND_INSTANCE): New member `name'.
639 (CGEN_INSN_INVALID_P): New macro.
640
641 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
642
643 * hppa.h: Add "fid".
644
645 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
646
647 From Robert Andrew Dale <rob@nb.net>
648 * i386.h (i386_optab): Add AMD 3DNow! instructions.
649 (AMD_3DNOW_OPCODE): Define.
650
651 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
652
653 * d30v.h (EITHER_BUT_PREFER_MU): Define.
654
655 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
656
657 * cgen.h (cgen_insn): #if 0 out element `cdx'.
658
659 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
660
661 Move all global state data into opcode table struct, and treat
662 opcode table as something that is "opened/closed".
663 * cgen.h (CGEN_OPCODE_DESC): New type.
664 (all fns): New first arg of opcode table descriptor.
665 (cgen_set_parse_operand_fn): Add prototype.
666 (cgen_current_machine,cgen_current_endian): Delete.
667 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
668 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
669 dis_hash_table,dis_hash_table_entries.
670 (opcode_open,opcode_close): Add prototypes.
671
672 * cgen.h (cgen_insn): New element `cdx'.
673
674 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
675
676 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
677
678 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
679
680 * mn10300.h: Add "no_match_operands" field for instructions.
681 (MN10300_MAX_OPERANDS): Define.
682
683 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
684
685 * cgen.h (cgen_macro_insn_count): Declare.
686
687 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
688
689 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
690 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
691 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
692 set_{int,vma}_operand.
693
694 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
695
696 * mn10300.h: Add "machine" field for instructions.
697 (MN103, AM30): Define machine types.
698
699 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
700
701 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
702
703 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
704
705 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
706
707 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
708
709 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
710 and ud2b.
711 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
712 those that happen to be implemented on pentiums.
713
714 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
715
716 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
717 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
718 with Size16|IgnoreSize or Size32|IgnoreSize.
719
720 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
721
722 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
723 (REPE): Rename to REPE_PREFIX_OPCODE.
724 (i386_regtab_end): Remove.
725 (i386_prefixtab, i386_prefixtab_end): Remove.
726 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
727 of md_begin.
728 (MAX_OPCODE_SIZE): Define.
729 (i386_optab_end): Remove.
730 (sl_Suf): Define.
731 (sl_FP): Use sl_Suf.
732
733 * i386.h (i386_optab): Allow 16 bit displacement for `mov
734 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
735 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
736 data32, dword, and adword prefixes.
737 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
738 regs.
739
740 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
741
742 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
743
744 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
745 register operands, because this is a common idiom. Flag them with
746 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
747 fdivrp because gcc erroneously generates them. Also flag with a
748 warning.
749
750 * i386.h: Add suffix modifiers to most insns, and tighter operand
751 checks in some cases. Fix a number of UnixWare compatibility
752 issues with float insns. Merge some floating point opcodes, using
753 new FloatMF modifier.
754 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
755 consistency.
756
757 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
758 IgnoreDataSize where appropriate.
759
760 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
761
762 * i386.h: (one_byte_segment_defaults): Remove.
763 (two_byte_segment_defaults): Remove.
764 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
765
766 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
767
768 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
769 (cgen_hw_lookup_by_num): Declare.
770
771 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
772
773 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
774 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
775
776 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
777
778 * cgen.h (cgen_asm_init_parse): Delete.
779 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
780 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
781
782 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
783
784 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
785 (cgen_asm_finish_insn): Update prototype.
786 (cgen_insn): New members num, data.
787 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
788 dis_hash, dis_hash_table_size moved to ...
789 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
790 All uses updated. New members asm_hash_p, dis_hash_p.
791 (CGEN_MINSN_EXPANSION): New struct.
792 (cgen_expand_macro_insn): Declare.
793 (cgen_macro_insn_count): Declare.
794 (get_insn_operands): Update prototype.
795 (lookup_get_insn_operands): Declare.
796
797 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
798
799 * i386.h (i386_optab): Change iclrKludge and imulKludge to
800 regKludge. Add operands types for string instructions.
801
802 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
803
804 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
805 table.
806
807 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
808
809 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
810 for `gettext'.
811
812 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
813
814 * i386.h: Remove NoModrm flag from all insns: it's never checked.
815 Add IsString flag to string instructions.
816 (IS_STRING): Don't define.
817 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
818 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
819 (SS_PREFIX_OPCODE): Define.
820
821 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
822
823 * i386.h: Revert March 24 patch; no more LinearAddress.
824
825 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
826
827 * i386.h (i386_optab): Remove fwait (9b) from all floating point
828 instructions, and instead add FWait opcode modifier. Add short
829 form of fldenv and fstenv.
830 (FWAIT_OPCODE): Define.
831
832 * i386.h (i386_optab): Change second operand constraint of `mov
833 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
834 allow legal instructions such as `movl %gs,%esi'
835
836 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
837
838 * h8300.h: Various changes to fully bracket initializers.
839
840 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
841
842 * i386.h: Set LinearAddress for lidt and lgdt.
843
844 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
845
846 * cgen.h (CGEN_BOOL_ATTR): New macro.
847
848 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
849
850 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
851
852 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
853
854 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
855 (cgen_insn): Record syntax and format entries here, rather than
856 separately.
857
858 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
859
860 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
861
862 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
863
864 * cgen.h (cgen_insert_fn): Change type of result to const char *.
865 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
866 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
867
868 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
869
870 * cgen.h (lookup_insn): New argument alias_p.
871
872 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
873
874 Fix rac to accept only a0:
875 * d10v.h (OPERAND_ACC): Split into:
876 (OPERAND_ACC0, OPERAND_ACC1) .
877 (OPERAND_GPR): Define.
878
879 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
880
881 * cgen.h (CGEN_FIELDS): Define here.
882 (CGEN_HW_ENTRY): New member `type'.
883 (hw_list): Delete decl.
884 (enum cgen_mode): Declare.
885 (CGEN_OPERAND): New member `hw'.
886 (enum cgen_operand_instance_type): Declare.
887 (CGEN_OPERAND_INSTANCE): New type.
888 (CGEN_INSN): New member `operands'.
889 (CGEN_OPCODE_DATA): Make hw_list const.
890 (get_insn_operands,lookup_insn): Add prototypes for.
891
892 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
893
894 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
895 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
896 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
897 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
898
899 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
900
901 * cgen.h: Correct typo in comment end marker.
902
903 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
904
905 * tic30.h: New file.
906
907 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
908
909 * cgen.h: Add prototypes for cgen_save_fixups(),
910 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
911 of cgen_asm_finish_insn() to return a char *.
912
913 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
914
915 * cgen.h: Formatting changes to improve readability.
916
917 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
918
919 * cgen.h (*): Clean up pass over `struct foo' usage.
920 (CGEN_ATTR): Make unsigned char.
921 (CGEN_ATTR_TYPE): Update.
922 (CGEN_ATTR_{ENTRY,TABLE}): New types.
923 (cgen_base): Move member `attrs' to cgen_insn.
924 (CGEN_KEYWORD): New member `null_entry'.
925 (CGEN_{SYNTAX,FORMAT}): New types.
926 (cgen_insn): Format and syntax separated from each other.
927
928 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
929
930 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
931 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
932 flags_{used,set} long.
933 (d30v_operand): Make flags field long.
934
935 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
936
937 * m68k.h: Fix comment describing operand types.
938
939 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
940
941 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
942 everything else after down.
943
944 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
945
946 * d10v.h (OPERAND_FLAG): Split into:
947 (OPERAND_FFLAG, OPERAND_CFLAG) .
948
949 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
950
951 * mips.h (struct mips_opcode): Changed comments to reflect new
952 field usage.
953
954 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
955
956 * mips.h: Added to comments a quick-ref list of all assigned
957 operand type characters.
958 (OP_{MASK,SH}_PERFREG): New macros.
959
960 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
961
962 * sparc.h: Add '_' and '/' for v9a asr's.
963 Patch from David Miller <davem@vger.rutgers.edu>
964
965 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
966
967 * h8300.h: Bit ops with absolute addresses not in the 8 bit
968 area are not available in the base model (H8/300).
969
970 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
971
972 * m68k.h: Remove documentation of ` operand specifier.
973
974 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
975
976 * m68k.h: Document q and v operand specifiers.
977
978 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
979
980 * v850.h (struct v850_opcode): Add processors field.
981 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
982 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
983 (PROCESSOR_V850EA): New bit constants.
984
985 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
986
987 Merge changes from Martin Hunt:
988
989 * d30v.h: Allow up to 64 control registers. Add
990 SHORT_A5S format.
991
992 * d30v.h (LONG_Db): New form for delayed branches.
993
994 * d30v.h: (LONG_Db): New form for repeati.
995
996 * d30v.h (SHORT_D2B): New form.
997
998 * d30v.h (SHORT_A2): New form.
999
1000 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1001 registers are used. Needed for VLIW optimization.
1002
1003 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1004
1005 * cgen.h: Move assembler interface section
1006 up so cgen_parse_operand_result is defined for cgen_parse_address.
1007 (cgen_parse_address): Update prototype.
1008
1009 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1010
1011 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1012
1013 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1014
1015 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1016 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1017 <paubert@iram.es>.
1018
1019 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1020 <paubert@iram.es>.
1021
1022 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1023 <paubert@iram.es>.
1024
1025 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1026 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1027
1028 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1029
1030 * v850.h (V850_NOT_R0): New flag.
1031
1032 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1033
1034 * v850.h (struct v850_opcode): Remove flags field.
1035
1036 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1037
1038 * v850.h (struct v850_opcode): Add flags field.
1039 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1040 fields.
1041 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1042 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1043
1044 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1045
1046 * arc.h: New file.
1047
1048 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1049
1050 * sparc.h (sparc_opcodes): Declare as const.
1051
1052 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1053
1054 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1055 uses single or double precision floating point resources.
1056 (INSN_NO_ISA, INSN_ISA1): Define.
1057 (cpu specific INSN macros): Tweak into bitmasks outside the range
1058 of INSN_ISA field.
1059
1060 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1061
1062 * i386.h: Fix pand opcode.
1063
1064 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1065
1066 * mips.h: Widen INSN_ISA and move it to a more convenient
1067 bit position. Add INSN_3900.
1068
1069 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1070
1071 * mips.h (struct mips_opcode): added new field membership.
1072
1073 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1074
1075 * i386.h (movd): only Reg32 is allowed.
1076
1077 * i386.h: add fcomp and ud2. From Wayne Scott
1078 <wscott@ichips.intel.com>.
1079
1080 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1081
1082 * i386.h: Add MMX instructions.
1083
1084 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1085
1086 * i386.h: Remove W modifier from conditional move instructions.
1087
1088 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1089
1090 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1091 with no arguments to match that generated by the UnixWare
1092 assembler.
1093
1094 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1095
1096 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1097 (cgen_parse_operand_fn): Declare.
1098 (cgen_init_parse_operand): Declare.
1099 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1100 new argument `want'.
1101 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1102 (enum cgen_parse_operand_type): New enum.
1103
1104 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1105
1106 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1107
1108 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1109
1110 * cgen.h: New file.
1111
1112 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1113
1114 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1115 fdivrp.
1116
1117 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1118
1119 * v850.h (extract): Make unsigned.
1120
1121 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1122
1123 * i386.h: Add iclr.
1124
1125 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1126
1127 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1128 take a direction bit.
1129
1130 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1131
1132 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1133
1134 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1135
1136 * sparc.h: Include <ansidecl.h>. Update function declarations to
1137 use prototypes, and to use const when appropriate.
1138
1139 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1140
1141 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1142
1143 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1144
1145 * d10v.h: Change pre_defined_registers to
1146 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1147
1148 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1149
1150 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1151 Change mips_opcodes from const array to a pointer,
1152 and change bfd_mips_num_opcodes from const int to int,
1153 so that we can increase the size of the mips opcodes table
1154 dynamically.
1155
1156 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1157
1158 * d30v.h (FLAG_X): Remove unused flag.
1159
1160 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1161
1162 * d30v.h: New file.
1163
1164 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1165
1166 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1167 (PDS_VALUE): Macro to access value field of predefined symbols.
1168 (tic80_next_predefined_symbol): Add prototype.
1169
1170 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1171
1172 * tic80.h (tic80_symbol_to_value): Change prototype to match
1173 change in function, added class parameter.
1174
1175 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1176
1177 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1178 endmask fields, which are somewhat weird in that 0 and 32 are
1179 treated exactly the same.
1180
1181 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1182
1183 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1184 rather than a constant that is 2**X. Reorder them to put bits for
1185 operands that have symbolic names in the upper bits, so they can
1186 be packed into an int where the lower bits contain the value that
1187 corresponds to that symbolic name.
1188 (predefined_symbo): Add struct.
1189 (tic80_predefined_symbols): Declare array of translations.
1190 (tic80_num_predefined_symbols): Declare size of that array.
1191 (tic80_value_to_symbol): Declare function.
1192 (tic80_symbol_to_value): Declare function.
1193
1194 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1195
1196 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1197
1198 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1199
1200 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1201 be the destination register.
1202
1203 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1204
1205 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1206 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1207 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1208 that the opcode can have two vector instructions in a single
1209 32 bit word and we have to encode/decode both.
1210
1211 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1212
1213 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1214 TIC80_OPERAND_RELATIVE for PC relative.
1215 (TIC80_OPERAND_BASEREL): New flag bit for register
1216 base relative.
1217
1218 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1219
1220 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1221
1222 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1223
1224 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1225 ":s" modifier for scaling.
1226
1227 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1228
1229 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1230 (TIC80_OPERAND_M_LI): Ditto
1231
1232 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1233
1234 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1235 (TIC80_OPERAND_CC): New define for condition code operand.
1236 (TIC80_OPERAND_CR): New define for control register operand.
1237
1238 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1239
1240 * tic80.h (struct tic80_opcode): Name changed.
1241 (struct tic80_opcode): Remove format field.
1242 (struct tic80_operand): Add insertion and extraction functions.
1243 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1244 correct ones.
1245 (FMT_*): Ditto.
1246
1247 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1248
1249 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1250 type IV instruction offsets.
1251
1252 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1253
1254 * tic80.h: New file.
1255
1256 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1257
1258 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1259
1260 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1261
1262 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1263 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1264 * v850.h: Fix comment, v850_operand not powerpc_operand.
1265
1266 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1267
1268 * mn10200.h: Flesh out structures and definitions needed by
1269 the mn10200 assembler & disassembler.
1270
1271 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1272
1273 * mips.h: Add mips16 definitions.
1274
1275 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1276
1277 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1278
1279 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1280
1281 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1282 (MN10300_OPERAND_MEMADDR): Define.
1283
1284 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1285
1286 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1287
1288 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1289
1290 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1291
1292 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1293
1294 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1295
1296 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1297
1298 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1299
1300 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1301
1302 * alpha.h: Don't include "bfd.h"; private relocation types are now
1303 negative to minimize problems with shared libraries. Organize
1304 instruction subsets by AMASK extensions and PALcode
1305 implementation.
1306 (struct alpha_operand): Move flags slot for better packing.
1307
1308 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1309
1310 * v850.h (V850_OPERAND_RELAX): New operand flag.
1311
1312 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1313
1314 * mn10300.h (FMT_*): Move operand format definitions
1315 here.
1316
1317 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1318
1319 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1320
1321 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1322
1323 * mn10300.h (mn10300_opcode): Add "format" field.
1324 (MN10300_OPERAND_*): Define.
1325
1326 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1327
1328 * mn10x00.h: Delete.
1329 * mn10200.h, mn10300.h: New files.
1330
1331 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1332
1333 * mn10x00.h: New file.
1334
1335 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1336
1337 * v850.h: Add new flag to indicate this instruction uses a PC
1338 displacement.
1339
1340 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1341
1342 * h8300.h (stmac): Add missing instruction.
1343
1344 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1345
1346 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1347 field.
1348
1349 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1350
1351 * v850.h (V850_OPERAND_EP): Define.
1352
1353 * v850.h (v850_opcode): Add size field.
1354
1355 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1356
1357 * v850.h (v850_operands): Add insert and extract fields, pointers
1358 to functions used to handle unusual operand encoding.
1359 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1360 V850_OPERAND_SIGNED): Defined.
1361
1362 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1363
1364 * v850.h (v850_operands): Add flags field.
1365 (OPERAND_REG, OPERAND_NUM): Defined.
1366
1367 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1368
1369 * v850.h: New file.
1370
1371 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1372
1373 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1374 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1375 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1376 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1377 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1378 Defined.
1379
1380 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1381
1382 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1383 a 3 bit space id instead of a 2 bit space id.
1384
1385 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1386
1387 * d10v.h: Add some additional defines to support the
1388 assembler in determining which operations can be done in parallel.
1389
1390 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1391
1392 * h8300.h (SN): Define.
1393 (eepmov.b): Renamed from "eepmov"
1394 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1395 with them.
1396
1397 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1398
1399 * d10v.h (OPERAND_SHIFT): New operand flag.
1400
1401 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1402
1403 * d10v.h: Changes for divs, parallel-only instructions, and
1404 signed numbers.
1405
1406 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1407
1408 * d10v.h (pd_reg): Define. Putting the definition here allows
1409 the assembler and disassembler to share the same struct.
1410
1411 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1412
1413 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1414 Williams <steve@icarus.com>.
1415
1416 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1417
1418 * d10v.h: New file.
1419
1420 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1421
1422 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1423
1424 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1425
1426 * m68k.h (mcf5200): New macro.
1427 Document names of coldfire control registers.
1428
1429 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1430
1431 * h8300.h (SRC_IN_DST): Define.
1432
1433 * h8300.h (UNOP3): Mark the register operand in this insn
1434 as a source operand, not a destination operand.
1435 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1436 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1437 register operand with SRC_IN_DST.
1438
1439 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1440
1441 * alpha.h: New file.
1442
1443 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1444
1445 * rs6k.h: Remove obsolete file.
1446
1447 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1448
1449 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1450 fdivp, and fdivrp. Add ffreep.
1451
1452 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1453
1454 * h8300.h: Reorder various #defines for readability.
1455 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1456 (BITOP): Accept additional (unused) argument. All callers changed.
1457 (EBITOP): Likewise.
1458 (O_LAST): Bump.
1459 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1460
1461 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1462 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1463 (BITOP, EBITOP): Handle new H8/S addressing modes for
1464 bit insns.
1465 (UNOP3): Handle new shift/rotate insns on the H8/S.
1466 (insns using exr): New instructions.
1467 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1468
1469 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1470
1471 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1472 was incorrect.
1473
1474 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1475
1476 * h8300.h (START): Remove.
1477 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1478 and mov.l insns that can be relaxed.
1479
1480 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1481
1482 * i386.h: Remove Abs32 from lcall.
1483
1484 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1485
1486 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1487 (SLCPOP): New macro.
1488 Mark X,Y opcode letters as in use.
1489
1490 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1491
1492 * sparc.h (F_FLOAT, F_FBR): Define.
1493
1494 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1495
1496 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1497 from all insns.
1498 (ABS8SRC,ABS8DST): Add ABS8MEM.
1499 (add.l): Fix reg+reg variant.
1500 (eepmov.w): Renamed from eepmovw.
1501 (ldc,stc): Fix many cases.
1502
1503 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1504
1505 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1506
1507 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1508
1509 * sparc.h (O): Mark operand letter as in use.
1510
1511 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1512
1513 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1514 Mark operand letters uU as in use.
1515
1516 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1517
1518 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1519 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1520 (SPARC_OPCODE_SUPPORTED): New macro.
1521 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1522 (F_NOTV9): Delete.
1523
1524 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1525
1526 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1527 declaration consistent with return type in definition.
1528
1529 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1530
1531 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1532
1533 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1534
1535 * i386.h (i386_regtab): Add 80486 test registers.
1536
1537 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1538
1539 * i960.h (I_HX): Define.
1540 (i960_opcodes): Add HX instruction.
1541
1542 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1543
1544 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1545 and fclex.
1546
1547 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1548
1549 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1550 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1551 (bfd_* defines): Delete.
1552 (sparc_opcode_archs): Replaces architecture_pname.
1553 (sparc_opcode_lookup_arch): Declare.
1554 (NUMOPCODES): Delete.
1555
1556 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1557
1558 * sparc.h (enum sparc_architecture): Add v9a.
1559 (ARCHITECTURES_CONFLICT_P): Update.
1560
1561 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1562
1563 * i386.h: Added Pentium Pro instructions.
1564
1565 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1566
1567 * m68k.h: Document new 'W' operand place.
1568
1569 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1570
1571 * hppa.h: Add lci and syncdma instructions.
1572
1573 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1574
1575 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1576 instructions.
1577
1578 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1579
1580 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1581 assembler's -mcom and -many switches.
1582
1583 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1584
1585 * i386.h: Fix cmpxchg8b extension opcode description.
1586
1587 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1588
1589 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1590 and register cr4.
1591
1592 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1593
1594 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1595
1596 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1597
1598 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1599
1600 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1601
1602 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1603
1604 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1605
1606 * m68kmri.h: Remove.
1607
1608 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1609 declarations. Remove F_ALIAS and flag field of struct
1610 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1611 int. Make name and args fields of struct m68k_opcode const.
1612
1613 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1614
1615 * sparc.h (F_NOTV9): Define.
1616
1617 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1618
1619 * mips.h (INSN_4010): Define.
1620
1621 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1622
1623 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1624
1625 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1626 * m68k.h: Fix argument descriptions of coprocessor
1627 instructions to allow only alterable operands where appropriate.
1628 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1629 (m68k_opcode_aliases): Add more aliases.
1630
1631 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1632
1633 * m68k.h: Added explcitly short-sized conditional branches, and a
1634 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1635 svr4-based configurations.
1636
1637 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1638
1639 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1640 * i386.h: added missing Data16/Data32 flags to a few instructions.
1641
1642 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1643
1644 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1645 (OP_MASK_BCC, OP_SH_BCC): Define.
1646 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1647 (OP_MASK_CCC, OP_SH_CCC): Define.
1648 (INSN_READ_FPR_R): Define.
1649 (INSN_RFE): Delete.
1650
1651 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1652
1653 * m68k.h (enum m68k_architecture): Deleted.
1654 (struct m68k_opcode_alias): New type.
1655 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1656 matching constraints, values and flags. As a side effect of this,
1657 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1658 as I know were never used, now may need re-examining.
1659 (numopcodes): Now const.
1660 (m68k_opcode_aliases, numaliases): New variables.
1661 (endop): Deleted.
1662 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1663 m68k_opcode_aliases; update declaration of m68k_opcodes.
1664
1665 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1666
1667 * hppa.h (delay_type): Delete unused enumeration.
1668 (pa_opcode): Replace unused delayed field with an architecture
1669 field.
1670 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1671
1672 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1673
1674 * mips.h (INSN_ISA4): Define.
1675
1676 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1677
1678 * mips.h (M_DLA_AB, M_DLI): Define.
1679
1680 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1681
1682 * hppa.h (fstwx): Fix single-bit error.
1683
1684 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1685
1686 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1687
1688 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1689
1690 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1691 debug registers. From Charles Hannum (mycroft@netbsd.org).
1692
1693 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1694
1695 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1696 i386 support:
1697 * i386.h (MOV_AX_DISP32): New macro.
1698 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1699 of several call/return instructions.
1700 (ADDR_PREFIX_OPCODE): New macro.
1701
1702 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1703
1704 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1705
1706 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1707 it pointer to const char;
1708 (struct vot, field `name'): ditto.
1709
1710 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1711
1712 * vax.h: Supply and properly group all values in end sentinel.
1713
1714 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1715
1716 * mips.h (INSN_ISA, INSN_4650): Define.
1717
1718 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1719
1720 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1721 systems with a separate instruction and data cache, such as the
1722 29040, these instructions take an optional argument.
1723
1724 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1725
1726 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1727 INSN_TRAP.
1728
1729 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1730
1731 * mips.h (INSN_STORE_MEMORY): Define.
1732
1733 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1734
1735 * sparc.h: Document new operand type 'x'.
1736
1737 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1738
1739 * i960.h (I_CX2): New instruction category. It includes
1740 instructions available on Cx and Jx processors.
1741 (I_JX): New instruction category, for JX-only instructions.
1742 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1743 Jx-only instructions, in I_JX category.
1744
1745 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1746
1747 * ns32k.h (endop): Made pointer const too.
1748
1749 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1750
1751 * ns32k.h: Drop Q operand type as there is no correct use
1752 for it. Add I and Z operand types which allow better checking.
1753
1754 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1755
1756 * h8300.h (xor.l) :fix bit pattern.
1757 (L_2): New size of operand.
1758 (trapa): Use it.
1759
1760 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1761
1762 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1763
1764 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1765
1766 * sparc.h: Include v9 definitions.
1767
1768 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1769
1770 * m68k.h (m68060): Defined.
1771 (m68040up, mfloat, mmmu): Include it.
1772 (struct m68k_opcode): Widen `arch' field.
1773 (m68k_opcodes): Updated for M68060. Removed comments that were
1774 instructions commented out by "JF" years ago.
1775
1776 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1777
1778 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1779 add a one-bit `flags' field.
1780 (F_ALIAS): New macro.
1781
1782 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1783
1784 * h8300.h (dec, inc): Get encoding right.
1785
1786 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1787
1788 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1789 a flag instead.
1790 (PPC_OPERAND_SIGNED): Define.
1791 (PPC_OPERAND_SIGNOPT): Define.
1792
1793 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1794
1795 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1796 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1797
1798 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1799
1800 * i386.h: Reverse last change. It'll be handled in gas instead.
1801
1802 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1803
1804 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1805 slower on the 486 and used the implicit shift count despite the
1806 explicit operand. The one-operand form is still available to get
1807 the shorter form with the implicit shift count.
1808
1809 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1810
1811 * hppa.h: Fix typo in fstws arg string.
1812
1813 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1814
1815 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1816
1817 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1818
1819 * ppc.h (PPC_OPCODE_601): Define.
1820
1821 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1822
1823 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1824 (so we can determine valid completers for both addb and addb[tf].)
1825
1826 * hppa.h (xmpyu): No floating point format specifier for the
1827 xmpyu instruction.
1828
1829 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1830
1831 * ppc.h (PPC_OPERAND_NEXT): Define.
1832 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1833 (struct powerpc_macro): Define.
1834 (powerpc_macros, powerpc_num_macros): Declare.
1835
1836 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1837
1838 * ppc.h: New file. Header file for PowerPC opcode table.
1839
1840 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1841
1842 * hppa.h: More minor template fixes for sfu and copr (to allow
1843 for easier disassembly).
1844
1845 * hppa.h: Fix templates for all the sfu and copr instructions.
1846
1847 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1848
1849 * i386.h (push): Permit Imm16 operand too.
1850
1851 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1852
1853 * h8300.h (andc): Exists in base arch.
1854
1855 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1856
1857 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1858 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1859
1860 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1861
1862 * hppa.h: Add FP quadword store instructions.
1863
1864 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1865
1866 * mips.h: (M_J_A): Added.
1867 (M_LA): Removed.
1868
1869 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1870
1871 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1872 <mellon@pepper.ncd.com>.
1873
1874 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1875
1876 * hppa.h: Immediate field in probei instructions is unsigned,
1877 not low-sign extended.
1878
1879 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1880
1881 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1882
1883 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1884
1885 * i386.h: Add "fxch" without operand.
1886
1887 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1888
1889 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1890
1891 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1892
1893 * hppa.h: Add gfw and gfr to the opcode table.
1894
1895 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1896
1897 * m88k.h: extended to handle m88110.
1898
1899 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1900
1901 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1902 addresses.
1903
1904 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1905
1906 * i960.h (i960_opcodes): Properly bracket initializers.
1907
1908 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1909
1910 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1911
1912 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1913
1914 * m68k.h (two): Protect second argument with parentheses.
1915
1916 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1917
1918 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1919 Deleted old in/out instructions in "#if 0" section.
1920
1921 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1922
1923 * i386.h (i386_optab): Properly bracket initializers.
1924
1925 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1926
1927 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1928 Jeff Law, law@cs.utah.edu).
1929
1930 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1931
1932 * i386.h (lcall): Accept Imm32 operand also.
1933
1934 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1935
1936 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1937 (M_DABS): Added.
1938
1939 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1940
1941 * mips.h (INSN_*): Changed values. Removed unused definitions.
1942 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1943 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1944 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1945 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1946 (M_*): Added new values for r6000 and r4000 macros.
1947 (ANY_DELAY): Removed.
1948
1949 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1950
1951 * mips.h: Added M_LI_S and M_LI_SS.
1952
1953 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1954
1955 * h8300.h: Get some rare mov.bs correct.
1956
1957 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1958
1959 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1960 been included.
1961
1962 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1963
1964 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1965 jump instructions, for use in disassemblers.
1966
1967 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1968
1969 * m88k.h: Make bitfields just unsigned, not unsigned long or
1970 unsigned short.
1971
1972 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1973
1974 * hppa.h: New argument type 'y'. Use in various float instructions.
1975
1976 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1977
1978 * hppa.h (break): First immediate field is unsigned.
1979
1980 * hppa.h: Add rfir instruction.
1981
1982 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1983
1984 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1985
1986 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1987
1988 * mips.h: Reworked the hazard information somewhat, and fixed some
1989 bugs in the instruction hazard descriptions.
1990
1991 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1992
1993 * m88k.h: Corrected a couple of opcodes.
1994
1995 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1996
1997 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1998 new version includes instruction hazard information, but is
1999 otherwise reasonably similar.
2000
2001 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2002
2003 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2004
2005 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2006
2007 Patches from Jeff Law, law@cs.utah.edu:
2008 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2009 Make the tables be the same for the following instructions:
2010 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2011 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2012 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2013 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2014 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2015 "fcmp", and "ftest".
2016
2017 * hppa.h: Make new and old tables the same for "break", "mtctl",
2018 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2019 Fix typo in last patch. Collapse several #ifdefs into a
2020 single #ifdef.
2021
2022 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2023 of the comments up-to-date.
2024
2025 * hppa.h: Update "free list" of letters and update
2026 comments describing each letter's function.
2027
2028 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2029
2030 * h8300.h: checkpoint, includes H8/300-H opcodes.
2031
2032 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2033
2034 * Patches from Jeffrey Law <law@cs.utah.edu>.
2035 * hppa.h: Rework single precision FP
2036 instructions so that they correctly disassemble code
2037 PA1.1 code.
2038
2039 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2040
2041 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2042 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2043
2044 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2045
2046 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2047 gdb will define it for now.
2048
2049 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2050
2051 * sparc.h: Don't end enumerator list with comma.
2052
2053 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2054
2055 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2056 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2057 ("bc2t"): Correct typo.
2058 ("[ls]wc[023]"): Use T rather than t.
2059 ("c[0123]"): Define general coprocessor instructions.
2060
2061 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2062
2063 * m68k.h: Move split point for gcc compilation more towards
2064 middle.
2065
2066 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2067
2068 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2069 simply wrong, ics, rfi, & rfsvc were missing).
2070 Add "a" to opr_ext for "bb". Doc fix.
2071
2072 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2073
2074 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2075 * mips.h: Add casts, to suppress warnings about shifting too much.
2076 * m68k.h: Document the placement code '9'.
2077
2078 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2079
2080 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2081 allows callers to break up the large initialized struct full of
2082 opcodes into two half-sized ones. This permits GCC to compile
2083 this module, since it takes exponential space for initializers.
2084 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2085
2086 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2087
2088 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2089 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2090 initialized structs in it.
2091
2092 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2093
2094 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2095 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2096 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2097
2098 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2099
2100 * mips.h: document "i" and "j" operands correctly.
2101
2102 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2103
2104 * mips.h: Removed endianness dependency.
2105
2106 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2107
2108 * h8300.h: include info on number of cycles per instruction.
2109
2110 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2111
2112 * hppa.h: Move handy aliases to the front. Fix masks for extract
2113 and deposit instructions.
2114
2115 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2116
2117 * i386.h: accept shld and shrd both with and without the shift
2118 count argument, which is always %cl.
2119
2120 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2121
2122 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2123 (one_byte_segment_defaults, two_byte_segment_defaults,
2124 i386_prefixtab_end): Ditto.
2125
2126 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2127
2128 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2129 for operand 2; from John Carr, jfc@dsg.dec.com.
2130
2131 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2132
2133 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2134 always use 16-bit offsets. Makes calculated-size jump tables
2135 feasible.
2136
2137 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2138
2139 * i386.h: Fix one-operand forms of in* and out* patterns.
2140
2141 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2142
2143 * m68k.h: Added CPU32 support.
2144
2145 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2146
2147 * mips.h (break): Disassemble the argument. Patch from
2148 jonathan@cs.stanford.edu (Jonathan Stone).
2149
2150 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2151
2152 * m68k.h: merged Motorola and MIT syntax.
2153
2154 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2155
2156 * m68k.h (pmove): make the tests less strict, the 68k book is
2157 wrong.
2158
2159 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2160
2161 * m68k.h (m68ec030): Defined as alias for 68030.
2162 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2163 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2164 them. Tightened description of "fmovex" to distinguish it from
2165 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2166 up descriptions that claimed versions were available for chips not
2167 supporting them. Added "pmovefd".
2168
2169 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2170
2171 * m68k.h: fix where the . goes in divull
2172
2173 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2174
2175 * m68k.h: the cas2 instruction is supposed to be written with
2176 indirection on the last two operands, which can be either data or
2177 address registers. Added a new operand type 'r' which accepts
2178 either register type. Added new cases for cas2l and cas2w which
2179 use them. Corrected masks for cas2 which failed to recognize use
2180 of address register.
2181
2182 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2183
2184 * m68k.h: Merged in patches (mostly m68040-specific) from
2185 Colin Smith <colin@wrs.com>.
2186
2187 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2188 base). Also cleaned up duplicates, re-ordered instructions for
2189 the sake of dis-assembling (so aliases come after standard names).
2190 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2191
2192 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2193
2194 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2195 all missing .s
2196
2197 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2198
2199 * sparc.h: Moved tables to BFD library.
2200
2201 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2202
2203 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2204
2205 * h8300.h: Finish filling in all the holes in the opcode table,
2206 so that the Lucid C compiler can digest this as well...
2207
2208 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2209
2210 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2211 Fix opcodes on various sizes of fild/fist instructions
2212 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2213 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2214
2215 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2216
2217 * h8300.h: Fill in all the holes in the opcode table so that the
2218 losing HPUX C compiler can digest this...
2219
2220 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2221
2222 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2223 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2224
2225 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2226
2227 * sparc.h: Add new architecture variant sparclite; add its scan
2228 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2229
2230 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2231
2232 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2233 fy@lucid.com).
2234
2235 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2236
2237 * rs6k.h: New version from IBM (Metin).
2238
2239 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2240
2241 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2242 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2243
2244 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2245
2246 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2247
2248 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2249
2250 * m68k.h (one, two): Cast macro args to unsigned to suppress
2251 complaints from compiler and lint about integer overflow during
2252 shift.
2253
2254 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2255
2256 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2257
2258 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2259
2260 * mips.h: Make bitfield layout depend on the HOST compiler,
2261 not on the TARGET system.
2262
2263 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2264
2265 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2266 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2267 <TRANLE@INTELLICORP.COM>.
2268
2269 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2270
2271 * h8300.h: turned op_type enum into #define list
2272
2273 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2274
2275 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2276 similar instructions -- they've been renamed to "fitoq", etc.
2277 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2278 number of arguments.
2279 * h8300.h: Remove extra ; which produces compiler warning.
2280
2281 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2282
2283 * sparc.h: fix opcode for tsubcctv.
2284
2285 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2286
2287 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2288
2289 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2290
2291 * sparc.h (nop): Made the 'lose' field be even tighter,
2292 so only a standard 'nop' is disassembled as a nop.
2293
2294 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2295
2296 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2297 disassembled as a nop.
2298
2299 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2300
2301 * sparc.h: fix a typo.
2302
2303 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2304
2305 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2306 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2307 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2308
2309 \f
2310 Local Variables:
2311 version-control: never
2312 End:
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