* sparc.h: Add '_' and '/' for v9a asr's.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
2
3 * sparc.h: Add '_' and '/' for v9a asr's.
4 Patch from David Miller <davem@vger.rutgers.edu>
5
6 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
7
8 * h8300.h: Bit ops with absolute addresses not in the 8 bit
9 area are not available in the base model (H8/300).
10
11 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
12
13 * m68k.h: Remove documentation of ` operand specifier.
14
15 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
16
17 * m68k.h: Document q and v operand specifiers.
18
19 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
20
21 * v850.h (struct v850_opcode): Add processors field.
22 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
23 start-sanitize-v850e
24 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
25 (PROCESSOR_V850EQ): New bit constants.
26 end-sanitize-v850e
27
28 start-sanitize-d30v
29 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
30
31 Merge changes from Martin Hunt:
32
33 * d30v.h: Allow up to 64 control registers. Add
34 SHORT_A5S format.
35
36 * d30v.h (LONG_Db): New form for delayed branches.
37
38 * d30v.h: (LONG_Db): New form for repeati.
39
40 * d30v.h (SHORT_D2B): New form.
41
42 * d30v.h (SHORT_A2): New form.
43
44 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
45 registers are used. Needed for VLIW optimization.
46
47 end-sanitize-d30v
48 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
49
50 * cgen.h: Move assembler interface section
51 up so cgen_parse_operand_result is defined for cgen_parse_address.
52 (cgen_parse_address): Update prototype.
53
54 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
55
56 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
57
58 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
59
60 * i386.h (two_byte_segment_defaults): Correct base register 5 in
61 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
62 <paubert@iram.es>.
63
64 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
65 <paubert@iram.es>.
66
67 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
68 <paubert@iram.es>.
69
70 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
71 (JUMP_ON_ECX_ZERO): Remove commented out macro.
72
73 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
74
75 * v850.h (V850_NOT_R0): New flag.
76
77 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
78
79 * v850.h (struct v850_opcode): Remove flags field.
80
81 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
82
83 * v850.h (struct v850_opcode): Add flags field.
84 (struct v850_operand): Extend meaning of 'bits' and 'shift'
85 fields.
86
87 start-sanitize-v850e
88 (V850E_INSTRUCTION, V850EQ_INSTRUCTION): New flags.
89 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
90 end-sanitize-v850e
91
92 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
93
94 * arc.h: New file.
95
96 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
97
98 * sparc.h (sparc_opcodes): Declare as const.
99
100 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
101
102 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
103 uses single or double precision floating point resources.
104 (INSN_NO_ISA, INSN_ISA1): Define.
105 (cpu specific INSN macros): Tweak into bitmasks outside the range
106 of INSN_ISA field.
107
108 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
109
110 * i386.h: Fix pand opcode.
111
112 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
113
114 * mips.h: Widen INSN_ISA and move it to a more convenient
115 bit position. Add INSN_3900.
116
117 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
118
119 * mips.h (struct mips_opcode): added new field membership.
120
121 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
122
123 * i386.h (movd): only Reg32 is allowed.
124
125 * i386.h: add fcomp and ud2. From Wayne Scott
126 <wscott@ichips.intel.com>.
127
128 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
129
130 * i386.h: Add MMX instructions.
131
132 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
133
134 * i386.h: Remove W modifier from conditional move instructions.
135
136 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
137
138 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
139 with no arguments to match that generated by the UnixWare
140 assembler.
141
142 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
143
144 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
145 (cgen_parse_operand_fn): Declare.
146 (cgen_init_parse_operand): Declare.
147 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
148 new argument `want'.
149 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
150 (enum cgen_parse_operand_type): New enum.
151
152 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
153
154 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
155
156 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
157
158 * cgen.h: New file.
159
160 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
161
162 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
163 fdivrp.
164
165 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
166
167 * v850.h (extract): Make unsigned.
168
169 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
170
171 * i386.h: Add iclr.
172
173 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
174
175 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
176 take a direction bit.
177
178 start-sanitize-coldfire
179 Wed Mar 19 06:24:58 1997 J.T. Conklin <jtc@cygnus.com>
180
181 * m68k.h (mcfmac, mcfdiv): New macros.
182
183 end-sanitize-coldfire
184 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
185
186 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
187
188 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
189
190 * sparc.h: Include <ansidecl.h>. Update function declarations to
191 use prototypes, and to use const when appropriate.
192
193 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
194
195 * mn10300.h (MN10300_OPERAND_RELAX): Define.
196
197 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
198
199 * d10v.h: Change pre_defined_registers to
200 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
201
202 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
203
204 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
205 Change mips_opcodes from const array to a pointer,
206 and change bfd_mips_num_opcodes from const int to int,
207 so that we can increase the size of the mips opcodes table
208 dynamically.
209
210 start-sanitize-d30v
211 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
212
213 * d30v.h (FLAG_X): Remove unused flag.
214
215 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
216
217 * d30v.h: New file.
218
219 end-sanitize-d30v
220 start-sanitize-tic80
221 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
222
223 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
224 (PDS_VALUE): Macro to access value field of predefined symbols.
225 (tic80_next_predefined_symbol): Add prototype.
226
227 end-sanitize-tic80
228 start-sanitize-r5900
229 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
230
231 * mips.h: add r5900.
232
233 end-sanitize-r5900
234 start-sanitize-tic80
235 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
236
237 * tic80.h (tic80_symbol_to_value): Change prototype to match
238 change in function, added class parameter.
239
240 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
241
242 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
243 endmask fields, which are somewhat weird in that 0 and 32 are
244 treated exactly the same.
245
246 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
247
248 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
249 rather than a constant that is 2**X. Reorder them to put bits for
250 operands that have symbolic names in the upper bits, so they can
251 be packed into an int where the lower bits contain the value that
252 corresponds to that symbolic name.
253 (predefined_symbo): Add struct.
254 (tic80_predefined_symbols): Declare array of translations.
255 (tic80_num_predefined_symbols): Declare size of that array.
256 (tic80_value_to_symbol): Declare function.
257 (tic80_symbol_to_value): Declare function.
258
259 end-sanitize-tic80
260 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
261
262 * mn10200.h (MN10200_OPERAND_RELAX): Define.
263
264 start-sanitize-tic80
265 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
266
267 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
268 be the destination register.
269
270 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
271
272 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
273 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
274 (TIC80_VECTOR): Define a flag bit for the flags. This one means
275 that the opcode can have two vector instructions in a single
276 32 bit word and we have to encode/decode both.
277
278 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
279
280 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
281 TIC80_OPERAND_RELATIVE for PC relative.
282 (TIC80_OPERAND_BASEREL): New flag bit for register
283 base relative.
284
285 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
286
287 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
288
289 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
290
291 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
292 ":s" modifier for scaling.
293
294 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
295
296 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
297 (TIC80_OPERAND_M_LI): Ditto
298
299 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
300
301 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
302 (TIC80_OPERAND_CC): New define for condition code operand.
303 (TIC80_OPERAND_CR): New define for control register operand.
304
305 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
306
307 * tic80.h (struct tic80_opcode): Name changed.
308 (struct tic80_opcode): Remove format field.
309 (struct tic80_operand): Add insertion and extraction functions.
310 (TIC80_OPERAND_*): Remove old bogus values, start adding new
311 correct ones.
312 (FMT_*): Ditto.
313
314 end-sanitize-tic80
315 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
316
317 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
318 type IV instruction offsets.
319
320 start-sanitize-tic80
321 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
322
323 * tic80.h: New file.
324
325 end-sanitize-tic80
326 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
327
328 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
329
330 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
331
332 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
333 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
334 * v850.h: Fix comment, v850_operand not powerpc_operand.
335
336 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
337
338 * mn10200.h: Flesh out structures and definitions needed by
339 the mn10200 assembler & disassembler.
340
341 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
342
343 * mips.h: Add mips16 definitions.
344
345 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
346
347 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
348
349 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
350
351 * mn10300.h (MN10300_OPERAND_PCREL): Define.
352 (MN10300_OPERAND_MEMADDR): Define.
353
354 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
355
356 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
357
358 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
359
360 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
361
362 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
363
364 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
365
366 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
367
368 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
369
370 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
371
372 * alpha.h: Don't include "bfd.h"; private relocation types are now
373 negative to minimize problems with shared libraries. Organize
374 instruction subsets by AMASK extensions and PALcode
375 implementation.
376 (struct alpha_operand): Move flags slot for better packing.
377
378 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
379
380 * v850.h (V850_OPERAND_RELAX): New operand flag.
381
382 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
383
384 * mn10300.h (FMT_*): Move operand format definitions
385 here.
386
387 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
388
389 * mn10300.h (MN10300_OPERAND_PAREN): Define.
390
391 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
392
393 * mn10300.h (mn10300_opcode): Add "format" field.
394 (MN10300_OPERAND_*): Define.
395
396 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
397
398 * mn10x00.h: Delete.
399 * mn10200.h, mn10300.h: New files.
400
401 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
402
403 * mn10x00.h: New file.
404
405 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
406
407 * v850.h: Add new flag to indicate this instruction uses a PC
408 displacement.
409
410 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
411
412 * h8300.h (stmac): Add missing instruction.
413
414 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
415
416 * v850.h (v850_opcode): Remove "size" field. Add "memop"
417 field.
418
419 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
420
421 * v850.h (V850_OPERAND_EP): Define.
422
423 * v850.h (v850_opcode): Add size field.
424
425 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
426
427 * v850.h (v850_operands): Add insert and extract fields, pointers
428 to functions used to handle unusual operand encoding.
429 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
430 V850_OPERAND_SIGNED): Defined.
431
432 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
433
434 * v850.h (v850_operands): Add flags field.
435 (OPERAND_REG, OPERAND_NUM): Defined.
436
437 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
438
439 * v850.h: New file.
440
441 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
442
443 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
444 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
445 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
446 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
447 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
448 Defined.
449
450 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
451
452 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
453 a 3 bit space id instead of a 2 bit space id.
454
455 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
456
457 * d10v.h: Add some additional defines to support the
458 assembler in determining which operations can be done in parallel.
459
460 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
461
462 * h8300.h (SN): Define.
463 (eepmov.b): Renamed from "eepmov"
464 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
465 with them.
466
467 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
468
469 * d10v.h (OPERAND_SHIFT): New operand flag.
470
471 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
472
473 * d10v.h: Changes for divs, parallel-only instructions, and
474 signed numbers.
475
476 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
477
478 * d10v.h (pd_reg): Define. Putting the definition here allows
479 the assembler and disassembler to share the same struct.
480
481 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
482
483 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
484 Williams <steve@icarus.com>.
485
486 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
487
488 * d10v.h: New file.
489
490 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
491
492 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
493
494 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
495
496 * m68k.h (mcf5200): New macro.
497 Document names of coldfire control registers.
498
499 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
500
501 * h8300.h (SRC_IN_DST): Define.
502
503 * h8300.h (UNOP3): Mark the register operand in this insn
504 as a source operand, not a destination operand.
505 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
506 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
507 register operand with SRC_IN_DST.
508
509 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
510
511 * alpha.h: New file.
512
513 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
514
515 * rs6k.h: Remove obsolete file.
516
517 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
518
519 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
520 fdivp, and fdivrp. Add ffreep.
521
522 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
523
524 * h8300.h: Reorder various #defines for readability.
525 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
526 (BITOP): Accept additional (unused) argument. All callers changed.
527 (EBITOP): Likewise.
528 (O_LAST): Bump.
529 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
530
531 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
532 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
533 (BITOP, EBITOP): Handle new H8/S addressing modes for
534 bit insns.
535 (UNOP3): Handle new shift/rotate insns on the H8/S.
536 (insns using exr): New instructions.
537 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
538
539 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
540
541 * h8300.h (add.l): Undo Apr 5th change. The manual I had
542 was incorrect.
543
544 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
545
546 * h8300.h (START): Remove.
547 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
548 and mov.l insns that can be relaxed.
549
550 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
551
552 * i386.h: Remove Abs32 from lcall.
553
554 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
555
556 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
557 (SLCPOP): New macro.
558 Mark X,Y opcode letters as in use.
559
560 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
561
562 * sparc.h (F_FLOAT, F_FBR): Define.
563
564 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
565
566 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
567 from all insns.
568 (ABS8SRC,ABS8DST): Add ABS8MEM.
569 (add.l): Fix reg+reg variant.
570 (eepmov.w): Renamed from eepmovw.
571 (ldc,stc): Fix many cases.
572
573 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
574
575 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
576
577 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
578
579 * sparc.h (O): Mark operand letter as in use.
580
581 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
582
583 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
584 Mark operand letters uU as in use.
585
586 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
587
588 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
589 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
590 (SPARC_OPCODE_SUPPORTED): New macro.
591 (SPARC_OPCODE_CONFLICT_P): Rewrite.
592 (F_NOTV9): Delete.
593
594 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
595
596 * sparc.h (sparc_opcode_lookup_arch) Make return type in
597 declaration consistent with return type in definition.
598
599 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
600
601 * i386.h (i386_optab): Remove Data32 from pushf and popf.
602
603 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
604
605 * i386.h (i386_regtab): Add 80486 test registers.
606
607 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
608
609 * i960.h (I_HX): Define.
610 (i960_opcodes): Add HX instruction.
611
612 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
613
614 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
615 and fclex.
616
617 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
618
619 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
620 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
621 (bfd_* defines): Delete.
622 (sparc_opcode_archs): Replaces architecture_pname.
623 (sparc_opcode_lookup_arch): Declare.
624 (NUMOPCODES): Delete.
625
626 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
627
628 * sparc.h (enum sparc_architecture): Add v9a.
629 (ARCHITECTURES_CONFLICT_P): Update.
630
631 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
632
633 * i386.h: Added Pentium Pro instructions.
634
635 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
636
637 * m68k.h: Document new 'W' operand place.
638
639 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
640
641 * hppa.h: Add lci and syncdma instructions.
642
643 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
644
645 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
646 instructions.
647
648 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
649
650 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
651 assembler's -mcom and -many switches.
652
653 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
654
655 * i386.h: Fix cmpxchg8b extension opcode description.
656
657 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
658
659 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
660 and register cr4.
661
662 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
663
664 * m68k.h: Change comment: split type P into types 0, 1 and 2.
665
666 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
667
668 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
669
670 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
671
672 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
673
674 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
675
676 * m68kmri.h: Remove.
677
678 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
679 declarations. Remove F_ALIAS and flag field of struct
680 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
681 int. Make name and args fields of struct m68k_opcode const.
682
683 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
684
685 * sparc.h (F_NOTV9): Define.
686
687 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
688
689 * mips.h (INSN_4010): Define.
690
691 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
692
693 * m68k.h (TBL1): Reverse sense of "round" argument in result.
694
695 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
696 * m68k.h: Fix argument descriptions of coprocessor
697 instructions to allow only alterable operands where appropriate.
698 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
699 (m68k_opcode_aliases): Add more aliases.
700
701 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
702
703 * m68k.h: Added explcitly short-sized conditional branches, and a
704 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
705 svr4-based configurations.
706
707 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
708
709 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
710 * i386.h: added missing Data16/Data32 flags to a few instructions.
711
712 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
713
714 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
715 (OP_MASK_BCC, OP_SH_BCC): Define.
716 (OP_MASK_PREFX, OP_SH_PREFX): Define.
717 (OP_MASK_CCC, OP_SH_CCC): Define.
718 (INSN_READ_FPR_R): Define.
719 (INSN_RFE): Delete.
720
721 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
722
723 * m68k.h (enum m68k_architecture): Deleted.
724 (struct m68k_opcode_alias): New type.
725 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
726 matching constraints, values and flags. As a side effect of this,
727 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
728 as I know were never used, now may need re-examining.
729 (numopcodes): Now const.
730 (m68k_opcode_aliases, numaliases): New variables.
731 (endop): Deleted.
732 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
733 m68k_opcode_aliases; update declaration of m68k_opcodes.
734
735 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
736
737 * hppa.h (delay_type): Delete unused enumeration.
738 (pa_opcode): Replace unused delayed field with an architecture
739 field.
740 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
741
742 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
743
744 * mips.h (INSN_ISA4): Define.
745
746 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
747
748 * mips.h (M_DLA_AB, M_DLI): Define.
749
750 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
751
752 * hppa.h (fstwx): Fix single-bit error.
753
754 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
755
756 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
757
758 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
759
760 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
761 debug registers. From Charles Hannum (mycroft@netbsd.org).
762
763 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
764
765 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
766 i386 support:
767 * i386.h (MOV_AX_DISP32): New macro.
768 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
769 of several call/return instructions.
770 (ADDR_PREFIX_OPCODE): New macro.
771
772 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
773
774 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
775
776 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
777 it pointer to const char;
778 (struct vot, field `name'): ditto.
779
780 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
781
782 * vax.h: Supply and properly group all values in end sentinel.
783
784 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
785
786 * mips.h (INSN_ISA, INSN_4650): Define.
787
788 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
789
790 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
791 systems with a separate instruction and data cache, such as the
792 29040, these instructions take an optional argument.
793
794 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
795
796 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
797 INSN_TRAP.
798
799 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
800
801 * mips.h (INSN_STORE_MEMORY): Define.
802
803 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
804
805 * sparc.h: Document new operand type 'x'.
806
807 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
808
809 * i960.h (I_CX2): New instruction category. It includes
810 instructions available on Cx and Jx processors.
811 (I_JX): New instruction category, for JX-only instructions.
812 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
813 Jx-only instructions, in I_JX category.
814
815 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
816
817 * ns32k.h (endop): Made pointer const too.
818
819 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
820
821 * ns32k.h: Drop Q operand type as there is no correct use
822 for it. Add I and Z operand types which allow better checking.
823
824 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
825
826 * h8300.h (xor.l) :fix bit pattern.
827 (L_2): New size of operand.
828 (trapa): Use it.
829
830 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
831
832 * m68k.h: Move "trap" before "tpcc" to change disassembly.
833
834 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
835
836 * sparc.h: Include v9 definitions.
837
838 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
839
840 * m68k.h (m68060): Defined.
841 (m68040up, mfloat, mmmu): Include it.
842 (struct m68k_opcode): Widen `arch' field.
843 (m68k_opcodes): Updated for M68060. Removed comments that were
844 instructions commented out by "JF" years ago.
845
846 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
847
848 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
849 add a one-bit `flags' field.
850 (F_ALIAS): New macro.
851
852 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
853
854 * h8300.h (dec, inc): Get encoding right.
855
856 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
857
858 * ppc.h (struct powerpc_operand): Removed signedp field; just use
859 a flag instead.
860 (PPC_OPERAND_SIGNED): Define.
861 (PPC_OPERAND_SIGNOPT): Define.
862
863 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
864
865 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
866 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
867
868 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
869
870 * i386.h: Reverse last change. It'll be handled in gas instead.
871
872 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
873
874 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
875 slower on the 486 and used the implicit shift count despite the
876 explicit operand. The one-operand form is still available to get
877 the shorter form with the implicit shift count.
878
879 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
880
881 * hppa.h: Fix typo in fstws arg string.
882
883 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
884
885 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
886
887 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
888
889 * ppc.h (PPC_OPCODE_601): Define.
890
891 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
892
893 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
894 (so we can determine valid completers for both addb and addb[tf].)
895
896 * hppa.h (xmpyu): No floating point format specifier for the
897 xmpyu instruction.
898
899 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
900
901 * ppc.h (PPC_OPERAND_NEXT): Define.
902 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
903 (struct powerpc_macro): Define.
904 (powerpc_macros, powerpc_num_macros): Declare.
905
906 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
907
908 * ppc.h: New file. Header file for PowerPC opcode table.
909
910 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
911
912 * hppa.h: More minor template fixes for sfu and copr (to allow
913 for easier disassembly).
914
915 * hppa.h: Fix templates for all the sfu and copr instructions.
916
917 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
918
919 * i386.h (push): Permit Imm16 operand too.
920
921 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
922
923 * h8300.h (andc): Exists in base arch.
924
925 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
926
927 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
928 * hppa.h: #undef NONE to avoid conflict with hiux include files.
929
930 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
931
932 * hppa.h: Add FP quadword store instructions.
933
934 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
935
936 * mips.h: (M_J_A): Added.
937 (M_LA): Removed.
938
939 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
940
941 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
942 <mellon@pepper.ncd.com>.
943
944 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
945
946 * hppa.h: Immediate field in probei instructions is unsigned,
947 not low-sign extended.
948
949 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
950
951 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
952
953 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
954
955 * i386.h: Add "fxch" without operand.
956
957 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
958
959 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
960
961 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
962
963 * hppa.h: Add gfw and gfr to the opcode table.
964
965 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
966
967 * m88k.h: extended to handle m88110.
968
969 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
970
971 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
972 addresses.
973
974 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
975
976 * i960.h (i960_opcodes): Properly bracket initializers.
977
978 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
979
980 * m88k.h (BOFLAG): rewrite to avoid nested comment.
981
982 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
983
984 * m68k.h (two): Protect second argument with parentheses.
985
986 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
987
988 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
989 Deleted old in/out instructions in "#if 0" section.
990
991 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
992
993 * i386.h (i386_optab): Properly bracket initializers.
994
995 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
996
997 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
998 Jeff Law, law@cs.utah.edu).
999
1000 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1001
1002 * i386.h (lcall): Accept Imm32 operand also.
1003
1004 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1005
1006 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1007 (M_DABS): Added.
1008
1009 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1010
1011 * mips.h (INSN_*): Changed values. Removed unused definitions.
1012 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1013 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1014 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1015 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1016 (M_*): Added new values for r6000 and r4000 macros.
1017 (ANY_DELAY): Removed.
1018
1019 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1020
1021 * mips.h: Added M_LI_S and M_LI_SS.
1022
1023 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1024
1025 * h8300.h: Get some rare mov.bs correct.
1026
1027 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1028
1029 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1030 been included.
1031
1032 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1033
1034 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1035 jump instructions, for use in disassemblers.
1036
1037 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1038
1039 * m88k.h: Make bitfields just unsigned, not unsigned long or
1040 unsigned short.
1041
1042 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1043
1044 * hppa.h: New argument type 'y'. Use in various float instructions.
1045
1046 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1047
1048 * hppa.h (break): First immediate field is unsigned.
1049
1050 * hppa.h: Add rfir instruction.
1051
1052 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1053
1054 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1055
1056 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1057
1058 * mips.h: Reworked the hazard information somewhat, and fixed some
1059 bugs in the instruction hazard descriptions.
1060
1061 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1062
1063 * m88k.h: Corrected a couple of opcodes.
1064
1065 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1066
1067 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1068 new version includes instruction hazard information, but is
1069 otherwise reasonably similar.
1070
1071 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1072
1073 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1074
1075 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1076
1077 Patches from Jeff Law, law@cs.utah.edu:
1078 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1079 Make the tables be the same for the following instructions:
1080 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1081 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1082 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1083 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1084 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1085 "fcmp", and "ftest".
1086
1087 * hppa.h: Make new and old tables the same for "break", "mtctl",
1088 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1089 Fix typo in last patch. Collapse several #ifdefs into a
1090 single #ifdef.
1091
1092 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1093 of the comments up-to-date.
1094
1095 * hppa.h: Update "free list" of letters and update
1096 comments describing each letter's function.
1097
1098 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1099
1100 * h8300.h: checkpoint, includes H8/300-H opcodes.
1101
1102 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1103
1104 * Patches from Jeffrey Law <law@cs.utah.edu>.
1105 * hppa.h: Rework single precision FP
1106 instructions so that they correctly disassemble code
1107 PA1.1 code.
1108
1109 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1110
1111 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1112 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1113
1114 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1115
1116 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1117 gdb will define it for now.
1118
1119 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1120
1121 * sparc.h: Don't end enumerator list with comma.
1122
1123 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1124
1125 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1126 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1127 ("bc2t"): Correct typo.
1128 ("[ls]wc[023]"): Use T rather than t.
1129 ("c[0123]"): Define general coprocessor instructions.
1130
1131 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1132
1133 * m68k.h: Move split point for gcc compilation more towards
1134 middle.
1135
1136 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1137
1138 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1139 simply wrong, ics, rfi, & rfsvc were missing).
1140 Add "a" to opr_ext for "bb". Doc fix.
1141
1142 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1143
1144 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1145 * mips.h: Add casts, to suppress warnings about shifting too much.
1146 * m68k.h: Document the placement code '9'.
1147
1148 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1149
1150 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1151 allows callers to break up the large initialized struct full of
1152 opcodes into two half-sized ones. This permits GCC to compile
1153 this module, since it takes exponential space for initializers.
1154 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1155
1156 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1157
1158 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1159 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1160 initialized structs in it.
1161
1162 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1163
1164 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1165 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1166 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1167
1168 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1169
1170 * mips.h: document "i" and "j" operands correctly.
1171
1172 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1173
1174 * mips.h: Removed endianness dependency.
1175
1176 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1177
1178 * h8300.h: include info on number of cycles per instruction.
1179
1180 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1181
1182 * hppa.h: Move handy aliases to the front. Fix masks for extract
1183 and deposit instructions.
1184
1185 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1186
1187 * i386.h: accept shld and shrd both with and without the shift
1188 count argument, which is always %cl.
1189
1190 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1191
1192 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1193 (one_byte_segment_defaults, two_byte_segment_defaults,
1194 i386_prefixtab_end): Ditto.
1195
1196 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1197
1198 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1199 for operand 2; from John Carr, jfc@dsg.dec.com.
1200
1201 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1202
1203 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1204 always use 16-bit offsets. Makes calculated-size jump tables
1205 feasible.
1206
1207 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1208
1209 * i386.h: Fix one-operand forms of in* and out* patterns.
1210
1211 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1212
1213 * m68k.h: Added CPU32 support.
1214
1215 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1216
1217 * mips.h (break): Disassemble the argument. Patch from
1218 jonathan@cs.stanford.edu (Jonathan Stone).
1219
1220 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1221
1222 * m68k.h: merged Motorola and MIT syntax.
1223
1224 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1225
1226 * m68k.h (pmove): make the tests less strict, the 68k book is
1227 wrong.
1228
1229 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1230
1231 * m68k.h (m68ec030): Defined as alias for 68030.
1232 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1233 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1234 them. Tightened description of "fmovex" to distinguish it from
1235 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1236 up descriptions that claimed versions were available for chips not
1237 supporting them. Added "pmovefd".
1238
1239 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1240
1241 * m68k.h: fix where the . goes in divull
1242
1243 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1244
1245 * m68k.h: the cas2 instruction is supposed to be written with
1246 indirection on the last two operands, which can be either data or
1247 address registers. Added a new operand type 'r' which accepts
1248 either register type. Added new cases for cas2l and cas2w which
1249 use them. Corrected masks for cas2 which failed to recognize use
1250 of address register.
1251
1252 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1253
1254 * m68k.h: Merged in patches (mostly m68040-specific) from
1255 Colin Smith <colin@wrs.com>.
1256
1257 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1258 base). Also cleaned up duplicates, re-ordered instructions for
1259 the sake of dis-assembling (so aliases come after standard names).
1260 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
1261
1262 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1263
1264 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
1265 all missing .s
1266
1267 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
1268
1269 * sparc.h: Moved tables to BFD library.
1270
1271 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
1272
1273 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
1274
1275 * h8300.h: Finish filling in all the holes in the opcode table,
1276 so that the Lucid C compiler can digest this as well...
1277
1278 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
1279
1280 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
1281 Fix opcodes on various sizes of fild/fist instructions
1282 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
1283 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
1284
1285 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
1286
1287 * h8300.h: Fill in all the holes in the opcode table so that the
1288 losing HPUX C compiler can digest this...
1289
1290 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
1291
1292 * mips.h: Fix decoding of coprocessor instructions, somewhat.
1293 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
1294
1295 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
1296
1297 * sparc.h: Add new architecture variant sparclite; add its scan
1298 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
1299
1300 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
1301
1302 * mips.h: Add some more opcode synonyms (from Frank Yellin,
1303 fy@lucid.com).
1304
1305 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
1306
1307 * rs6k.h: New version from IBM (Metin).
1308
1309 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
1310
1311 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
1312 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
1313
1314 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
1315
1316 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
1317
1318 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
1319
1320 * m68k.h (one, two): Cast macro args to unsigned to suppress
1321 complaints from compiler and lint about integer overflow during
1322 shift.
1323
1324 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
1325
1326 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
1327
1328 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
1329
1330 * mips.h: Make bitfield layout depend on the HOST compiler,
1331 not on the TARGET system.
1332
1333 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
1334
1335 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
1336 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
1337 <TRANLE@INTELLICORP.COM>.
1338
1339 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
1340
1341 * h8300.h: turned op_type enum into #define list
1342
1343 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
1344
1345 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
1346 similar instructions -- they've been renamed to "fitoq", etc.
1347 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
1348 number of arguments.
1349 * h8300.h: Remove extra ; which produces compiler warning.
1350
1351 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
1352
1353 * sparc.h: fix opcode for tsubcctv.
1354
1355 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
1356
1357 * sparc.h: fba and cba are now aliases for fb and cb respectively.
1358
1359 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
1360
1361 * sparc.h (nop): Made the 'lose' field be even tighter,
1362 so only a standard 'nop' is disassembled as a nop.
1363
1364 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
1365
1366 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
1367 disassembled as a nop.
1368
1369 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
1370
1371 * sparc.h: fix a typo.
1372
1373 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
1374
1375 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
1376 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
1377 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
1378
1379 \f
1380 Local Variables:
1381 version-control: never
1382 End:
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