* mips.h: Correct comment typo.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2003-04-09 J. Grant <jg-binutils@jguk.org>
2
3 * mips.h: Correct comment typo.
4
5 2003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
6
7 * s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
8 (S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH.
9 (s390_opcode): Remove architecture. Add modes and min_cpu.
10
11 2003-03-17 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
12
13 * h8300.h (O_SYS_CMDLINE): New pseudo opcode for command line
14 processing.
15
16 2003-02-21 Noida D.Venkatasubramanian <dvenkat@noida.hcltech.com>
17
18 * h8300.h (ldmac, stmac): Replace MACREG with MS32 and MD32.
19
20 2003-01-23 Alan Modra <amodra@bigpond.net.au>
21
22 * m68hc11.h (cpu6812s): Define.
23
24 2003-01-07 Chris Demetriou <cgd@broadcom.com>
25
26 * mips.h: Fix missing space in comment.
27 (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
28 (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
29 by four bits.
30
31 2003-01-02 Chris Demetriou <cgd@broadcom.com>
32
33 * mips.h: Update copyright years to include 2002 (which had
34 been missed previously) and 2003. Make comments about "+A",
35 "+B", and "+C" operand types more descriptive.
36
37 2002-12-31 Chris Demetriou <cgd@broadcom.com>
38
39 * mips.h: Note that the "+D" operand type name is now used.
40
41 2002-12-30 Chris Demetriou <cgd@broadcom.com>
42
43 * mips.h: Document "+" as the start of two-character operand
44 type names, and add new "K", "+A", "+B", and "+C" operand types.
45 (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
46 (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
47 defines.
48
49 2002-12-24 Dmitry Diky <diwil@mail.ru>
50
51 * msp430.h: New file. Defines msp430 opcodes.
52
53 2002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
54
55 * h8300.h: Added some more pseudo opcodes for system call
56 processing.
57
58 2002-12-19 Chris Demetriou <cgd@broadcom.com>
59
60 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
61 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
62 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
63 (OP_OP_SDC2, OP_OP_SDC3): Define.
64
65 2002-12-16 Alan Modra <amodra@bigpond.net.au>
66
67 * hppa.h (completer_chars): #if 0 out.
68
69 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
70 "default_args".
71 (struct not_wot): Constify "args".
72 (struct not): Constify "name".
73 (numopcodes): Delete.
74 (endop): Delete.
75
76 2002-12-13 Alan Modra <amodra@bigpond.net.au>
77
78 * pj.h (pj_opc_info_t): Add union.
79
80 2002-12-04 David Mosberger <davidm@hpl.hp.com>
81
82 * ia64.h: Fix copyright message.
83 (IA64_OPND_AR_CSD): New operand kind.
84
85 2002-12-03 Richard Henderson <rth@redhat.com>
86
87 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
88
89 2002-12-03 Alan Modra <amodra@bigpond.net.au>
90
91 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
92 Constify "leaf" and "multi".
93
94 2002-11-19 Klee Dienes <kdienes@apple.com>
95
96 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
97 fields.
98 (h8_opcodes). Modify initializer and initializer macros to no
99 longer initialize the removed fields.
100
101 2002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
102
103 * tic4x.h (c4x_insts): Fixed LDHI constraint
104
105 2002-11-18 Klee Dienes <kdienes@apple.com>
106
107 * h8300.h (h8_opcode): Remove 'length' field.
108 (h8_opcodes): Mark as 'const' (both the declaration and
109 definition). Modify initializer and initializer macros to no
110 longer initialize the length field.
111
112 2002-11-18 Klee Dienes <kdienes@apple.com>
113
114 * arc.h (arc_ext_opcodes): Declare as extern.
115 (arc_ext_operands): Declare as extern.
116 * i860.h (i860_opcodes): Declare as const.
117
118 2002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
119
120 * tic4x.h: File reordering. Added enhanced opcodes.
121
122 2002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
123
124 * tic4x.h: Major rewrite of entire file. Define instruction
125 classes, and put each instruction into a class.
126
127 2002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
128
129 * tic4x.h: Added new opcodes and corrected some bugs. Add support
130 for new DSP types.
131
132 2002-10-14 Alan Modra <amodra@bigpond.net.au>
133
134 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
135
136 2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
137 Ken Raeburn <raeburn@cygnus.com>
138 Aldy Hernandez <aldyh@redhat.com>
139 Eric Christopher <echristo@redhat.com>
140 Richard Sandiford <rsandifo@redhat.com>
141
142 * mips.h: Update comment for new opcodes.
143 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
144 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
145 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
146 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
147 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
148 Don't match CPU_R4111 with INSN_4100.
149
150 2002-08-19 Elena Zannoni <ezannoni@redhat.com>
151
152 From matthew green <mrg@redhat.com>
153
154 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
155 instructions.
156 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
157 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
158 e500x2 Integer select, branch locking, performance monitor,
159 cache locking and machine check APUs, respectively.
160 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
161 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
162
163 2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
164
165 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
166 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
167 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
168 memory banks.
169 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
170
171 2002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
172
173 * mips.h (INSN_MIPS16): New define.
174
175 2002-07-08 Alan Modra <amodra@bigpond.net.au>
176
177 * i386.h: Remove IgnoreSize from movsx and movzx.
178
179 2002-06-08 Alan Modra <amodra@bigpond.net.au>
180
181 * a29k.h: Replace CONST with const.
182 (CONST): Don't define.
183 * convex.h: Replace CONST with const.
184 (CONST): Don't define.
185 * dlx.h: Replace CONST with const.
186 * or32.h (CONST): Don't define.
187
188 2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
189
190 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
191 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
192 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
193 (INSN_MDMX): New constants, for MDMX support.
194 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
195
196 2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
197
198 * dlx.h: New file.
199
200 2002-05-25 Alan Modra <amodra@bigpond.net.au>
201
202 * ia64.h: Use #include "" instead of <> for local header files.
203 * sparc.h: Likewise.
204
205 2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
206
207 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
208
209 2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
210
211 * h8300.h: Corrected defs of all control regs
212 and eepmov instr.
213
214 2002-04-11 Alan Modra <amodra@bigpond.net.au>
215
216 * i386.h: Add intel mode cmpsd and movsd.
217 Put them before SSE2 insns, so that rep prefix works.
218
219 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
220
221 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
222 instructions.
223 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
224 may be passed along with the ISA bitmask.
225
226 2002-03-05 Paul Koning <pkoning@equallogic.com>
227
228 * pdp11.h: Add format codes for float instruction formats.
229
230 2002-02-25 Alan Modra <amodra@bigpond.net.au>
231
232 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
233
234 Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
235
236 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
237
238 Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
239
240 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
241 (xchg): Fix.
242 (in, out): Disable 64bit operands.
243 (call, jmp): Avoid REX prefixes.
244 (jcxz): Prohibit in 64bit mode
245 (jrcxz, loop): Add 64bit variants.
246 (movq): Fix patterns.
247 (movmskps, pextrw, pinstrw): Add 64bit variants.
248
249 2002-01-31 Ivan Guzvinec <ivang@opencores.org>
250
251 * or32.h: New file.
252
253 2002-01-22 Graydon Hoare <graydon@redhat.com>
254
255 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
256 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
257
258 2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
259
260 * h8300.h: Comment typo fix.
261
262 2002-01-03 matthew green <mrg@redhat.com>
263
264 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
265 (PPC_OPCODE_BOOKE64): Likewise.
266
267 Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
268
269 * hppa.h (call, ret): Move to end of table.
270 (addb, addib): PA2.0 variants should have been PA2.0W.
271 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
272 happy.
273 (fldw, fldd, fstw, fstd, bb): Likewise.
274 (short loads/stores): Tweak format specifier slightly to keep
275 disassembler happy.
276 (indexed loads/stores): Likewise.
277 (absolute loads/stores): Likewise.
278
279 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
280
281 * d10v.h (OPERAND_NOSP): New macro.
282
283 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
284
285 * d10v.h (OPERAND_SP): New macro.
286
287 2001-11-15 Alan Modra <amodra@bigpond.net.au>
288
289 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
290
291 2001-11-11 Timothy Wall <twall@alum.mit.edu>
292
293 * tic54x.h: Revise opcode layout; don't really need a separate
294 structure for parallel opcodes.
295
296 2001-11-13 Zack Weinberg <zack@codesourcery.com>
297 Alan Modra <amodra@bigpond.net.au>
298
299 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
300 accept WordReg.
301
302 2001-11-04 Chris Demetriou <cgd@broadcom.com>
303
304 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
305
306 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
307
308 * mmix.h: New file.
309
310 2001-10-18 Chris Demetriou <cgd@broadcom.com>
311
312 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
313 of the expression, to make source code merging easier.
314
315 2001-10-17 Chris Demetriou <cgd@broadcom.com>
316
317 * mips.h: Sort coprocessor instruction argument characters
318 in comment, add a few more words of description for "H".
319
320 2001-10-17 Chris Demetriou <cgd@broadcom.com>
321
322 * mips.h (INSN_SB1): New cpu-specific instruction bit.
323 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
324 if cpu is CPU_SB1.
325
326 2001-10-17 matthew green <mrg@redhat.com>
327
328 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
329
330 2001-10-12 matthew green <mrg@redhat.com>
331
332 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
333 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
334 instructions, respectively.
335
336 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
337
338 * v850.h: Remove spurious comment.
339
340 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
341
342 * h8300.h: Fix compile time warning messages
343
344 2001-09-04 Richard Henderson <rth@redhat.com>
345
346 * alpha.h (struct alpha_operand): Pack elements into bitfields.
347
348 2001-08-31 Eric Christopher <echristo@redhat.com>
349
350 * mips.h: Remove CPU_MIPS32_4K.
351
352 2001-08-27 Torbjorn Granlund <tege@swox.com>
353
354 * ppc.h (PPC_OPERAND_DS): Define.
355
356 2001-08-25 Andreas Jaeger <aj@suse.de>
357
358 * d30v.h: Fix declaration of reg_name_cnt.
359
360 * d10v.h: Fix declaration of d10v_reg_name_cnt.
361
362 * arc.h: Add prototypes from opcodes/arc-opc.c.
363
364 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
365
366 * mips.h (INSN_10000): Define.
367 (OPCODE_IS_MEMBER): Check for INSN_10000.
368
369 2001-08-10 Alan Modra <amodra@one.net.au>
370
371 * ppc.h: Revert 2001-08-08.
372
373 2001-08-10 Richard Sandiford <rsandifo@redhat.com>
374
375 * mips.h (INSN_GP32): Remove.
376 (OPCODE_IS_MEMBER): Remove gp32 parameter.
377 (M_MOVE): New macro identifier.
378
379 2001-08-08 Alan Modra <amodra@one.net.au>
380
381 1999-10-25 Torbjorn Granlund <tege@swox.com>
382 * ppc.h (struct powerpc_operand): New field `reloc'.
383
384 2001-08-01 Aldy Hernandez <aldyh@redhat.com>
385
386 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
387
388 2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
389
390 * cgen.h (CGEN_INSN): Add regex support.
391 (build_insn_regex): Declare.
392
393 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
394
395 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
396 (cgen_cpu_desc): Ditto.
397
398 2001-07-07 Ben Elliston <bje@redhat.com>
399
400 * m88k.h: Clean up and reformat. Remove unused code.
401
402 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
403
404 * cgen.h (cgen_keyword): Add nonalpha_chars field.
405
406 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
407
408 * mips.h (CPU_R12000): Define.
409
410 2001-05-23 John Healy <jhealy@redhat.com>
411
412 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
413
414 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
415
416 * mips.h (INSN_ISA_MASK): Define.
417
418 2001-05-12 Alan Modra <amodra@one.net.au>
419
420 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
421 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
422 and use InvMem as these insns must have register operands.
423
424 2001-05-04 Alan Modra <amodra@one.net.au>
425
426 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
427 and pextrw to swap reg/rm assignments.
428
429 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
430
431 * cris.h (enum cris_insn_version_usage): Correct comment for
432 cris_ver_v3p.
433
434 2001-03-24 Alan Modra <alan@linuxcare.com.au>
435
436 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
437 Add InvMem to first operand of "maskmovdqu".
438
439 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
440
441 * cris.h (ADD_PC_INCR_OPCODE): New macro.
442
443 2001-03-21 Kazu Hirata <kazu@hxi.com>
444
445 * h8300.h: Fix formatting.
446
447 2001-03-22 Alan Modra <alan@linuxcare.com.au>
448
449 * i386.h (i386_optab): Add paddq, psubq.
450
451 2001-03-19 Alan Modra <alan@linuxcare.com.au>
452
453 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
454
455 2001-02-28 Igor Shevlyakov <igor@windriver.com>
456
457 * m68k.h: new defines for Coldfire V4. Update mcf to know
458 about mcf5407.
459
460 2001-02-18 lars brinkhoff <lars@nocrew.org>
461
462 * pdp11.h: New file.
463
464 2001-02-12 Jan Hubicka <jh@suse.cz>
465
466 * i386.h (i386_optab): SSE integer converison instructions have
467 64bit versions on x86-64.
468
469 2001-02-10 Nick Clifton <nickc@redhat.com>
470
471 * mips.h: Remove extraneous whitespace. Formating change to allow
472 for future contribution.
473
474 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
475
476 * s390.h: New file.
477
478 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
479
480 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
481 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
482 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
483
484 2001-01-24 Karsten Keil <kkeil@suse.de>
485
486 * i386.h (i386_optab): Fix swapgs
487
488 2001-01-14 Alan Modra <alan@linuxcare.com.au>
489
490 * hppa.h: Describe new '<' and '>' operand types, and tidy
491 existing comments.
492 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
493 Remove duplicate "ldw j(s,b),x". Sort some entries.
494
495 2001-01-13 Jan Hubicka <jh@suse.cz>
496
497 * i386.h (i386_optab): Fix pusha and ret templates.
498
499 2001-01-11 Peter Targett <peter.targett@arccores.com>
500
501 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
502 definitions for masking cpu type.
503 (arc_ext_operand_value) New structure for storing extended
504 operands.
505 (ARC_OPERAND_*) Flags for operand values.
506
507 2001-01-10 Jan Hubicka <jh@suse.cz>
508
509 * i386.h (pinsrw): Add.
510 (pshufw): Remove.
511 (cvttpd2dq): Fix operands.
512 (cvttps2dq): Likewise.
513 (movq2q): Rename to movdq2q.
514
515 2001-01-10 Richard Schaal <richard.schaal@intel.com>
516
517 * i386.h: Correct movnti instruction.
518
519 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
520
521 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
522 of operands (unsigned char or unsigned short).
523 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
524 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
525
526 2001-01-05 Jan Hubicka <jh@suse.cz>
527
528 * i386.h (i386_optab): Make [sml]fence template to use immext field.
529
530 2001-01-03 Jan Hubicka <jh@suse.cz>
531
532 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
533 introduced by Pentium4
534
535 2000-12-30 Jan Hubicka <jh@suse.cz>
536
537 * i386.h (i386_optab): Add "rex*" instructions;
538 add swapgs; disable jmp/call far direct instructions for
539 64bit mode; add syscall and sysret; disable registers for 0xc6
540 template. Add 'q' suffixes to extendable instructions, disable
541 obsolete instructions, add new sign/zero extension ones.
542 (i386_regtab): Add extended registers.
543 (*Suf): Add No_qSuf.
544 (q_Suf, wlq_Suf, bwlq_Suf): New.
545
546 2000-12-20 Jan Hubicka <jh@suse.cz>
547
548 * i386.h (i386_optab): Replace "Imm" with "EncImm".
549 (i386_regtab): Add flags field.
550
551 2000-12-12 Nick Clifton <nickc@redhat.com>
552
553 * mips.h: Fix formatting.
554
555 2000-12-01 Chris Demetriou <cgd@sibyte.com>
556
557 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
558 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
559 OP_*_SYSCALL definitions.
560 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
561 19 bit wait codes.
562 (MIPS operand specifier comments): Remove 'm', add 'U' and
563 'J', and update the meaning of 'B' so that it's more general.
564
565 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
566 INSN_ISA5): Renumber, redefine to mean the ISA at which the
567 instruction was added.
568 (INSN_ISA32): New constant.
569 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
570 Renumber to avoid new and/or renumbered INSN_* constants.
571 (INSN_MIPS32): Delete.
572 (ISA_UNKNOWN): New constant to indicate unknown ISA.
573 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
574 ISA_MIPS32): New constants, defined to be the mask of INSN_*
575 constants available at that ISA level.
576 (CPU_UNKNOWN): New constant to indicate unknown CPU.
577 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
578 define it with a unique value.
579 (OPCODE_IS_MEMBER): Update for new ISA membership-related
580 constant meanings.
581
582 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
583 definitions.
584
585 * mips.h (CPU_SB1): New constant.
586
587 2000-10-20 Jakub Jelinek <jakub@redhat.com>
588
589 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
590 Note that '3' is used for siam operand.
591
592 2000-09-22 Jim Wilson <wilson@cygnus.com>
593
594 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
595
596 2000-09-13 Anders Norlander <anorland@acc.umu.se>
597
598 * mips.h: Use defines instead of hard-coded processor numbers.
599 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
600 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
601 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
602 CPU_4KC, CPU_4KM, CPU_4KP): Define..
603 (OPCODE_IS_MEMBER): Use new defines.
604 (OP_MASK_SEL, OP_SH_SEL): Define.
605 (OP_MASK_CODE20, OP_SH_CODE20): Define.
606 Add 'P' to used characters.
607 Use 'H' for coprocessor select field.
608 Use 'm' for 20 bit breakpoint code.
609 Document new arg characters and add to used characters.
610 (INSN_MIPS32): New define for MIPS32 extensions.
611 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
612
613 2000-09-05 Alan Modra <alan@linuxcare.com.au>
614
615 * hppa.h: Mention cz completer.
616
617 2000-08-16 Jim Wilson <wilson@cygnus.com>
618
619 * ia64.h (IA64_OPCODE_POSTINC): New.
620
621 2000-08-15 H.J. Lu <hjl@gnu.org>
622
623 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
624 IgnoreSize change.
625
626 2000-08-08 Jason Eckhardt <jle@cygnus.com>
627
628 * i860.h: Small formatting adjustments.
629
630 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
631
632 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
633 Move related opcodes closer to each other.
634 Minor changes in comments, list undefined opcodes.
635
636 2000-07-26 Dave Brolley <brolley@redhat.com>
637
638 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
639
640 2000-07-22 Jason Eckhardt <jle@cygnus.com>
641
642 * i860.h (btne, bte, bla): Changed these opcodes
643 to use sbroff ('r') instead of split16 ('s').
644 (J, K, L, M): New operand types for 16-bit aligned fields.
645 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
646 use I, J, K, L, M instead of just I.
647 (T, U): New operand types for split 16-bit aligned fields.
648 (st.x): Changed these opcodes to use S, T, U instead of just S.
649 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
650 exist on the i860.
651 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
652 (pfeq.ss, pfeq.dd): New opcodes.
653 (st.s): Fixed incorrect mask bits.
654 (fmlow): Fixed incorrect mask bits.
655 (fzchkl, pfzchkl): Fixed incorrect mask bits.
656 (faddz, pfaddz): Fixed incorrect mask bits.
657 (form, pform): Fixed incorrect mask bits.
658 (pfld.l): Fixed incorrect mask bits.
659 (fst.q): Fixed incorrect mask bits.
660 (all floating point opcodes): Fixed incorrect mask bits for
661 handling of dual bit.
662
663 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
664
665 cris.h: New file.
666
667 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
668
669 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
670 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
671 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
672 (AVR_ISA_M83): Define for ATmega83, ATmega85.
673 (espm): Remove, because ESPM removed in databook update.
674 (eicall, eijmp): Move to the end of opcode table.
675
676 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
677
678 * m68hc11.h: New file for support of Motorola 68hc11.
679
680 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
681
682 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
683
684 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
685
686 * avr.h: New file with AVR opcodes.
687
688 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
689
690 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
691
692 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
693
694 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
695
696 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
697
698 * i386.h: Use sl_FP, not sl_Suf for fild.
699
700 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
701
702 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
703 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
704 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
705 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
706
707 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
708
709 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
710
711 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
712 Alexander Sokolov <robocop@netlink.ru>
713
714 * i386.h (i386_optab): Add cpu_flags for all instructions.
715
716 2000-05-13 Alan Modra <alan@linuxcare.com.au>
717
718 From Gavin Romig-Koch <gavin@cygnus.com>
719 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
720
721 2000-05-04 Timothy Wall <twall@cygnus.com>
722
723 * tic54x.h: New.
724
725 2000-05-03 J.T. Conklin <jtc@redback.com>
726
727 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
728 (PPC_OPERAND_VR): New operand flag for vector registers.
729
730 2000-05-01 Kazu Hirata <kazu@hxi.com>
731
732 * h8300.h (EOP): Add missing initializer.
733
734 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
735
736 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
737 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
738 New operand types l,y,&,fe,fE,fx added to support above forms.
739 (pa_opcodes): Replaced usage of 'x' as source/target for
740 floating point double-word loads/stores with 'fx'.
741
742 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
743 David Mosberger <davidm@hpl.hp.com>
744 Timothy Wall <twall@cygnus.com>
745 Jim Wilson <wilson@cygnus.com>
746
747 * ia64.h: New file.
748
749 2000-03-27 Nick Clifton <nickc@cygnus.com>
750
751 * d30v.h (SHORT_A1): Fix value.
752 (SHORT_AR): Renumber so that it is at the end of the list of short
753 instructions, not the end of the list of long instructions.
754
755 2000-03-26 Alan Modra <alan@linuxcare.com>
756
757 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
758 problem isn't really specific to Unixware.
759 (OLDGCC_COMPAT): Define.
760 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
761 destination %st(0).
762 Fix lots of comments.
763
764 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
765
766 * d30v.h:
767 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
768 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
769 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
770 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
771 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
772 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
773 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
774
775 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
776
777 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
778 fistpd without suffix.
779
780 2000-02-24 Nick Clifton <nickc@cygnus.com>
781
782 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
783 'signed_overflow_ok_p'.
784 Delete prototypes for cgen_set_flags() and cgen_get_flags().
785
786 2000-02-24 Andrew Haley <aph@cygnus.com>
787
788 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
789 (CGEN_CPU_TABLE): flags: new field.
790 Add prototypes for new functions.
791
792 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
793
794 * i386.h: Add some more UNIXWARE_COMPAT comments.
795
796 2000-02-23 Linas Vepstas <linas@linas.org>
797
798 * i370.h: New file.
799
800 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
801
802 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
803 cannot be combined in parallel with ADD/SUBppp.
804
805 2000-02-22 Andrew Haley <aph@cygnus.com>
806
807 * mips.h: (OPCODE_IS_MEMBER): Add comment.
808
809 1999-12-30 Andrew Haley <aph@cygnus.com>
810
811 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
812 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
813 insns.
814
815 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
816
817 * i386.h: Qualify intel mode far call and jmp with x_Suf.
818
819 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
820
821 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
822 indirect jumps and calls. Add FF/3 call for intel mode.
823
824 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
825
826 * mn10300.h: Add new operand types. Add new instruction formats.
827
828 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
829
830 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
831 instruction.
832
833 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
834
835 * mips.h (INSN_ISA5): New.
836
837 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
838
839 * mips.h (OPCODE_IS_MEMBER): New.
840
841 1999-10-29 Nick Clifton <nickc@cygnus.com>
842
843 * d30v.h (SHORT_AR): Define.
844
845 1999-10-18 Michael Meissner <meissner@cygnus.com>
846
847 * alpha.h (alpha_num_opcodes): Convert to unsigned.
848 (alpha_num_operands): Ditto.
849
850 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
851
852 * hppa.h (pa_opcodes): Add load and store cache control to
853 instructions. Add ordered access load and store.
854
855 * hppa.h (pa_opcode): Add new entries for addb and addib.
856
857 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
858
859 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
860
861 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
862
863 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
864
865 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
866
867 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
868 and "be" using completer prefixes.
869
870 * hppa.h (pa_opcodes): Add initializers to silence compiler.
871
872 * hppa.h: Update comments about character usage.
873
874 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
875
876 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
877 up the new fstw & bve instructions.
878
879 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
880
881 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
882 instructions.
883
884 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
885
886 * hppa.h (pa_opcodes): Add long offset double word load/store
887 instructions.
888
889 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
890 stores.
891
892 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
893
894 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
895
896 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
897
898 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
899
900 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
901
902 * hppa.h (pa_opcodes): Add support for "b,l".
903
904 * hppa.h (pa_opcodes): Add support for "b,gate".
905
906 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
907
908 * hppa.h (pa_opcodes): Use 'fX' for first register operand
909 in xmpyu.
910
911 * hppa.h (pa_opcodes): Fix mask for probe and probei.
912
913 * hppa.h (pa_opcodes): Fix mask for depwi.
914
915 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
916
917 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
918 an explicit output argument.
919
920 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
921
922 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
923 Add a few PA2.0 loads and store variants.
924
925 1999-09-04 Steve Chamberlain <sac@pobox.com>
926
927 * pj.h: New file.
928
929 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
930
931 * i386.h (i386_regtab): Move %st to top of table, and split off
932 other fp reg entries.
933 (i386_float_regtab): To here.
934
935 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
936
937 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
938 by 'f'.
939
940 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
941 Add supporting args.
942
943 * hppa.h: Document new completers and args.
944 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
945 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
946 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
947 pmenb and pmdis.
948
949 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
950 hshr, hsub, mixh, mixw, permh.
951
952 * hppa.h (pa_opcodes): Change completers in instructions to
953 use 'c' prefix.
954
955 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
956 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
957
958 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
959 fnegabs to use 'I' instead of 'F'.
960
961 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
962
963 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
964 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
965 Alphabetically sort PIII insns.
966
967 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
968
969 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
970
971 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
972
973 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
974 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
975
976 * hppa.h: Document 64 bit condition completers.
977
978 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
979
980 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
981
982 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
983
984 * i386.h (i386_optab): Add DefaultSize modifier to all insns
985 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
986 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
987
988 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
989 Jeff Law <law@cygnus.com>
990
991 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
992
993 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
994
995 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
996 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
997
998 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
999
1000 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
1001
1002 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
1003
1004 * hppa.h (struct pa_opcode): Add new field "flags".
1005 (FLAGS_STRICT): Define.
1006
1007 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1008 Jeff Law <law@cygnus.com>
1009
1010 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
1011
1012 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
1013
1014 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
1015
1016 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
1017 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
1018 flag to fcomi and friends.
1019
1020 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
1021
1022 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
1023 integer logical instructions.
1024
1025 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
1026
1027 * m68k.h: Document new formats `E', `G', `H' and new places `N',
1028 `n', `o'.
1029
1030 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
1031 and new places `m', `M', `h'.
1032
1033 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
1034
1035 * hppa.h (pa_opcodes): Add several processor specific system
1036 instructions.
1037
1038 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
1039
1040 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
1041 "addb", and "addib" to be used by the disassembler.
1042
1043 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1044
1045 * i386.h (ReverseModrm): Remove all occurences.
1046 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1047 movmskps, pextrw, pmovmskb, maskmovq.
1048 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1049 ignore the data size prefix.
1050
1051 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1052 Mostly stolen from Doug Ledford <dledford@redhat.com>
1053
1054 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1055
1056 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1057
1058 1999-04-14 Doug Evans <devans@casey.cygnus.com>
1059
1060 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1061 (CGEN_ATTR_TYPE): Update.
1062 (CGEN_ATTR_MASK): Number booleans starting at 0.
1063 (CGEN_ATTR_VALUE): Update.
1064 (CGEN_INSN_ATTR): Update.
1065
1066 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1067
1068 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1069 instructions.
1070
1071 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1072
1073 * hppa.h (bb, bvb): Tweak opcode/mask.
1074
1075
1076 1999-03-22 Doug Evans <devans@casey.cygnus.com>
1077
1078 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1079 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1080 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1081 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1082 Delete member max_insn_size.
1083 (enum cgen_cpu_open_arg): New enum.
1084 (cpu_open): Update prototype.
1085 (cpu_open_1): Declare.
1086 (cgen_set_cpu): Delete.
1087
1088 1999-03-11 Doug Evans <devans@casey.cygnus.com>
1089
1090 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1091 (CGEN_OPERAND_NIL): New macro.
1092 (CGEN_OPERAND): New member `type'.
1093 (@arch@_cgen_operand_table): Delete decl.
1094 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1095 (CGEN_OPERAND_TABLE): New struct.
1096 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1097 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1098 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1099 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1100 {get,set}_{int,vma}_operand.
1101 (@arch@_cgen_cpu_open): New arg `isa'.
1102 (cgen_set_cpu): Ditto.
1103
1104 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1105
1106 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1107
1108 1999-02-25 Doug Evans <devans@casey.cygnus.com>
1109
1110 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1111 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1112 enum cgen_hw_type.
1113 (CGEN_HW_TABLE): New struct.
1114 (hw_table): Delete declaration.
1115 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1116 to table entry to enum.
1117 (CGEN_OPINST): Ditto.
1118 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1119
1120 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1121
1122 * alpha.h (AXP_OPCODE_EV6): New.
1123 (AXP_OPCODE_NOPAL): Include it.
1124
1125 1999-02-09 Doug Evans <devans@casey.cygnus.com>
1126
1127 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1128 All uses updated. New members int_insn_p, max_insn_size,
1129 parse_operand,insert_operand,extract_operand,print_operand,
1130 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1131 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1132 extract_handlers,print_handlers.
1133 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1134 (CGEN_ATTR_BOOL_OFFSET): New macro.
1135 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1136 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1137 (cgen_opcode_handler): Renamed from cgen_base.
1138 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1139 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1140 all uses updated.
1141 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1142 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1143 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1144 (CGEN_OPCODE,CGEN_IBASE): New types.
1145 (CGEN_INSN): Rewrite.
1146 (CGEN_{ASM,DIS}_HASH*): Delete.
1147 (init_opcode_table,init_ibld_table): Declare.
1148 (CGEN_INSN_ATTR): New type.
1149
1150 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
1151
1152 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1153 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1154 Change *Suf definitions to include x and d suffixes.
1155 (movsx): Use w_Suf and b_Suf.
1156 (movzx): Likewise.
1157 (movs): Use bwld_Suf.
1158 (fld): Change ordering. Use sld_FP.
1159 (fild): Add Intel Syntax equivalent of fildq.
1160 (fst): Use sld_FP.
1161 (fist): Use sld_FP.
1162 (fstp): Use sld_FP. Add x_FP version.
1163 (fistp): LLongMem version for Intel Syntax.
1164 (fcom, fcomp): Use sld_FP.
1165 (fadd, fiadd, fsub): Use sld_FP.
1166 (fsubr): Use sld_FP.
1167 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1168
1169 1999-01-27 Doug Evans <devans@casey.cygnus.com>
1170
1171 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1172 CGEN_MODE_UINT.
1173
1174 1999-01-16 Jeffrey A Law (law@cygnus.com)
1175
1176 * hppa.h (bv): Fix mask.
1177
1178 1999-01-05 Doug Evans <devans@casey.cygnus.com>
1179
1180 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1181 (CGEN_ATTR): Use it.
1182 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1183 (CGEN_ATTR_TABLE): New member dfault.
1184
1185 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1186
1187 * mips.h (MIPS16_INSN_BRANCH): New.
1188
1189 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1190
1191 The following is part of a change made by Edith Epstein
1192 <eepstein@sophia.cygnus.com> as part of a project to merge in
1193 changes by HP; HP did not create ChangeLog entries.
1194
1195 * hppa.h (completer_chars): list of chars to not put a space
1196 after.
1197
1198 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1199
1200 * i386.h (i386_optab): Permit w suffix on processor control and
1201 status word instructions.
1202
1203 1998-11-30 Doug Evans <devans@casey.cygnus.com>
1204
1205 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1206 (struct cgen_keyword_entry): Ditto.
1207 (struct cgen_operand): Ditto.
1208 (CGEN_IFLD): New typedef, with associated access macros.
1209 (CGEN_IFMT): New typedef, with associated access macros.
1210 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1211 (CGEN_IVALUE): New typedef.
1212 (struct cgen_insn): Delete const on syntax,attrs members.
1213 `format' now points to format data. Type of `value' is now
1214 CGEN_IVALUE.
1215 (struct cgen_opcode_table): New member ifld_table.
1216
1217 1998-11-18 Doug Evans <devans@casey.cygnus.com>
1218
1219 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1220 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1221 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1222 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1223 (cgen_opcode_table): Update type of dis_hash fn.
1224 (extract_operand): Update type of `insn_value' arg.
1225
1226 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1227
1228 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1229
1230 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1231
1232 * mips.h (INSN_MULT): Added.
1233
1234 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1235
1236 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1237
1238 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1239
1240 * cgen.h (CGEN_INSN_INT): New typedef.
1241 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1242 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1243 (CGEN_INSN_BYTES_PTR): New typedef.
1244 (CGEN_EXTRACT_INFO): New typedef.
1245 (cgen_insert_fn,cgen_extract_fn): Update.
1246 (cgen_opcode_table): New member `insn_endian'.
1247 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1248 (insert_operand,extract_operand): Update.
1249 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1250
1251 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1252
1253 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1254 (struct CGEN_HW_ENTRY): New member `attrs'.
1255 (CGEN_HW_ATTR): New macro.
1256 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1257 (CGEN_INSN_INVALID_P): New macro.
1258
1259 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1260
1261 * hppa.h: Add "fid".
1262
1263 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1264
1265 From Robert Andrew Dale <rob@nb.net>
1266 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1267 (AMD_3DNOW_OPCODE): Define.
1268
1269 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1270
1271 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1272
1273 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1274
1275 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1276
1277 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1278
1279 Move all global state data into opcode table struct, and treat
1280 opcode table as something that is "opened/closed".
1281 * cgen.h (CGEN_OPCODE_DESC): New type.
1282 (all fns): New first arg of opcode table descriptor.
1283 (cgen_set_parse_operand_fn): Add prototype.
1284 (cgen_current_machine,cgen_current_endian): Delete.
1285 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1286 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1287 dis_hash_table,dis_hash_table_entries.
1288 (opcode_open,opcode_close): Add prototypes.
1289
1290 * cgen.h (cgen_insn): New element `cdx'.
1291
1292 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1293
1294 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1295
1296 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1297
1298 * mn10300.h: Add "no_match_operands" field for instructions.
1299 (MN10300_MAX_OPERANDS): Define.
1300
1301 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1302
1303 * cgen.h (cgen_macro_insn_count): Declare.
1304
1305 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1306
1307 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1308 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1309 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1310 set_{int,vma}_operand.
1311
1312 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1313
1314 * mn10300.h: Add "machine" field for instructions.
1315 (MN103, AM30): Define machine types.
1316
1317 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1318
1319 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1320
1321 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1322
1323 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1324
1325 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1326
1327 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1328 and ud2b.
1329 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1330 those that happen to be implemented on pentiums.
1331
1332 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1333
1334 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1335 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1336 with Size16|IgnoreSize or Size32|IgnoreSize.
1337
1338 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1339
1340 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1341 (REPE): Rename to REPE_PREFIX_OPCODE.
1342 (i386_regtab_end): Remove.
1343 (i386_prefixtab, i386_prefixtab_end): Remove.
1344 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1345 of md_begin.
1346 (MAX_OPCODE_SIZE): Define.
1347 (i386_optab_end): Remove.
1348 (sl_Suf): Define.
1349 (sl_FP): Use sl_Suf.
1350
1351 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1352 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1353 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1354 data32, dword, and adword prefixes.
1355 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1356 regs.
1357
1358 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1359
1360 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1361
1362 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1363 register operands, because this is a common idiom. Flag them with
1364 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1365 fdivrp because gcc erroneously generates them. Also flag with a
1366 warning.
1367
1368 * i386.h: Add suffix modifiers to most insns, and tighter operand
1369 checks in some cases. Fix a number of UnixWare compatibility
1370 issues with float insns. Merge some floating point opcodes, using
1371 new FloatMF modifier.
1372 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1373 consistency.
1374
1375 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1376 IgnoreDataSize where appropriate.
1377
1378 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1379
1380 * i386.h: (one_byte_segment_defaults): Remove.
1381 (two_byte_segment_defaults): Remove.
1382 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1383
1384 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1385
1386 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1387 (cgen_hw_lookup_by_num): Declare.
1388
1389 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1390
1391 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1392 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1393
1394 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1395
1396 * cgen.h (cgen_asm_init_parse): Delete.
1397 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1398 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1399
1400 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1401
1402 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1403 (cgen_asm_finish_insn): Update prototype.
1404 (cgen_insn): New members num, data.
1405 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1406 dis_hash, dis_hash_table_size moved to ...
1407 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1408 All uses updated. New members asm_hash_p, dis_hash_p.
1409 (CGEN_MINSN_EXPANSION): New struct.
1410 (cgen_expand_macro_insn): Declare.
1411 (cgen_macro_insn_count): Declare.
1412 (get_insn_operands): Update prototype.
1413 (lookup_get_insn_operands): Declare.
1414
1415 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1416
1417 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1418 regKludge. Add operands types for string instructions.
1419
1420 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1421
1422 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1423 table.
1424
1425 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1426
1427 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1428 for `gettext'.
1429
1430 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1431
1432 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1433 Add IsString flag to string instructions.
1434 (IS_STRING): Don't define.
1435 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1436 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1437 (SS_PREFIX_OPCODE): Define.
1438
1439 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1440
1441 * i386.h: Revert March 24 patch; no more LinearAddress.
1442
1443 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1444
1445 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1446 instructions, and instead add FWait opcode modifier. Add short
1447 form of fldenv and fstenv.
1448 (FWAIT_OPCODE): Define.
1449
1450 * i386.h (i386_optab): Change second operand constraint of `mov
1451 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1452 allow legal instructions such as `movl %gs,%esi'
1453
1454 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1455
1456 * h8300.h: Various changes to fully bracket initializers.
1457
1458 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1459
1460 * i386.h: Set LinearAddress for lidt and lgdt.
1461
1462 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1463
1464 * cgen.h (CGEN_BOOL_ATTR): New macro.
1465
1466 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1467
1468 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1469
1470 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1471
1472 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1473 (cgen_insn): Record syntax and format entries here, rather than
1474 separately.
1475
1476 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1477
1478 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1479
1480 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1481
1482 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1483 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1484 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1485
1486 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1487
1488 * cgen.h (lookup_insn): New argument alias_p.
1489
1490 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1491
1492 Fix rac to accept only a0:
1493 * d10v.h (OPERAND_ACC): Split into:
1494 (OPERAND_ACC0, OPERAND_ACC1) .
1495 (OPERAND_GPR): Define.
1496
1497 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1498
1499 * cgen.h (CGEN_FIELDS): Define here.
1500 (CGEN_HW_ENTRY): New member `type'.
1501 (hw_list): Delete decl.
1502 (enum cgen_mode): Declare.
1503 (CGEN_OPERAND): New member `hw'.
1504 (enum cgen_operand_instance_type): Declare.
1505 (CGEN_OPERAND_INSTANCE): New type.
1506 (CGEN_INSN): New member `operands'.
1507 (CGEN_OPCODE_DATA): Make hw_list const.
1508 (get_insn_operands,lookup_insn): Add prototypes for.
1509
1510 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1511
1512 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1513 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1514 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1515 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1516
1517 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1518
1519 * cgen.h: Correct typo in comment end marker.
1520
1521 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1522
1523 * tic30.h: New file.
1524
1525 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1526
1527 * cgen.h: Add prototypes for cgen_save_fixups(),
1528 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1529 of cgen_asm_finish_insn() to return a char *.
1530
1531 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1532
1533 * cgen.h: Formatting changes to improve readability.
1534
1535 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1536
1537 * cgen.h (*): Clean up pass over `struct foo' usage.
1538 (CGEN_ATTR): Make unsigned char.
1539 (CGEN_ATTR_TYPE): Update.
1540 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1541 (cgen_base): Move member `attrs' to cgen_insn.
1542 (CGEN_KEYWORD): New member `null_entry'.
1543 (CGEN_{SYNTAX,FORMAT}): New types.
1544 (cgen_insn): Format and syntax separated from each other.
1545
1546 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1547
1548 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1549 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1550 flags_{used,set} long.
1551 (d30v_operand): Make flags field long.
1552
1553 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1554
1555 * m68k.h: Fix comment describing operand types.
1556
1557 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1558
1559 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1560 everything else after down.
1561
1562 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1563
1564 * d10v.h (OPERAND_FLAG): Split into:
1565 (OPERAND_FFLAG, OPERAND_CFLAG) .
1566
1567 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1568
1569 * mips.h (struct mips_opcode): Changed comments to reflect new
1570 field usage.
1571
1572 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1573
1574 * mips.h: Added to comments a quick-ref list of all assigned
1575 operand type characters.
1576 (OP_{MASK,SH}_PERFREG): New macros.
1577
1578 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1579
1580 * sparc.h: Add '_' and '/' for v9a asr's.
1581 Patch from David Miller <davem@vger.rutgers.edu>
1582
1583 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1584
1585 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1586 area are not available in the base model (H8/300).
1587
1588 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1589
1590 * m68k.h: Remove documentation of ` operand specifier.
1591
1592 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1593
1594 * m68k.h: Document q and v operand specifiers.
1595
1596 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1597
1598 * v850.h (struct v850_opcode): Add processors field.
1599 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1600 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1601 (PROCESSOR_V850EA): New bit constants.
1602
1603 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1604
1605 Merge changes from Martin Hunt:
1606
1607 * d30v.h: Allow up to 64 control registers. Add
1608 SHORT_A5S format.
1609
1610 * d30v.h (LONG_Db): New form for delayed branches.
1611
1612 * d30v.h: (LONG_Db): New form for repeati.
1613
1614 * d30v.h (SHORT_D2B): New form.
1615
1616 * d30v.h (SHORT_A2): New form.
1617
1618 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1619 registers are used. Needed for VLIW optimization.
1620
1621 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1622
1623 * cgen.h: Move assembler interface section
1624 up so cgen_parse_operand_result is defined for cgen_parse_address.
1625 (cgen_parse_address): Update prototype.
1626
1627 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1628
1629 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1630
1631 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1632
1633 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1634 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1635 <paubert@iram.es>.
1636
1637 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1638 <paubert@iram.es>.
1639
1640 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1641 <paubert@iram.es>.
1642
1643 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1644 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1645
1646 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1647
1648 * v850.h (V850_NOT_R0): New flag.
1649
1650 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1651
1652 * v850.h (struct v850_opcode): Remove flags field.
1653
1654 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1655
1656 * v850.h (struct v850_opcode): Add flags field.
1657 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1658 fields.
1659 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1660 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1661
1662 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1663
1664 * arc.h: New file.
1665
1666 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1667
1668 * sparc.h (sparc_opcodes): Declare as const.
1669
1670 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1671
1672 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1673 uses single or double precision floating point resources.
1674 (INSN_NO_ISA, INSN_ISA1): Define.
1675 (cpu specific INSN macros): Tweak into bitmasks outside the range
1676 of INSN_ISA field.
1677
1678 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1679
1680 * i386.h: Fix pand opcode.
1681
1682 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1683
1684 * mips.h: Widen INSN_ISA and move it to a more convenient
1685 bit position. Add INSN_3900.
1686
1687 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1688
1689 * mips.h (struct mips_opcode): added new field membership.
1690
1691 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1692
1693 * i386.h (movd): only Reg32 is allowed.
1694
1695 * i386.h: add fcomp and ud2. From Wayne Scott
1696 <wscott@ichips.intel.com>.
1697
1698 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1699
1700 * i386.h: Add MMX instructions.
1701
1702 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1703
1704 * i386.h: Remove W modifier from conditional move instructions.
1705
1706 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1707
1708 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1709 with no arguments to match that generated by the UnixWare
1710 assembler.
1711
1712 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1713
1714 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1715 (cgen_parse_operand_fn): Declare.
1716 (cgen_init_parse_operand): Declare.
1717 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1718 new argument `want'.
1719 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1720 (enum cgen_parse_operand_type): New enum.
1721
1722 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1723
1724 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1725
1726 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1727
1728 * cgen.h: New file.
1729
1730 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1731
1732 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1733 fdivrp.
1734
1735 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1736
1737 * v850.h (extract): Make unsigned.
1738
1739 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1740
1741 * i386.h: Add iclr.
1742
1743 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1744
1745 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1746 take a direction bit.
1747
1748 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1749
1750 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1751
1752 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1753
1754 * sparc.h: Include <ansidecl.h>. Update function declarations to
1755 use prototypes, and to use const when appropriate.
1756
1757 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1758
1759 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1760
1761 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1762
1763 * d10v.h: Change pre_defined_registers to
1764 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1765
1766 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1767
1768 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1769 Change mips_opcodes from const array to a pointer,
1770 and change bfd_mips_num_opcodes from const int to int,
1771 so that we can increase the size of the mips opcodes table
1772 dynamically.
1773
1774 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1775
1776 * d30v.h (FLAG_X): Remove unused flag.
1777
1778 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1779
1780 * d30v.h: New file.
1781
1782 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1783
1784 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1785 (PDS_VALUE): Macro to access value field of predefined symbols.
1786 (tic80_next_predefined_symbol): Add prototype.
1787
1788 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1789
1790 * tic80.h (tic80_symbol_to_value): Change prototype to match
1791 change in function, added class parameter.
1792
1793 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1794
1795 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1796 endmask fields, which are somewhat weird in that 0 and 32 are
1797 treated exactly the same.
1798
1799 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1800
1801 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1802 rather than a constant that is 2**X. Reorder them to put bits for
1803 operands that have symbolic names in the upper bits, so they can
1804 be packed into an int where the lower bits contain the value that
1805 corresponds to that symbolic name.
1806 (predefined_symbo): Add struct.
1807 (tic80_predefined_symbols): Declare array of translations.
1808 (tic80_num_predefined_symbols): Declare size of that array.
1809 (tic80_value_to_symbol): Declare function.
1810 (tic80_symbol_to_value): Declare function.
1811
1812 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1813
1814 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1815
1816 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1817
1818 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1819 be the destination register.
1820
1821 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1822
1823 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1824 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1825 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1826 that the opcode can have two vector instructions in a single
1827 32 bit word and we have to encode/decode both.
1828
1829 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1830
1831 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1832 TIC80_OPERAND_RELATIVE for PC relative.
1833 (TIC80_OPERAND_BASEREL): New flag bit for register
1834 base relative.
1835
1836 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1837
1838 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1839
1840 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1841
1842 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1843 ":s" modifier for scaling.
1844
1845 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1846
1847 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1848 (TIC80_OPERAND_M_LI): Ditto
1849
1850 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1851
1852 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1853 (TIC80_OPERAND_CC): New define for condition code operand.
1854 (TIC80_OPERAND_CR): New define for control register operand.
1855
1856 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1857
1858 * tic80.h (struct tic80_opcode): Name changed.
1859 (struct tic80_opcode): Remove format field.
1860 (struct tic80_operand): Add insertion and extraction functions.
1861 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1862 correct ones.
1863 (FMT_*): Ditto.
1864
1865 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1866
1867 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1868 type IV instruction offsets.
1869
1870 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1871
1872 * tic80.h: New file.
1873
1874 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1875
1876 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1877
1878 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1879
1880 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1881 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1882 * v850.h: Fix comment, v850_operand not powerpc_operand.
1883
1884 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1885
1886 * mn10200.h: Flesh out structures and definitions needed by
1887 the mn10200 assembler & disassembler.
1888
1889 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1890
1891 * mips.h: Add mips16 definitions.
1892
1893 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1894
1895 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1896
1897 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1898
1899 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1900 (MN10300_OPERAND_MEMADDR): Define.
1901
1902 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1903
1904 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1905
1906 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1907
1908 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1909
1910 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1911
1912 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1913
1914 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1915
1916 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1917
1918 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1919
1920 * alpha.h: Don't include "bfd.h"; private relocation types are now
1921 negative to minimize problems with shared libraries. Organize
1922 instruction subsets by AMASK extensions and PALcode
1923 implementation.
1924 (struct alpha_operand): Move flags slot for better packing.
1925
1926 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1927
1928 * v850.h (V850_OPERAND_RELAX): New operand flag.
1929
1930 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1931
1932 * mn10300.h (FMT_*): Move operand format definitions
1933 here.
1934
1935 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1936
1937 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1938
1939 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1940
1941 * mn10300.h (mn10300_opcode): Add "format" field.
1942 (MN10300_OPERAND_*): Define.
1943
1944 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1945
1946 * mn10x00.h: Delete.
1947 * mn10200.h, mn10300.h: New files.
1948
1949 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1950
1951 * mn10x00.h: New file.
1952
1953 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1954
1955 * v850.h: Add new flag to indicate this instruction uses a PC
1956 displacement.
1957
1958 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1959
1960 * h8300.h (stmac): Add missing instruction.
1961
1962 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1963
1964 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1965 field.
1966
1967 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1968
1969 * v850.h (V850_OPERAND_EP): Define.
1970
1971 * v850.h (v850_opcode): Add size field.
1972
1973 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1974
1975 * v850.h (v850_operands): Add insert and extract fields, pointers
1976 to functions used to handle unusual operand encoding.
1977 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1978 V850_OPERAND_SIGNED): Defined.
1979
1980 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1981
1982 * v850.h (v850_operands): Add flags field.
1983 (OPERAND_REG, OPERAND_NUM): Defined.
1984
1985 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1986
1987 * v850.h: New file.
1988
1989 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1990
1991 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1992 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1993 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1994 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1995 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1996 Defined.
1997
1998 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1999
2000 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
2001 a 3 bit space id instead of a 2 bit space id.
2002
2003 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2004
2005 * d10v.h: Add some additional defines to support the
2006 assembler in determining which operations can be done in parallel.
2007
2008 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
2009
2010 * h8300.h (SN): Define.
2011 (eepmov.b): Renamed from "eepmov"
2012 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
2013 with them.
2014
2015 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2016
2017 * d10v.h (OPERAND_SHIFT): New operand flag.
2018
2019 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2020
2021 * d10v.h: Changes for divs, parallel-only instructions, and
2022 signed numbers.
2023
2024 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2025
2026 * d10v.h (pd_reg): Define. Putting the definition here allows
2027 the assembler and disassembler to share the same struct.
2028
2029 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
2030
2031 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
2032 Williams <steve@icarus.com>.
2033
2034 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2035
2036 * d10v.h: New file.
2037
2038 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
2039
2040 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2041
2042 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2043
2044 * m68k.h (mcf5200): New macro.
2045 Document names of coldfire control registers.
2046
2047 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2048
2049 * h8300.h (SRC_IN_DST): Define.
2050
2051 * h8300.h (UNOP3): Mark the register operand in this insn
2052 as a source operand, not a destination operand.
2053 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2054 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2055 register operand with SRC_IN_DST.
2056
2057 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2058
2059 * alpha.h: New file.
2060
2061 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2062
2063 * rs6k.h: Remove obsolete file.
2064
2065 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2066
2067 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2068 fdivp, and fdivrp. Add ffreep.
2069
2070 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2071
2072 * h8300.h: Reorder various #defines for readability.
2073 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2074 (BITOP): Accept additional (unused) argument. All callers changed.
2075 (EBITOP): Likewise.
2076 (O_LAST): Bump.
2077 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2078
2079 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2080 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2081 (BITOP, EBITOP): Handle new H8/S addressing modes for
2082 bit insns.
2083 (UNOP3): Handle new shift/rotate insns on the H8/S.
2084 (insns using exr): New instructions.
2085 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2086
2087 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2088
2089 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2090 was incorrect.
2091
2092 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2093
2094 * h8300.h (START): Remove.
2095 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2096 and mov.l insns that can be relaxed.
2097
2098 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2099
2100 * i386.h: Remove Abs32 from lcall.
2101
2102 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2103
2104 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2105 (SLCPOP): New macro.
2106 Mark X,Y opcode letters as in use.
2107
2108 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2109
2110 * sparc.h (F_FLOAT, F_FBR): Define.
2111
2112 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2113
2114 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2115 from all insns.
2116 (ABS8SRC,ABS8DST): Add ABS8MEM.
2117 (add.l): Fix reg+reg variant.
2118 (eepmov.w): Renamed from eepmovw.
2119 (ldc,stc): Fix many cases.
2120
2121 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2122
2123 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2124
2125 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2126
2127 * sparc.h (O): Mark operand letter as in use.
2128
2129 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2130
2131 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2132 Mark operand letters uU as in use.
2133
2134 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2135
2136 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2137 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2138 (SPARC_OPCODE_SUPPORTED): New macro.
2139 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2140 (F_NOTV9): Delete.
2141
2142 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2143
2144 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2145 declaration consistent with return type in definition.
2146
2147 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2148
2149 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2150
2151 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2152
2153 * i386.h (i386_regtab): Add 80486 test registers.
2154
2155 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2156
2157 * i960.h (I_HX): Define.
2158 (i960_opcodes): Add HX instruction.
2159
2160 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2161
2162 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2163 and fclex.
2164
2165 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2166
2167 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2168 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2169 (bfd_* defines): Delete.
2170 (sparc_opcode_archs): Replaces architecture_pname.
2171 (sparc_opcode_lookup_arch): Declare.
2172 (NUMOPCODES): Delete.
2173
2174 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2175
2176 * sparc.h (enum sparc_architecture): Add v9a.
2177 (ARCHITECTURES_CONFLICT_P): Update.
2178
2179 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2180
2181 * i386.h: Added Pentium Pro instructions.
2182
2183 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2184
2185 * m68k.h: Document new 'W' operand place.
2186
2187 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2188
2189 * hppa.h: Add lci and syncdma instructions.
2190
2191 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2192
2193 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
2194 instructions.
2195
2196 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2197
2198 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2199 assembler's -mcom and -many switches.
2200
2201 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2202
2203 * i386.h: Fix cmpxchg8b extension opcode description.
2204
2205 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2206
2207 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2208 and register cr4.
2209
2210 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2211
2212 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2213
2214 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2215
2216 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2217
2218 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2219
2220 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2221
2222 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2223
2224 * m68kmri.h: Remove.
2225
2226 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2227 declarations. Remove F_ALIAS and flag field of struct
2228 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2229 int. Make name and args fields of struct m68k_opcode const.
2230
2231 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2232
2233 * sparc.h (F_NOTV9): Define.
2234
2235 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2236
2237 * mips.h (INSN_4010): Define.
2238
2239 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2240
2241 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2242
2243 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2244 * m68k.h: Fix argument descriptions of coprocessor
2245 instructions to allow only alterable operands where appropriate.
2246 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2247 (m68k_opcode_aliases): Add more aliases.
2248
2249 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2250
2251 * m68k.h: Added explcitly short-sized conditional branches, and a
2252 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2253 svr4-based configurations.
2254
2255 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2256
2257 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2258 * i386.h: added missing Data16/Data32 flags to a few instructions.
2259
2260 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2261
2262 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2263 (OP_MASK_BCC, OP_SH_BCC): Define.
2264 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2265 (OP_MASK_CCC, OP_SH_CCC): Define.
2266 (INSN_READ_FPR_R): Define.
2267 (INSN_RFE): Delete.
2268
2269 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2270
2271 * m68k.h (enum m68k_architecture): Deleted.
2272 (struct m68k_opcode_alias): New type.
2273 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2274 matching constraints, values and flags. As a side effect of this,
2275 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2276 as I know were never used, now may need re-examining.
2277 (numopcodes): Now const.
2278 (m68k_opcode_aliases, numaliases): New variables.
2279 (endop): Deleted.
2280 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2281 m68k_opcode_aliases; update declaration of m68k_opcodes.
2282
2283 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2284
2285 * hppa.h (delay_type): Delete unused enumeration.
2286 (pa_opcode): Replace unused delayed field with an architecture
2287 field.
2288 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2289
2290 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2291
2292 * mips.h (INSN_ISA4): Define.
2293
2294 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2295
2296 * mips.h (M_DLA_AB, M_DLI): Define.
2297
2298 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2299
2300 * hppa.h (fstwx): Fix single-bit error.
2301
2302 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2303
2304 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2305
2306 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2307
2308 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2309 debug registers. From Charles Hannum (mycroft@netbsd.org).
2310
2311 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2312
2313 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2314 i386 support:
2315 * i386.h (MOV_AX_DISP32): New macro.
2316 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2317 of several call/return instructions.
2318 (ADDR_PREFIX_OPCODE): New macro.
2319
2320 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2321
2322 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2323
2324 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2325 char.
2326 (struct vot, field `name'): ditto.
2327
2328 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2329
2330 * vax.h: Supply and properly group all values in end sentinel.
2331
2332 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2333
2334 * mips.h (INSN_ISA, INSN_4650): Define.
2335
2336 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2337
2338 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2339 systems with a separate instruction and data cache, such as the
2340 29040, these instructions take an optional argument.
2341
2342 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2343
2344 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2345 INSN_TRAP.
2346
2347 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2348
2349 * mips.h (INSN_STORE_MEMORY): Define.
2350
2351 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2352
2353 * sparc.h: Document new operand type 'x'.
2354
2355 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2356
2357 * i960.h (I_CX2): New instruction category. It includes
2358 instructions available on Cx and Jx processors.
2359 (I_JX): New instruction category, for JX-only instructions.
2360 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2361 Jx-only instructions, in I_JX category.
2362
2363 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2364
2365 * ns32k.h (endop): Made pointer const too.
2366
2367 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2368
2369 * ns32k.h: Drop Q operand type as there is no correct use
2370 for it. Add I and Z operand types which allow better checking.
2371
2372 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2373
2374 * h8300.h (xor.l) :fix bit pattern.
2375 (L_2): New size of operand.
2376 (trapa): Use it.
2377
2378 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2379
2380 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2381
2382 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2383
2384 * sparc.h: Include v9 definitions.
2385
2386 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2387
2388 * m68k.h (m68060): Defined.
2389 (m68040up, mfloat, mmmu): Include it.
2390 (struct m68k_opcode): Widen `arch' field.
2391 (m68k_opcodes): Updated for M68060. Removed comments that were
2392 instructions commented out by "JF" years ago.
2393
2394 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2395
2396 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2397 add a one-bit `flags' field.
2398 (F_ALIAS): New macro.
2399
2400 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2401
2402 * h8300.h (dec, inc): Get encoding right.
2403
2404 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2405
2406 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2407 a flag instead.
2408 (PPC_OPERAND_SIGNED): Define.
2409 (PPC_OPERAND_SIGNOPT): Define.
2410
2411 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2412
2413 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2414 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2415
2416 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2417
2418 * i386.h: Reverse last change. It'll be handled in gas instead.
2419
2420 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2421
2422 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2423 slower on the 486 and used the implicit shift count despite the
2424 explicit operand. The one-operand form is still available to get
2425 the shorter form with the implicit shift count.
2426
2427 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2428
2429 * hppa.h: Fix typo in fstws arg string.
2430
2431 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2432
2433 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2434
2435 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2436
2437 * ppc.h (PPC_OPCODE_601): Define.
2438
2439 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2440
2441 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2442 (so we can determine valid completers for both addb and addb[tf].)
2443
2444 * hppa.h (xmpyu): No floating point format specifier for the
2445 xmpyu instruction.
2446
2447 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2448
2449 * ppc.h (PPC_OPERAND_NEXT): Define.
2450 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2451 (struct powerpc_macro): Define.
2452 (powerpc_macros, powerpc_num_macros): Declare.
2453
2454 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2455
2456 * ppc.h: New file. Header file for PowerPC opcode table.
2457
2458 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2459
2460 * hppa.h: More minor template fixes for sfu and copr (to allow
2461 for easier disassembly).
2462
2463 * hppa.h: Fix templates for all the sfu and copr instructions.
2464
2465 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2466
2467 * i386.h (push): Permit Imm16 operand too.
2468
2469 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2470
2471 * h8300.h (andc): Exists in base arch.
2472
2473 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2474
2475 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2476 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2477
2478 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2479
2480 * hppa.h: Add FP quadword store instructions.
2481
2482 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2483
2484 * mips.h: (M_J_A): Added.
2485 (M_LA): Removed.
2486
2487 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2488
2489 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2490 <mellon@pepper.ncd.com>.
2491
2492 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2493
2494 * hppa.h: Immediate field in probei instructions is unsigned,
2495 not low-sign extended.
2496
2497 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2498
2499 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2500
2501 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2502
2503 * i386.h: Add "fxch" without operand.
2504
2505 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2506
2507 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2508
2509 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2510
2511 * hppa.h: Add gfw and gfr to the opcode table.
2512
2513 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2514
2515 * m88k.h: extended to handle m88110.
2516
2517 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2518
2519 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2520 addresses.
2521
2522 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2523
2524 * i960.h (i960_opcodes): Properly bracket initializers.
2525
2526 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2527
2528 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2529
2530 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2531
2532 * m68k.h (two): Protect second argument with parentheses.
2533
2534 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2535
2536 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2537 Deleted old in/out instructions in "#if 0" section.
2538
2539 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2540
2541 * i386.h (i386_optab): Properly bracket initializers.
2542
2543 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2544
2545 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2546 Jeff Law, law@cs.utah.edu).
2547
2548 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2549
2550 * i386.h (lcall): Accept Imm32 operand also.
2551
2552 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2553
2554 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2555 (M_DABS): Added.
2556
2557 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2558
2559 * mips.h (INSN_*): Changed values. Removed unused definitions.
2560 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2561 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2562 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2563 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2564 (M_*): Added new values for r6000 and r4000 macros.
2565 (ANY_DELAY): Removed.
2566
2567 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2568
2569 * mips.h: Added M_LI_S and M_LI_SS.
2570
2571 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2572
2573 * h8300.h: Get some rare mov.bs correct.
2574
2575 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2576
2577 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2578 been included.
2579
2580 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2581
2582 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2583 jump instructions, for use in disassemblers.
2584
2585 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2586
2587 * m88k.h: Make bitfields just unsigned, not unsigned long or
2588 unsigned short.
2589
2590 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2591
2592 * hppa.h: New argument type 'y'. Use in various float instructions.
2593
2594 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2595
2596 * hppa.h (break): First immediate field is unsigned.
2597
2598 * hppa.h: Add rfir instruction.
2599
2600 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2601
2602 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2603
2604 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2605
2606 * mips.h: Reworked the hazard information somewhat, and fixed some
2607 bugs in the instruction hazard descriptions.
2608
2609 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2610
2611 * m88k.h: Corrected a couple of opcodes.
2612
2613 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2614
2615 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2616 new version includes instruction hazard information, but is
2617 otherwise reasonably similar.
2618
2619 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2620
2621 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2622
2623 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2624
2625 Patches from Jeff Law, law@cs.utah.edu:
2626 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2627 Make the tables be the same for the following instructions:
2628 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2629 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2630 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2631 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2632 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2633 "fcmp", and "ftest".
2634
2635 * hppa.h: Make new and old tables the same for "break", "mtctl",
2636 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2637 Fix typo in last patch. Collapse several #ifdefs into a
2638 single #ifdef.
2639
2640 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2641 of the comments up-to-date.
2642
2643 * hppa.h: Update "free list" of letters and update
2644 comments describing each letter's function.
2645
2646 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2647
2648 * h8300.h: Lots of little fixes for the h8/300h.
2649
2650 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2651
2652 Support for H8/300-H
2653 * h8300.h: Lots of new opcodes.
2654
2655 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2656
2657 * h8300.h: checkpoint, includes H8/300-H opcodes.
2658
2659 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2660
2661 * Patches from Jeffrey Law <law@cs.utah.edu>.
2662 * hppa.h: Rework single precision FP
2663 instructions so that they correctly disassemble code
2664 PA1.1 code.
2665
2666 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2667
2668 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2669 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2670
2671 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2672
2673 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2674 gdb will define it for now.
2675
2676 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2677
2678 * sparc.h: Don't end enumerator list with comma.
2679
2680 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2681
2682 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2683 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2684 ("bc2t"): Correct typo.
2685 ("[ls]wc[023]"): Use T rather than t.
2686 ("c[0123]"): Define general coprocessor instructions.
2687
2688 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2689
2690 * m68k.h: Move split point for gcc compilation more towards
2691 middle.
2692
2693 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2694
2695 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2696 simply wrong, ics, rfi, & rfsvc were missing).
2697 Add "a" to opr_ext for "bb". Doc fix.
2698
2699 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2700
2701 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2702 * mips.h: Add casts, to suppress warnings about shifting too much.
2703 * m68k.h: Document the placement code '9'.
2704
2705 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2706
2707 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2708 allows callers to break up the large initialized struct full of
2709 opcodes into two half-sized ones. This permits GCC to compile
2710 this module, since it takes exponential space for initializers.
2711 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2712
2713 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2714
2715 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2716 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2717 initialized structs in it.
2718
2719 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2720
2721 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2722 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2723 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2724
2725 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2726
2727 * mips.h: document "i" and "j" operands correctly.
2728
2729 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2730
2731 * mips.h: Removed endianness dependency.
2732
2733 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2734
2735 * h8300.h: include info on number of cycles per instruction.
2736
2737 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2738
2739 * hppa.h: Move handy aliases to the front. Fix masks for extract
2740 and deposit instructions.
2741
2742 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2743
2744 * i386.h: accept shld and shrd both with and without the shift
2745 count argument, which is always %cl.
2746
2747 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2748
2749 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2750 (one_byte_segment_defaults, two_byte_segment_defaults,
2751 i386_prefixtab_end): Ditto.
2752
2753 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2754
2755 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2756 for operand 2; from John Carr, jfc@dsg.dec.com.
2757
2758 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2759
2760 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2761 always use 16-bit offsets. Makes calculated-size jump tables
2762 feasible.
2763
2764 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2765
2766 * i386.h: Fix one-operand forms of in* and out* patterns.
2767
2768 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2769
2770 * m68k.h: Added CPU32 support.
2771
2772 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2773
2774 * mips.h (break): Disassemble the argument. Patch from
2775 jonathan@cs.stanford.edu (Jonathan Stone).
2776
2777 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2778
2779 * m68k.h: merged Motorola and MIT syntax.
2780
2781 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2782
2783 * m68k.h (pmove): make the tests less strict, the 68k book is
2784 wrong.
2785
2786 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2787
2788 * m68k.h (m68ec030): Defined as alias for 68030.
2789 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2790 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2791 them. Tightened description of "fmovex" to distinguish it from
2792 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2793 up descriptions that claimed versions were available for chips not
2794 supporting them. Added "pmovefd".
2795
2796 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2797
2798 * m68k.h: fix where the . goes in divull
2799
2800 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2801
2802 * m68k.h: the cas2 instruction is supposed to be written with
2803 indirection on the last two operands, which can be either data or
2804 address registers. Added a new operand type 'r' which accepts
2805 either register type. Added new cases for cas2l and cas2w which
2806 use them. Corrected masks for cas2 which failed to recognize use
2807 of address register.
2808
2809 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2810
2811 * m68k.h: Merged in patches (mostly m68040-specific) from
2812 Colin Smith <colin@wrs.com>.
2813
2814 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2815 base). Also cleaned up duplicates, re-ordered instructions for
2816 the sake of dis-assembling (so aliases come after standard names).
2817 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2818
2819 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2820
2821 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2822 all missing .s
2823
2824 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2825
2826 * sparc.h: Moved tables to BFD library.
2827
2828 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2829
2830 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2831
2832 * h8300.h: Finish filling in all the holes in the opcode table,
2833 so that the Lucid C compiler can digest this as well...
2834
2835 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2836
2837 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2838 Fix opcodes on various sizes of fild/fist instructions
2839 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2840 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2841
2842 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2843
2844 * h8300.h: Fill in all the holes in the opcode table so that the
2845 losing HPUX C compiler can digest this...
2846
2847 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2848
2849 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2850 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2851
2852 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2853
2854 * sparc.h: Add new architecture variant sparclite; add its scan
2855 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2856
2857 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2858
2859 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2860 fy@lucid.com).
2861
2862 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2863
2864 * rs6k.h: New version from IBM (Metin).
2865
2866 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2867
2868 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2869 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2870
2871 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2872
2873 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2874
2875 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2876
2877 * m68k.h (one, two): Cast macro args to unsigned to suppress
2878 complaints from compiler and lint about integer overflow during
2879 shift.
2880
2881 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2882
2883 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2884
2885 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2886
2887 * mips.h: Make bitfield layout depend on the HOST compiler,
2888 not on the TARGET system.
2889
2890 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2891
2892 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2893 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2894 <TRANLE@INTELLICORP.COM>.
2895
2896 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2897
2898 * h8300.h: turned op_type enum into #define list
2899
2900 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2901
2902 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2903 similar instructions -- they've been renamed to "fitoq", etc.
2904 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2905 number of arguments.
2906 * h8300.h: Remove extra ; which produces compiler warning.
2907
2908 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2909
2910 * sparc.h: fix opcode for tsubcctv.
2911
2912 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2913
2914 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2915
2916 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2917
2918 * sparc.h (nop): Made the 'lose' field be even tighter,
2919 so only a standard 'nop' is disassembled as a nop.
2920
2921 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2922
2923 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2924 disassembled as a nop.
2925
2926 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2927
2928 * m68k.h, sparc.h: ANSIfy enums.
2929
2930 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2931
2932 * sparc.h: fix a typo.
2933
2934 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2935
2936 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2937 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2938 vax.h: Renamed from ../<foo>-opcode.h.
2939
2940 \f
2941 Local Variables:
2942 version-control: never
2943 End:
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