* hppa.h (completer_chars): #if 0 out.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2002-12-16 Alan Modra <amodra@bigpond.net.au>
2
3 * hppa.h (completer_chars): #if 0 out.
4
5 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
6 "default_args".
7 (struct not_wot): Constify "args".
8 (struct not): Constify "name".
9 (numopcodes): Delete.
10 (endop): Delete.
11
12 2002-12-13 Alan Modra <amodra@bigpond.net.au>
13
14 * pj.h (pj_opc_info_t): Add union.
15
16 2002-12-04 David Mosberger <davidm@hpl.hp.com>
17
18 * ia64.h: Fix copyright message.
19 (IA64_OPND_AR_CSD): New operand kind.
20
21 2002-12-03 Richard Henderson <rth@redhat.com>
22
23 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
24
25 2002-12-03 Alan Modra <amodra@bigpond.net.au>
26
27 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
28 Constify "leaf" and "multi".
29
30 2002-11-19 Klee Dienes <kdienes@apple.com>
31
32 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
33 fields.
34 (h8_opcodes). Modify initializer and initializer macros to no
35 longer initialize the removed fields.
36
37 2002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
38
39 * tic4x.h (c4x_insts): Fixed LDHI constraint
40
41 2002-11-18 Klee Dienes <kdienes@apple.com>
42
43 * h8300.h (h8_opcode): Remove 'length' field.
44 (h8_opcodes): Mark as 'const' (both the declaration and
45 definition). Modify initializer and initializer macros to no
46 longer initialize the length field.
47
48 2002-11-18 Klee Dienes <kdienes@apple.com>
49
50 * arc.h (arc_ext_opcodes): Declare as extern.
51 (arc_ext_operands): Declare as extern.
52 * i860.h (i860_opcodes): Declare as const.
53
54 2002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
55
56 * tic4x.h: File reordering. Added enhanced opcodes.
57
58 2002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
59
60 * tic4x.h: Major rewrite of entire file. Define instruction
61 classes, and put each instruction into a class.
62
63 2002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
64
65 * tic4x.h: Added new opcodes and corrected some bugs. Add support
66 for new DSP types.
67
68 2002-10-14 Alan Modra <amodra@bigpond.net.au>
69
70 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
71
72 2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
73 Ken Raeburn <raeburn@cygnus.com>
74 Aldy Hernandez <aldyh@redhat.com>
75 Eric Christopher <echristo@redhat.com>
76 Richard Sandiford <rsandifo@redhat.com>
77
78 * mips.h: Update comment for new opcodes.
79 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
80 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
81 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
82 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
83 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
84 Don't match CPU_R4111 with INSN_4100.
85
86 2002-08-19 Elena Zannoni <ezannoni@redhat.com>
87
88 From matthew green <mrg@redhat.com>
89
90 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
91 instructions.
92 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
93 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
94 e500x2 Integer select, branch locking, performance monitor,
95 cache locking and machine check APUs, respectively.
96 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
97 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
98
99 2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
100
101 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
102 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
103 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
104 memory banks.
105 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
106
107 2002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
108
109 * mips.h (INSN_MIPS16): New define.
110
111 2002-07-08 Alan Modra <amodra@bigpond.net.au>
112
113 * i386.h: Remove IgnoreSize from movsx and movzx.
114
115 2002-06-08 Alan Modra <amodra@bigpond.net.au>
116
117 * a29k.h: Replace CONST with const.
118 (CONST): Don't define.
119 * convex.h: Replace CONST with const.
120 (CONST): Don't define.
121 * dlx.h: Replace CONST with const.
122 * or32.h (CONST): Don't define.
123
124 2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
125
126 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
127 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
128 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
129 (INSN_MDMX): New constants, for MDMX support.
130 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
131
132 2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
133
134 * dlx.h: New file.
135
136 2002-05-25 Alan Modra <amodra@bigpond.net.au>
137
138 * ia64.h: Use #include "" instead of <> for local header files.
139 * sparc.h: Likewise.
140
141 2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
142
143 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
144
145 2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
146
147 * h8300.h: Corrected defs of all control regs
148 and eepmov instr.
149
150 2002-04-11 Alan Modra <amodra@bigpond.net.au>
151
152 * i386.h: Add intel mode cmpsd and movsd.
153 Put them before SSE2 insns, so that rep prefix works.
154
155 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
156
157 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
158 instructions.
159 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
160 may be passed along with the ISA bitmask.
161
162 2002-03-05 Paul Koning <pkoning@equallogic.com>
163
164 * pdp11.h: Add format codes for float instruction formats.
165
166 2002-02-25 Alan Modra <amodra@bigpond.net.au>
167
168 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
169
170 Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
171
172 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
173
174 Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
175
176 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
177 (xchg): Fix.
178 (in, out): Disable 64bit operands.
179 (call, jmp): Avoid REX prefixes.
180 (jcxz): Prohibit in 64bit mode
181 (jrcxz, loop): Add 64bit variants.
182 (movq): Fix patterns.
183 (movmskps, pextrw, pinstrw): Add 64bit variants.
184
185 2002-01-31 Ivan Guzvinec <ivang@opencores.org>
186
187 * or32.h: New file.
188
189 2002-01-22 Graydon Hoare <graydon@redhat.com>
190
191 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
192 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
193
194 2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
195
196 * h8300.h: Comment typo fix.
197
198 2002-01-03 matthew green <mrg@redhat.com>
199
200 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
201 (PPC_OPCODE_BOOKE64): Likewise.
202
203 Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
204
205 * hppa.h (call, ret): Move to end of table.
206 (addb, addib): PA2.0 variants should have been PA2.0W.
207 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
208 happy.
209 (fldw, fldd, fstw, fstd, bb): Likewise.
210 (short loads/stores): Tweak format specifier slightly to keep
211 disassembler happy.
212 (indexed loads/stores): Likewise.
213 (absolute loads/stores): Likewise.
214
215 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
216
217 * d10v.h (OPERAND_NOSP): New macro.
218
219 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
220
221 * d10v.h (OPERAND_SP): New macro.
222
223 2001-11-15 Alan Modra <amodra@bigpond.net.au>
224
225 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
226
227 2001-11-11 Timothy Wall <twall@alum.mit.edu>
228
229 * tic54x.h: Revise opcode layout; don't really need a separate
230 structure for parallel opcodes.
231
232 2001-11-13 Zack Weinberg <zack@codesourcery.com>
233 Alan Modra <amodra@bigpond.net.au>
234
235 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
236 accept WordReg.
237
238 2001-11-04 Chris Demetriou <cgd@broadcom.com>
239
240 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
241
242 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
243
244 * mmix.h: New file.
245
246 2001-10-18 Chris Demetriou <cgd@broadcom.com>
247
248 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
249 of the expression, to make source code merging easier.
250
251 2001-10-17 Chris Demetriou <cgd@broadcom.com>
252
253 * mips.h: Sort coprocessor instruction argument characters
254 in comment, add a few more words of description for "H".
255
256 2001-10-17 Chris Demetriou <cgd@broadcom.com>
257
258 * mips.h (INSN_SB1): New cpu-specific instruction bit.
259 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
260 if cpu is CPU_SB1.
261
262 2001-10-17 matthew green <mrg@redhat.com>
263
264 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
265
266 2001-10-12 matthew green <mrg@redhat.com>
267
268 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
269 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
270 instructions, respectively.
271
272 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
273
274 * v850.h: Remove spurious comment.
275
276 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
277
278 * h8300.h: Fix compile time warning messages
279
280 2001-09-04 Richard Henderson <rth@redhat.com>
281
282 * alpha.h (struct alpha_operand): Pack elements into bitfields.
283
284 2001-08-31 Eric Christopher <echristo@redhat.com>
285
286 * mips.h: Remove CPU_MIPS32_4K.
287
288 2001-08-27 Torbjorn Granlund <tege@swox.com>
289
290 * ppc.h (PPC_OPERAND_DS): Define.
291
292 2001-08-25 Andreas Jaeger <aj@suse.de>
293
294 * d30v.h: Fix declaration of reg_name_cnt.
295
296 * d10v.h: Fix declaration of d10v_reg_name_cnt.
297
298 * arc.h: Add prototypes from opcodes/arc-opc.c.
299
300 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
301
302 * mips.h (INSN_10000): Define.
303 (OPCODE_IS_MEMBER): Check for INSN_10000.
304
305 2001-08-10 Alan Modra <amodra@one.net.au>
306
307 * ppc.h: Revert 2001-08-08.
308
309 2001-08-10 Richard Sandiford <rsandifo@redhat.com>
310
311 * mips.h (INSN_GP32): Remove.
312 (OPCODE_IS_MEMBER): Remove gp32 parameter.
313 (M_MOVE): New macro identifier.
314
315 2001-08-08 Alan Modra <amodra@one.net.au>
316
317 1999-10-25 Torbjorn Granlund <tege@swox.com>
318 * ppc.h (struct powerpc_operand): New field `reloc'.
319
320 2001-08-01 Aldy Hernandez <aldyh@redhat.com>
321
322 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
323
324 2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
325
326 * cgen.h (CGEN_INSN): Add regex support.
327 (build_insn_regex): Declare.
328
329 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
330
331 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
332 (cgen_cpu_desc): Ditto.
333
334 2001-07-07 Ben Elliston <bje@redhat.com>
335
336 * m88k.h: Clean up and reformat. Remove unused code.
337
338 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
339
340 * cgen.h (cgen_keyword): Add nonalpha_chars field.
341
342 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
343
344 * mips.h (CPU_R12000): Define.
345
346 2001-05-23 John Healy <jhealy@redhat.com>
347
348 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
349
350 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
351
352 * mips.h (INSN_ISA_MASK): Define.
353
354 2001-05-12 Alan Modra <amodra@one.net.au>
355
356 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
357 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
358 and use InvMem as these insns must have register operands.
359
360 2001-05-04 Alan Modra <amodra@one.net.au>
361
362 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
363 and pextrw to swap reg/rm assignments.
364
365 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
366
367 * cris.h (enum cris_insn_version_usage): Correct comment for
368 cris_ver_v3p.
369
370 2001-03-24 Alan Modra <alan@linuxcare.com.au>
371
372 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
373 Add InvMem to first operand of "maskmovdqu".
374
375 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
376
377 * cris.h (ADD_PC_INCR_OPCODE): New macro.
378
379 2001-03-21 Kazu Hirata <kazu@hxi.com>
380
381 * h8300.h: Fix formatting.
382
383 2001-03-22 Alan Modra <alan@linuxcare.com.au>
384
385 * i386.h (i386_optab): Add paddq, psubq.
386
387 2001-03-19 Alan Modra <alan@linuxcare.com.au>
388
389 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
390
391 2001-02-28 Igor Shevlyakov <igor@windriver.com>
392
393 * m68k.h: new defines for Coldfire V4. Update mcf to know
394 about mcf5407.
395
396 2001-02-18 lars brinkhoff <lars@nocrew.org>
397
398 * pdp11.h: New file.
399
400 2001-02-12 Jan Hubicka <jh@suse.cz>
401
402 * i386.h (i386_optab): SSE integer converison instructions have
403 64bit versions on x86-64.
404
405 2001-02-10 Nick Clifton <nickc@redhat.com>
406
407 * mips.h: Remove extraneous whitespace. Formating change to allow
408 for future contribution.
409
410 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
411
412 * s390.h: New file.
413
414 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
415
416 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
417 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
418 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
419
420 2001-01-24 Karsten Keil <kkeil@suse.de>
421
422 * i386.h (i386_optab): Fix swapgs
423
424 2001-01-14 Alan Modra <alan@linuxcare.com.au>
425
426 * hppa.h: Describe new '<' and '>' operand types, and tidy
427 existing comments.
428 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
429 Remove duplicate "ldw j(s,b),x". Sort some entries.
430
431 2001-01-13 Jan Hubicka <jh@suse.cz>
432
433 * i386.h (i386_optab): Fix pusha and ret templates.
434
435 2001-01-11 Peter Targett <peter.targett@arccores.com>
436
437 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
438 definitions for masking cpu type.
439 (arc_ext_operand_value) New structure for storing extended
440 operands.
441 (ARC_OPERAND_*) Flags for operand values.
442
443 2001-01-10 Jan Hubicka <jh@suse.cz>
444
445 * i386.h (pinsrw): Add.
446 (pshufw): Remove.
447 (cvttpd2dq): Fix operands.
448 (cvttps2dq): Likewise.
449 (movq2q): Rename to movdq2q.
450
451 2001-01-10 Richard Schaal <richard.schaal@intel.com>
452
453 * i386.h: Correct movnti instruction.
454
455 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
456
457 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
458 of operands (unsigned char or unsigned short).
459 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
460 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
461
462 2001-01-05 Jan Hubicka <jh@suse.cz>
463
464 * i386.h (i386_optab): Make [sml]fence template to use immext field.
465
466 2001-01-03 Jan Hubicka <jh@suse.cz>
467
468 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
469 introduced by Pentium4
470
471 2000-12-30 Jan Hubicka <jh@suse.cz>
472
473 * i386.h (i386_optab): Add "rex*" instructions;
474 add swapgs; disable jmp/call far direct instructions for
475 64bit mode; add syscall and sysret; disable registers for 0xc6
476 template. Add 'q' suffixes to extendable instructions, disable
477 obsolete instructions, add new sign/zero extension ones.
478 (i386_regtab): Add extended registers.
479 (*Suf): Add No_qSuf.
480 (q_Suf, wlq_Suf, bwlq_Suf): New.
481
482 2000-12-20 Jan Hubicka <jh@suse.cz>
483
484 * i386.h (i386_optab): Replace "Imm" with "EncImm".
485 (i386_regtab): Add flags field.
486
487 2000-12-12 Nick Clifton <nickc@redhat.com>
488
489 * mips.h: Fix formatting.
490
491 2000-12-01 Chris Demetriou <cgd@sibyte.com>
492
493 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
494 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
495 OP_*_SYSCALL definitions.
496 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
497 19 bit wait codes.
498 (MIPS operand specifier comments): Remove 'm', add 'U' and
499 'J', and update the meaning of 'B' so that it's more general.
500
501 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
502 INSN_ISA5): Renumber, redefine to mean the ISA at which the
503 instruction was added.
504 (INSN_ISA32): New constant.
505 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
506 Renumber to avoid new and/or renumbered INSN_* constants.
507 (INSN_MIPS32): Delete.
508 (ISA_UNKNOWN): New constant to indicate unknown ISA.
509 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
510 ISA_MIPS32): New constants, defined to be the mask of INSN_*
511 constants available at that ISA level.
512 (CPU_UNKNOWN): New constant to indicate unknown CPU.
513 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
514 define it with a unique value.
515 (OPCODE_IS_MEMBER): Update for new ISA membership-related
516 constant meanings.
517
518 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
519 definitions.
520
521 * mips.h (CPU_SB1): New constant.
522
523 2000-10-20 Jakub Jelinek <jakub@redhat.com>
524
525 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
526 Note that '3' is used for siam operand.
527
528 2000-09-22 Jim Wilson <wilson@cygnus.com>
529
530 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
531
532 2000-09-13 Anders Norlander <anorland@acc.umu.se>
533
534 * mips.h: Use defines instead of hard-coded processor numbers.
535 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
536 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
537 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
538 CPU_4KC, CPU_4KM, CPU_4KP): Define..
539 (OPCODE_IS_MEMBER): Use new defines.
540 (OP_MASK_SEL, OP_SH_SEL): Define.
541 (OP_MASK_CODE20, OP_SH_CODE20): Define.
542 Add 'P' to used characters.
543 Use 'H' for coprocessor select field.
544 Use 'm' for 20 bit breakpoint code.
545 Document new arg characters and add to used characters.
546 (INSN_MIPS32): New define for MIPS32 extensions.
547 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
548
549 2000-09-05 Alan Modra <alan@linuxcare.com.au>
550
551 * hppa.h: Mention cz completer.
552
553 2000-08-16 Jim Wilson <wilson@cygnus.com>
554
555 * ia64.h (IA64_OPCODE_POSTINC): New.
556
557 2000-08-15 H.J. Lu <hjl@gnu.org>
558
559 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
560 IgnoreSize change.
561
562 2000-08-08 Jason Eckhardt <jle@cygnus.com>
563
564 * i860.h: Small formatting adjustments.
565
566 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
567
568 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
569 Move related opcodes closer to each other.
570 Minor changes in comments, list undefined opcodes.
571
572 2000-07-26 Dave Brolley <brolley@redhat.com>
573
574 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
575
576 2000-07-22 Jason Eckhardt <jle@cygnus.com>
577
578 * i860.h (btne, bte, bla): Changed these opcodes
579 to use sbroff ('r') instead of split16 ('s').
580 (J, K, L, M): New operand types for 16-bit aligned fields.
581 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
582 use I, J, K, L, M instead of just I.
583 (T, U): New operand types for split 16-bit aligned fields.
584 (st.x): Changed these opcodes to use S, T, U instead of just S.
585 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
586 exist on the i860.
587 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
588 (pfeq.ss, pfeq.dd): New opcodes.
589 (st.s): Fixed incorrect mask bits.
590 (fmlow): Fixed incorrect mask bits.
591 (fzchkl, pfzchkl): Fixed incorrect mask bits.
592 (faddz, pfaddz): Fixed incorrect mask bits.
593 (form, pform): Fixed incorrect mask bits.
594 (pfld.l): Fixed incorrect mask bits.
595 (fst.q): Fixed incorrect mask bits.
596 (all floating point opcodes): Fixed incorrect mask bits for
597 handling of dual bit.
598
599 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
600
601 cris.h: New file.
602
603 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
604
605 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
606 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
607 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
608 (AVR_ISA_M83): Define for ATmega83, ATmega85.
609 (espm): Remove, because ESPM removed in databook update.
610 (eicall, eijmp): Move to the end of opcode table.
611
612 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
613
614 * m68hc11.h: New file for support of Motorola 68hc11.
615
616 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
617
618 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
619
620 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
621
622 * avr.h: New file with AVR opcodes.
623
624 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
625
626 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
627
628 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
629
630 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
631
632 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
633
634 * i386.h: Use sl_FP, not sl_Suf for fild.
635
636 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
637
638 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
639 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
640 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
641 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
642
643 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
644
645 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
646
647 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
648 Alexander Sokolov <robocop@netlink.ru>
649
650 * i386.h (i386_optab): Add cpu_flags for all instructions.
651
652 2000-05-13 Alan Modra <alan@linuxcare.com.au>
653
654 From Gavin Romig-Koch <gavin@cygnus.com>
655 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
656
657 2000-05-04 Timothy Wall <twall@cygnus.com>
658
659 * tic54x.h: New.
660
661 2000-05-03 J.T. Conklin <jtc@redback.com>
662
663 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
664 (PPC_OPERAND_VR): New operand flag for vector registers.
665
666 2000-05-01 Kazu Hirata <kazu@hxi.com>
667
668 * h8300.h (EOP): Add missing initializer.
669
670 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
671
672 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
673 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
674 New operand types l,y,&,fe,fE,fx added to support above forms.
675 (pa_opcodes): Replaced usage of 'x' as source/target for
676 floating point double-word loads/stores with 'fx'.
677
678 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
679 David Mosberger <davidm@hpl.hp.com>
680 Timothy Wall <twall@cygnus.com>
681 Jim Wilson <wilson@cygnus.com>
682
683 * ia64.h: New file.
684
685 2000-03-27 Nick Clifton <nickc@cygnus.com>
686
687 * d30v.h (SHORT_A1): Fix value.
688 (SHORT_AR): Renumber so that it is at the end of the list of short
689 instructions, not the end of the list of long instructions.
690
691 2000-03-26 Alan Modra <alan@linuxcare.com>
692
693 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
694 problem isn't really specific to Unixware.
695 (OLDGCC_COMPAT): Define.
696 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
697 destination %st(0).
698 Fix lots of comments.
699
700 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
701
702 * d30v.h:
703 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
704 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
705 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
706 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
707 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
708 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
709 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
710
711 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
712
713 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
714 fistpd without suffix.
715
716 2000-02-24 Nick Clifton <nickc@cygnus.com>
717
718 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
719 'signed_overflow_ok_p'.
720 Delete prototypes for cgen_set_flags() and cgen_get_flags().
721
722 2000-02-24 Andrew Haley <aph@cygnus.com>
723
724 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
725 (CGEN_CPU_TABLE): flags: new field.
726 Add prototypes for new functions.
727
728 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
729
730 * i386.h: Add some more UNIXWARE_COMPAT comments.
731
732 2000-02-23 Linas Vepstas <linas@linas.org>
733
734 * i370.h: New file.
735
736 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
737
738 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
739 cannot be combined in parallel with ADD/SUBppp.
740
741 2000-02-22 Andrew Haley <aph@cygnus.com>
742
743 * mips.h: (OPCODE_IS_MEMBER): Add comment.
744
745 1999-12-30 Andrew Haley <aph@cygnus.com>
746
747 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
748 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
749 insns.
750
751 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
752
753 * i386.h: Qualify intel mode far call and jmp with x_Suf.
754
755 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
756
757 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
758 indirect jumps and calls. Add FF/3 call for intel mode.
759
760 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
761
762 * mn10300.h: Add new operand types. Add new instruction formats.
763
764 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
765
766 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
767 instruction.
768
769 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
770
771 * mips.h (INSN_ISA5): New.
772
773 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
774
775 * mips.h (OPCODE_IS_MEMBER): New.
776
777 1999-10-29 Nick Clifton <nickc@cygnus.com>
778
779 * d30v.h (SHORT_AR): Define.
780
781 1999-10-18 Michael Meissner <meissner@cygnus.com>
782
783 * alpha.h (alpha_num_opcodes): Convert to unsigned.
784 (alpha_num_operands): Ditto.
785
786 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
787
788 * hppa.h (pa_opcodes): Add load and store cache control to
789 instructions. Add ordered access load and store.
790
791 * hppa.h (pa_opcode): Add new entries for addb and addib.
792
793 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
794
795 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
796
797 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
798
799 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
800
801 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
802
803 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
804 and "be" using completer prefixes.
805
806 * hppa.h (pa_opcodes): Add initializers to silence compiler.
807
808 * hppa.h: Update comments about character usage.
809
810 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
811
812 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
813 up the new fstw & bve instructions.
814
815 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
816
817 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
818 instructions.
819
820 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
821
822 * hppa.h (pa_opcodes): Add long offset double word load/store
823 instructions.
824
825 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
826 stores.
827
828 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
829
830 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
831
832 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
833
834 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
835
836 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
837
838 * hppa.h (pa_opcodes): Add support for "b,l".
839
840 * hppa.h (pa_opcodes): Add support for "b,gate".
841
842 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
843
844 * hppa.h (pa_opcodes): Use 'fX' for first register operand
845 in xmpyu.
846
847 * hppa.h (pa_opcodes): Fix mask for probe and probei.
848
849 * hppa.h (pa_opcodes): Fix mask for depwi.
850
851 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
852
853 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
854 an explicit output argument.
855
856 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
857
858 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
859 Add a few PA2.0 loads and store variants.
860
861 1999-09-04 Steve Chamberlain <sac@pobox.com>
862
863 * pj.h: New file.
864
865 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
866
867 * i386.h (i386_regtab): Move %st to top of table, and split off
868 other fp reg entries.
869 (i386_float_regtab): To here.
870
871 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
872
873 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
874 by 'f'.
875
876 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
877 Add supporting args.
878
879 * hppa.h: Document new completers and args.
880 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
881 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
882 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
883 pmenb and pmdis.
884
885 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
886 hshr, hsub, mixh, mixw, permh.
887
888 * hppa.h (pa_opcodes): Change completers in instructions to
889 use 'c' prefix.
890
891 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
892 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
893
894 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
895 fnegabs to use 'I' instead of 'F'.
896
897 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
898
899 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
900 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
901 Alphabetically sort PIII insns.
902
903 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
904
905 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
906
907 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
908
909 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
910 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
911
912 * hppa.h: Document 64 bit condition completers.
913
914 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
915
916 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
917
918 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
919
920 * i386.h (i386_optab): Add DefaultSize modifier to all insns
921 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
922 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
923
924 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
925 Jeff Law <law@cygnus.com>
926
927 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
928
929 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
930
931 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
932 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
933
934 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
935
936 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
937
938 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
939
940 * hppa.h (struct pa_opcode): Add new field "flags".
941 (FLAGS_STRICT): Define.
942
943 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
944 Jeff Law <law@cygnus.com>
945
946 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
947
948 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
949
950 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
951
952 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
953 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
954 flag to fcomi and friends.
955
956 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
957
958 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
959 integer logical instructions.
960
961 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
962
963 * m68k.h: Document new formats `E', `G', `H' and new places `N',
964 `n', `o'.
965
966 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
967 and new places `m', `M', `h'.
968
969 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
970
971 * hppa.h (pa_opcodes): Add several processor specific system
972 instructions.
973
974 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
975
976 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
977 "addb", and "addib" to be used by the disassembler.
978
979 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
980
981 * i386.h (ReverseModrm): Remove all occurences.
982 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
983 movmskps, pextrw, pmovmskb, maskmovq.
984 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
985 ignore the data size prefix.
986
987 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
988 Mostly stolen from Doug Ledford <dledford@redhat.com>
989
990 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
991
992 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
993
994 1999-04-14 Doug Evans <devans@casey.cygnus.com>
995
996 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
997 (CGEN_ATTR_TYPE): Update.
998 (CGEN_ATTR_MASK): Number booleans starting at 0.
999 (CGEN_ATTR_VALUE): Update.
1000 (CGEN_INSN_ATTR): Update.
1001
1002 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1003
1004 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1005 instructions.
1006
1007 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1008
1009 * hppa.h (bb, bvb): Tweak opcode/mask.
1010
1011
1012 1999-03-22 Doug Evans <devans@casey.cygnus.com>
1013
1014 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1015 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1016 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1017 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1018 Delete member max_insn_size.
1019 (enum cgen_cpu_open_arg): New enum.
1020 (cpu_open): Update prototype.
1021 (cpu_open_1): Declare.
1022 (cgen_set_cpu): Delete.
1023
1024 1999-03-11 Doug Evans <devans@casey.cygnus.com>
1025
1026 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1027 (CGEN_OPERAND_NIL): New macro.
1028 (CGEN_OPERAND): New member `type'.
1029 (@arch@_cgen_operand_table): Delete decl.
1030 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1031 (CGEN_OPERAND_TABLE): New struct.
1032 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1033 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1034 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1035 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1036 {get,set}_{int,vma}_operand.
1037 (@arch@_cgen_cpu_open): New arg `isa'.
1038 (cgen_set_cpu): Ditto.
1039
1040 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1041
1042 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1043
1044 1999-02-25 Doug Evans <devans@casey.cygnus.com>
1045
1046 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1047 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1048 enum cgen_hw_type.
1049 (CGEN_HW_TABLE): New struct.
1050 (hw_table): Delete declaration.
1051 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1052 to table entry to enum.
1053 (CGEN_OPINST): Ditto.
1054 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1055
1056 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1057
1058 * alpha.h (AXP_OPCODE_EV6): New.
1059 (AXP_OPCODE_NOPAL): Include it.
1060
1061 1999-02-09 Doug Evans <devans@casey.cygnus.com>
1062
1063 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1064 All uses updated. New members int_insn_p, max_insn_size,
1065 parse_operand,insert_operand,extract_operand,print_operand,
1066 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1067 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1068 extract_handlers,print_handlers.
1069 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1070 (CGEN_ATTR_BOOL_OFFSET): New macro.
1071 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1072 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1073 (cgen_opcode_handler): Renamed from cgen_base.
1074 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1075 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1076 all uses updated.
1077 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1078 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1079 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1080 (CGEN_OPCODE,CGEN_IBASE): New types.
1081 (CGEN_INSN): Rewrite.
1082 (CGEN_{ASM,DIS}_HASH*): Delete.
1083 (init_opcode_table,init_ibld_table): Declare.
1084 (CGEN_INSN_ATTR): New type.
1085
1086 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
1087
1088 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1089 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1090 Change *Suf definitions to include x and d suffixes.
1091 (movsx): Use w_Suf and b_Suf.
1092 (movzx): Likewise.
1093 (movs): Use bwld_Suf.
1094 (fld): Change ordering. Use sld_FP.
1095 (fild): Add Intel Syntax equivalent of fildq.
1096 (fst): Use sld_FP.
1097 (fist): Use sld_FP.
1098 (fstp): Use sld_FP. Add x_FP version.
1099 (fistp): LLongMem version for Intel Syntax.
1100 (fcom, fcomp): Use sld_FP.
1101 (fadd, fiadd, fsub): Use sld_FP.
1102 (fsubr): Use sld_FP.
1103 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1104
1105 1999-01-27 Doug Evans <devans@casey.cygnus.com>
1106
1107 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1108 CGEN_MODE_UINT.
1109
1110 1999-01-16 Jeffrey A Law (law@cygnus.com)
1111
1112 * hppa.h (bv): Fix mask.
1113
1114 1999-01-05 Doug Evans <devans@casey.cygnus.com>
1115
1116 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1117 (CGEN_ATTR): Use it.
1118 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1119 (CGEN_ATTR_TABLE): New member dfault.
1120
1121 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1122
1123 * mips.h (MIPS16_INSN_BRANCH): New.
1124
1125 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1126
1127 The following is part of a change made by Edith Epstein
1128 <eepstein@sophia.cygnus.com> as part of a project to merge in
1129 changes by HP; HP did not create ChangeLog entries.
1130
1131 * hppa.h (completer_chars): list of chars to not put a space
1132 after.
1133
1134 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1135
1136 * i386.h (i386_optab): Permit w suffix on processor control and
1137 status word instructions.
1138
1139 1998-11-30 Doug Evans <devans@casey.cygnus.com>
1140
1141 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1142 (struct cgen_keyword_entry): Ditto.
1143 (struct cgen_operand): Ditto.
1144 (CGEN_IFLD): New typedef, with associated access macros.
1145 (CGEN_IFMT): New typedef, with associated access macros.
1146 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1147 (CGEN_IVALUE): New typedef.
1148 (struct cgen_insn): Delete const on syntax,attrs members.
1149 `format' now points to format data. Type of `value' is now
1150 CGEN_IVALUE.
1151 (struct cgen_opcode_table): New member ifld_table.
1152
1153 1998-11-18 Doug Evans <devans@casey.cygnus.com>
1154
1155 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1156 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1157 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1158 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1159 (cgen_opcode_table): Update type of dis_hash fn.
1160 (extract_operand): Update type of `insn_value' arg.
1161
1162 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1163
1164 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1165
1166 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1167
1168 * mips.h (INSN_MULT): Added.
1169
1170 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1171
1172 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1173
1174 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1175
1176 * cgen.h (CGEN_INSN_INT): New typedef.
1177 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1178 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1179 (CGEN_INSN_BYTES_PTR): New typedef.
1180 (CGEN_EXTRACT_INFO): New typedef.
1181 (cgen_insert_fn,cgen_extract_fn): Update.
1182 (cgen_opcode_table): New member `insn_endian'.
1183 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1184 (insert_operand,extract_operand): Update.
1185 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1186
1187 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1188
1189 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1190 (struct CGEN_HW_ENTRY): New member `attrs'.
1191 (CGEN_HW_ATTR): New macro.
1192 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1193 (CGEN_INSN_INVALID_P): New macro.
1194
1195 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1196
1197 * hppa.h: Add "fid".
1198
1199 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1200
1201 From Robert Andrew Dale <rob@nb.net>
1202 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1203 (AMD_3DNOW_OPCODE): Define.
1204
1205 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1206
1207 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1208
1209 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1210
1211 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1212
1213 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1214
1215 Move all global state data into opcode table struct, and treat
1216 opcode table as something that is "opened/closed".
1217 * cgen.h (CGEN_OPCODE_DESC): New type.
1218 (all fns): New first arg of opcode table descriptor.
1219 (cgen_set_parse_operand_fn): Add prototype.
1220 (cgen_current_machine,cgen_current_endian): Delete.
1221 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1222 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1223 dis_hash_table,dis_hash_table_entries.
1224 (opcode_open,opcode_close): Add prototypes.
1225
1226 * cgen.h (cgen_insn): New element `cdx'.
1227
1228 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1229
1230 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1231
1232 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1233
1234 * mn10300.h: Add "no_match_operands" field for instructions.
1235 (MN10300_MAX_OPERANDS): Define.
1236
1237 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1238
1239 * cgen.h (cgen_macro_insn_count): Declare.
1240
1241 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1242
1243 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1244 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1245 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1246 set_{int,vma}_operand.
1247
1248 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1249
1250 * mn10300.h: Add "machine" field for instructions.
1251 (MN103, AM30): Define machine types.
1252
1253 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1254
1255 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1256
1257 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1258
1259 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1260
1261 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1262
1263 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1264 and ud2b.
1265 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1266 those that happen to be implemented on pentiums.
1267
1268 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1269
1270 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1271 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1272 with Size16|IgnoreSize or Size32|IgnoreSize.
1273
1274 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1275
1276 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1277 (REPE): Rename to REPE_PREFIX_OPCODE.
1278 (i386_regtab_end): Remove.
1279 (i386_prefixtab, i386_prefixtab_end): Remove.
1280 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1281 of md_begin.
1282 (MAX_OPCODE_SIZE): Define.
1283 (i386_optab_end): Remove.
1284 (sl_Suf): Define.
1285 (sl_FP): Use sl_Suf.
1286
1287 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1288 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1289 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1290 data32, dword, and adword prefixes.
1291 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1292 regs.
1293
1294 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1295
1296 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1297
1298 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1299 register operands, because this is a common idiom. Flag them with
1300 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1301 fdivrp because gcc erroneously generates them. Also flag with a
1302 warning.
1303
1304 * i386.h: Add suffix modifiers to most insns, and tighter operand
1305 checks in some cases. Fix a number of UnixWare compatibility
1306 issues with float insns. Merge some floating point opcodes, using
1307 new FloatMF modifier.
1308 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1309 consistency.
1310
1311 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1312 IgnoreDataSize where appropriate.
1313
1314 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1315
1316 * i386.h: (one_byte_segment_defaults): Remove.
1317 (two_byte_segment_defaults): Remove.
1318 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1319
1320 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1321
1322 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1323 (cgen_hw_lookup_by_num): Declare.
1324
1325 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1326
1327 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1328 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1329
1330 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1331
1332 * cgen.h (cgen_asm_init_parse): Delete.
1333 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1334 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1335
1336 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1337
1338 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1339 (cgen_asm_finish_insn): Update prototype.
1340 (cgen_insn): New members num, data.
1341 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1342 dis_hash, dis_hash_table_size moved to ...
1343 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1344 All uses updated. New members asm_hash_p, dis_hash_p.
1345 (CGEN_MINSN_EXPANSION): New struct.
1346 (cgen_expand_macro_insn): Declare.
1347 (cgen_macro_insn_count): Declare.
1348 (get_insn_operands): Update prototype.
1349 (lookup_get_insn_operands): Declare.
1350
1351 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1352
1353 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1354 regKludge. Add operands types for string instructions.
1355
1356 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1357
1358 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1359 table.
1360
1361 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1362
1363 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1364 for `gettext'.
1365
1366 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1367
1368 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1369 Add IsString flag to string instructions.
1370 (IS_STRING): Don't define.
1371 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1372 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1373 (SS_PREFIX_OPCODE): Define.
1374
1375 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1376
1377 * i386.h: Revert March 24 patch; no more LinearAddress.
1378
1379 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1380
1381 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1382 instructions, and instead add FWait opcode modifier. Add short
1383 form of fldenv and fstenv.
1384 (FWAIT_OPCODE): Define.
1385
1386 * i386.h (i386_optab): Change second operand constraint of `mov
1387 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1388 allow legal instructions such as `movl %gs,%esi'
1389
1390 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1391
1392 * h8300.h: Various changes to fully bracket initializers.
1393
1394 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1395
1396 * i386.h: Set LinearAddress for lidt and lgdt.
1397
1398 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1399
1400 * cgen.h (CGEN_BOOL_ATTR): New macro.
1401
1402 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1403
1404 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1405
1406 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1407
1408 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1409 (cgen_insn): Record syntax and format entries here, rather than
1410 separately.
1411
1412 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1413
1414 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1415
1416 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1417
1418 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1419 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1420 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1421
1422 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1423
1424 * cgen.h (lookup_insn): New argument alias_p.
1425
1426 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1427
1428 Fix rac to accept only a0:
1429 * d10v.h (OPERAND_ACC): Split into:
1430 (OPERAND_ACC0, OPERAND_ACC1) .
1431 (OPERAND_GPR): Define.
1432
1433 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1434
1435 * cgen.h (CGEN_FIELDS): Define here.
1436 (CGEN_HW_ENTRY): New member `type'.
1437 (hw_list): Delete decl.
1438 (enum cgen_mode): Declare.
1439 (CGEN_OPERAND): New member `hw'.
1440 (enum cgen_operand_instance_type): Declare.
1441 (CGEN_OPERAND_INSTANCE): New type.
1442 (CGEN_INSN): New member `operands'.
1443 (CGEN_OPCODE_DATA): Make hw_list const.
1444 (get_insn_operands,lookup_insn): Add prototypes for.
1445
1446 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1447
1448 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1449 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1450 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1451 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1452
1453 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1454
1455 * cgen.h: Correct typo in comment end marker.
1456
1457 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1458
1459 * tic30.h: New file.
1460
1461 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1462
1463 * cgen.h: Add prototypes for cgen_save_fixups(),
1464 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1465 of cgen_asm_finish_insn() to return a char *.
1466
1467 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1468
1469 * cgen.h: Formatting changes to improve readability.
1470
1471 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1472
1473 * cgen.h (*): Clean up pass over `struct foo' usage.
1474 (CGEN_ATTR): Make unsigned char.
1475 (CGEN_ATTR_TYPE): Update.
1476 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1477 (cgen_base): Move member `attrs' to cgen_insn.
1478 (CGEN_KEYWORD): New member `null_entry'.
1479 (CGEN_{SYNTAX,FORMAT}): New types.
1480 (cgen_insn): Format and syntax separated from each other.
1481
1482 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1483
1484 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1485 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1486 flags_{used,set} long.
1487 (d30v_operand): Make flags field long.
1488
1489 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1490
1491 * m68k.h: Fix comment describing operand types.
1492
1493 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1494
1495 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1496 everything else after down.
1497
1498 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1499
1500 * d10v.h (OPERAND_FLAG): Split into:
1501 (OPERAND_FFLAG, OPERAND_CFLAG) .
1502
1503 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1504
1505 * mips.h (struct mips_opcode): Changed comments to reflect new
1506 field usage.
1507
1508 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1509
1510 * mips.h: Added to comments a quick-ref list of all assigned
1511 operand type characters.
1512 (OP_{MASK,SH}_PERFREG): New macros.
1513
1514 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1515
1516 * sparc.h: Add '_' and '/' for v9a asr's.
1517 Patch from David Miller <davem@vger.rutgers.edu>
1518
1519 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1520
1521 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1522 area are not available in the base model (H8/300).
1523
1524 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1525
1526 * m68k.h: Remove documentation of ` operand specifier.
1527
1528 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1529
1530 * m68k.h: Document q and v operand specifiers.
1531
1532 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1533
1534 * v850.h (struct v850_opcode): Add processors field.
1535 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1536 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1537 (PROCESSOR_V850EA): New bit constants.
1538
1539 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1540
1541 Merge changes from Martin Hunt:
1542
1543 * d30v.h: Allow up to 64 control registers. Add
1544 SHORT_A5S format.
1545
1546 * d30v.h (LONG_Db): New form for delayed branches.
1547
1548 * d30v.h: (LONG_Db): New form for repeati.
1549
1550 * d30v.h (SHORT_D2B): New form.
1551
1552 * d30v.h (SHORT_A2): New form.
1553
1554 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1555 registers are used. Needed for VLIW optimization.
1556
1557 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1558
1559 * cgen.h: Move assembler interface section
1560 up so cgen_parse_operand_result is defined for cgen_parse_address.
1561 (cgen_parse_address): Update prototype.
1562
1563 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1564
1565 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1566
1567 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1568
1569 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1570 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1571 <paubert@iram.es>.
1572
1573 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1574 <paubert@iram.es>.
1575
1576 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1577 <paubert@iram.es>.
1578
1579 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1580 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1581
1582 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1583
1584 * v850.h (V850_NOT_R0): New flag.
1585
1586 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1587
1588 * v850.h (struct v850_opcode): Remove flags field.
1589
1590 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1591
1592 * v850.h (struct v850_opcode): Add flags field.
1593 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1594 fields.
1595 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1596 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1597
1598 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1599
1600 * arc.h: New file.
1601
1602 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1603
1604 * sparc.h (sparc_opcodes): Declare as const.
1605
1606 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1607
1608 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1609 uses single or double precision floating point resources.
1610 (INSN_NO_ISA, INSN_ISA1): Define.
1611 (cpu specific INSN macros): Tweak into bitmasks outside the range
1612 of INSN_ISA field.
1613
1614 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1615
1616 * i386.h: Fix pand opcode.
1617
1618 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1619
1620 * mips.h: Widen INSN_ISA and move it to a more convenient
1621 bit position. Add INSN_3900.
1622
1623 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1624
1625 * mips.h (struct mips_opcode): added new field membership.
1626
1627 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1628
1629 * i386.h (movd): only Reg32 is allowed.
1630
1631 * i386.h: add fcomp and ud2. From Wayne Scott
1632 <wscott@ichips.intel.com>.
1633
1634 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1635
1636 * i386.h: Add MMX instructions.
1637
1638 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1639
1640 * i386.h: Remove W modifier from conditional move instructions.
1641
1642 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1643
1644 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1645 with no arguments to match that generated by the UnixWare
1646 assembler.
1647
1648 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1649
1650 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1651 (cgen_parse_operand_fn): Declare.
1652 (cgen_init_parse_operand): Declare.
1653 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1654 new argument `want'.
1655 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1656 (enum cgen_parse_operand_type): New enum.
1657
1658 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1659
1660 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1661
1662 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1663
1664 * cgen.h: New file.
1665
1666 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1667
1668 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1669 fdivrp.
1670
1671 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1672
1673 * v850.h (extract): Make unsigned.
1674
1675 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1676
1677 * i386.h: Add iclr.
1678
1679 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1680
1681 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1682 take a direction bit.
1683
1684 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1685
1686 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1687
1688 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1689
1690 * sparc.h: Include <ansidecl.h>. Update function declarations to
1691 use prototypes, and to use const when appropriate.
1692
1693 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1694
1695 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1696
1697 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1698
1699 * d10v.h: Change pre_defined_registers to
1700 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1701
1702 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1703
1704 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1705 Change mips_opcodes from const array to a pointer,
1706 and change bfd_mips_num_opcodes from const int to int,
1707 so that we can increase the size of the mips opcodes table
1708 dynamically.
1709
1710 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1711
1712 * d30v.h (FLAG_X): Remove unused flag.
1713
1714 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1715
1716 * d30v.h: New file.
1717
1718 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1719
1720 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1721 (PDS_VALUE): Macro to access value field of predefined symbols.
1722 (tic80_next_predefined_symbol): Add prototype.
1723
1724 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1725
1726 * tic80.h (tic80_symbol_to_value): Change prototype to match
1727 change in function, added class parameter.
1728
1729 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1730
1731 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1732 endmask fields, which are somewhat weird in that 0 and 32 are
1733 treated exactly the same.
1734
1735 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1736
1737 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1738 rather than a constant that is 2**X. Reorder them to put bits for
1739 operands that have symbolic names in the upper bits, so they can
1740 be packed into an int where the lower bits contain the value that
1741 corresponds to that symbolic name.
1742 (predefined_symbo): Add struct.
1743 (tic80_predefined_symbols): Declare array of translations.
1744 (tic80_num_predefined_symbols): Declare size of that array.
1745 (tic80_value_to_symbol): Declare function.
1746 (tic80_symbol_to_value): Declare function.
1747
1748 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1749
1750 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1751
1752 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1753
1754 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1755 be the destination register.
1756
1757 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1758
1759 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1760 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1761 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1762 that the opcode can have two vector instructions in a single
1763 32 bit word and we have to encode/decode both.
1764
1765 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1766
1767 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1768 TIC80_OPERAND_RELATIVE for PC relative.
1769 (TIC80_OPERAND_BASEREL): New flag bit for register
1770 base relative.
1771
1772 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1773
1774 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1775
1776 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1777
1778 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1779 ":s" modifier for scaling.
1780
1781 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1782
1783 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1784 (TIC80_OPERAND_M_LI): Ditto
1785
1786 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1787
1788 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1789 (TIC80_OPERAND_CC): New define for condition code operand.
1790 (TIC80_OPERAND_CR): New define for control register operand.
1791
1792 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1793
1794 * tic80.h (struct tic80_opcode): Name changed.
1795 (struct tic80_opcode): Remove format field.
1796 (struct tic80_operand): Add insertion and extraction functions.
1797 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1798 correct ones.
1799 (FMT_*): Ditto.
1800
1801 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1802
1803 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1804 type IV instruction offsets.
1805
1806 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1807
1808 * tic80.h: New file.
1809
1810 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1811
1812 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1813
1814 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1815
1816 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1817 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1818 * v850.h: Fix comment, v850_operand not powerpc_operand.
1819
1820 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1821
1822 * mn10200.h: Flesh out structures and definitions needed by
1823 the mn10200 assembler & disassembler.
1824
1825 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1826
1827 * mips.h: Add mips16 definitions.
1828
1829 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1830
1831 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1832
1833 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1834
1835 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1836 (MN10300_OPERAND_MEMADDR): Define.
1837
1838 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1839
1840 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1841
1842 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1843
1844 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1845
1846 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1847
1848 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1849
1850 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1851
1852 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1853
1854 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1855
1856 * alpha.h: Don't include "bfd.h"; private relocation types are now
1857 negative to minimize problems with shared libraries. Organize
1858 instruction subsets by AMASK extensions and PALcode
1859 implementation.
1860 (struct alpha_operand): Move flags slot for better packing.
1861
1862 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1863
1864 * v850.h (V850_OPERAND_RELAX): New operand flag.
1865
1866 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1867
1868 * mn10300.h (FMT_*): Move operand format definitions
1869 here.
1870
1871 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1872
1873 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1874
1875 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1876
1877 * mn10300.h (mn10300_opcode): Add "format" field.
1878 (MN10300_OPERAND_*): Define.
1879
1880 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1881
1882 * mn10x00.h: Delete.
1883 * mn10200.h, mn10300.h: New files.
1884
1885 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1886
1887 * mn10x00.h: New file.
1888
1889 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1890
1891 * v850.h: Add new flag to indicate this instruction uses a PC
1892 displacement.
1893
1894 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1895
1896 * h8300.h (stmac): Add missing instruction.
1897
1898 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1899
1900 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1901 field.
1902
1903 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1904
1905 * v850.h (V850_OPERAND_EP): Define.
1906
1907 * v850.h (v850_opcode): Add size field.
1908
1909 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1910
1911 * v850.h (v850_operands): Add insert and extract fields, pointers
1912 to functions used to handle unusual operand encoding.
1913 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1914 V850_OPERAND_SIGNED): Defined.
1915
1916 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1917
1918 * v850.h (v850_operands): Add flags field.
1919 (OPERAND_REG, OPERAND_NUM): Defined.
1920
1921 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1922
1923 * v850.h: New file.
1924
1925 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1926
1927 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1928 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1929 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1930 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1931 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1932 Defined.
1933
1934 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1935
1936 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1937 a 3 bit space id instead of a 2 bit space id.
1938
1939 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1940
1941 * d10v.h: Add some additional defines to support the
1942 assembler in determining which operations can be done in parallel.
1943
1944 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1945
1946 * h8300.h (SN): Define.
1947 (eepmov.b): Renamed from "eepmov"
1948 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1949 with them.
1950
1951 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1952
1953 * d10v.h (OPERAND_SHIFT): New operand flag.
1954
1955 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1956
1957 * d10v.h: Changes for divs, parallel-only instructions, and
1958 signed numbers.
1959
1960 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1961
1962 * d10v.h (pd_reg): Define. Putting the definition here allows
1963 the assembler and disassembler to share the same struct.
1964
1965 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1966
1967 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1968 Williams <steve@icarus.com>.
1969
1970 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1971
1972 * d10v.h: New file.
1973
1974 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1975
1976 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1977
1978 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1979
1980 * m68k.h (mcf5200): New macro.
1981 Document names of coldfire control registers.
1982
1983 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1984
1985 * h8300.h (SRC_IN_DST): Define.
1986
1987 * h8300.h (UNOP3): Mark the register operand in this insn
1988 as a source operand, not a destination operand.
1989 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1990 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1991 register operand with SRC_IN_DST.
1992
1993 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1994
1995 * alpha.h: New file.
1996
1997 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1998
1999 * rs6k.h: Remove obsolete file.
2000
2001 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2002
2003 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2004 fdivp, and fdivrp. Add ffreep.
2005
2006 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2007
2008 * h8300.h: Reorder various #defines for readability.
2009 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2010 (BITOP): Accept additional (unused) argument. All callers changed.
2011 (EBITOP): Likewise.
2012 (O_LAST): Bump.
2013 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2014
2015 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2016 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2017 (BITOP, EBITOP): Handle new H8/S addressing modes for
2018 bit insns.
2019 (UNOP3): Handle new shift/rotate insns on the H8/S.
2020 (insns using exr): New instructions.
2021 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2022
2023 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2024
2025 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2026 was incorrect.
2027
2028 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2029
2030 * h8300.h (START): Remove.
2031 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2032 and mov.l insns that can be relaxed.
2033
2034 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2035
2036 * i386.h: Remove Abs32 from lcall.
2037
2038 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2039
2040 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2041 (SLCPOP): New macro.
2042 Mark X,Y opcode letters as in use.
2043
2044 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2045
2046 * sparc.h (F_FLOAT, F_FBR): Define.
2047
2048 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2049
2050 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2051 from all insns.
2052 (ABS8SRC,ABS8DST): Add ABS8MEM.
2053 (add.l): Fix reg+reg variant.
2054 (eepmov.w): Renamed from eepmovw.
2055 (ldc,stc): Fix many cases.
2056
2057 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2058
2059 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2060
2061 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2062
2063 * sparc.h (O): Mark operand letter as in use.
2064
2065 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2066
2067 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2068 Mark operand letters uU as in use.
2069
2070 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2071
2072 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2073 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2074 (SPARC_OPCODE_SUPPORTED): New macro.
2075 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2076 (F_NOTV9): Delete.
2077
2078 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2079
2080 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2081 declaration consistent with return type in definition.
2082
2083 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2084
2085 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2086
2087 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2088
2089 * i386.h (i386_regtab): Add 80486 test registers.
2090
2091 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2092
2093 * i960.h (I_HX): Define.
2094 (i960_opcodes): Add HX instruction.
2095
2096 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2097
2098 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2099 and fclex.
2100
2101 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2102
2103 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2104 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2105 (bfd_* defines): Delete.
2106 (sparc_opcode_archs): Replaces architecture_pname.
2107 (sparc_opcode_lookup_arch): Declare.
2108 (NUMOPCODES): Delete.
2109
2110 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2111
2112 * sparc.h (enum sparc_architecture): Add v9a.
2113 (ARCHITECTURES_CONFLICT_P): Update.
2114
2115 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2116
2117 * i386.h: Added Pentium Pro instructions.
2118
2119 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2120
2121 * m68k.h: Document new 'W' operand place.
2122
2123 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2124
2125 * hppa.h: Add lci and syncdma instructions.
2126
2127 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2128
2129 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
2130 instructions.
2131
2132 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2133
2134 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2135 assembler's -mcom and -many switches.
2136
2137 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2138
2139 * i386.h: Fix cmpxchg8b extension opcode description.
2140
2141 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2142
2143 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2144 and register cr4.
2145
2146 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2147
2148 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2149
2150 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2151
2152 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2153
2154 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2155
2156 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2157
2158 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2159
2160 * m68kmri.h: Remove.
2161
2162 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2163 declarations. Remove F_ALIAS and flag field of struct
2164 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2165 int. Make name and args fields of struct m68k_opcode const.
2166
2167 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2168
2169 * sparc.h (F_NOTV9): Define.
2170
2171 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2172
2173 * mips.h (INSN_4010): Define.
2174
2175 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2176
2177 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2178
2179 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2180 * m68k.h: Fix argument descriptions of coprocessor
2181 instructions to allow only alterable operands where appropriate.
2182 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2183 (m68k_opcode_aliases): Add more aliases.
2184
2185 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2186
2187 * m68k.h: Added explcitly short-sized conditional branches, and a
2188 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2189 svr4-based configurations.
2190
2191 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2192
2193 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2194 * i386.h: added missing Data16/Data32 flags to a few instructions.
2195
2196 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2197
2198 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2199 (OP_MASK_BCC, OP_SH_BCC): Define.
2200 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2201 (OP_MASK_CCC, OP_SH_CCC): Define.
2202 (INSN_READ_FPR_R): Define.
2203 (INSN_RFE): Delete.
2204
2205 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2206
2207 * m68k.h (enum m68k_architecture): Deleted.
2208 (struct m68k_opcode_alias): New type.
2209 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2210 matching constraints, values and flags. As a side effect of this,
2211 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2212 as I know were never used, now may need re-examining.
2213 (numopcodes): Now const.
2214 (m68k_opcode_aliases, numaliases): New variables.
2215 (endop): Deleted.
2216 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2217 m68k_opcode_aliases; update declaration of m68k_opcodes.
2218
2219 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2220
2221 * hppa.h (delay_type): Delete unused enumeration.
2222 (pa_opcode): Replace unused delayed field with an architecture
2223 field.
2224 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2225
2226 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2227
2228 * mips.h (INSN_ISA4): Define.
2229
2230 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2231
2232 * mips.h (M_DLA_AB, M_DLI): Define.
2233
2234 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2235
2236 * hppa.h (fstwx): Fix single-bit error.
2237
2238 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2239
2240 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2241
2242 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2243
2244 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2245 debug registers. From Charles Hannum (mycroft@netbsd.org).
2246
2247 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2248
2249 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2250 i386 support:
2251 * i386.h (MOV_AX_DISP32): New macro.
2252 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2253 of several call/return instructions.
2254 (ADDR_PREFIX_OPCODE): New macro.
2255
2256 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2257
2258 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2259
2260 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2261 char.
2262 (struct vot, field `name'): ditto.
2263
2264 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2265
2266 * vax.h: Supply and properly group all values in end sentinel.
2267
2268 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2269
2270 * mips.h (INSN_ISA, INSN_4650): Define.
2271
2272 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2273
2274 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2275 systems with a separate instruction and data cache, such as the
2276 29040, these instructions take an optional argument.
2277
2278 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2279
2280 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2281 INSN_TRAP.
2282
2283 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2284
2285 * mips.h (INSN_STORE_MEMORY): Define.
2286
2287 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2288
2289 * sparc.h: Document new operand type 'x'.
2290
2291 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2292
2293 * i960.h (I_CX2): New instruction category. It includes
2294 instructions available on Cx and Jx processors.
2295 (I_JX): New instruction category, for JX-only instructions.
2296 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2297 Jx-only instructions, in I_JX category.
2298
2299 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2300
2301 * ns32k.h (endop): Made pointer const too.
2302
2303 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2304
2305 * ns32k.h: Drop Q operand type as there is no correct use
2306 for it. Add I and Z operand types which allow better checking.
2307
2308 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2309
2310 * h8300.h (xor.l) :fix bit pattern.
2311 (L_2): New size of operand.
2312 (trapa): Use it.
2313
2314 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2315
2316 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2317
2318 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2319
2320 * sparc.h: Include v9 definitions.
2321
2322 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2323
2324 * m68k.h (m68060): Defined.
2325 (m68040up, mfloat, mmmu): Include it.
2326 (struct m68k_opcode): Widen `arch' field.
2327 (m68k_opcodes): Updated for M68060. Removed comments that were
2328 instructions commented out by "JF" years ago.
2329
2330 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2331
2332 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2333 add a one-bit `flags' field.
2334 (F_ALIAS): New macro.
2335
2336 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2337
2338 * h8300.h (dec, inc): Get encoding right.
2339
2340 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2341
2342 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2343 a flag instead.
2344 (PPC_OPERAND_SIGNED): Define.
2345 (PPC_OPERAND_SIGNOPT): Define.
2346
2347 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2348
2349 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2350 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2351
2352 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2353
2354 * i386.h: Reverse last change. It'll be handled in gas instead.
2355
2356 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2357
2358 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2359 slower on the 486 and used the implicit shift count despite the
2360 explicit operand. The one-operand form is still available to get
2361 the shorter form with the implicit shift count.
2362
2363 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2364
2365 * hppa.h: Fix typo in fstws arg string.
2366
2367 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2368
2369 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2370
2371 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2372
2373 * ppc.h (PPC_OPCODE_601): Define.
2374
2375 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2376
2377 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2378 (so we can determine valid completers for both addb and addb[tf].)
2379
2380 * hppa.h (xmpyu): No floating point format specifier for the
2381 xmpyu instruction.
2382
2383 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2384
2385 * ppc.h (PPC_OPERAND_NEXT): Define.
2386 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2387 (struct powerpc_macro): Define.
2388 (powerpc_macros, powerpc_num_macros): Declare.
2389
2390 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2391
2392 * ppc.h: New file. Header file for PowerPC opcode table.
2393
2394 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2395
2396 * hppa.h: More minor template fixes for sfu and copr (to allow
2397 for easier disassembly).
2398
2399 * hppa.h: Fix templates for all the sfu and copr instructions.
2400
2401 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2402
2403 * i386.h (push): Permit Imm16 operand too.
2404
2405 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2406
2407 * h8300.h (andc): Exists in base arch.
2408
2409 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2410
2411 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2412 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2413
2414 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2415
2416 * hppa.h: Add FP quadword store instructions.
2417
2418 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2419
2420 * mips.h: (M_J_A): Added.
2421 (M_LA): Removed.
2422
2423 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2424
2425 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2426 <mellon@pepper.ncd.com>.
2427
2428 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2429
2430 * hppa.h: Immediate field in probei instructions is unsigned,
2431 not low-sign extended.
2432
2433 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2434
2435 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2436
2437 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2438
2439 * i386.h: Add "fxch" without operand.
2440
2441 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2442
2443 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2444
2445 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2446
2447 * hppa.h: Add gfw and gfr to the opcode table.
2448
2449 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2450
2451 * m88k.h: extended to handle m88110.
2452
2453 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2454
2455 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2456 addresses.
2457
2458 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2459
2460 * i960.h (i960_opcodes): Properly bracket initializers.
2461
2462 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2463
2464 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2465
2466 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2467
2468 * m68k.h (two): Protect second argument with parentheses.
2469
2470 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2471
2472 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2473 Deleted old in/out instructions in "#if 0" section.
2474
2475 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2476
2477 * i386.h (i386_optab): Properly bracket initializers.
2478
2479 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2480
2481 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2482 Jeff Law, law@cs.utah.edu).
2483
2484 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2485
2486 * i386.h (lcall): Accept Imm32 operand also.
2487
2488 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2489
2490 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2491 (M_DABS): Added.
2492
2493 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2494
2495 * mips.h (INSN_*): Changed values. Removed unused definitions.
2496 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2497 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2498 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2499 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2500 (M_*): Added new values for r6000 and r4000 macros.
2501 (ANY_DELAY): Removed.
2502
2503 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2504
2505 * mips.h: Added M_LI_S and M_LI_SS.
2506
2507 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2508
2509 * h8300.h: Get some rare mov.bs correct.
2510
2511 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2512
2513 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2514 been included.
2515
2516 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2517
2518 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2519 jump instructions, for use in disassemblers.
2520
2521 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2522
2523 * m88k.h: Make bitfields just unsigned, not unsigned long or
2524 unsigned short.
2525
2526 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2527
2528 * hppa.h: New argument type 'y'. Use in various float instructions.
2529
2530 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2531
2532 * hppa.h (break): First immediate field is unsigned.
2533
2534 * hppa.h: Add rfir instruction.
2535
2536 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2537
2538 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2539
2540 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2541
2542 * mips.h: Reworked the hazard information somewhat, and fixed some
2543 bugs in the instruction hazard descriptions.
2544
2545 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2546
2547 * m88k.h: Corrected a couple of opcodes.
2548
2549 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2550
2551 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2552 new version includes instruction hazard information, but is
2553 otherwise reasonably similar.
2554
2555 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2556
2557 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2558
2559 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2560
2561 Patches from Jeff Law, law@cs.utah.edu:
2562 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2563 Make the tables be the same for the following instructions:
2564 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2565 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2566 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2567 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2568 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2569 "fcmp", and "ftest".
2570
2571 * hppa.h: Make new and old tables the same for "break", "mtctl",
2572 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2573 Fix typo in last patch. Collapse several #ifdefs into a
2574 single #ifdef.
2575
2576 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2577 of the comments up-to-date.
2578
2579 * hppa.h: Update "free list" of letters and update
2580 comments describing each letter's function.
2581
2582 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2583
2584 * h8300.h: Lots of little fixes for the h8/300h.
2585
2586 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2587
2588 Support for H8/300-H
2589 * h8300.h: Lots of new opcodes.
2590
2591 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2592
2593 * h8300.h: checkpoint, includes H8/300-H opcodes.
2594
2595 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2596
2597 * Patches from Jeffrey Law <law@cs.utah.edu>.
2598 * hppa.h: Rework single precision FP
2599 instructions so that they correctly disassemble code
2600 PA1.1 code.
2601
2602 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2603
2604 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2605 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2606
2607 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2608
2609 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2610 gdb will define it for now.
2611
2612 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2613
2614 * sparc.h: Don't end enumerator list with comma.
2615
2616 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2617
2618 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2619 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2620 ("bc2t"): Correct typo.
2621 ("[ls]wc[023]"): Use T rather than t.
2622 ("c[0123]"): Define general coprocessor instructions.
2623
2624 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2625
2626 * m68k.h: Move split point for gcc compilation more towards
2627 middle.
2628
2629 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2630
2631 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2632 simply wrong, ics, rfi, & rfsvc were missing).
2633 Add "a" to opr_ext for "bb". Doc fix.
2634
2635 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2636
2637 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2638 * mips.h: Add casts, to suppress warnings about shifting too much.
2639 * m68k.h: Document the placement code '9'.
2640
2641 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2642
2643 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2644 allows callers to break up the large initialized struct full of
2645 opcodes into two half-sized ones. This permits GCC to compile
2646 this module, since it takes exponential space for initializers.
2647 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2648
2649 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2650
2651 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2652 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2653 initialized structs in it.
2654
2655 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2656
2657 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2658 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2659 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2660
2661 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2662
2663 * mips.h: document "i" and "j" operands correctly.
2664
2665 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2666
2667 * mips.h: Removed endianness dependency.
2668
2669 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2670
2671 * h8300.h: include info on number of cycles per instruction.
2672
2673 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2674
2675 * hppa.h: Move handy aliases to the front. Fix masks for extract
2676 and deposit instructions.
2677
2678 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2679
2680 * i386.h: accept shld and shrd both with and without the shift
2681 count argument, which is always %cl.
2682
2683 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2684
2685 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2686 (one_byte_segment_defaults, two_byte_segment_defaults,
2687 i386_prefixtab_end): Ditto.
2688
2689 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2690
2691 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2692 for operand 2; from John Carr, jfc@dsg.dec.com.
2693
2694 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2695
2696 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2697 always use 16-bit offsets. Makes calculated-size jump tables
2698 feasible.
2699
2700 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2701
2702 * i386.h: Fix one-operand forms of in* and out* patterns.
2703
2704 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2705
2706 * m68k.h: Added CPU32 support.
2707
2708 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2709
2710 * mips.h (break): Disassemble the argument. Patch from
2711 jonathan@cs.stanford.edu (Jonathan Stone).
2712
2713 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2714
2715 * m68k.h: merged Motorola and MIT syntax.
2716
2717 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2718
2719 * m68k.h (pmove): make the tests less strict, the 68k book is
2720 wrong.
2721
2722 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2723
2724 * m68k.h (m68ec030): Defined as alias for 68030.
2725 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2726 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2727 them. Tightened description of "fmovex" to distinguish it from
2728 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2729 up descriptions that claimed versions were available for chips not
2730 supporting them. Added "pmovefd".
2731
2732 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2733
2734 * m68k.h: fix where the . goes in divull
2735
2736 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2737
2738 * m68k.h: the cas2 instruction is supposed to be written with
2739 indirection on the last two operands, which can be either data or
2740 address registers. Added a new operand type 'r' which accepts
2741 either register type. Added new cases for cas2l and cas2w which
2742 use them. Corrected masks for cas2 which failed to recognize use
2743 of address register.
2744
2745 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2746
2747 * m68k.h: Merged in patches (mostly m68040-specific) from
2748 Colin Smith <colin@wrs.com>.
2749
2750 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2751 base). Also cleaned up duplicates, re-ordered instructions for
2752 the sake of dis-assembling (so aliases come after standard names).
2753 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2754
2755 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2756
2757 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2758 all missing .s
2759
2760 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2761
2762 * sparc.h: Moved tables to BFD library.
2763
2764 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2765
2766 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2767
2768 * h8300.h: Finish filling in all the holes in the opcode table,
2769 so that the Lucid C compiler can digest this as well...
2770
2771 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2772
2773 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2774 Fix opcodes on various sizes of fild/fist instructions
2775 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2776 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2777
2778 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2779
2780 * h8300.h: Fill in all the holes in the opcode table so that the
2781 losing HPUX C compiler can digest this...
2782
2783 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2784
2785 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2786 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2787
2788 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2789
2790 * sparc.h: Add new architecture variant sparclite; add its scan
2791 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2792
2793 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2794
2795 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2796 fy@lucid.com).
2797
2798 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2799
2800 * rs6k.h: New version from IBM (Metin).
2801
2802 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2803
2804 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2805 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2806
2807 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2808
2809 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2810
2811 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2812
2813 * m68k.h (one, two): Cast macro args to unsigned to suppress
2814 complaints from compiler and lint about integer overflow during
2815 shift.
2816
2817 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2818
2819 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2820
2821 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2822
2823 * mips.h: Make bitfield layout depend on the HOST compiler,
2824 not on the TARGET system.
2825
2826 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2827
2828 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2829 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2830 <TRANLE@INTELLICORP.COM>.
2831
2832 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2833
2834 * h8300.h: turned op_type enum into #define list
2835
2836 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2837
2838 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2839 similar instructions -- they've been renamed to "fitoq", etc.
2840 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2841 number of arguments.
2842 * h8300.h: Remove extra ; which produces compiler warning.
2843
2844 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2845
2846 * sparc.h: fix opcode for tsubcctv.
2847
2848 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2849
2850 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2851
2852 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2853
2854 * sparc.h (nop): Made the 'lose' field be even tighter,
2855 so only a standard 'nop' is disassembled as a nop.
2856
2857 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2858
2859 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2860 disassembled as a nop.
2861
2862 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2863
2864 * m68k.h, sparc.h: ANSIfy enums.
2865
2866 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2867
2868 * sparc.h: fix a typo.
2869
2870 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2871
2872 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2873 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2874 vax.h: Renamed from ../<foo>-opcode.h.
2875
2876 \f
2877 Local Variables:
2878 version-control: never
2879 End:
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