include/opcode/ChangeLog

   1 2003-08-19  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * ppc.h (PPC_OPCODE_440): Define.  Formatting.  Use hex for other
   4         PPC_OPCODE_* defines.
   5
   6 2003-08-16  Jason Eckhardt  <jle@rice.edu>
   7
   8         * i860.h (fmov.ds): Expand as famov.ds.
   9         (fmov.sd): Expand as famov.sd.
  10         (pfmov.ds): Expand as pfamov.ds.
  11
  12 2003-08-07  Michael Meissner  <gnu@the-meissners.org>
  13
  14         * cgen.h: Remove PARAM macro usage in all prototypes.
  15         (CGEN_EXTRACT_INFO): Use void * instead of PTR.
  16         (cgen_print_fn): Ditto.
  17         (CGEN_HW_ENTRY): Ditto.
  18         (CGEN_MAYBE_MULTI_IFLD): Ditto.
  19         (struct cgen_insn): Ditto.
  20         (CGEN_CPU_TABLE): Ditto.
  21
  22 2003-08-07  Alan Modra  <amodra@bigpond.net.au>
  23
  24         * alpha.h: Remove PARAMS macro.
  25         * arc.h: Likewise.
  26         * d10v.h: Likewise.
  27         * d30v.h: Likewise.
  28         * i370.h: Likewise.
  29         * or32.h: Likewise.
  30         * pj.h: Likewise.
  31         * ppc.h: Likewise.
  32         * sparc.h: Likewise.
  33         * tic80.h: Likewise.
  34         * v850.h: Likewise.
  35
  36 2003-07-18  Michael Snyder  <msnyder@redhat.com>
  37
  38         * include/opcode/h8sx.h (DO_MOVA1, DO_MOVA2): Reformatting.
  39
  40 2003-07-15  Richard Sandiford  <rsandifo@redhat.com>
  41
  42         * mips.h (CPU_RM7000): New macro.
  43         (OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
  44
  45 2003-07-09  Alexandre Oliva  <aoliva@redhat.com>
  46
  47         2000-04-01  Alexandre Oliva  <aoliva@cygnus.com>
  48         * mn10300.h (AM33_2): Renamed from AM33.
  49         2000-03-31  Alexandre Oliva  <aoliva@cygnus.com>
  50         * mn10300.h (AM332, FMT_D3): Defined.
  51         (MN10300_OPERAND_FSREG, MN10300_OPERAND_FDREG): Likewise.
  52         (MN10300_OPERAND_FPCR): Likewise.
  53
  54 2003-07-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
  55
  56         * s390.h (s390_opcode_cpu_val): Add enum for cpu type z990.
  57
  58 2003-06-25  Richard Sandiford  <rsandifo@redhat.com>
  59
  60         * h8300.h (IMM2_NS, IMM8_NS, IMM16_NS): Remove.
  61         (IMM8U, IMM8U_NS): Define.
  62         (h8_opcodes): Use IMM8U_NS for mov.[wl] #xx:8,@yy.
  63
  64 2003-06-25  Richard Sandiford  <rsandifo@redhat.com>
  65
  66         * h8300.h (h8_opcodes): Fix the mov.l @(dd:32,ERs),ERd and
  67         mov.l ERs,@(dd:32,ERd) entries.
  68
  69 2003-06-23  H.J. Lu <hongjiu.lu@intel.com>
  70
  71         * i386.h (i386_optab): Support Intel Precott New Instructions.
  72
  73 2003-06-10  Gary Hade <garyhade@us.ibm.com>
  74
  75         * ppc.h (PPC_OPERAND_DQ): Define.
  76
  77 2003-06-10  Richard Sandiford  <rsandifo@redhat.com>
  78
  79         * h8300.h (IMM4_NS, IMM8_NS): New.
  80         (h8_opcodes): Replace IMM4 with IMM4_NS in mov.b and mov.w entries.
  81         Likewise IMM8 for mov.w and mov.l.  Likewise IMM16U for mov.l.
  82
  83 2003-06-03  Michael Snyder  <msnyder@redhat.com>
  84
  85         * h8300.h (enum h8_model): Add AV_H8S to distinguish from H8H.
  86         (ldc): Split ccr ops from exr ops (which are only available
  87         on H8S or H8SX).
  88         (stc): Ditto.
  89         (andc, orc, xorc): Ditto.
  90         (ldmac, stmac, clrmac, mac): Change access to AV_H8S.
  91
  92 2003-06-03  Michael Snyder  <msnyder@redhat.com>
  93         and Bernd Schmidt   <bernds@redhat.com>
  94         and Alexandre Oliva <aoliva@redhat.com>
  95         * h8300.h: Add support for h8300sx instruction set.
  96
  97 2003-05-23  Jason Eckhardt  <jle@rice.edu>
  98
  99         * i860.h (expand_type): Add XP_ONLY.
 100         (scyc.b): New XP instruction.
 101         (ldio.l): Likewise.
 102         (ldio.s): Likewise.
 103         (ldio.b): Likewise.
 104         (ldint.l): Likewise.
 105         (ldint.s): Likewise.
 106         (ldint.b): Likewise.
 107         (stio.l): Likewise.
 108         (stio.s): Likewise.
 109         (stio.b): Likewise.
 110         (pfld.q): Likewise.
 111
 112 2003-05-20  Jason Eckhardt  <jle@rice.edu>
 113
 114         * i860.h (flush): Set lower 3 bits properly and use 'L'
 115         for the immediate operand type instead of 'i'.
 116
 117 2003-05-20  Jason Eckhardt  <jle@rice.edu>
 118
 119         * i860.h (fzchks): Both S and R bits must be set.
 120         (pfzchks): Likewise.
 121         (faddp): Likewise.
 122         (pfaddp): Likewise.
 123         (fix.ss): Remove (invalid instruction).
 124         (pfix.ss): Likewise.
 125         (ftrunc.ss): Likewise.
 126         (pftrunc.ss): Likewise.
 127
 128 2003-05-18  Jason Eckhardt  <jle@rice.edu>
 129
 130         * i860.h (form, pform): Add missing .dd suffix.
 131
 132 2003-05-13  Stephane Carrez  <stcarrez@nerim.fr>
 133
 134         * m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000
 135
 136 2003-04-07  Michael Snyder  <msnyder@redhat.com>
 137
 138         * h8300.h (ldc/stc): Fix up src/dst swaps.
 139
 140 2003-04-09  J. Grant  <jg-binutils@jguk.org>
 141
 142         * mips.h: Correct comment typo.
 143
 144 2003-03-21  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 145
 146         * s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
 147         (S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH.
 148         (s390_opcode): Remove architecture. Add modes and min_cpu.
 149
 150 2003-03-17 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
 151
 152         * h8300.h (O_SYS_CMDLINE): New pseudo opcode for command line
 153         processing.
 154
 155 2003-02-21  Noida D.Venkatasubramanian  <dvenkat@noida.hcltech.com>
 156
 157         * h8300.h (ldmac, stmac): Replace MACREG with MS32 and MD32.
 158
 159 2003-01-23  Alan Modra  <amodra@bigpond.net.au>
 160
 161         * m68hc11.h (cpu6812s): Define.
 162
 163 2003-01-07  Chris Demetriou  <cgd@broadcom.com>
 164
 165         * mips.h: Fix missing space in comment.
 166         (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
 167         (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
 168         by four bits.
 169
 170 2003-01-02  Chris Demetriou  <cgd@broadcom.com>
 171
 172         * mips.h: Update copyright years to include 2002 (which had
 173         been missed previously) and 2003.  Make comments about "+A",
 174         "+B", and "+C" operand types more descriptive.
 175
 176 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 177
 178         * mips.h: Note that the "+D" operand type name is now used.
 179
 180 2002-12-30  Chris Demetriou  <cgd@broadcom.com>
 181
 182         * mips.h: Document "+" as the start of two-character operand
 183         type names, and add new "K", "+A", "+B", and "+C" operand types.
 184         (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
 185         (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
 186         defines.
 187
 188 2002-12-24    Dmitry Diky <diwil@mail.ru>
 189
 190         * msp430.h: New file.  Defines msp430 opcodes.
 191
 192 2002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
 193
 194         * h8300.h: Added some more pseudo opcodes for system call
 195         processing.
 196
 197 2002-12-19  Chris Demetriou  <cgd@broadcom.com>
 198
 199         * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
 200         (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
 201         (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
 202         (OP_OP_SDC2, OP_OP_SDC3): Define.
 203
 204 2002-12-16  Alan Modra  <amodra@bigpond.net.au>
 205
 206         * hppa.h (completer_chars): #if 0 out.
 207
 208         * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
 209         "default_args".
 210         (struct not_wot): Constify "args".
 211         (struct not): Constify "name".
 212         (numopcodes): Delete.
 213         (endop): Delete.
 214
 215 2002-12-13  Alan Modra  <amodra@bigpond.net.au>
 216
 217         * pj.h (pj_opc_info_t): Add union.
 218
 219 2002-12-04  David Mosberger  <davidm@hpl.hp.com>
 220
 221         * ia64.h: Fix copyright message.
 222         (IA64_OPND_AR_CSD): New operand kind.
 223
 224 2002-12-03  Richard Henderson  <rth@redhat.com>
 225
 226         * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
 227
 228 2002-12-03  Alan Modra  <amodra@bigpond.net.au>
 229
 230         * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
 231         Constify "leaf" and "multi".
 232
 233 2002-11-19  Klee Dienes  <kdienes@apple.com>
 234
 235         * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
 236         fields.
 237         (h8_opcodes). Modify initializer and initializer macros to no
 238         longer initialize the removed fields.
 239
 240 2002-11-19  Svein E. Seldal  <Svein.Seldal@solidas.com>
 241
 242         * tic4x.h (c4x_insts): Fixed LDHI constraint
 243
 244 2002-11-18  Klee Dienes  <kdienes@apple.com>
 245
 246         * h8300.h (h8_opcode): Remove 'length' field.
 247         (h8_opcodes): Mark as 'const' (both the declaration and
 248         definition).  Modify initializer and initializer macros to no
 249         longer initialize the length field.
 250
 251 2002-11-18  Klee Dienes  <kdienes@apple.com>
 252
 253         * arc.h (arc_ext_opcodes): Declare as extern.
 254         (arc_ext_operands): Declare as extern.
 255         * i860.h (i860_opcodes): Declare as const.
 256
 257 2002-11-18  Svein E. Seldal  <Svein.Seldal@solidas.com>
 258
 259         * tic4x.h: File reordering. Added enhanced opcodes.
 260
 261 2002-11-16  Svein E. Seldal  <Svein.Seldal@solidas.com>
 262
 263         * tic4x.h: Major rewrite of entire file. Define instruction
 264           classes, and put each instruction into a class.
 265
 266 2002-11-11  Svein E. Seldal  <Svein.Seldal@solidas.com>
 267
 268         * tic4x.h: Added new opcodes and corrected some bugs.  Add support
 269         for new DSP types.
 270
 271 2002-10-14  Alan Modra  <amodra@bigpond.net.au>
 272
 273         * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
 274
 275 2002-09-30  Gavin Romig-Koch  <gavin@redhat.com>
 276             Ken Raeburn  <raeburn@cygnus.com>
 277             Aldy Hernandez  <aldyh@redhat.com>
 278             Eric Christopher  <echristo@redhat.com>
 279             Richard Sandiford  <rsandifo@redhat.com>
 280
 281         * mips.h: Update comment for new opcodes.
 282         (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
 283         (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
 284         (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
 285         (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
 286         (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
 287         Don't match CPU_R4111 with INSN_4100.
 288
 289 2002-08-19  Elena Zannoni <ezannoni@redhat.com>
 290
 291         From matthew green  <mrg@redhat.com>
 292
 293         * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
 294         instructions.
 295         (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
 296         PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
 297         e500x2 Integer select, branch locking, performance monitor,
 298         cache locking and machine check APUs, respectively.
 299         (PPC_OPCODE_EFS): New opcode type for efs* instructions.
 300         (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
 301
 302 2002-08-13  Stephane Carrez  <stcarrez@nerim.fr>
 303
 304         * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
 305         (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
 306         M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
 307         memory banks.
 308         (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
 309
 310 2002-07-09  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
 311
 312         * mips.h (INSN_MIPS16): New define.
 313
 314 2002-07-08  Alan Modra  <amodra@bigpond.net.au>
 315
 316         * i386.h: Remove IgnoreSize from movsx and movzx.
 317
 318 2002-06-08  Alan Modra  <amodra@bigpond.net.au>
 319
 320         * a29k.h: Replace CONST with const.
 321         (CONST): Don't define.
 322         * convex.h: Replace CONST with const.
 323         (CONST): Don't define.
 324         * dlx.h: Replace CONST with const.
 325         * or32.h (CONST): Don't define.
 326
 327 2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>
 328
 329         * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
 330         (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
 331         (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
 332         (INSN_MDMX): New constants, for MDMX support.
 333         (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
 334
 335 2002-05-28  Kuang Hwa Lin <kuang@sbcglobal.net>
 336
 337         * dlx.h: New file.
 338
 339 2002-05-25  Alan Modra  <amodra@bigpond.net.au>
 340
 341         * ia64.h: Use #include "" instead of <> for local header files.
 342         * sparc.h: Likewise.
 343
 344 2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
 345
 346         * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
 347
 348 2002-05-17  Andrey Volkov  <avolkov@sources.redhat.com>
 349
 350         * h8300.h: Corrected defs of all control regs
 351         and eepmov instr.
 352
 353 2002-04-11  Alan Modra  <amodra@bigpond.net.au>
 354
 355         * i386.h: Add intel mode cmpsd and movsd.
 356         Put them before SSE2 insns, so that rep prefix works.
 357
 358 2002-03-15  Chris G. Demetriou  <cgd@broadcom.com>
 359
 360         * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
 361         instructions.
 362         (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
 363         may be passed along with the ISA bitmask.
 364
 365 2002-03-05  Paul Koning  <pkoning@equallogic.com>
 366
 367         * pdp11.h: Add format codes for float instruction formats.
 368
 369 2002-02-25  Alan Modra  <amodra@bigpond.net.au>
 370
 371         * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
 372
 373 Mon Feb 18 17:31:48 CET 2002  Jan Hubicka  <jh@suse.cz>
 374
 375         * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
 376
 377 Mon Feb 11 12:53:19 CET 2002  Jan Hubicka  <jh@suse.cz>
 378
 379         * i386.h (push,pop): Allow 16bit operands in 64bit mode.
 380         (xchg): Fix.
 381         (in, out): Disable 64bit operands.
 382         (call, jmp): Avoid REX prefixes.
 383         (jcxz): Prohibit in 64bit mode
 384         (jrcxz, loop): Add 64bit variants.
 385         (movq): Fix patterns.
 386         (movmskps, pextrw, pinstrw): Add 64bit variants.
 387
 388 2002-01-31  Ivan Guzvinec  <ivang@opencores.org>
 389
 390         * or32.h: New file.
 391
 392 2002-01-22  Graydon Hoare  <graydon@redhat.com>
 393
 394         * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
 395         (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
 396
 397 2002-01-21  Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
 398
 399         * h8300.h: Comment typo fix.
 400
 401 2002-01-03  matthew green  <mrg@redhat.com>
 402
 403         * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
 404         (PPC_OPCODE_BOOKE64): Likewise.
 405
 406 Mon Dec 31 16:45:41 2001  Jeffrey A Law  (law@cygnus.com)
 407
 408         * hppa.h (call, ret): Move to end of table.
 409         (addb, addib): PA2.0 variants should have been PA2.0W.
 410         (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
 411         happy.
 412         (fldw, fldd, fstw, fstd, bb): Likewise.
 413         (short loads/stores): Tweak format specifier slightly to keep
 414         disassembler happy.
 415         (indexed loads/stores): Likewise.
 416         (absolute loads/stores): Likewise.
 417
 418 2001-12-04  Alexandre Oliva  <aoliva@redhat.com>
 419
 420         * d10v.h (OPERAND_NOSP): New macro.
 421
 422 2001-11-29  Alexandre Oliva  <aoliva@redhat.com>
 423
 424         * d10v.h (OPERAND_SP): New macro.
 425
 426 2001-11-15  Alan Modra  <amodra@bigpond.net.au>
 427
 428         * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
 429
 430 2001-11-11  Timothy Wall  <twall@alum.mit.edu>
 431
 432         * tic54x.h: Revise opcode layout; don't really need a separate
 433         structure for parallel opcodes.
 434
 435 2001-11-13  Zack Weinberg <zack@codesourcery.com>
 436             Alan Modra  <amodra@bigpond.net.au>
 437
 438         * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
 439         accept WordReg.
 440
 441 2001-11-04  Chris Demetriou  <cgd@broadcom.com>
 442
 443         * mips.h (OPCODE_IS_MEMBER): Remove extra space.
 444
 445 2001-10-30  Hans-Peter Nilsson  <hp@bitrange.com>
 446
 447         * mmix.h: New file.
 448
 449 2001-10-18  Chris Demetriou  <cgd@broadcom.com>
 450
 451         * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
 452         of the expression, to make source code merging easier.
 453
 454 2001-10-17  Chris Demetriou  <cgd@broadcom.com>
 455
 456         * mips.h: Sort coprocessor instruction argument characters
 457         in comment, add a few more words of description for "H".
 458
 459 2001-10-17  Chris Demetriou  <cgd@broadcom.com>
 460
 461         * mips.h (INSN_SB1): New cpu-specific instruction bit.
 462         (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
 463         if cpu is CPU_SB1.
 464
 465 2001-10-17  matthew green  <mrg@redhat.com>
 466
 467         * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
 468
 469 2001-10-12  matthew green  <mrg@redhat.com>
 470
 471         * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
 472         opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
 473         instructions, respectively.
 474
 475 2001-09-27  Nick Clifton  <nickc@cambridge.redhat.com>
 476
 477         * v850.h: Remove spurious comment.
 478
 479 2001-09-21  Nick Clifton  <nickc@cambridge.redhat.com>
 480
 481         * h8300.h: Fix compile time warning messages
 482
 483 2001-09-04  Richard Henderson  <rth@redhat.com>
 484
 485         * alpha.h (struct alpha_operand): Pack elements into bitfields.
 486
 487 2001-08-31  Eric Christopher  <echristo@redhat.com>
 488
 489         * mips.h: Remove CPU_MIPS32_4K.
 490
 491 2001-08-27  Torbjorn Granlund  <tege@swox.com>
 492
 493         * ppc.h (PPC_OPERAND_DS): Define.
 494
 495 2001-08-25  Andreas Jaeger  <aj@suse.de>
 496
 497         * d30v.h: Fix declaration of reg_name_cnt.
 498
 499         * d10v.h: Fix declaration of d10v_reg_name_cnt.
 500
 501         * arc.h: Add prototypes from opcodes/arc-opc.c.
 502
 503 2001-08-16  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
 504
 505         * mips.h (INSN_10000): Define.
 506         (OPCODE_IS_MEMBER): Check for INSN_10000.
 507
 508 2001-08-10  Alan Modra  <amodra@one.net.au>
 509
 510         * ppc.h: Revert 2001-08-08.
 511
 512 2001-08-10  Richard Sandiford  <rsandifo@redhat.com>
 513
 514         * mips.h (INSN_GP32): Remove.
 515         (OPCODE_IS_MEMBER): Remove gp32 parameter.
 516         (M_MOVE): New macro identifier.
 517
 518 2001-08-08  Alan Modra  <amodra@one.net.au>
 519
 520         1999-10-25  Torbjorn Granlund  <tege@swox.com>
 521         * ppc.h (struct powerpc_operand): New field `reloc'.
 522
 523 2001-08-01  Aldy Hernandez  <aldyh@redhat.com>
 524
 525         * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
 526
 527 2001-07-12  Jeff Johnston  <jjohnstn@redhat.com>
 528
 529         * cgen.h (CGEN_INSN): Add regex support.
 530         (build_insn_regex): Declare.
 531
 532 2001-07-11  Frank Ch. Eigler  <fche@redhat.com>
 533
 534         * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
 535         (cgen_cpu_desc): Ditto.
 536
 537 2001-07-07  Ben Elliston  <bje@redhat.com>
 538
 539         * m88k.h: Clean up and reformat. Remove unused code.
 540
 541 2001-06-14  Geoffrey Keating  <geoffk@redhat.com>
 542
 543         * cgen.h (cgen_keyword): Add nonalpha_chars field.
 544
 545 2001-05-23  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
 546
 547         * mips.h (CPU_R12000): Define.
 548
 549 2001-05-23  John Healy  <jhealy@redhat.com>
 550
 551         * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
 552
 553 2001-05-15  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
 554
 555         * mips.h (INSN_ISA_MASK): Define.
 556
 557 2001-05-12  Alan Modra  <amodra@one.net.au>
 558
 559         * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
 560         not an mmx reg.  Swap xmm/mmx regs on both movdq2q and movq2dq,
 561         and use InvMem as these insns must have register operands.
 562
 563 2001-05-04  Alan Modra  <amodra@one.net.au>
 564
 565         * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
 566         and pextrw to swap reg/rm assignments.
 567
 568 2001-04-05  Hans-Peter Nilsson  <hp@axis.com>
 569
 570         * cris.h (enum cris_insn_version_usage): Correct comment for
 571         cris_ver_v3p.
 572
 573 2001-03-24  Alan Modra  <alan@linuxcare.com.au>
 574
 575         * i386.h (i386_optab): Correct entry for "movntdq".  Add "punpcklqdq".
 576         Add InvMem to first operand of "maskmovdqu".
 577
 578 2001-03-22  Hans-Peter Nilsson  <hp@axis.com>
 579
 580         * cris.h (ADD_PC_INCR_OPCODE): New macro.
 581
 582 2001-03-21  Kazu Hirata  <kazu@hxi.com>
 583
 584         * h8300.h: Fix formatting.
 585
 586 2001-03-22  Alan Modra  <alan@linuxcare.com.au>
 587
 588         * i386.h (i386_optab): Add paddq, psubq.
 589
 590 2001-03-19  Alan Modra  <alan@linuxcare.com.au>
 591
 592         * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
 593
 594 2001-02-28  Igor Shevlyakov  <igor@windriver.com>
 595
 596         * m68k.h: new defines for Coldfire V4. Update mcf to know
 597         about mcf5407.
 598
 599 2001-02-18  lars brinkhoff  <lars@nocrew.org>
 600
 601         * pdp11.h: New file.
 602
 603 2001-02-12  Jan Hubicka  <jh@suse.cz>
 604
 605         * i386.h (i386_optab): SSE integer converison instructions have
 606         64bit versions on x86-64.
 607
 608 2001-02-10  Nick Clifton  <nickc@redhat.com>
 609
 610         * mips.h: Remove extraneous whitespace.  Formating change to allow
 611         for future contribution.
 612
 613 2001-02-09  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 614
 615         * s390.h: New file.
 616
 617 2001-02-02  Patrick Macdonald  <patrickm@redhat.com>
 618
 619         * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
 620         (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
 621         (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
 622
 623 2001-01-24  Karsten Keil  <kkeil@suse.de>
 624
 625         * i386.h (i386_optab): Fix swapgs
 626
 627 2001-01-14  Alan Modra  <alan@linuxcare.com.au>
 628
 629         * hppa.h: Describe new '<' and '>' operand types, and tidy
 630         existing comments.
 631         (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
 632         Remove duplicate "ldw j(s,b),x".  Sort some entries.
 633
 634 2001-01-13  Jan Hubicka  <jh@suse.cz>
 635
 636         * i386.h (i386_optab): Fix pusha and ret templates.
 637
 638 2001-01-11  Peter Targett  <peter.targett@arccores.com>
 639
 640         * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
 641         definitions for masking cpu type.
 642         (arc_ext_operand_value) New structure for storing extended
 643         operands.
 644         (ARC_OPERAND_*) Flags for operand values.
 645
 646 2001-01-10  Jan Hubicka  <jh@suse.cz>
 647
 648         * i386.h (pinsrw): Add.
 649         (pshufw): Remove.
 650         (cvttpd2dq): Fix operands.
 651         (cvttps2dq): Likewise.
 652         (movq2q): Rename to movdq2q.
 653
 654 2001-01-10  Richard Schaal  <richard.schaal@intel.com>
 655
 656         * i386.h: Correct movnti instruction.
 657
 658 2001-01-09  Jeff Johnston  <jjohnstn@redhat.com>
 659
 660         * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
 661         of operands (unsigned char or unsigned short).
 662         (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
 663         (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
 664
 665 2001-01-05  Jan Hubicka  <jh@suse.cz>
 666
 667         * i386.h (i386_optab): Make [sml]fence template to use immext field.
 668
 669 2001-01-03  Jan Hubicka  <jh@suse.cz>
 670
 671         * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
 672         introduced by Pentium4
 673
 674 2000-12-30  Jan Hubicka  <jh@suse.cz>
 675
 676         * i386.h (i386_optab): Add "rex*" instructions;
 677         add swapgs; disable jmp/call far direct instructions for
 678         64bit mode; add syscall and sysret; disable registers for 0xc6
 679         template.  Add 'q' suffixes to extendable instructions, disable
 680         obsolete instructions, add new sign/zero extension ones.
 681         (i386_regtab): Add extended registers.
 682         (*Suf): Add No_qSuf.
 683         (q_Suf, wlq_Suf, bwlq_Suf): New.
 684
 685 2000-12-20  Jan Hubicka  <jh@suse.cz>
 686
 687         * i386.h (i386_optab): Replace "Imm" with "EncImm".
 688         (i386_regtab): Add flags field.
 689
 690 2000-12-12  Nick Clifton  <nickc@redhat.com>
 691
 692         * mips.h: Fix formatting.
 693
 694 2000-12-01  Chris Demetriou  <cgd@sibyte.com>
 695
 696         mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
 697         (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
 698         OP_*_SYSCALL definitions.
 699         (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
 700         19 bit wait codes.
 701         (MIPS operand specifier comments): Remove 'm', add 'U' and
 702         'J', and update the meaning of 'B' so that it's more general.
 703
 704         * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
 705         INSN_ISA5): Renumber, redefine to mean the ISA at which the
 706         instruction was added.
 707         (INSN_ISA32): New constant.
 708         (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
 709         Renumber to avoid new and/or renumbered INSN_* constants.
 710         (INSN_MIPS32): Delete.
 711         (ISA_UNKNOWN): New constant to indicate unknown ISA.
 712         (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
 713         ISA_MIPS32): New constants, defined to be the mask of INSN_*
 714         constants available at that ISA level.
 715         (CPU_UNKNOWN): New constant to indicate unknown CPU.
 716         (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
 717         define it with a unique value.
 718         (OPCODE_IS_MEMBER): Update for new ISA membership-related
 719         constant meanings.
 720
 721         * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
 722         definitions.
 723
 724         * mips.h (CPU_SB1): New constant.
 725
 726 2000-10-20  Jakub Jelinek  <jakub@redhat.com>
 727
 728         * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
 729         Note that '3' is used for siam operand.
 730
 731 2000-09-22  Jim Wilson  <wilson@cygnus.com>
 732
 733         * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
 734
 735 2000-09-13  Anders Norlander  <anorland@acc.umu.se>
 736
 737         * mips.h: Use defines instead of hard-coded processor numbers.
 738         (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
 739         CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
 740         CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
 741         CPU_4KC, CPU_4KM, CPU_4KP): Define..
 742         (OPCODE_IS_MEMBER): Use new defines.
 743         (OP_MASK_SEL, OP_SH_SEL): Define.
 744         (OP_MASK_CODE20, OP_SH_CODE20): Define.
 745         Add 'P' to used characters.
 746         Use 'H' for coprocessor select field.
 747         Use 'm' for 20 bit breakpoint code.
 748         Document new arg characters and add to used characters.
 749         (INSN_MIPS32): New define for MIPS32 extensions.
 750         (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
 751
 752 2000-09-05  Alan Modra  <alan@linuxcare.com.au>
 753
 754         * hppa.h: Mention cz completer.
 755
 756 2000-08-16  Jim Wilson  <wilson@cygnus.com>
 757
 758         * ia64.h (IA64_OPCODE_POSTINC): New.
 759
 760 2000-08-15  H.J. Lu  <hjl@gnu.org>
 761
 762         * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
 763         IgnoreSize change.
 764
 765 2000-08-08  Jason Eckhardt  <jle@cygnus.com>
 766
 767         * i860.h: Small formatting adjustments.
 768
 769 2000-07-29  Marek Michalkiewicz  <marekm@linux.org.pl>
 770
 771         * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
 772         Move related opcodes closer to each other.
 773         Minor changes in comments, list undefined opcodes.
 774
 775 2000-07-26  Dave Brolley  <brolley@redhat.com>
 776
 777         * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
 778
 779 2000-07-22  Jason Eckhardt  <jle@cygnus.com>
 780
 781         * i860.h (btne, bte, bla): Changed these opcodes
 782         to use sbroff ('r') instead of split16 ('s').
 783         (J, K, L, M): New operand types for 16-bit aligned fields.
 784         (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
 785         use I, J, K, L, M instead of just I.
 786         (T, U): New operand types for split 16-bit aligned fields.
 787         (st.x): Changed these opcodes to use S, T, U instead of just S.
 788         (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
 789         exist on the i860.
 790         (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
 791         (pfeq.ss, pfeq.dd): New opcodes.
 792         (st.s): Fixed incorrect mask bits.
 793         (fmlow): Fixed incorrect mask bits.
 794         (fzchkl, pfzchkl): Fixed incorrect mask bits.
 795         (faddz, pfaddz): Fixed incorrect mask bits.
 796         (form, pform): Fixed incorrect mask bits.
 797         (pfld.l): Fixed incorrect mask bits.
 798         (fst.q): Fixed incorrect mask bits.
 799         (all floating point opcodes): Fixed incorrect mask bits for
 800         handling of dual bit.
 801
 802 2000-07-20  Hans-Peter Nilsson  <hp@axis.com>
 803
 804         cris.h: New file.
 805
 806 2000-06-26  Marek Michalkiewicz  <marekm@linux.org.pl>
 807
 808         * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
 809         (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
 810         (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
 811         (AVR_ISA_M83): Define for ATmega83, ATmega85.
 812         (espm): Remove, because ESPM removed in databook update.
 813         (eicall, eijmp): Move to the end of opcode table.
 814
 815 2000-06-18  Stephane Carrez  <stcarrez@worldnet.fr>
 816
 817         * m68hc11.h: New file for support of Motorola 68hc11.
 818
 819 Fri Jun  9 21:51:50 2000  Denis Chertykov  <denisc@overta.ru>
 820
 821         * avr.h: clr,lsl,rol, ... moved after add,adc, ...
 822
 823 Wed Jun  7 21:39:54 2000  Denis Chertykov  <denisc@overta.ru>
 824
 825         * avr.h: New file with AVR opcodes.
 826
 827 Wed Apr 12 17:11:20 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
 828
 829         * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
 830
 831 2000-05-23  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 832
 833         * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
 834
 835 2000-05-17  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 836
 837         * i386.h: Use sl_FP, not sl_Suf for fild.
 838
 839 2000-05-16  Frank Ch. Eigler  <fche@redhat.com>
 840
 841         * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32.  Check that
 842         it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
 843         (CGEN_MAX_IFMT_OPERANDS): Increase to 16.  Check that it exceeds
 844         CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
 845
 846 2000-05-13  Alan Modra  <alan@linuxcare.com.au>,
 847
 848         * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
 849
 850 2000-05-13  Alan Modra  <alan@linuxcare.com.au>,
 851             Alexander Sokolov <robocop@netlink.ru>
 852
 853         * i386.h (i386_optab): Add cpu_flags for all instructions.
 854
 855 2000-05-13  Alan Modra  <alan@linuxcare.com.au>
 856
 857         From Gavin Romig-Koch <gavin@cygnus.com>
 858         * i386.h (wld_Suf): Define.  Use on pushf, popf, pusha, popa.
 859
 860 2000-05-04  Timothy Wall  <twall@cygnus.com>
 861
 862         * tic54x.h: New.
 863
 864 2000-05-03  J.T. Conklin  <jtc@redback.com>
 865
 866         * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
 867         (PPC_OPERAND_VR): New operand flag for vector registers.
 868
 869 2000-05-01  Kazu Hirata  <kazu@hxi.com>
 870
 871         * h8300.h (EOP): Add missing initializer.
 872
 873 Fri Apr 21 15:03:37 2000  Jason Eckhardt  <jle@cygnus.com>
 874
 875         * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
 876         forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
 877         New operand types l,y,&,fe,fE,fx added to support above forms.
 878         (pa_opcodes): Replaced usage of 'x' as source/target for
 879         floating point double-word loads/stores with 'fx'.
 880
 881 Fri Apr 21 13:20:53 2000  Richard Henderson  <rth@cygnus.com>
 882                           David Mosberger  <davidm@hpl.hp.com>
 883                           Timothy Wall <twall@cygnus.com>
 884                           Jim Wilson  <wilson@cygnus.com>
 885
 886         * ia64.h: New file.
 887
 888 2000-03-27  Nick Clifton  <nickc@cygnus.com>
 889
 890         * d30v.h (SHORT_A1): Fix value.
 891         (SHORT_AR): Renumber so that it is at the end of the list of short
 892         instructions, not the end of the list of long instructions.
 893
 894 2000-03-26  Alan Modra  <alan@linuxcare.com>
 895
 896         * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
 897         problem isn't really specific to Unixware.
 898         (OLDGCC_COMPAT): Define.
 899         (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
 900         destination %st(0).
 901         Fix lots of comments.
 902
 903 2000-03-02  J"orn Rennecke <amylaar@cygnus.co.uk>
 904
 905         * d30v.h:
 906         (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
 907         (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
 908         (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
 909         (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
 910         (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
 911         (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
 912         (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
 913
 914 2000-02-25  Alan Modra  <alan@spri.levels.unisa.edu.au>
 915
 916         * i386.h (fild, fistp): Change intel d_Suf form to fildd and
 917         fistpd without suffix.
 918
 919 2000-02-24  Nick Clifton  <nickc@cygnus.com>
 920
 921         * cgen.h (cgen_cpu_desc): Rename field 'flags' to
 922         'signed_overflow_ok_p'.
 923         Delete prototypes for cgen_set_flags() and cgen_get_flags().
 924
 925 2000-02-24  Andrew Haley  <aph@cygnus.com>
 926
 927         * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
 928         (CGEN_CPU_TABLE): flags: new field.
 929         Add prototypes for new functions.
 930
 931 2000-02-24  Alan Modra  <alan@spri.levels.unisa.edu.au>
 932
 933         * i386.h: Add some more UNIXWARE_COMPAT comments.
 934
 935 2000-02-23  Linas Vepstas <linas@linas.org>
 936
 937         * i370.h: New file.
 938
 939 2000-02-22  Chandra Chavva  <cchavva@cygnus.com>
 940
 941         * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
 942         cannot be combined in parallel with ADD/SUBppp.
 943
 944 2000-02-22  Andrew Haley  <aph@cygnus.com>
 945
 946         * mips.h: (OPCODE_IS_MEMBER): Add comment.
 947
 948 1999-12-30  Andrew Haley  <aph@cygnus.com>
 949
 950         * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
 951         whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
 952         insns.
 953
 954 2000-01-15  Alan Modra  <alan@spri.levels.unisa.edu.au>
 955
 956         * i386.h: Qualify intel mode far call and jmp with x_Suf.
 957
 958 1999-12-27  Alan Modra  <alan@spri.levels.unisa.edu.au>
 959
 960         * i386.h: Add JumpAbsolute qualifier to all non-intel mode
 961         indirect jumps and calls.  Add FF/3 call for intel mode.
 962
 963 Wed Dec  1 03:05:25 1999  Jeffrey A Law  (law@cygnus.com)
 964
 965         * mn10300.h: Add new operand types.  Add new instruction formats.
 966
 967 Wed Nov 24 20:28:58 1999  Jeffrey A Law  (law@cygnus.com)
 968
 969         * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
 970         instruction.
 971
 972 1999-11-18  Gavin Romig-Koch  <gavin@cygnus.com>
 973
 974         * mips.h (INSN_ISA5): New.
 975
 976 1999-11-01  Gavin Romig-Koch  <gavin@cygnus.com>
 977
 978         * mips.h (OPCODE_IS_MEMBER): New.
 979
 980 1999-10-29  Nick Clifton  <nickc@cygnus.com>
 981
 982         * d30v.h (SHORT_AR): Define.
 983
 984 1999-10-18  Michael Meissner  <meissner@cygnus.com>
 985
 986         * alpha.h (alpha_num_opcodes): Convert to unsigned.
 987         (alpha_num_operands): Ditto.
 988
 989 Sun Oct 10 01:46:56 1999  Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
 990
 991         * hppa.h (pa_opcodes): Add load and store cache control to
 992         instructions.  Add ordered access load and store.
 993
 994         * hppa.h (pa_opcode): Add new entries for addb and addib.
 995
 996         * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
 997
 998         * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
 999
1000 Thu Oct  7 00:12:25 MDT 1999    Diego Novillo <dnovillo@cygnus.com>
1001
1002         * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
1003
1004 Thu Sep 23 07:08:38 1999  Jerry Quinn <jquinn@nortelnetworks.com>
1005
1006         * hppa.h (pa_opcodes): Add "call" and "ret".  Clean up "b", "bve"
1007         and "be" using completer prefixes.
1008
1009         * hppa.h (pa_opcodes): Add initializers to silence compiler.
1010
1011         * hppa.h: Update comments about character usage.
1012
1013 Mon Sep 20 03:55:31 1999  Jeffrey A Law  (law@cygnus.com)
1014
1015         * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
1016         up the new fstw & bve instructions.
1017
1018 Sun Sep 19 10:40:59 1999  Jeffrey A Law  (law@cygnus.com)
1019
1020         * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
1021         instructions.
1022
1023         * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
1024
1025         * hppa.h (pa_opcodes): Add long offset double word load/store
1026         instructions.
1027
1028         * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
1029         stores.
1030
1031         * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
1032
1033         * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
1034
1035         * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
1036
1037         * hppa.h (pa_opcodes): Add new syntax "be" instructions.
1038
1039         * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
1040
1041         * hppa.h (pa_opcodes): Add support for "b,l".
1042
1043         * hppa.h (pa_opcodes): Add support for "b,gate".
1044
1045 Sat Sep 18 11:41:16 1999  Jeffrey A Law  (law@cygnus.com)
1046
1047         * hppa.h (pa_opcodes): Use 'fX' for first register operand
1048         in xmpyu.
1049
1050         * hppa.h (pa_opcodes): Fix mask for probe and probei.
1051
1052         * hppa.h (pa_opcodes): Fix mask for depwi.
1053
1054 Tue Sep  7 13:44:25 1999  Jeffrey A Law  (law@cygnus.com)
1055
1056         * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
1057         an explicit output argument.
1058
1059 Mon Sep  6 04:41:42 1999  Jeffrey A Law  (law@cygnus.com)
1060
1061         * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
1062         Add a few PA2.0 loads and store variants.
1063
1064 1999-09-04  Steve Chamberlain  <sac@pobox.com>
1065
1066         * pj.h: New file.
1067
1068 1999-08-29  Alan Modra  <alan@spri.levels.unisa.edu.au>
1069
1070         * i386.h (i386_regtab): Move %st to top of table, and split off
1071         other fp reg entries.
1072         (i386_float_regtab): To here.
1073
1074 Sat Aug 28 00:25:25 1999  Jerry Quinn <jquinn@nortelnetworks.com>
1075
1076         * hppa.h (pa_opcodes): Replace 'f' by 'v'.  Prefix float register args
1077         by 'f'.
1078
1079         * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
1080         Add supporting args.
1081
1082         * hppa.h: Document new completers and args.
1083         * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
1084         uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe.  Add pa2.0
1085         extensions for ssm, rsm, pdtlb, pitlb.  Add performance instructions
1086         pmenb and pmdis.
1087
1088         * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
1089         hshr, hsub, mixh, mixw, permh.
1090
1091         * hppa.h (pa_opcodes): Change completers in instructions to
1092         use 'c' prefix.
1093
1094         * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
1095         hshladd, hshradd, shrpd, and shrpw instructions.  Update arg comments.
1096
1097         * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
1098         fnegabs to use 'I' instead of 'F'.
1099
1100 1999-08-21  Alan Modra  <alan@spri.levels.unisa.edu.au>
1101
1102         * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
1103         Document pf2iw and pi2fw as athlon insns.  Remove pswapw.
1104         Alphabetically sort PIII insns.
1105
1106 Wed Aug 18 18:14:40 1999  Doug Evans  <devans@canuck.cygnus.com>
1107
1108         * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
1109
1110 Fri Aug  6 09:46:35 1999  Jerry Quinn <jquinn@nortelnetworks.com>
1111
1112         * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
1113         and andcm.  Add 32 and 64 bit version of cmpclr, cmpiclr.
1114
1115         * hppa.h: Document 64 bit condition completers.
1116
1117 Thu Aug  5 16:56:07 1999  Jerry Quinn <jquinn@nortelnetworks.com>
1118
1119         * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
1120
1121 1999-08-04  Alan Modra  <alan@spri.levels.unisa.edu.au>
1122
1123         * i386.h (i386_optab): Add DefaultSize modifier to all insns
1124         that implicitly modify %esp.  #undef d_Suf, x_suf, sld_suf,
1125         sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
1126
1127 Wed Jul 28 02:04:24 1999  Jerry Quinn <jquinn@nortelnetworks.com>
1128                           Jeff Law <law@cygnus.com>
1129
1130         * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
1131
1132         * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
1133
1134         * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
1135         and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
1136
1137 1999-07-13  Alan Modra  <alan@spri.levels.unisa.edu.au>
1138
1139         * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
1140
1141 Thu Jul  1 00:17:24 1999  Jeffrey A Law  (law@cygnus.com)
1142
1143         * hppa.h (struct pa_opcode): Add new field "flags".
1144         (FLAGS_STRICT): Define.
1145
1146 Fri Jun 25 04:22:04 1999  Jerry Quinn <jquinn@nortelnetworks.com>
1147                           Jeff Law <law@cygnus.com>
1148
1149         * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
1150
1151         * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
1152
1153 1999-06-23  Alan Modra  <alan@spri.levels.unisa.edu.au>
1154
1155         * i386.h: Allow `l' suffix on bswap.  Allow `w' suffix on arpl,
1156         lldt, lmsw, ltr, str, verr, verw.  Add FP flag to fcmov*.  Add FP
1157         flag to fcomi and friends.
1158
1159 Fri May 28 15:26:11 1999  Jeffrey A Law  (law@cygnus.com)
1160
1161         * hppa.h (pa_opcodes): Move integer arithmetic instructions after
1162         integer logical instructions.
1163
1164 1999-05-28  Linus Nordberg  <linus.nordberg@canit.se>
1165
1166         * m68k.h: Document new formats `E', `G', `H' and new places `N',
1167         `n', `o'.
1168
1169         * m68k.h: Define mcf5206e, mcf5307, mcf.  Document new format `u'
1170         and new places `m', `M', `h'.
1171
1172 Thu May 27 04:13:54 1999  Joel Sherrill (joel@OARcorp.com
1173
1174         * hppa.h (pa_opcodes): Add several processor specific system
1175         instructions.
1176
1177 Wed May 26 16:57:44 1999  Jeffrey A Law  (law@cygnus.com)
1178
1179         * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
1180         "addb", and "addib" to be used by the disassembler.
1181
1182 1999-05-12  Alan Modra  <alan@apri.levels.unisa.edu.au>
1183
1184         * i386.h (ReverseModrm): Remove all occurences.
1185         (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1186         movmskps, pextrw, pmovmskb, maskmovq.
1187         Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1188         ignore the data size prefix.
1189
1190         * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1191         Mostly stolen from Doug Ledford <dledford@redhat.com>
1192
1193 Sat May  8 23:27:35 1999  Richard Henderson  <rth@cygnus.com>
1194
1195         * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1196
1197 1999-04-14  Doug Evans  <devans@casey.cygnus.com>
1198
1199         * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1200         (CGEN_ATTR_TYPE): Update.
1201         (CGEN_ATTR_MASK): Number booleans starting at 0.
1202         (CGEN_ATTR_VALUE): Update.
1203         (CGEN_INSN_ATTR): Update.
1204
1205 Mon Apr 12 23:43:27 1999  Jeffrey A Law  (law@cygnus.com)
1206
1207         * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1208         instructions.
1209
1210 Tue Mar 23 11:24:38 1999  Jeffrey A Law  (law@cygnus.com)
1211
1212         * hppa.h (bb, bvb): Tweak opcode/mask.
1213
1214
1215 1999-03-22  Doug Evans  <devans@casey.cygnus.com>
1216
1217         * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1218         (struct cgen_cpu_desc): Rename member mach to machs.  New member isas.
1219         New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1220         min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1221         Delete member max_insn_size.
1222         (enum cgen_cpu_open_arg): New enum.
1223         (cpu_open): Update prototype.
1224         (cpu_open_1): Declare.
1225         (cgen_set_cpu): Delete.
1226
1227 1999-03-11  Doug Evans  <devans@casey.cygnus.com>
1228
1229         * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1230         (CGEN_OPERAND_NIL): New macro.
1231         (CGEN_OPERAND): New member `type'.
1232         (@arch@_cgen_operand_table): Delete decl.
1233         (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1234         (CGEN_OPERAND_TABLE): New struct.
1235         (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1236         (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1237         (CGEN_CPU_TABLE): New member `isa'.  Change member `operand_table',
1238         now a CGEN_OPERAND_TABLE.  Add CGEN_CPU_DESC arg to
1239         {get,set}_{int,vma}_operand.
1240         (@arch@_cgen_cpu_open): New arg `isa'.
1241         (cgen_set_cpu): Ditto.
1242
1243 Fri Feb 26 02:36:45 1999  Richard Henderson  <rth@cygnus.com>
1244
1245         * i386.h: Fill in cmov and fcmov alternates.  Add fcomi short forms.
1246
1247 1999-02-25  Doug Evans  <devans@casey.cygnus.com>
1248
1249         * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1250         (CGEN_HW_ENTRY): Delete member `next'.  Change type of `type' to
1251         enum cgen_hw_type.
1252         (CGEN_HW_TABLE): New struct.
1253         (hw_table): Delete declaration.
1254         (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1255         to table entry to enum.
1256         (CGEN_OPINST): Ditto.
1257         (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1258
1259 Sat Feb 13 14:13:44 1999  Richard Henderson  <rth@cygnus.com>
1260
1261         * alpha.h (AXP_OPCODE_EV6): New.
1262         (AXP_OPCODE_NOPAL): Include it.
1263
1264 1999-02-09  Doug Evans  <devans@casey.cygnus.com>
1265
1266         * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1267         All uses updated.  New members int_insn_p, max_insn_size,
1268         parse_operand,insert_operand,extract_operand,print_operand,
1269         sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1270         get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1271         extract_handlers,print_handlers.
1272         (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1273         (CGEN_ATTR_BOOL_OFFSET): New macro.
1274         (CGEN_ATTR_MASK): Subtract it to compute bit number.
1275         (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1276         (cgen_opcode_handler): Renamed from cgen_base.
1277         (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1278         (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1279         all uses updated.
1280         (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1281         (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1282         (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1283         (CGEN_OPCODE,CGEN_IBASE): New types.
1284         (CGEN_INSN): Rewrite.
1285         (CGEN_{ASM,DIS}_HASH*): Delete.
1286         (init_opcode_table,init_ibld_table): Declare.
1287         (CGEN_INSN_ATTR): New type.
1288
1289 Mon Feb  1 21:09:14 1999  Catherine Moore  <clm@cygnus.com>
1290
1291         * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1292         (x_FP, d_FP, dls_FP, sldx_FP): Define.
1293         Change *Suf definitions to include x and d suffixes.
1294         (movsx): Use w_Suf and b_Suf.
1295         (movzx): Likewise.
1296         (movs): Use bwld_Suf.
1297         (fld): Change ordering.  Use sld_FP.
1298         (fild): Add Intel Syntax equivalent of fildq.
1299         (fst): Use sld_FP.
1300         (fist): Use sld_FP.
1301         (fstp): Use sld_FP.  Add x_FP version.
1302         (fistp): LLongMem version for Intel Syntax.
1303         (fcom, fcomp): Use sld_FP.
1304         (fadd, fiadd, fsub): Use sld_FP.
1305         (fsubr): Use sld_FP.
1306         (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1307
1308 1999-01-27  Doug Evans  <devans@casey.cygnus.com>
1309
1310         * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1311         CGEN_MODE_UINT.
1312
1313 1999-01-16  Jeffrey A Law  (law@cygnus.com)
1314
1315         * hppa.h (bv): Fix mask.
1316
1317 1999-01-05  Doug Evans  <devans@casey.cygnus.com>
1318
1319         * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1320         (CGEN_ATTR): Use it.
1321         (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1322         (CGEN_ATTR_TABLE): New member dfault.
1323
1324 1998-12-30  Gavin Romig-Koch  <gavin@cygnus.com>
1325
1326         * mips.h (MIPS16_INSN_BRANCH): New.
1327
1328 Wed Dec  9 10:38:48 1998  David Taylor  <taylor@texas.cygnus.com>
1329
1330         The following is part of a change made by Edith Epstein
1331         <eepstein@sophia.cygnus.com> as part of a project to merge in
1332         changes by HP; HP did not create ChangeLog entries.
1333
1334         * hppa.h (completer_chars): list of chars to not put a space
1335         after.
1336
1337 Sun Dec  6 13:21:34 1998  Ian Lance Taylor  <ian@cygnus.com>
1338
1339         * i386.h (i386_optab): Permit w suffix on processor control and
1340         status word instructions.
1341
1342 1998-11-30  Doug Evans  <devans@casey.cygnus.com>
1343
1344         * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1345         (struct cgen_keyword_entry): Ditto.
1346         (struct cgen_operand): Ditto.
1347         (CGEN_IFLD): New typedef, with associated access macros.
1348         (CGEN_IFMT): New typedef, with associated access macros.
1349         (CGEN_IFMT): Renamed from CGEN_FORMAT.  New member `iflds'.
1350         (CGEN_IVALUE): New typedef.
1351         (struct cgen_insn): Delete const on syntax,attrs members.
1352         `format' now points to format data.  Type of `value' is now
1353         CGEN_IVALUE.
1354         (struct cgen_opcode_table): New member ifld_table.
1355
1356 1998-11-18  Doug Evans  <devans@casey.cygnus.com>
1357
1358         * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1359         (CGEN_OPERAND_INSTANCE): New member `attrs'.
1360         (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1361         (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1362         (cgen_opcode_table): Update type of dis_hash fn.
1363         (extract_operand): Update type of `insn_value' arg.
1364
1365 Thu Oct 29 11:38:36 1998  Doug Evans  <devans@canuck.cygnus.com>
1366
1367         * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1368
1369 Tue Oct 27 08:57:59 1998  Gavin Romig-Koch  <gavin@cygnus.com>
1370
1371         * mips.h (INSN_MULT): Added.
1372
1373 Tue Oct 20 11:31:34 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1374
1375         * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1376
1377 Mon Oct 19 12:50:00 1998  Doug Evans  <devans@seba.cygnus.com>
1378
1379         * cgen.h (CGEN_INSN_INT): New typedef.
1380         (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1381         (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1382         (CGEN_INSN_BYTES_PTR): New typedef.
1383         (CGEN_EXTRACT_INFO): New typedef.
1384         (cgen_insert_fn,cgen_extract_fn): Update.
1385         (cgen_opcode_table): New member `insn_endian'.
1386         (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1387         (insert_operand,extract_operand): Update.
1388         (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1389
1390 Fri Oct  9 13:38:13 1998  Doug Evans  <devans@seba.cygnus.com>
1391
1392         * cgen.h (CGEN_ATTR_BOOLS): New macro.
1393         (struct CGEN_HW_ENTRY): New member `attrs'.
1394         (CGEN_HW_ATTR): New macro.
1395         (struct CGEN_OPERAND_INSTANCE): New member `name'.
1396         (CGEN_INSN_INVALID_P): New macro.
1397
1398 Mon Oct  5 00:21:07 1998  Jeffrey A Law  (law@cygnus.com)
1399
1400         * hppa.h: Add "fid".
1401
1402 Sun Oct  4 21:00:00 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1403
1404         From Robert Andrew Dale <rob@nb.net>
1405         * i386.h (i386_optab): Add AMD 3DNow! instructions.
1406         (AMD_3DNOW_OPCODE): Define.
1407
1408 Tue Sep 22 17:53:47 1998  Nick Clifton  <nickc@cygnus.com>
1409
1410         * d30v.h (EITHER_BUT_PREFER_MU): Define.
1411
1412 Mon Aug 10 14:09:38 1998  Doug Evans  <devans@canuck.cygnus.com>
1413
1414         * cgen.h (cgen_insn): #if 0 out element `cdx'.
1415
1416 Mon Aug  3 12:21:57 1998  Doug Evans  <devans@seba.cygnus.com>
1417
1418         Move all global state data into opcode table struct, and treat
1419         opcode table as something that is "opened/closed".
1420         * cgen.h (CGEN_OPCODE_DESC): New type.
1421         (all fns): New first arg of opcode table descriptor.
1422         (cgen_set_parse_operand_fn): Add prototype.
1423         (cgen_current_machine,cgen_current_endian): Delete.
1424         (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1425         parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1426         dis_hash_table,dis_hash_table_entries.
1427         (opcode_open,opcode_close): Add prototypes.
1428
1429         * cgen.h (cgen_insn): New element `cdx'.
1430
1431 Thu Jul 30 21:44:25 1998  Frank Ch. Eigler  <fche@cygnus.com>
1432
1433         * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1434
1435 Tue Jul 28 10:59:07 1998  Jeffrey A Law  (law@cygnus.com)
1436
1437         * mn10300.h: Add "no_match_operands" field for instructions.
1438         (MN10300_MAX_OPERANDS): Define.
1439
1440 Fri Jul 24 11:44:24 1998  Doug Evans  <devans@canuck.cygnus.com>
1441
1442         * cgen.h (cgen_macro_insn_count): Declare.
1443
1444 Tue Jul 21 13:12:13 1998  Doug Evans  <devans@seba.cygnus.com>
1445
1446         * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1447         (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1448         (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1449         set_{int,vma}_operand.
1450
1451 Fri Jun 26 11:09:06 1998  Jeffrey A Law  (law@cygnus.com)
1452
1453         * mn10300.h: Add "machine" field for instructions.
1454         (MN103, AM30): Define machine types.
1455
1456 Fri Jun 19 16:09:09 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1457
1458         * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1459
1460 1998-06-18  Ulrich Drepper  <drepper@cygnus.com>
1461
1462         * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1463
1464 Sat Jun 13 11:31:35 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1465
1466         * i386.h (i386_optab): Add general form of aad and aam.  Add ud2a
1467         and ud2b.
1468         (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1469         those that happen to be implemented on pentiums.
1470
1471 Tue Jun  9 12:16:01 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1472
1473         * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1474         IgnoreDataSize to IgnoreSize.  Flag address and data size prefixes
1475         with Size16|IgnoreSize or Size32|IgnoreSize.
1476
1477 Mon Jun  8 12:15:52 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1478
1479         * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1480         (REPE): Rename to REPE_PREFIX_OPCODE.
1481         (i386_regtab_end): Remove.
1482         (i386_prefixtab, i386_prefixtab_end): Remove.
1483         (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1484         of md_begin.
1485         (MAX_OPCODE_SIZE): Define.
1486         (i386_optab_end): Remove.
1487         (sl_Suf): Define.
1488         (sl_FP): Use sl_Suf.
1489
1490         * i386.h (i386_optab): Allow 16 bit displacement for `mov
1491         mem,acc'.  Combine 16 and 32 bit forms of various insns.  Allow 16
1492         bit form of ljmp.  Add IsPrefix modifier to prefixes.  Add addr32,
1493         data32, dword, and adword prefixes.
1494         (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1495         regs.
1496
1497 Fri Jun  5 23:42:43 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1498
1499         * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1500
1501         * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1502         register operands, because this is a common idiom.  Flag them with
1503         a warning.  Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1504         fdivrp because gcc erroneously generates them.  Also flag with a
1505         warning.
1506
1507         * i386.h: Add suffix modifiers to most insns, and tighter operand
1508         checks in some cases.  Fix a number of UnixWare compatibility
1509         issues with float insns.  Merge some floating point opcodes, using
1510         new FloatMF modifier.
1511         (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1512         consistency.
1513
1514         * i386.h: Change occurence of ShortformW to W|ShortForm.  Add
1515         IgnoreDataSize where appropriate.
1516
1517 Wed Jun  3 18:28:45 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1518
1519         * i386.h: (one_byte_segment_defaults): Remove.
1520         (two_byte_segment_defaults): Remove.
1521         (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1522
1523 Fri May 15 15:59:04 1998  Doug Evans  <devans@seba.cygnus.com>
1524
1525         * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1526         (cgen_hw_lookup_by_num): Declare.
1527
1528 Thu May  7 09:27:58 1998  Frank Ch. Eigler  <fche@cygnus.com>
1529
1530         * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1531         ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1532
1533 Thu May  7 02:14:08 1998  Doug Evans  <devans@charmed.cygnus.com>
1534
1535         * cgen.h (cgen_asm_init_parse): Delete.
1536         (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1537         (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1538
1539 Mon Apr 27 10:13:11 1998  Doug Evans  <devans@seba.cygnus.com>
1540
1541         * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1542         (cgen_asm_finish_insn): Update prototype.
1543         (cgen_insn): New members num, data.
1544         (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1545         dis_hash, dis_hash_table_size moved to ...
1546         (CGEN_OPCODE_TABLE).  Here.  Renamed from CGEN_OPCODE_DATA.
1547         All uses updated.  New members asm_hash_p, dis_hash_p.
1548         (CGEN_MINSN_EXPANSION): New struct.
1549         (cgen_expand_macro_insn): Declare.
1550         (cgen_macro_insn_count): Declare.
1551         (get_insn_operands): Update prototype.
1552         (lookup_get_insn_operands): Declare.
1553
1554 Tue Apr 21 17:11:32 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1555
1556         * i386.h (i386_optab): Change iclrKludge and imulKludge to
1557         regKludge.  Add operands types for string instructions.
1558
1559 Mon Apr 20 14:40:29 1998  Tom Tromey  <tromey@cygnus.com>
1560
1561         * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1562         table.
1563
1564 Sun Apr 19 13:54:06 1998  Tom Tromey  <tromey@cygnus.com>
1565
1566         * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1567         for `gettext'.
1568
1569 Fri Apr  3 12:04:48 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1570
1571         * i386.h: Remove NoModrm flag from all insns: it's never checked.
1572         Add IsString flag to string instructions.
1573         (IS_STRING): Don't define.
1574         (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1575         (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1576         (SS_PREFIX_OPCODE): Define.
1577
1578 Mon Mar 30 21:31:56 1998  Ian Lance Taylor  <ian@cygnus.com>
1579
1580         * i386.h: Revert March 24 patch; no more LinearAddress.
1581
1582 Mon Mar 30 10:25:54 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1583
1584         * i386.h (i386_optab): Remove fwait (9b) from all floating point
1585         instructions, and instead add FWait opcode modifier.  Add short
1586         form of fldenv and fstenv.
1587         (FWAIT_OPCODE): Define.
1588
1589         * i386.h (i386_optab): Change second operand constraint of `mov
1590         sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1591         allow legal instructions such as `movl %gs,%esi'
1592
1593 Fri Mar 27 18:30:52 1998  Ian Lance Taylor  <ian@cygnus.com>
1594
1595         * h8300.h: Various changes to fully bracket initializers.
1596
1597 Tue Mar 24 18:32:47 1998  H.J. Lu  <hjl@gnu.org>
1598
1599         * i386.h: Set LinearAddress for lidt and lgdt.
1600
1601 Mon Mar  2 10:44:07 1998  Doug Evans  <devans@seba.cygnus.com>
1602
1603         * cgen.h (CGEN_BOOL_ATTR): New macro.
1604
1605 Thu Feb 26 15:54:31 1998  Michael Meissner  <meissner@cygnus.com>
1606
1607         * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1608
1609 Mon Feb 23 10:38:21 1998  Doug Evans  <devans@seba.cygnus.com>
1610
1611         * cgen.h (CGEN_CAT3): Delete.  Use CONCAT3 now.
1612         (cgen_insn): Record syntax and format entries here, rather than
1613         separately.
1614
1615 Tue Feb 17 21:42:56 1998  Nick Clifton  <nickc@cygnus.com>
1616
1617         * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1618
1619 Tue Feb 17 16:00:56 1998  Doug Evans  <devans@seba.cygnus.com>
1620
1621         * cgen.h (cgen_insert_fn): Change type of result to const char *.
1622         (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1623         (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1624
1625 Thu Feb 12 18:30:41 1998  Doug Evans  <devans@canuck.cygnus.com>
1626
1627         * cgen.h (lookup_insn): New argument alias_p.
1628
1629 Thu Feb 12 03:41:00 1998  J"orn Rennecke  <amylaar@cygnus.co.uk>
1630
1631 Fix rac to accept only a0:
1632         * d10v.h (OPERAND_ACC): Split into:
1633         (OPERAND_ACC0, OPERAND_ACC1) .
1634         (OPERAND_GPR): Define.
1635
1636 Wed Feb 11 17:31:53 1998  Doug Evans  <devans@seba.cygnus.com>
1637
1638         * cgen.h (CGEN_FIELDS): Define here.
1639         (CGEN_HW_ENTRY): New member `type'.
1640         (hw_list): Delete decl.
1641         (enum cgen_mode): Declare.
1642         (CGEN_OPERAND): New member `hw'.
1643         (enum cgen_operand_instance_type): Declare.
1644         (CGEN_OPERAND_INSTANCE): New type.
1645         (CGEN_INSN): New member `operands'.
1646         (CGEN_OPCODE_DATA): Make hw_list const.
1647         (get_insn_operands,lookup_insn): Add prototypes for.
1648
1649 Tue Feb  3 17:11:23 1998  Doug Evans  <devans@seba.cygnus.com>
1650
1651         * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1652         (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1653         (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1654         (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1655
1656 Mon Feb  2 19:19:15 1998  Ian Lance Taylor  <ian@cygnus.com>
1657
1658         * cgen.h: Correct typo in comment end marker.
1659
1660 Mon Feb  2 17:10:38 1998  Steve Haworth  <steve@pm.cse.rmit.EDU.AU>
1661
1662         * tic30.h: New file.
1663
1664 Thu Jan 22 17:54:56 1998  Nick Clifton  <nickc@cygnus.com>
1665
1666         * cgen.h: Add prototypes for cgen_save_fixups(),
1667         cgen_restore_fixups(), and cgen_swap_fixups().  Change prototype
1668         of cgen_asm_finish_insn() to return a char *.
1669
1670 Wed Jan 14 17:21:43 1998  Nick Clifton  <nickc@cygnus.com>
1671
1672         * cgen.h: Formatting changes to improve readability.
1673
1674 Mon Jan 12 11:37:36 1998  Doug Evans  <devans@seba.cygnus.com>
1675
1676         * cgen.h (*): Clean up pass over `struct foo' usage.
1677         (CGEN_ATTR): Make unsigned char.
1678         (CGEN_ATTR_TYPE): Update.
1679         (CGEN_ATTR_{ENTRY,TABLE}): New types.
1680         (cgen_base): Move member `attrs' to cgen_insn.
1681         (CGEN_KEYWORD): New member `null_entry'.
1682         (CGEN_{SYNTAX,FORMAT}): New types.
1683         (cgen_insn): Format and syntax separated from each other.
1684
1685 Tue Dec 16 15:15:52 1997  Michael Meissner  <meissner@cygnus.com>
1686
1687         * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1688         2 word load/store, ADDppp/SUBppp, 16/32 bit multiply.  Make
1689         flags_{used,set} long.
1690         (d30v_operand): Make flags field long.
1691
1692 Mon Dec  1 12:24:44 1997  Andreas Schwab  <schwab@issan.informatik.uni-dortmund.de>
1693
1694         * m68k.h: Fix comment describing operand types.
1695
1696 Sun Nov 23 22:31:27 1997  Michael Meissner  <meissner@cygnus.com>
1697
1698         * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1699         everything else after down.
1700
1701 Tue Nov 18 18:45:14 1997  J"orn Rennecke  <amylaar@cygnus.co.uk>
1702
1703         * d10v.h (OPERAND_FLAG): Split into:
1704         (OPERAND_FFLAG, OPERAND_CFLAG) .
1705
1706 Thu Nov 13 11:04:24 1997  Gavin Koch  <gavin@cygnus.com>
1707
1708         * mips.h (struct mips_opcode): Changed comments to reflect new
1709         field usage.
1710
1711 Fri Oct 24 22:36:20 1997  Ken Raeburn  <raeburn@cygnus.com>
1712
1713         * mips.h: Added to comments a quick-ref list of all assigned
1714         operand type characters.
1715         (OP_{MASK,SH}_PERFREG): New macros.
1716
1717 Wed Oct 22 17:28:33 1997  Richard Henderson  <rth@cygnus.com>
1718
1719         * sparc.h: Add '_' and '/' for v9a asr's.
1720         Patch from David Miller <davem@vger.rutgers.edu>
1721
1722 Tue Oct 14 13:22:29 1997  Jeffrey A Law  (law@cygnus.com)
1723
1724         * h8300.h: Bit ops with absolute addresses not in the 8 bit
1725         area are not available in the base model (H8/300).
1726
1727 Thu Sep 25 13:03:41 1997  Ian Lance Taylor  <ian@cygnus.com>
1728
1729         * m68k.h: Remove documentation of ` operand specifier.
1730
1731 Wed Sep 24 19:00:34 1997  Ian Lance Taylor  <ian@cygnus.com>
1732
1733         * m68k.h: Document q and v operand specifiers.
1734
1735 Mon Sep 15 18:28:37 1997  Nick Clifton  <nickc@cygnus.com>
1736
1737         * v850.h (struct v850_opcode): Add processors field.
1738         (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1739         (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1740         (PROCESSOR_V850EA): New bit constants.
1741
1742 Mon Sep 15 11:29:43 1997  Ken Raeburn  <raeburn@cygnus.com>
1743
1744         Merge changes from Martin Hunt:
1745
1746         * d30v.h: Allow up to 64 control registers. Add
1747         SHORT_A5S format.
1748
1749         * d30v.h (LONG_Db): New form for delayed branches.
1750
1751         * d30v.h: (LONG_Db): New form for repeati.
1752
1753         * d30v.h (SHORT_D2B): New form.
1754
1755         * d30v.h (SHORT_A2): New form.
1756
1757         * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1758         registers are used.  Needed for VLIW optimization.
1759
1760 Mon Sep  8 14:05:45 1997  Doug Evans  <dje@canuck.cygnus.com>
1761
1762         * cgen.h: Move assembler interface section
1763         up so cgen_parse_operand_result is defined for cgen_parse_address.
1764         (cgen_parse_address): Update prototype.
1765
1766 Tue Sep  2 15:32:32 1997  Nick Clifton  <nickc@cygnus.com>
1767
1768         * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1769
1770 Tue Aug 26 12:21:52 1997  Ian Lance Taylor  <ian@cygnus.com>
1771
1772         * i386.h (two_byte_segment_defaults): Correct base register 5 in
1773         modes 1 and 2 to be ss rather than ds.  From Gabriel Paubert
1774         <paubert@iram.es>.
1775
1776         * i386.h: Set ud2 to 0x0f0b.  From Gabriel Paubert
1777         <paubert@iram.es>.
1778
1779         * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1780         <paubert@iram.es>.
1781
1782         * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1783         (JUMP_ON_ECX_ZERO): Remove commented out macro.
1784
1785 Fri Aug 22 10:38:29 1997  Nick Clifton  <nickc@cygnus.com>
1786
1787         * v850.h (V850_NOT_R0): New flag.
1788
1789 Mon Aug 18 11:05:58 1997  Nick Clifton  <nickc@cygnus.com>
1790
1791         * v850.h (struct v850_opcode): Remove flags field.
1792
1793 Wed Aug 13 18:45:48 1997  Nick Clifton  <nickc@cygnus.com>
1794
1795         * v850.h (struct v850_opcode): Add flags field.
1796         (struct v850_operand): Extend meaning of 'bits' and 'shift'
1797         fields.
1798         (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1799         (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1800
1801 Fri Aug  8 16:58:42 1997  Doug Evans  <dje@canuck.cygnus.com>
1802
1803         * arc.h: New file.
1804
1805 Thu Jul 24 21:16:58 1997  Doug Evans  <dje@canuck.cygnus.com>
1806
1807         * sparc.h (sparc_opcodes): Declare as const.
1808
1809 Thu Jul 10 12:53:25 1997  Jeffrey A Law  (law@cygnus.com)
1810
1811         * mips.h (FP_S, FP_D): Define.  Bitmasks indicating if an insn
1812         uses single or double precision floating point resources.
1813         (INSN_NO_ISA, INSN_ISA1): Define.
1814         (cpu specific INSN macros): Tweak into bitmasks outside the range
1815         of INSN_ISA field.
1816
1817 Mon Jun 16 14:10:00 1997  H.J. Lu  <hjl@gnu.ai.mit.edu>
1818
1819         * i386.h: Fix pand opcode.
1820
1821 Mon Jun  2 11:35:09 1997  Gavin Koch  <gavin@cygnus.com>
1822
1823         * mips.h: Widen INSN_ISA and move it to a more convenient
1824         bit position.  Add INSN_3900.
1825
1826 Tue May 20 11:25:29 1997  Gavin Koch  <gavin@cygnus.com>
1827
1828         * mips.h (struct mips_opcode): added new field membership.
1829
1830 Mon May 12 16:26:50 1997  H.J. Lu  <hjl@gnu.ai.mit.edu>
1831
1832         * i386.h (movd): only Reg32 is allowed.
1833
1834         * i386.h: add fcomp and ud2.  From Wayne Scott
1835         <wscott@ichips.intel.com>.
1836
1837 Mon May  5 17:16:21 1997  Ian Lance Taylor  <ian@cygnus.com>
1838
1839         * i386.h: Add MMX instructions.
1840
1841 Mon May  5 12:45:19 1997  H.J. Lu  <hjl@gnu.ai.mit.edu>
1842
1843         * i386.h: Remove W modifier from conditional move instructions.
1844
1845 Mon Apr 14 14:56:58 1997  Ian Lance Taylor  <ian@cygnus.com>
1846
1847         * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1848         with no arguments to match that generated by the UnixWare
1849         assembler.
1850
1851 Thu Apr 10 14:35:00 1997  Doug Evans  <dje@canuck.cygnus.com>
1852
1853         * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1854         (cgen_parse_operand_fn): Declare.
1855         (cgen_init_parse_operand): Declare.
1856         (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1857         new argument `want'.
1858         (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1859         (enum cgen_parse_operand_type): New enum.
1860
1861 Sat Apr  5 13:14:05 1997  Ian Lance Taylor  <ian@cygnus.com>
1862
1863         * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1864
1865 Fri Apr  4 11:46:11 1997  Doug Evans  <dje@canuck.cygnus.com>
1866
1867         * cgen.h: New file.
1868
1869 Fri Apr  4 14:02:32 1997  Ian Lance Taylor  <ian@cygnus.com>
1870
1871         * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1872         fdivrp.
1873
1874 Tue Mar 25 22:57:26 1997  Stu Grossman  (grossman@critters.cygnus.com)
1875
1876         * v850.h (extract): Make unsigned.
1877
1878 Mon Mar 24 14:38:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1879
1880         * i386.h: Add iclr.
1881
1882 Thu Mar 20 19:49:10 1997  Ian Lance Taylor  <ian@cygnus.com>
1883
1884         * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1885         take a direction bit.
1886
1887 Sat Mar 15 19:03:29 1997  H.J. Lu  <hjl@lucon.org>
1888
1889         * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1890
1891 Fri Mar 14 15:22:01 1997  Ian Lance Taylor  <ian@cygnus.com>
1892
1893         * sparc.h: Include <ansidecl.h>.  Update function declarations to
1894         use prototypes, and to use const when appropriate.
1895
1896 Thu Mar  6 14:18:30 1997  Jeffrey A Law  (law@cygnus.com)
1897
1898         * mn10300.h (MN10300_OPERAND_RELAX): Define.
1899
1900 Mon Feb 24 15:15:56 1997  Martin M. Hunt  <hunt@pizza.cygnus.com>
1901
1902         * d10v.h: Change pre_defined_registers to
1903         d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1904
1905 Sat Feb 22 21:25:00 1997  Dawn Perchik  <dawn@cygnus.com>
1906
1907         * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1908         Change mips_opcodes from const array to a pointer,
1909         and change bfd_mips_num_opcodes from const int to int,
1910         so that we can increase the size of the mips opcodes table
1911         dynamically.
1912
1913 Fri Feb 21 16:34:18 1997  Martin M. Hunt  <hunt@pizza.cygnus.com>
1914
1915         * d30v.h (FLAG_X): Remove unused flag.
1916
1917 Tue Feb 18 17:37:20 1997  Martin M. Hunt  <hunt@pizza.cygnus.com>
1918
1919         * d30v.h: New file.
1920
1921 Fri Feb 14 13:16:15 1997  Fred Fish  <fnf@cygnus.com>
1922
1923         * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1924         (PDS_VALUE): Macro to access value field of predefined symbols.
1925         (tic80_next_predefined_symbol): Add prototype.
1926
1927 Mon Feb 10 10:32:17 1997  Fred Fish  <fnf@cygnus.com>
1928
1929         * tic80.h (tic80_symbol_to_value): Change prototype to match
1930         change in function, added class parameter.
1931
1932 Thu Feb  6 17:30:15 1997  Fred Fish  <fnf@cygnus.com>
1933
1934         * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1935         endmask fields, which are somewhat weird in that 0 and 32 are
1936         treated exactly the same.
1937
1938 Thu Jan 30 13:46:18 1997  Fred Fish  <fnf@cygnus.com>
1939
1940         * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1941         rather than a constant that is 2**X.  Reorder them to put bits for
1942         operands that have symbolic names in the upper bits, so they can
1943         be packed into an int where the lower bits contain the value that
1944         corresponds to that symbolic name.
1945         (predefined_symbo): Add struct.
1946         (tic80_predefined_symbols): Declare array of translations.
1947         (tic80_num_predefined_symbols): Declare size of that array.
1948         (tic80_value_to_symbol): Declare function.
1949         (tic80_symbol_to_value): Declare function.
1950
1951 Wed Jan 29 09:37:25 1997  Jeffrey A Law  (law@cygnus.com)
1952
1953         * mn10200.h (MN10200_OPERAND_RELAX): Define.
1954
1955 Sat Jan 18 15:18:59 1997  Fred Fish  <fnf@cygnus.com>
1956
1957         * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1958         be the destination register.
1959
1960 Thu Jan 16 20:48:55 1997  Fred Fish  <fnf@cygnus.com>
1961
1962         * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1963         (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1964         (TIC80_VECTOR): Define a flag bit for the flags.  This one means
1965         that the opcode can have two vector instructions in a single
1966         32 bit word and we have to encode/decode both.
1967
1968 Tue Jan 14 19:37:09 1997  Fred Fish  <fnf@cygnus.com>
1969
1970         * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1971         TIC80_OPERAND_RELATIVE for PC relative.
1972         (TIC80_OPERAND_BASEREL): New flag bit for register
1973         base relative.
1974
1975 Mon Jan 13 15:56:38 1997  Fred Fish  <fnf@cygnus.com>
1976
1977         * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1978
1979 Mon Jan  6 10:51:15 1997  Fred Fish  <fnf@cygnus.com>
1980
1981         * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1982         ":s" modifier for scaling.
1983
1984 Sun Jan  5 12:12:19 1997  Fred Fish  <fnf@cygnus.com>
1985
1986         * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1987         (TIC80_OPERAND_M_LI): Ditto
1988
1989 Sat Jan  4 19:02:44 1997  Fred Fish  <fnf@cygnus.com>
1990
1991         * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1992         (TIC80_OPERAND_CC): New define for condition code operand.
1993         (TIC80_OPERAND_CR): New define for control register operand.
1994
1995 Fri Jan  3 16:22:23 1997  Fred Fish  <fnf@cygnus.com>
1996
1997         * tic80.h (struct tic80_opcode): Name changed.
1998         (struct tic80_opcode): Remove format field.
1999         (struct tic80_operand): Add insertion and extraction functions.
2000         (TIC80_OPERAND_*): Remove old bogus values, start adding new
2001         correct ones.
2002         (FMT_*): Ditto.
2003
2004 Tue Dec 31 15:05:41 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
2005
2006         * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
2007         type IV instruction offsets.
2008
2009 Fri Dec 27 22:23:10 1996  Fred Fish  <fnf@cygnus.com>
2010
2011         * tic80.h: New file.
2012
2013 Wed Dec 18 10:06:31 1996  Jeffrey A Law  (law@cygnus.com)
2014
2015         * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
2016
2017 Sat Dec 14 10:48:31 1996  Fred Fish  <fnf@ninemoons.com>
2018
2019         * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
2020         * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
2021         * v850.h: Fix comment, v850_operand not powerpc_operand.
2022
2023 Mon Dec  9 16:45:39 1996  Jeffrey A Law  (law@cygnus.com)
2024
2025         * mn10200.h: Flesh out structures and definitions needed by
2026         the mn10200 assembler & disassembler.
2027
2028 Tue Nov 26 10:46:56 1996  Ian Lance Taylor  <ian@cygnus.com>
2029
2030         * mips.h: Add mips16 definitions.
2031
2032 Mon Nov 25 17:56:54 1996  J.T. Conklin  <jtc@cygnus.com>
2033
2034         * m68k.h: Document new <, >, m, n, o and p operand specifiers.
2035
2036 Wed Nov 20 10:59:41 1996  Jeffrey A Law  (law@cygnus.com)
2037
2038         * mn10300.h (MN10300_OPERAND_PCREL): Define.
2039         (MN10300_OPERAND_MEMADDR): Define.
2040
2041 Tue Nov 19 13:30:40 1996  Jeffrey A Law  (law@cygnus.com)
2042
2043         * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
2044
2045 Wed Nov  6 13:41:08 1996  Jeffrey A Law  (law@cygnus.com)
2046
2047         * mn10300.h (MN10300_OPERAND_SPLIT): Define.
2048
2049 Tue Nov  5 13:26:12 1996  Jeffrey A Law  (law@cygnus.com)
2050
2051         * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
2052
2053 Mon Nov  4 12:52:48 1996  Jeffrey A Law  (law@cygnus.com)
2054
2055         * mn10300.h (MN10300_OPERAND_REPEATED): Define.
2056
2057 Fri Nov  1 10:31:02 1996  Richard Henderson  <rth@tamu.edu>
2058
2059         * alpha.h: Don't include "bfd.h"; private relocation types are now
2060         negative to minimize problems with shared libraries.  Organize
2061         instruction subsets by AMASK extensions and PALcode
2062         implementation.
2063         (struct alpha_operand): Move flags slot for better packing.
2064
2065 Tue Oct 29 12:19:10 1996  Jeffrey A Law  (law@cygnus.com)
2066
2067         * v850.h (V850_OPERAND_RELAX): New operand flag.
2068
2069 Thu Oct 10 14:29:11 1996  Jeffrey A Law  (law@cygnus.com)
2070
2071         * mn10300.h (FMT_*): Move operand format definitions
2072         here.
2073
2074 Tue Oct  8 14:48:07 1996  Jeffrey A Law  (law@cygnus.com)
2075
2076         * mn10300.h (MN10300_OPERAND_PAREN): Define.
2077
2078 Mon Oct  7 16:52:11 1996  Jeffrey A Law  (law@cygnus.com)
2079
2080         * mn10300.h (mn10300_opcode): Add "format" field.
2081         (MN10300_OPERAND_*): Define.
2082
2083 Thu Oct  3 10:33:46 1996  Jeffrey A Law  (law@cygnus.com)
2084
2085         * mn10x00.h: Delete.
2086         * mn10200.h, mn10300.h: New files.
2087
2088 Wed Oct  2 21:31:26 1996  Jeffrey A Law  (law@cygnus.com)
2089
2090         * mn10x00.h: New file.
2091
2092 Fri Sep 27 18:26:46 1996  Stu Grossman  (grossman@critters.cygnus.com)
2093
2094         * v850.h: Add new flag to indicate this instruction uses a PC
2095         displacement.
2096
2097 Fri Sep 13 14:58:13 1996  Jeffrey A Law  (law@cygnus.com)
2098
2099         * h8300.h (stmac): Add missing instruction.
2100
2101 Sat Aug 31 16:02:03 1996  Jeffrey A Law  (law@cygnus.com)
2102
2103         * v850.h (v850_opcode): Remove "size" field.  Add "memop"
2104         field.
2105
2106 Fri Aug 23 10:39:08 1996  Jeffrey A Law  (law@cygnus.com)
2107
2108         * v850.h (V850_OPERAND_EP): Define.
2109
2110         * v850.h (v850_opcode): Add size field.
2111
2112 Thu Aug 22 16:51:25 1996  J.T. Conklin  <jtc@rtl.cygnus.com>
2113
2114         * v850.h (v850_operands): Add insert and extract fields, pointers
2115         to functions used to handle unusual operand encoding.
2116         (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
2117         V850_OPERAND_SIGNED): Defined.
2118
2119 Wed Aug 21 17:45:10 1996  J.T. Conklin  <jtc@rtl.cygnus.com>
2120
2121         * v850.h (v850_operands): Add flags field.
2122         (OPERAND_REG, OPERAND_NUM): Defined.
2123
2124 Tue Aug 20 14:52:02 1996  J.T. Conklin  <jtc@rtl.cygnus.com>
2125
2126         * v850.h: New file.
2127
2128 Fri Aug 16 14:44:15 1996  James G. Smith  <jsmith@cygnus.co.uk>
2129
2130         * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
2131         OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
2132         OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
2133         OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
2134         OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
2135         Defined.
2136
2137 Fri Aug 16 00:15:15 1996  Jeffrey A Law  (law@cygnus.com)
2138
2139         * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
2140         a 3 bit space id instead of a 2 bit space id.
2141
2142 Thu Aug 15 13:11:46 1996  Martin M. Hunt  <hunt@pizza.cygnus.com>
2143
2144         * d10v.h: Add some additional defines to support the
2145         assembler in determining which operations can be done in parallel.
2146
2147 Tue Aug  6 11:13:22 1996  Jeffrey A Law  (law@cygnus.com)
2148
2149         * h8300.h (SN): Define.
2150         (eepmov.b): Renamed from "eepmov"
2151         (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
2152         with them.
2153
2154 Fri Jul 26 11:47:10 1996  Martin M. Hunt  <hunt@pizza.cygnus.com>
2155
2156         * d10v.h (OPERAND_SHIFT): New operand flag.
2157
2158 Thu Jul 25 12:06:22 1996  Martin M. Hunt  <hunt@pizza.cygnus.com>
2159
2160         * d10v.h: Changes for divs, parallel-only instructions, and
2161         signed numbers.
2162
2163 Mon Jul 22 11:21:15 1996  Martin M. Hunt  <hunt@pizza.cygnus.com>
2164
2165         * d10v.h (pd_reg): Define. Putting the definition here allows
2166         the assembler and disassembler to share the same struct.
2167
2168 Mon Jul 22 12:15:25 1996  Ian Lance Taylor  <ian@cygnus.com>
2169
2170         * i960.h (i960_opcodes): "halt" takes an argument.  From Stephen
2171         Williams <steve@icarus.com>.
2172
2173 Wed Jul 17 14:46:38 1996  Martin M. Hunt  <hunt@pizza.cygnus.com>
2174
2175         * d10v.h: New file.
2176
2177 Thu Jul 11 12:09:15 1996  Jeffrey A Law  (law@cygnus.com)
2178
2179         * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2180
2181 Wed Jul  3 14:30:12 1996  J.T. Conklin  <jtc@rtl.cygnus.com>
2182
2183         * m68k.h (mcf5200): New macro.
2184         Document names of coldfire control registers.
2185
2186 Tue Jul  2 23:05:45 1996  Jeffrey A Law  (law@cygnus.com)
2187
2188         * h8300.h (SRC_IN_DST): Define.
2189
2190         * h8300.h (UNOP3): Mark the register operand in this insn
2191         as a source operand, not a destination operand.
2192         (SHIFT_2, SHIFT_IMM): Remove.  Eliminate all references.
2193         (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops.  Mark
2194         register operand with SRC_IN_DST.
2195
2196 Fri Jun 21 13:52:17 1996  Richard Henderson  <rth@tamu.edu>
2197
2198         * alpha.h: New file.
2199
2200 Thu Jun 20 15:02:57 1996  Ian Lance Taylor  <ian@cygnus.com>
2201
2202         * rs6k.h: Remove obsolete file.
2203
2204 Wed Jun 19 15:29:38 1996  Ian Lance Taylor  <ian@cygnus.com>
2205
2206         * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2207         fdivp, and fdivrp.  Add ffreep.
2208
2209 Tue Jun 18 16:06:00 1996  Jeffrey A. Law  <law@rtl.cygnus.com>
2210
2211         * h8300.h: Reorder various #defines for readability.
2212         (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2213         (BITOP): Accept additional (unused) argument.  All callers changed.
2214         (EBITOP): Likewise.
2215         (O_LAST): Bump.
2216         (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2217
2218         * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2219         (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2220         (BITOP, EBITOP): Handle new H8/S addressing modes for
2221         bit insns.
2222         (UNOP3): Handle new shift/rotate insns on the H8/S.
2223         (insns using exr): New instructions.
2224         (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2225
2226 Thu May 23 16:56:48 1996  Jeffrey A Law  (law@cygnus.com)
2227
2228         * h8300.h (add.l): Undo Apr 5th change.  The manual I had
2229         was incorrect.
2230
2231 Mon May  6 23:38:22 1996  Jeffrey A Law  (law@cygnus.com)
2232
2233         * h8300.h (START): Remove.
2234         (MEMRELAX): Define.  Mark absolute memory operands in mov.b, mov.w
2235         and mov.l insns that can be relaxed.
2236
2237 Tue Apr 30 18:30:58 1996  Ian Lance Taylor  <ian@cygnus.com>
2238
2239         * i386.h: Remove Abs32 from lcall.
2240
2241 Mon Apr 22 17:09:23 1996  Doug Evans  <dje@blues.cygnus.com>
2242
2243         * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2244         (SLCPOP): New macro.
2245         Mark X,Y opcode letters as in use.
2246
2247 Thu Apr 11 17:28:18 1996  Ian Lance Taylor  <ian@cygnus.com>
2248
2249         * sparc.h (F_FLOAT, F_FBR): Define.
2250
2251 Fri Apr  5 16:55:34 1996  Jeffrey A Law  (law@cygnus.com)
2252
2253         * h8300.h (ABS8MEM): Renamed from ABSMOV.  Remove ABSMOV
2254         from all insns.
2255         (ABS8SRC,ABS8DST): Add ABS8MEM.
2256         (add.l): Fix reg+reg variant.
2257         (eepmov.w): Renamed from eepmovw.
2258         (ldc,stc): Fix many cases.
2259
2260 Sun Mar 31 13:30:03 1996  Doug Evans  <dje@canuck.cygnus.com>
2261
2262         * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2263
2264 Thu Mar  7 15:08:23 1996  Doug Evans  <dje@charmed.cygnus.com>
2265
2266         * sparc.h (O): Mark operand letter as in use.
2267
2268 Tue Feb 20 20:46:21 1996  Doug Evans  <dje@charmed.cygnus.com>
2269
2270         * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2271         Mark operand letters uU as in use.
2272
2273 Mon Feb 19 01:59:08 1996  Doug Evans  <dje@charmed.cygnus.com>
2274
2275         * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2276         (sparc_opcode_arch): Delete member `conflicts'.  Add `supported'.
2277         (SPARC_OPCODE_SUPPORTED): New macro.
2278         (SPARC_OPCODE_CONFLICT_P): Rewrite.
2279         (F_NOTV9): Delete.
2280
2281 Fri Feb 16 12:23:34 1996  Jeffrey A Law  (law@cygnus.com)
2282
2283         * sparc.h (sparc_opcode_lookup_arch) Make return type in
2284         declaration consistent with return type in definition.
2285
2286 Wed Feb 14 18:14:11 1996  Alan Modra  <alan@spri.levels.unisa.edu.au>
2287
2288         * i386.h (i386_optab): Remove Data32 from pushf and popf.
2289
2290 Thu Feb  8 14:27:21 1996  James Carlson <carlson@xylogics.com>
2291
2292         * i386.h (i386_regtab): Add 80486 test registers.
2293
2294 Mon Feb  5 18:35:46 1996  Ian Lance Taylor  <ian@cygnus.com>
2295
2296         * i960.h (I_HX): Define.
2297         (i960_opcodes): Add HX instruction.
2298
2299 Mon Jan 29 12:43:39 1996  Ken Raeburn  <raeburn@cygnus.com>
2300
2301         * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2302         and fclex.
2303
2304 Wed Jan 24 22:36:59 1996  Doug Evans  <dje@charmed.cygnus.com>
2305
2306         * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2307         (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2308         (bfd_* defines): Delete.
2309         (sparc_opcode_archs): Replaces architecture_pname.
2310         (sparc_opcode_lookup_arch): Declare.
2311         (NUMOPCODES): Delete.
2312
2313 Mon Jan 22 08:24:32 1996  Doug Evans  <dje@charmed.cygnus.com>
2314
2315         * sparc.h (enum sparc_architecture): Add v9a.
2316         (ARCHITECTURES_CONFLICT_P): Update.
2317
2318 Thu Dec 28 13:27:53 1995  John Hassey  <hassey@rtp.dg.com>
2319
2320         * i386.h: Added Pentium Pro instructions.
2321
2322 Thu Nov  2 22:59:22 1995  Ian Lance Taylor  <ian@cygnus.com>
2323
2324         * m68k.h: Document new 'W' operand place.
2325
2326 Tue Oct 24 10:49:10 1995  Jeffrey A Law  (law@cygnus.com)
2327
2328         * hppa.h: Add lci and syncdma instructions.
2329
2330 Mon Oct 23 11:09:16 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
2331
2332         * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
2333         instructions.
2334
2335 Mon Oct 16 10:28:15 1995  Michael Meissner  <meissner@tiktok.cygnus.com>
2336
2337         * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2338         assembler's -mcom and -many switches.
2339
2340 Wed Oct 11 16:56:33 1995  Ken Raeburn  <raeburn@cygnus.com>
2341
2342         * i386.h: Fix cmpxchg8b extension opcode description.
2343
2344 Thu Oct  5 18:03:36 1995  Ken Raeburn  <raeburn@cygnus.com>
2345
2346         * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2347         and register cr4.
2348
2349 Tue Sep 19 15:26:43 1995  Ian Lance Taylor  <ian@cygnus.com>
2350
2351         * m68k.h: Change comment: split type P into types 0, 1 and 2.
2352
2353 Wed Aug 30 13:50:55 1995  Doug Evans  <dje@canuck.cygnus.com>
2354
2355         * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2356
2357 Tue Aug 29 15:34:58 1995  Doug Evans  <dje@canuck.cygnus.com>
2358
2359         * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2360
2361 Wed Aug  2 18:32:19 1995  Ian Lance Taylor  <ian@cygnus.com>
2362
2363         * m68kmri.h: Remove.
2364
2365         * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2366         declarations.  Remove F_ALIAS and flag field of struct
2367         m68k_opcode.  Change arch field of struct m68k_opcode to unsigned
2368         int.  Make name and args fields of struct m68k_opcode const.
2369
2370 Wed Aug  2 08:16:46 1995  Doug Evans  <dje@canuck.cygnus.com>
2371
2372         * sparc.h (F_NOTV9): Define.
2373
2374 Tue Jul 11 14:20:42 1995  Jeff Spiegel  <jeffs@lsil.com>
2375
2376         * mips.h (INSN_4010): Define.
2377
2378 Wed Jun 21 18:49:51 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
2379
2380         * m68k.h (TBL1): Reverse sense of "round" argument in result.
2381
2382         Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2383         * m68k.h: Fix argument descriptions of coprocessor
2384         instructions to allow only alterable operands where appropriate.
2385         [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2386         (m68k_opcode_aliases): Add more aliases.
2387
2388 Fri Apr 14 22:15:34 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
2389
2390         * m68k.h: Added explcitly short-sized conditional branches, and a
2391         bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2392         svr4-based configurations.
2393
2394 Mon Mar 13 21:30:01 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
2395
2396         Mon Feb 27 08:36:39 1995  Bryan Ford  <baford@cs.utah.edu>
2397         * i386.h: added missing Data16/Data32 flags to a few instructions.
2398
2399 Wed Mar  8 15:19:53 1995  Ian Lance Taylor  <ian@cygnus.com>
2400
2401         * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2402         (OP_MASK_BCC, OP_SH_BCC): Define.
2403         (OP_MASK_PREFX, OP_SH_PREFX): Define.
2404         (OP_MASK_CCC, OP_SH_CCC): Define.
2405         (INSN_READ_FPR_R): Define.
2406         (INSN_RFE): Delete.
2407
2408 Wed Mar  8 03:13:23 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
2409
2410         * m68k.h (enum m68k_architecture): Deleted.
2411         (struct m68k_opcode_alias): New type.
2412         (m68k_opcodes): Now const.  Deleted opcode aliases with exactly
2413         matching constraints, values and flags.  As a side effect of this,
2414         the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2415         as I know were never used, now may need re-examining.
2416         (numopcodes): Now const.
2417         (m68k_opcode_aliases, numaliases): New variables.
2418         (endop): Deleted.
2419         [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2420         m68k_opcode_aliases; update declaration of m68k_opcodes.
2421
2422 Mon Mar  6 10:02:00 1995  Jeff Law  (law@snake.cs.utah.edu)
2423
2424         * hppa.h (delay_type): Delete unused enumeration.
2425         (pa_opcode): Replace unused delayed field with an architecture
2426         field.
2427         (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2428
2429 Fri Mar  3 16:10:24 1995  Ian Lance Taylor  <ian@cygnus.com>
2430
2431         * mips.h (INSN_ISA4): Define.
2432
2433 Fri Feb 24 19:13:37 1995  Ian Lance Taylor  <ian@cygnus.com>
2434
2435         * mips.h (M_DLA_AB, M_DLI): Define.
2436
2437 Thu Feb 23 17:33:09 1995  Jeff Law  (law@snake.cs.utah.edu)
2438
2439         * hppa.h (fstwx): Fix single-bit error.
2440
2441 Wed Feb 15 12:19:52 1995  Ian Lance Taylor  <ian@cygnus.com>
2442
2443         * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2444
2445 Mon Feb  6 10:35:23 1995  J.T. Conklin  <jtc@rtl.cygnus.com>
2446
2447         * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2448           debug registers.  From Charles Hannum (mycroft@netbsd.org).
2449
2450 Mon Feb  6 03:31:54 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
2451
2452         Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2453         i386 support:
2454         * i386.h (MOV_AX_DISP32): New macro.
2455         (i386_optab): Added Data16 and Data32 as needed.  Added "w" forms
2456         of several call/return instructions.
2457         (ADDR_PREFIX_OPCODE): New macro.
2458
2459 Mon Jan 23 16:45:43 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
2460
2461         Sat Jan 21 17:50:38 1995  Pat Rankin  (rankin@eql.caltech.edu)
2462
2463         * vax.h (struct vot_wot, field `args'): Make it pointer to const
2464         char.
2465         (struct vot, field `name'): ditto.
2466
2467 Thu Jan 19 14:47:53 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
2468
2469         * vax.h: Supply and properly group all values in end sentinel.
2470
2471 Tue Jan 17 10:55:30 1995  Ian Lance Taylor  <ian@sanguine.cygnus.com>
2472
2473         * mips.h (INSN_ISA, INSN_4650): Define.
2474
2475 Wed Oct 19 13:34:17 1994  Ian Lance Taylor  <ian@sanguine.cygnus.com>
2476
2477         * a29k.h: Add operand type 'I' for `inv' and `iretinv'.  On
2478         systems with a separate instruction and data cache, such as the
2479         29040, these instructions take an optional argument.
2480
2481 Wed Sep 14 17:44:20 1994  Ian Lance Taylor  (ian@sanguine.cygnus.com)
2482
2483         * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2484         INSN_TRAP.
2485
2486 Tue Sep  6 11:39:08 1994  Ian Lance Taylor  (ian@sanguine.cygnus.com)
2487
2488         * mips.h (INSN_STORE_MEMORY): Define.
2489
2490 Thu Jul 28 19:28:07 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2491
2492         * sparc.h: Document new operand type 'x'.
2493
2494 Tue Jul 26 17:48:05 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2495
2496         * i960.h (I_CX2): New instruction category.  It includes
2497         instructions available on Cx and Jx processors.
2498         (I_JX): New instruction category, for JX-only instructions.
2499         (i960_opcodes): Put eshro and sysctl in I_CX2 category.  Added
2500         Jx-only instructions, in I_JX category.
2501
2502 Wed Jul 13 18:43:47 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2503
2504         * ns32k.h (endop): Made pointer const too.
2505
2506 Sun Jul 10 11:01:09 1994  Ian Dall  (dall@hfrd.dsto.gov.au)
2507
2508         * ns32k.h: Drop Q operand type as there is no correct use
2509         for it. Add I and Z operand types which allow better checking.
2510
2511 Thu Jul  7 12:34:48 1994  Steve Chamberlain  (sac@jonny.cygnus.com)
2512
2513         * h8300.h (xor.l) :fix bit pattern.
2514         (L_2): New size of operand.
2515         (trapa): Use it.
2516
2517 Fri Jun 10 16:38:11 1994  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2518
2519         * m68k.h: Move "trap" before "tpcc" to change disassembly.
2520
2521 Fri Jun  3 15:57:36 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2522
2523         * sparc.h: Include v9 definitions.
2524
2525 Thu Jun  2 12:23:17 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2526
2527         * m68k.h (m68060): Defined.
2528         (m68040up, mfloat, mmmu): Include it.
2529         (struct m68k_opcode): Widen `arch' field.
2530         (m68k_opcodes): Updated for M68060.  Removed comments that were
2531         instructions commented out by "JF" years ago.
2532
2533 Thu Apr 28 18:31:14 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2534
2535         * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2536         add a one-bit `flags' field.
2537         (F_ALIAS): New macro.
2538
2539 Wed Apr 27 11:29:52 1994  Steve Chamberlain  (sac@cygnus.com)
2540
2541         * h8300.h (dec, inc): Get encoding right.
2542
2543 Mon Apr  4 13:12:43 1994  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2544
2545         * ppc.h (struct powerpc_operand): Removed signedp field; just use
2546         a flag instead.
2547         (PPC_OPERAND_SIGNED): Define.
2548         (PPC_OPERAND_SIGNOPT): Define.
2549
2550 Thu Mar 31 19:34:08 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2551
2552         * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2553         prefix is 0x66, not 0x67.  Patch from H.J. Lu (hlu@nynexst.com).
2554
2555 Thu Mar  3 15:51:05 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2556
2557         * i386.h: Reverse last change.  It'll be handled in gas instead.
2558
2559 Thu Feb 24 15:29:05 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2560
2561         * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2562         slower on the 486 and used the implicit shift count despite the
2563         explicit operand.  The one-operand form is still available to get
2564         the shorter form with the implicit shift count.
2565
2566 Thu Feb 17 12:27:52 1994  Torbjorn Granlund  (tege@mexican.cygnus.com)
2567
2568         * hppa.h: Fix typo in fstws arg string.
2569
2570 Wed Feb  9 21:23:52 1994  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2571
2572         * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2573
2574 Mon Feb  7 19:14:58 1994  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2575
2576         * ppc.h (PPC_OPCODE_601): Define.
2577
2578 Fri Feb  4 23:43:50 1994  Jeffrey A. Law  (law@snake.cs.utah.edu)
2579
2580         * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2581         (so we can determine valid completers for both addb and addb[tf].)
2582
2583         * hppa.h (xmpyu): No floating point format specifier for the
2584         xmpyu instruction.
2585
2586 Fri Feb  4 23:36:52 1994  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2587
2588         * ppc.h (PPC_OPERAND_NEXT): Define.
2589         (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2590         (struct powerpc_macro): Define.
2591         (powerpc_macros, powerpc_num_macros): Declare.
2592
2593 Fri Jan 21 19:13:50 1994  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2594
2595         * ppc.h: New file.  Header file for PowerPC opcode table.
2596
2597 Mon Jan 17 00:14:23 1994  Jeffrey A. Law  (law@snake.cs.utah.edu)
2598
2599         * hppa.h: More minor template fixes for sfu and copr (to allow
2600         for easier disassembly).
2601
2602         * hppa.h: Fix templates for all the sfu and copr instructions.
2603
2604 Wed Dec 15 15:12:42 1993  Ken Raeburn  (raeburn@cujo.cygnus.com)
2605
2606         * i386.h (push): Permit Imm16 operand too.
2607
2608 Sat Dec 11 16:14:06 1993  Steve Chamberlain  (sac@thepub.cygnus.com)
2609
2610         *  h8300.h (andc): Exists in base arch.
2611
2612 Wed Dec  1 12:15:32 1993  Jeffrey A. Law  (law@snake.cs.utah.edu)
2613
2614         * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2615         * hppa.h: #undef NONE to avoid conflict with hiux include files.
2616
2617 Sun Nov 21 22:06:57 1993  Jeffrey A. Law  (law@snake.cs.utah.edu)
2618
2619         * hppa.h: Add FP quadword store instructions.
2620
2621 Wed Nov 17 17:13:16 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2622
2623         * mips.h: (M_J_A): Added.
2624         (M_LA): Removed.
2625
2626 Mon Nov  8 12:12:47 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2627
2628         * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define.  From Ted Lemon
2629         <mellon@pepper.ncd.com>.
2630
2631 Sun Nov  7 00:30:11 1993  Jeffrey A. Law  (law@snake.cs.utah.edu)
2632
2633         * hppa.h: Immediate field in probei instructions is unsigned,
2634         not low-sign extended.
2635
2636 Wed Nov  3 10:30:00 1993  Jim Kingdon  (kingdon@lioth.cygnus.com)
2637
2638         * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2639
2640 Tue Nov  2 12:41:30 1993  Ken Raeburn  (raeburn@rover.cygnus.com)
2641
2642         * i386.h: Add "fxch" without operand.
2643
2644 Mon Nov  1 18:13:03 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2645
2646         * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2647
2648 Sat Oct  2 22:26:11 1993  Jeffrey A Law  (law@snake.cs.utah.edu)
2649
2650         * hppa.h: Add gfw and gfr to the opcode table.
2651
2652 Wed Sep 29 16:23:00 1993  K. Richard Pixley  (rich@sendai.cygnus.com)
2653
2654         * m88k.h: extended to handle m88110.
2655
2656 Tue Sep 28 19:19:08 1993  Jeffrey A Law  (law@snake.cs.utah.edu)
2657
2658         * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2659         addresses.
2660
2661 Tue Sep 14 14:04:35 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2662
2663         * i960.h (i960_opcodes): Properly bracket initializers.
2664
2665 Mon Sep 13 12:50:52 1993  K. Richard Pixley  (rich@sendai.cygnus.com)
2666
2667         * m88k.h (BOFLAG): rewrite to avoid nested comment.
2668
2669 Mon Sep 13 15:46:06 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2670
2671         * m68k.h (two): Protect second argument with parentheses.
2672
2673 Fri Sep 10 16:29:47 1993  Ken Raeburn  (raeburn@cambridge.cygnus.com)
2674
2675         * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2676         Deleted old in/out instructions in "#if 0" section.
2677
2678 Thu Sep  9 17:42:19 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2679
2680         * i386.h (i386_optab): Properly bracket initializers.
2681
2682 Wed Aug 25 13:50:56 1993  Ken Raeburn  (raeburn@cambridge.cygnus.com)
2683
2684         * hppa.h (pa_opcode): Use '|' for movb and movib insns.  (From
2685         Jeff Law, law@cs.utah.edu).
2686
2687 Mon Aug 23 16:55:03 1993  Ken Raeburn  (raeburn@cambridge.cygnus.com)
2688
2689         * i386.h (lcall): Accept Imm32 operand also.
2690
2691 Mon Aug 23 12:43:11 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2692
2693         * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2694         (M_DABS): Added.
2695
2696 Thu Aug 19 15:08:37 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2697
2698         * mips.h (INSN_*): Changed values.  Removed unused definitions.
2699         Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3.  Split
2700         INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2701         INSN_LOAD_COPROC_DELAY.  Split INSN_COPROC_DELAY into
2702         INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2703         (M_*): Added new values for r6000 and r4000 macros.
2704         (ANY_DELAY): Removed.
2705
2706 Wed Aug 18 15:37:48 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2707
2708         * mips.h: Added M_LI_S and M_LI_SS.
2709
2710 Tue Aug 17 07:08:08 1993  Steve Chamberlain  (sac@phydeaux.cygnus.com)
2711
2712         * h8300.h: Get some rare mov.bs correct.
2713
2714 Thu Aug  5 09:15:17 1993  Jim Kingdon  (kingdon@lioth.cygnus.com)
2715
2716         * sparc.h: Don't define const ourself; rely on ansidecl.h having
2717         been included.
2718
2719 Fri Jul 30 18:41:11 1993  John Gilmore  (gnu@cygnus.com)
2720
2721         * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2722         jump instructions, for use in disassemblers.
2723
2724 Thu Jul 22 07:25:27 1993  Ian Lance Taylor  (ian@cygnus.com)
2725
2726         * m88k.h: Make bitfields just unsigned, not unsigned long or
2727         unsigned short.
2728
2729 Wed Jul 21 11:55:31 1993  Jim Kingdon  (kingdon@deneb.cygnus.com)
2730
2731         * hppa.h: New argument type 'y'.  Use in various float instructions.
2732
2733 Mon Jul 19 17:17:03 1993  Jim Kingdon  (kingdon@deneb.cygnus.com)
2734
2735         * hppa.h (break): First immediate field is unsigned.
2736
2737         * hppa.h: Add rfir instruction.
2738
2739 Sun Jul 18 16:28:08 1993  Jim Kingdon  (kingdon@rtl.cygnus.com)
2740
2741         * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2742
2743 Fri Jul 16 09:59:29 1993  Ian Lance Taylor  (ian@cygnus.com)
2744
2745         * mips.h: Reworked the hazard information somewhat, and fixed some
2746         bugs in the instruction hazard descriptions.
2747
2748 Thu Jul 15 12:42:01 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2749
2750         * m88k.h: Corrected a couple of opcodes.
2751
2752 Tue Jul  6 15:17:35 1993  Ian Lance Taylor  (ian@cygnus.com)
2753
2754         * mips.h: Replaced with version from Ralph Campbell and OSF.  The
2755         new version includes instruction hazard information, but is
2756         otherwise reasonably similar.
2757
2758 Thu Jul  1 20:36:17 1993  Doug Evans  (dje@canuck.cygnus.com)
2759
2760         * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2761
2762 Fri Jun 11 18:38:44 1993  Ken Raeburn  (raeburn@cygnus.com)
2763
2764         Patches from Jeff Law, law@cs.utah.edu:
2765         * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2766         Make the tables be the same for the following instructions:
2767         "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2768         "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2769         "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2770         "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2771         "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2772         "fcmp", and "ftest".
2773
2774         * hppa.h: Make new and old tables the same for "break", "mtctl",
2775         "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2776         Fix typo in last patch.  Collapse several #ifdefs into a
2777         single #ifdef.
2778
2779         * hppa.h: Delete remaining OLD_TABLE code.  Bring some
2780         of the comments up-to-date.
2781
2782         * hppa.h: Update "free list" of letters and update
2783         comments describing each letter's function.
2784
2785 Thu Jul  8 09:05:26 1993  Doug Evans  (dje@canuck.cygnus.com)
2786
2787         * h8300.h: Lots of little fixes for the h8/300h.
2788
2789 Tue Jun  8 12:16:03 1993  Steve Chamberlain  (sac@phydeaux.cygnus.com)
2790
2791          Support for H8/300-H
2792         * h8300.h: Lots of new opcodes.
2793
2794 Fri Jun  4 15:41:37 1993  Steve Chamberlain  (sac@phydeaux.cygnus.com)
2795
2796         * h8300.h: checkpoint, includes H8/300-H opcodes.
2797
2798 Thu Jun  3 15:42:59 1993  Stu Grossman  (grossman@cygnus.com)
2799
2800         * Patches from Jeffrey Law <law@cs.utah.edu>.
2801         * hppa.h: Rework single precision FP
2802         instructions so that they correctly disassemble code
2803         PA1.1 code.
2804
2805 Thu May 27 19:21:22 1993  Bruce Bauman  (boot@osf.org)
2806
2807         * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2808         mov to allow instructions like mov ss,xyz(ecx) to assemble.
2809
2810 Tue May 25 00:39:40 1993  Ken Raeburn  (raeburn@cygnus.com)
2811
2812         * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2813         gdb will define it for now.
2814
2815 Mon May 24 15:20:06 1993  Ken Raeburn  (raeburn@cambridge.cygnus.com)
2816
2817         * sparc.h: Don't end enumerator list with comma.
2818
2819 Fri May 14 15:15:50 1993  Ian Lance Taylor  (ian@cygnus.com)
2820
2821         * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2822         * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2823         ("bc2t"): Correct typo.
2824         ("[ls]wc[023]"): Use T rather than t.
2825         ("c[0123]"): Define general coprocessor instructions.
2826
2827 Mon May 10 06:02:25 1993  Ken Raeburn  (raeburn@kr-pc.cygnus.com)
2828
2829         * m68k.h: Move split point for gcc compilation more towards
2830         middle.
2831
2832 Fri Apr  9 13:26:16 1993  Jim Kingdon  (kingdon@cygnus.com)
2833
2834         * rs6k.h: Clean up instructions for primary opcode 19 (many were
2835         simply wrong, ics, rfi, & rfsvc were missing).
2836         Add "a" to opr_ext for "bb".  Doc fix.
2837
2838 Thu Mar 18 13:45:31 1993  Per Bothner  (bothner@rtl.cygnus.com)
2839
2840         * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2841         * mips.h: Add casts, to suppress warnings about shifting too much.
2842         * m68k.h: Document the placement code '9'.
2843
2844 Thu Feb 18 02:03:14 1993  John Gilmore  (gnu@cygnus.com)
2845
2846         * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2847         allows callers to break up the large initialized struct full of
2848         opcodes into two half-sized ones.  This permits GCC to compile
2849         this module, since it takes exponential space for initializers.
2850         (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2851
2852 Thu Feb  4 02:06:56 1993  John Gilmore  (gnu@cygnus.com)
2853
2854         * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2855         * convex.h: Added, from GDB's convx-opcode.h.  Added CONST to all
2856         initialized structs in it.
2857
2858 Thu Jan 28 21:32:22 1993  John Gilmore  (gnu@cygnus.com)
2859
2860         Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2861         * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2862         (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2863
2864 Sat Jan 23 18:10:49 PST 1993  Ralph Campbell  (ralphc@pyramid.com)
2865
2866         * mips.h: document "i" and "j" operands correctly.
2867
2868 Thu Jan  7 15:58:13 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2869
2870         * mips.h: Removed endianness dependency.
2871
2872 Sun Jan  3 14:13:35 1993  Steve Chamberlain  (sac@thepub.cygnus.com)
2873
2874         * h8300.h: include info on number of cycles per instruction.
2875
2876 Mon Dec 21 21:29:08 1992  Stu Grossman  (grossman at cygnus.com)
2877
2878         * hppa.h: Move handy aliases to the front.  Fix masks for extract
2879         and deposit instructions.
2880
2881 Sat Dec 12 16:09:48 1992  Ian Lance Taylor  (ian@cygnus.com)
2882
2883         * i386.h: accept shld and shrd both with and without the shift
2884         count argument, which is always %cl.
2885
2886 Fri Nov 27 17:13:18 1992  Ken Raeburn  (raeburn at cygnus.com)
2887
2888         * i386.h (i386_optab_end, i386_regtab_end): Now const.
2889         (one_byte_segment_defaults, two_byte_segment_defaults,
2890         i386_prefixtab_end): Ditto.
2891
2892 Mon Nov 23 10:47:25 1992  Ken Raeburn  (raeburn@cygnus.com)
2893
2894         * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2895         for operand 2; from John Carr, jfc@dsg.dec.com.
2896
2897 Wed Nov  4 07:36:49 1992  Ken Raeburn  (raeburn@cygnus.com)
2898
2899         * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2900         always use 16-bit offsets.  Makes calculated-size jump tables
2901         feasible.
2902
2903 Fri Oct 16 22:52:43 1992  Ken Raeburn  (raeburn@cygnus.com)
2904
2905         * i386.h: Fix one-operand forms of in* and out* patterns.
2906
2907 Tue Sep 22 14:08:14 1992  Ken Raeburn  (raeburn@cambridge.cygnus.com)
2908
2909         * m68k.h: Added CPU32 support.
2910
2911 Tue Sep 22 00:38:41 1992  John Gilmore  (gnu@cygnus.com)
2912
2913         * mips.h (break): Disassemble the argument.  Patch from
2914         jonathan@cs.stanford.edu (Jonathan Stone).
2915
2916 Wed Sep  9 11:25:28 1992  Ian Lance Taylor  (ian@cygnus.com)
2917
2918         * m68k.h: merged Motorola and MIT syntax.
2919
2920 Thu Sep  3 09:33:22 1992  Steve Chamberlain  (sac@thepub.cygnus.com)
2921
2922         * m68k.h (pmove): make the tests less strict, the 68k book is
2923         wrong.
2924
2925 Tue Aug 25 23:25:19 1992  Ken Raeburn  (raeburn@cambridge.cygnus.com)
2926
2927         * m68k.h (m68ec030): Defined as alias for 68030.
2928         (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2929         for immediate 0-7 added.  Set up some opcodes (ptest, bkpt) to use
2930         them.  Tightened description of "fmovex" to distinguish it from
2931         some "pmove" encodings.  Added "pmove" for 68030 MMU regs, cleaned
2932         up descriptions that claimed versions were available for chips not
2933         supporting them.  Added "pmovefd".
2934
2935 Mon Aug 24 12:04:51 1992  Steve Chamberlain  (sac@thepub.cygnus.com)
2936
2937         * m68k.h: fix where the . goes in divull
2938
2939 Wed Aug 19 11:22:24 1992  Ian Lance Taylor  (ian@cygnus.com)
2940
2941         * m68k.h: the cas2 instruction is supposed to be written with
2942         indirection on the last two operands, which can be either data or
2943         address registers.  Added a new operand type 'r' which accepts
2944         either register type.  Added new cases for cas2l and cas2w which
2945         use them.  Corrected masks for cas2 which failed to recognize use
2946         of address register.
2947
2948 Fri Aug 14 14:20:38 1992  Per Bothner  (bothner@cygnus.com)
2949
2950         * m68k.h: Merged in patches (mostly m68040-specific) from
2951         Colin Smith <colin@wrs.com>.
2952
2953         * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2954         base).  Also cleaned up duplicates, re-ordered instructions for
2955         the sake of dis-assembling (so aliases come after standard names).
2956         * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2957
2958 Wed Aug 12 16:38:15 1992  Steve Chamberlain  (sac@thepub.cygnus.com)
2959
2960         * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2961         all missing .s
2962
2963 Mon Aug 10 23:22:33 1992  Ken Raeburn  (raeburn@cygnus.com)
2964
2965         * sparc.h: Moved tables to BFD library.
2966
2967         * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2968
2969 Sun Jun 28 13:29:03 1992  Fred Fish  (fnf@cygnus.com)
2970
2971         * h8300.h: Finish filling in all the holes in the opcode table,
2972         so that the Lucid C compiler can digest this as well...
2973
2974 Fri Jun 26 21:27:17 1992  John Gilmore  (gnu at cygnus.com)
2975
2976         * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2977         Fix opcodes on various sizes of fild/fist instructions
2978         (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2979         Use tabs to indent for comments.  Fixes suggested by Minh Tran-Le.
2980
2981 Thu Jun 25 16:13:26 1992  Stu Grossman  (grossman at cygnus.com)
2982
2983         * h8300.h: Fill in all the holes in the opcode table so that the
2984         losing HPUX C compiler can digest this...
2985
2986 Thu Jun 11 12:15:25 1992  John Gilmore  (gnu at cygnus.com)
2987
2988         * mips.h: Fix decoding of coprocessor instructions, somewhat.
2989         (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2990
2991 Thu May 28 11:17:44 1992  Jim Wilson  (wilson@sphagnum.cygnus.com)
2992
2993         * sparc.h: Add new architecture variant sparclite; add its scan
2994         and divscc opcodes.  Define ARCHITECTURES_CONFLICT_P macro.
2995
2996 Tue May  5 14:23:27 1992  Per Bothner  (bothner@rtl.cygnus.com)
2997
2998         * mips.h: Add some more opcode synonyms (from Frank Yellin,
2999         fy@lucid.com).
3000
3001 Thu Apr 16 18:25:26 1992  Per Bothner  (bothner@cygnus.com)
3002
3003         * rs6k.h: New version from IBM (Metin).
3004
3005 Thu Apr  9 00:31:19 1992  Per Bothner  (bothner@rtl.cygnus.com)
3006
3007         * rs6k.h: Fix incorrect extended opcode for instructions `fm'
3008         and `fd'.  (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
3009
3010 Tue Apr  7 13:38:47 1992  Stu Grossman  (grossman at cygnus.com)
3011
3012         * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
3013
3014 Fri Apr  3 11:30:20 1992  Fred Fish  (fnf@cygnus.com)
3015
3016         * m68k.h (one, two): Cast macro args to unsigned to suppress
3017         complaints from compiler and lint about integer overflow during
3018         shift.
3019
3020 Sun Mar 29 12:22:08 1992  John Gilmore  (gnu at cygnus.com)
3021
3022         * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
3023
3024 Fri Mar  6 00:22:38 1992  John Gilmore  (gnu at cygnus.com)
3025
3026         * mips.h: Make bitfield layout depend on the HOST compiler,
3027         not on the TARGET system.
3028
3029 Fri Feb 21 01:29:51 1992  K. Richard Pixley  (rich@cygnus.com)
3030
3031         * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
3032           scmp, slod, smov, ssca, ssto.  Curtesy Minh Tran-Le
3033           <TRANLE@INTELLICORP.COM>.
3034
3035 Thu Jan 30 07:31:44 1992  Steve Chamberlain  (sac at rtl.cygnus.com)
3036
3037         * h8300.h: turned op_type enum into #define list
3038
3039 Thu Jan 30 01:07:24 1992  John Gilmore  (gnu at cygnus.com)
3040
3041         * sparc.h: Remove "cypress" architecture.  Remove "fitox" and
3042         similar instructions -- they've been renamed to "fitoq", etc.
3043         REALLY fix tsubcctv.  Fix "fcmpeq" and "fcmpq" which had wrong
3044         number of arguments.
3045         * h8300.h: Remove extra ; which produces compiler warning.
3046
3047 Tue Jan 28 22:59:22 1992  Stu Grossman  (grossman at cygnus.com)
3048
3049         * sparc.h: fix opcode for tsubcctv.
3050
3051 Tue Jan  7 17:19:39 1992  K. Richard Pixley  (rich at cygnus.com)
3052
3053         * sparc.h: fba and cba are now aliases for fb and cb respectively.
3054
3055 Fri Dec 27 10:55:50 1991  Per Bothner  (bothner at cygnus.com)
3056
3057         * sparc.h (nop): Made the 'lose' field be even tighter,
3058         so only a standard 'nop' is disassembled as a nop.
3059
3060 Sun Dec 22 12:18:18 1991  Michael Tiemann  (tiemann at cygnus.com)
3061
3062         * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
3063         disassembled as a nop.
3064
3065 Wed Dec 18 17:19:44 1991  Stu Grossman  (grossman at cygnus.com)
3066
3067         * m68k.h, sparc.h: ANSIfy enums.
3068
3069 Tue Dec 10 00:22:20 1991  K. Richard Pixley  (rich at rtl.cygnus.com)
3070
3071         * sparc.h: fix a typo.
3072
3073 Sat Nov 30 20:40:51 1991  Steve Chamberlain  (sac at rtl.cygnus.com)
3074
3075         * a29k.h, arm.h, h8300.h,  i386.h,  i860.h, i960.h , m68k.h,
3076         m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
3077         vax.h: Renamed from ../<foo>-opcode.h.
3078
3079 \f
3080 Local Variables:
3081 version-control: never
3082 End: