Remove spurious comment
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
2
3 * v850.h: Remove spurious comment.
4
5 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
6
7 * h8300.h: Fix compile time warning messages
8
9 2001-09-04 Richard Henderson <rth@redhat.com>
10
11 * alpha.h (struct alpha_operand): Pack elements into bitfields.
12
13 2001-08-31 Eric Christopher <echristo@redhat.com>
14
15 * mips.h: Remove CPU_MIPS32_4K.
16
17 2001-08-27 Torbjorn Granlund <tege@swox.com>
18
19 * ppc.h (PPC_OPERAND_DS): Define.
20
21 2001-08-25 Andreas Jaeger <aj@suse.de>
22
23 * d30v.h: Fix declaration of reg_name_cnt.
24
25 * d10v.h: Fix declaration of d10v_reg_name_cnt.
26
27 * arc.h: Add prototypes from opcodes/arc-opc.c.
28
29 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
30
31 * mips.h (INSN_10000): Define.
32 (OPCODE_IS_MEMBER): Check for INSN_10000.
33
34 2001-08-10 Alan Modra <amodra@one.net.au>
35
36 * ppc.h: Revert 2001-08-08.
37
38 2001-08-08 Alan Modra <amodra@one.net.au>
39
40 1999-10-25 Torbjorn Granlund <tege@swox.com>
41 * ppc.h (struct powerpc_operand): New field `reloc'.
42
43 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
44
45 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
46 (cgen_cpu_desc): Ditto.
47
48 2001-07-07 Ben Elliston <bje@redhat.com>
49
50 * m88k.h: Clean up and reformat. Remove unused code.
51
52 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
53
54 * cgen.h (cgen_keyword): Add nonalpha_chars field.
55
56 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
57
58 * mips.h (CPU_R12000): Define.
59
60 2001-05-23 John Healy <jhealy@redhat.com>
61
62 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
63
64 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
65
66 * mips.h (INSN_ISA_MASK): Define.
67
68 2001-05-12 Alan Modra <amodra@one.net.au>
69
70 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
71 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
72 and use InvMem as these insns must have register operands.
73
74 2001-05-04 Alan Modra <amodra@one.net.au>
75
76 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
77 and pextrw to swap reg/rm assignments.
78
79 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
80
81 * cris.h (enum cris_insn_version_usage): Correct comment for
82 cris_ver_v3p.
83
84 2001-03-24 Alan Modra <alan@linuxcare.com.au>
85
86 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
87 Add InvMem to first operand of "maskmovdqu".
88
89 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
90
91 * cris.h (ADD_PC_INCR_OPCODE): New macro.
92
93 2001-03-21 Kazu Hirata <kazu@hxi.com>
94
95 * h8300.h: Fix formatting.
96
97 2001-03-22 Alan Modra <alan@linuxcare.com.au>
98
99 * i386.h (i386_optab): Add paddq, psubq.
100
101 2001-03-19 Alan Modra <alan@linuxcare.com.au>
102
103 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
104
105 2001-02-28 Igor Shevlyakov <igor@windriver.com>
106
107 * m68k.h: new defines for Coldfire V4. Update mcf to know
108 about mcf5407.
109
110 2001-02-18 lars brinkhoff <lars@nocrew.org>
111
112 * pdp11.h: New file.
113
114 2001-02-12 Jan Hubicka <jh@suse.cz>
115
116 * i386.h (i386_optab): SSE integer converison instructions have
117 64bit versions on x86-64.
118
119 2001-02-10 Nick Clifton <nickc@redhat.com>
120
121 * mips.h: Remove extraneous whitespace. Formating change to allow
122 for future contribution.
123
124 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
125
126 * s390.h: New file.
127
128 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
129
130 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
131 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
132 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
133
134 2001-01-24 Karsten Keil <kkeil@suse.de>
135
136 * i386.h (i386_optab): Fix swapgs
137
138 2001-01-14 Alan Modra <alan@linuxcare.com.au>
139
140 * hppa.h: Describe new '<' and '>' operand types, and tidy
141 existing comments.
142 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
143 Remove duplicate "ldw j(s,b),x". Sort some entries.
144
145 2001-01-13 Jan Hubicka <jh@suse.cz>
146
147 * i386.h (i386_optab): Fix pusha and ret templates.
148
149 2001-01-11 Peter Targett <peter.targett@arccores.com>
150
151 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
152 definitions for masking cpu type.
153 (arc_ext_operand_value) New structure for storing extended
154 operands.
155 (ARC_OPERAND_*) Flags for operand values.
156
157 2001-01-10 Jan Hubicka <jh@suse.cz>
158
159 * i386.h (pinsrw): Add.
160 (pshufw): Remove.
161 (cvttpd2dq): Fix operands.
162 (cvttps2dq): Likewise.
163 (movq2q): Rename to movdq2q.
164
165 2001-01-10 Richard Schaal <richard.schaal@intel.com>
166
167 * i386.h: Correct movnti instruction.
168
169 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
170
171 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
172 of operands (unsigned char or unsigned short).
173 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
174 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
175
176 2001-01-05 Jan Hubicka <jh@suse.cz>
177
178 * i386.h (i386_optab): Make [sml]fence template to use immext field.
179
180 2001-01-03 Jan Hubicka <jh@suse.cz>
181
182 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
183 introduced by Pentium4
184
185 2000-12-30 Jan Hubicka <jh@suse.cz>
186
187 * i386.h (i386_optab): Add "rex*" instructions;
188 add swapgs; disable jmp/call far direct instructions for
189 64bit mode; add syscall and sysret; disable registers for 0xc6
190 template. Add 'q' suffixes to extendable instructions, disable
191 obsolete instructions, add new sign/zero extension ones.
192 (i386_regtab): Add extended registers.
193 (*Suf): Add No_qSuf.
194 (q_Suf, wlq_Suf, bwlq_Suf): New.
195
196 2000-12-20 Jan Hubicka <jh@suse.cz>
197
198 * i386.h (i386_optab): Replace "Imm" with "EncImm".
199 (i386_regtab): Add flags field.
200
201 2000-12-12 Nick Clifton <nickc@redhat.com>
202
203 * mips.h: Fix formatting.
204
205 2000-12-01 Chris Demetriou <cgd@sibyte.com>
206
207 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
208 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
209 OP_*_SYSCALL definitions.
210 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
211 19 bit wait codes.
212 (MIPS operand specifier comments): Remove 'm', add 'U' and
213 'J', and update the meaning of 'B' so that it's more general.
214
215 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
216 INSN_ISA5): Renumber, redefine to mean the ISA at which the
217 instruction was added.
218 (INSN_ISA32): New constant.
219 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
220 Renumber to avoid new and/or renumbered INSN_* constants.
221 (INSN_MIPS32): Delete.
222 (ISA_UNKNOWN): New constant to indicate unknown ISA.
223 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
224 ISA_MIPS32): New constants, defined to be the mask of INSN_*
225 constants available at that ISA level.
226 (CPU_UNKNOWN): New constant to indicate unknown CPU.
227 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
228 define it with a unique value.
229 (OPCODE_IS_MEMBER): Update for new ISA membership-related
230 constant meanings.
231
232 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
233 definitions.
234
235 * mips.h (CPU_SB1): New constant.
236
237 2000-10-20 Jakub Jelinek <jakub@redhat.com>
238
239 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
240 Note that '3' is used for siam operand.
241
242 2000-09-22 Jim Wilson <wilson@cygnus.com>
243
244 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
245
246 2000-09-13 Anders Norlander <anorland@acc.umu.se>
247
248 * mips.h: Use defines instead of hard-coded processor numbers.
249 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
250 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
251 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
252 CPU_4KC, CPU_4KM, CPU_4KP): Define..
253 (OPCODE_IS_MEMBER): Use new defines.
254 (OP_MASK_SEL, OP_SH_SEL): Define.
255 (OP_MASK_CODE20, OP_SH_CODE20): Define.
256 Add 'P' to used characters.
257 Use 'H' for coprocessor select field.
258 Use 'm' for 20 bit breakpoint code.
259 Document new arg characters and add to used characters.
260 (INSN_MIPS32): New define for MIPS32 extensions.
261 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
262
263 2000-09-05 Alan Modra <alan@linuxcare.com.au>
264
265 * hppa.h: Mention cz completer.
266
267 2000-08-16 Jim Wilson <wilson@cygnus.com>
268
269 * ia64.h (IA64_OPCODE_POSTINC): New.
270
271 2000-08-15 H.J. Lu <hjl@gnu.org>
272
273 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
274 IgnoreSize change.
275
276 2000-08-08 Jason Eckhardt <jle@cygnus.com>
277
278 * i860.h: Small formatting adjustments.
279
280 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
281
282 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
283 Move related opcodes closer to each other.
284 Minor changes in comments, list undefined opcodes.
285
286 2000-07-26 Dave Brolley <brolley@redhat.com>
287
288 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
289
290 2000-07-22 Jason Eckhardt <jle@cygnus.com>
291
292 * i860.h (btne, bte, bla): Changed these opcodes
293 to use sbroff ('r') instead of split16 ('s').
294 (J, K, L, M): New operand types for 16-bit aligned fields.
295 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
296 use I, J, K, L, M instead of just I.
297 (T, U): New operand types for split 16-bit aligned fields.
298 (st.x): Changed these opcodes to use S, T, U instead of just S.
299 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
300 exist on the i860.
301 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
302 (pfeq.ss, pfeq.dd): New opcodes.
303 (st.s): Fixed incorrect mask bits.
304 (fmlow): Fixed incorrect mask bits.
305 (fzchkl, pfzchkl): Fixed incorrect mask bits.
306 (faddz, pfaddz): Fixed incorrect mask bits.
307 (form, pform): Fixed incorrect mask bits.
308 (pfld.l): Fixed incorrect mask bits.
309 (fst.q): Fixed incorrect mask bits.
310 (all floating point opcodes): Fixed incorrect mask bits for
311 handling of dual bit.
312
313 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
314
315 cris.h: New file.
316
317 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
318
319 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
320 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
321 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
322 (AVR_ISA_M83): Define for ATmega83, ATmega85.
323 (espm): Remove, because ESPM removed in databook update.
324 (eicall, eijmp): Move to the end of opcode table.
325
326 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
327
328 * m68hc11.h: New file for support of Motorola 68hc11.
329
330 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
331
332 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
333
334 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
335
336 * avr.h: New file with AVR opcodes.
337
338 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
339
340 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
341
342 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
343
344 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
345
346 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
347
348 * i386.h: Use sl_FP, not sl_Suf for fild.
349
350 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
351
352 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
353 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
354 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
355 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
356
357 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
358
359 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
360
361 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
362 Alexander Sokolov <robocop@netlink.ru>
363
364 * i386.h (i386_optab): Add cpu_flags for all instructions.
365
366 2000-05-13 Alan Modra <alan@linuxcare.com.au>
367
368 From Gavin Romig-Koch <gavin@cygnus.com>
369 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
370
371 2000-05-04 Timothy Wall <twall@cygnus.com>
372
373 * tic54x.h: New.
374
375 2000-05-03 J.T. Conklin <jtc@redback.com>
376
377 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
378 (PPC_OPERAND_VR): New operand flag for vector registers.
379
380 2000-05-01 Kazu Hirata <kazu@hxi.com>
381
382 * h8300.h (EOP): Add missing initializer.
383
384 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
385
386 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
387 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
388 New operand types l,y,&,fe,fE,fx added to support above forms.
389 (pa_opcodes): Replaced usage of 'x' as source/target for
390 floating point double-word loads/stores with 'fx'.
391
392 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
393 David Mosberger <davidm@hpl.hp.com>
394 Timothy Wall <twall@cygnus.com>
395 Jim Wilson <wilson@cygnus.com>
396
397 * ia64.h: New file.
398
399 2000-03-27 Nick Clifton <nickc@cygnus.com>
400
401 * d30v.h (SHORT_A1): Fix value.
402 (SHORT_AR): Renumber so that it is at the end of the list of short
403 instructions, not the end of the list of long instructions.
404
405 2000-03-26 Alan Modra <alan@linuxcare.com>
406
407 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
408 problem isn't really specific to Unixware.
409 (OLDGCC_COMPAT): Define.
410 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
411 destination %st(0).
412 Fix lots of comments.
413
414 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
415
416 * d30v.h:
417 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
418 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
419 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
420 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
421 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
422 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
423 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
424
425 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
426
427 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
428 fistpd without suffix.
429
430 2000-02-24 Nick Clifton <nickc@cygnus.com>
431
432 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
433 'signed_overflow_ok_p'.
434 Delete prototypes for cgen_set_flags() and cgen_get_flags().
435
436 2000-02-24 Andrew Haley <aph@cygnus.com>
437
438 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
439 (CGEN_CPU_TABLE): flags: new field.
440 Add prototypes for new functions.
441
442 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
443
444 * i386.h: Add some more UNIXWARE_COMPAT comments.
445
446 2000-02-23 Linas Vepstas <linas@linas.org>
447
448 * i370.h: New file.
449
450 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
451
452 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
453 cannot be combined in parallel with ADD/SUBppp.
454
455 2000-02-22 Andrew Haley <aph@cygnus.com>
456
457 * mips.h: (OPCODE_IS_MEMBER): Add comment.
458
459 1999-12-30 Andrew Haley <aph@cygnus.com>
460
461 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
462 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
463 insns.
464
465 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
466
467 * i386.h: Qualify intel mode far call and jmp with x_Suf.
468
469 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
470
471 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
472 indirect jumps and calls. Add FF/3 call for intel mode.
473
474 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
475
476 * mn10300.h: Add new operand types. Add new instruction formats.
477
478 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
479
480 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
481 instruction.
482
483 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
484
485 * mips.h (INSN_ISA5): New.
486
487 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
488
489 * mips.h (OPCODE_IS_MEMBER): New.
490
491 1999-10-29 Nick Clifton <nickc@cygnus.com>
492
493 * d30v.h (SHORT_AR): Define.
494
495 1999-10-18 Michael Meissner <meissner@cygnus.com>
496
497 * alpha.h (alpha_num_opcodes): Convert to unsigned.
498 (alpha_num_operands): Ditto.
499
500 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
501
502 * hppa.h (pa_opcodes): Add load and store cache control to
503 instructions. Add ordered access load and store.
504
505 * hppa.h (pa_opcode): Add new entries for addb and addib.
506
507 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
508
509 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
510
511 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
512
513 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
514
515 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
516
517 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
518 and "be" using completer prefixes.
519
520 * hppa.h (pa_opcodes): Add initializers to silence compiler.
521
522 * hppa.h: Update comments about character usage.
523
524 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
525
526 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
527 up the new fstw & bve instructions.
528
529 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
530
531 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
532 instructions.
533
534 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
535
536 * hppa.h (pa_opcodes): Add long offset double word load/store
537 instructions.
538
539 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
540 stores.
541
542 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
543
544 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
545
546 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
547
548 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
549
550 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
551
552 * hppa.h (pa_opcodes): Add support for "b,l".
553
554 * hppa.h (pa_opcodes): Add support for "b,gate".
555
556 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
557
558 * hppa.h (pa_opcodes): Use 'fX' for first register operand
559 in xmpyu.
560
561 * hppa.h (pa_opcodes): Fix mask for probe and probei.
562
563 * hppa.h (pa_opcodes): Fix mask for depwi.
564
565 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
566
567 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
568 an explicit output argument.
569
570 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
571
572 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
573 Add a few PA2.0 loads and store variants.
574
575 1999-09-04 Steve Chamberlain <sac@pobox.com>
576
577 * pj.h: New file.
578
579 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
580
581 * i386.h (i386_regtab): Move %st to top of table, and split off
582 other fp reg entries.
583 (i386_float_regtab): To here.
584
585 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
586
587 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
588 by 'f'.
589
590 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
591 Add supporting args.
592
593 * hppa.h: Document new completers and args.
594 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
595 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
596 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
597 pmenb and pmdis.
598
599 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
600 hshr, hsub, mixh, mixw, permh.
601
602 * hppa.h (pa_opcodes): Change completers in instructions to
603 use 'c' prefix.
604
605 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
606 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
607
608 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
609 fnegabs to use 'I' instead of 'F'.
610
611 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
612
613 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
614 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
615 Alphabetically sort PIII insns.
616
617 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
618
619 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
620
621 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
622
623 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
624 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
625
626 * hppa.h: Document 64 bit condition completers.
627
628 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
629
630 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
631
632 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
633
634 * i386.h (i386_optab): Add DefaultSize modifier to all insns
635 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
636 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
637
638 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
639 Jeff Law <law@cygnus.com>
640
641 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
642
643 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
644
645 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
646 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
647
648 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
649
650 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
651
652 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
653
654 * hppa.h (struct pa_opcode): Add new field "flags".
655 (FLAGS_STRICT): Define.
656
657 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
658 Jeff Law <law@cygnus.com>
659
660 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
661
662 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
663
664 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
665
666 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
667 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
668 flag to fcomi and friends.
669
670 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
671
672 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
673 integer logical instructions.
674
675 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
676
677 * m68k.h: Document new formats `E', `G', `H' and new places `N',
678 `n', `o'.
679
680 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
681 and new places `m', `M', `h'.
682
683 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
684
685 * hppa.h (pa_opcodes): Add several processor specific system
686 instructions.
687
688 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
689
690 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
691 "addb", and "addib" to be used by the disassembler.
692
693 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
694
695 * i386.h (ReverseModrm): Remove all occurences.
696 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
697 movmskps, pextrw, pmovmskb, maskmovq.
698 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
699 ignore the data size prefix.
700
701 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
702 Mostly stolen from Doug Ledford <dledford@redhat.com>
703
704 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
705
706 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
707
708 1999-04-14 Doug Evans <devans@casey.cygnus.com>
709
710 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
711 (CGEN_ATTR_TYPE): Update.
712 (CGEN_ATTR_MASK): Number booleans starting at 0.
713 (CGEN_ATTR_VALUE): Update.
714 (CGEN_INSN_ATTR): Update.
715
716 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
717
718 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
719 instructions.
720
721 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
722
723 * hppa.h (bb, bvb): Tweak opcode/mask.
724
725
726 1999-03-22 Doug Evans <devans@casey.cygnus.com>
727
728 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
729 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
730 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
731 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
732 Delete member max_insn_size.
733 (enum cgen_cpu_open_arg): New enum.
734 (cpu_open): Update prototype.
735 (cpu_open_1): Declare.
736 (cgen_set_cpu): Delete.
737
738 1999-03-11 Doug Evans <devans@casey.cygnus.com>
739
740 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
741 (CGEN_OPERAND_NIL): New macro.
742 (CGEN_OPERAND): New member `type'.
743 (@arch@_cgen_operand_table): Delete decl.
744 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
745 (CGEN_OPERAND_TABLE): New struct.
746 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
747 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
748 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
749 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
750 {get,set}_{int,vma}_operand.
751 (@arch@_cgen_cpu_open): New arg `isa'.
752 (cgen_set_cpu): Ditto.
753
754 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
755
756 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
757
758 1999-02-25 Doug Evans <devans@casey.cygnus.com>
759
760 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
761 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
762 enum cgen_hw_type.
763 (CGEN_HW_TABLE): New struct.
764 (hw_table): Delete declaration.
765 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
766 to table entry to enum.
767 (CGEN_OPINST): Ditto.
768 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
769
770 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
771
772 * alpha.h (AXP_OPCODE_EV6): New.
773 (AXP_OPCODE_NOPAL): Include it.
774
775 1999-02-09 Doug Evans <devans@casey.cygnus.com>
776
777 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
778 All uses updated. New members int_insn_p, max_insn_size,
779 parse_operand,insert_operand,extract_operand,print_operand,
780 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
781 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
782 extract_handlers,print_handlers.
783 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
784 (CGEN_ATTR_BOOL_OFFSET): New macro.
785 (CGEN_ATTR_MASK): Subtract it to compute bit number.
786 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
787 (cgen_opcode_handler): Renamed from cgen_base.
788 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
789 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
790 all uses updated.
791 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
792 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
793 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
794 (CGEN_OPCODE,CGEN_IBASE): New types.
795 (CGEN_INSN): Rewrite.
796 (CGEN_{ASM,DIS}_HASH*): Delete.
797 (init_opcode_table,init_ibld_table): Declare.
798 (CGEN_INSN_ATTR): New type.
799
800 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
801
802 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
803 (x_FP, d_FP, dls_FP, sldx_FP): Define.
804 Change *Suf definitions to include x and d suffixes.
805 (movsx): Use w_Suf and b_Suf.
806 (movzx): Likewise.
807 (movs): Use bwld_Suf.
808 (fld): Change ordering. Use sld_FP.
809 (fild): Add Intel Syntax equivalent of fildq.
810 (fst): Use sld_FP.
811 (fist): Use sld_FP.
812 (fstp): Use sld_FP. Add x_FP version.
813 (fistp): LLongMem version for Intel Syntax.
814 (fcom, fcomp): Use sld_FP.
815 (fadd, fiadd, fsub): Use sld_FP.
816 (fsubr): Use sld_FP.
817 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
818
819 1999-01-27 Doug Evans <devans@casey.cygnus.com>
820
821 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
822 CGEN_MODE_UINT.
823
824 1999-01-16 Jeffrey A Law (law@cygnus.com)
825
826 * hppa.h (bv): Fix mask.
827
828 1999-01-05 Doug Evans <devans@casey.cygnus.com>
829
830 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
831 (CGEN_ATTR): Use it.
832 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
833 (CGEN_ATTR_TABLE): New member dfault.
834
835 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
836
837 * mips.h (MIPS16_INSN_BRANCH): New.
838
839 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
840
841 The following is part of a change made by Edith Epstein
842 <eepstein@sophia.cygnus.com> as part of a project to merge in
843 changes by HP; HP did not create ChangeLog entries.
844
845 * hppa.h (completer_chars): list of chars to not put a space
846 after.
847
848 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
849
850 * i386.h (i386_optab): Permit w suffix on processor control and
851 status word instructions.
852
853 1998-11-30 Doug Evans <devans@casey.cygnus.com>
854
855 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
856 (struct cgen_keyword_entry): Ditto.
857 (struct cgen_operand): Ditto.
858 (CGEN_IFLD): New typedef, with associated access macros.
859 (CGEN_IFMT): New typedef, with associated access macros.
860 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
861 (CGEN_IVALUE): New typedef.
862 (struct cgen_insn): Delete const on syntax,attrs members.
863 `format' now points to format data. Type of `value' is now
864 CGEN_IVALUE.
865 (struct cgen_opcode_table): New member ifld_table.
866
867 1998-11-18 Doug Evans <devans@casey.cygnus.com>
868
869 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
870 (CGEN_OPERAND_INSTANCE): New member `attrs'.
871 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
872 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
873 (cgen_opcode_table): Update type of dis_hash fn.
874 (extract_operand): Update type of `insn_value' arg.
875
876 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
877
878 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
879
880 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
881
882 * mips.h (INSN_MULT): Added.
883
884 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
885
886 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
887
888 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
889
890 * cgen.h (CGEN_INSN_INT): New typedef.
891 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
892 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
893 (CGEN_INSN_BYTES_PTR): New typedef.
894 (CGEN_EXTRACT_INFO): New typedef.
895 (cgen_insert_fn,cgen_extract_fn): Update.
896 (cgen_opcode_table): New member `insn_endian'.
897 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
898 (insert_operand,extract_operand): Update.
899 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
900
901 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
902
903 * cgen.h (CGEN_ATTR_BOOLS): New macro.
904 (struct CGEN_HW_ENTRY): New member `attrs'.
905 (CGEN_HW_ATTR): New macro.
906 (struct CGEN_OPERAND_INSTANCE): New member `name'.
907 (CGEN_INSN_INVALID_P): New macro.
908
909 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
910
911 * hppa.h: Add "fid".
912
913 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
914
915 From Robert Andrew Dale <rob@nb.net>
916 * i386.h (i386_optab): Add AMD 3DNow! instructions.
917 (AMD_3DNOW_OPCODE): Define.
918
919 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
920
921 * d30v.h (EITHER_BUT_PREFER_MU): Define.
922
923 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
924
925 * cgen.h (cgen_insn): #if 0 out element `cdx'.
926
927 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
928
929 Move all global state data into opcode table struct, and treat
930 opcode table as something that is "opened/closed".
931 * cgen.h (CGEN_OPCODE_DESC): New type.
932 (all fns): New first arg of opcode table descriptor.
933 (cgen_set_parse_operand_fn): Add prototype.
934 (cgen_current_machine,cgen_current_endian): Delete.
935 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
936 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
937 dis_hash_table,dis_hash_table_entries.
938 (opcode_open,opcode_close): Add prototypes.
939
940 * cgen.h (cgen_insn): New element `cdx'.
941
942 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
943
944 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
945
946 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
947
948 * mn10300.h: Add "no_match_operands" field for instructions.
949 (MN10300_MAX_OPERANDS): Define.
950
951 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
952
953 * cgen.h (cgen_macro_insn_count): Declare.
954
955 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
956
957 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
958 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
959 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
960 set_{int,vma}_operand.
961
962 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
963
964 * mn10300.h: Add "machine" field for instructions.
965 (MN103, AM30): Define machine types.
966
967 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
968
969 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
970
971 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
972
973 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
974
975 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
976
977 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
978 and ud2b.
979 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
980 those that happen to be implemented on pentiums.
981
982 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
983
984 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
985 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
986 with Size16|IgnoreSize or Size32|IgnoreSize.
987
988 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
989
990 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
991 (REPE): Rename to REPE_PREFIX_OPCODE.
992 (i386_regtab_end): Remove.
993 (i386_prefixtab, i386_prefixtab_end): Remove.
994 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
995 of md_begin.
996 (MAX_OPCODE_SIZE): Define.
997 (i386_optab_end): Remove.
998 (sl_Suf): Define.
999 (sl_FP): Use sl_Suf.
1000
1001 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1002 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1003 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1004 data32, dword, and adword prefixes.
1005 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1006 regs.
1007
1008 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1009
1010 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1011
1012 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1013 register operands, because this is a common idiom. Flag them with
1014 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1015 fdivrp because gcc erroneously generates them. Also flag with a
1016 warning.
1017
1018 * i386.h: Add suffix modifiers to most insns, and tighter operand
1019 checks in some cases. Fix a number of UnixWare compatibility
1020 issues with float insns. Merge some floating point opcodes, using
1021 new FloatMF modifier.
1022 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1023 consistency.
1024
1025 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1026 IgnoreDataSize where appropriate.
1027
1028 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1029
1030 * i386.h: (one_byte_segment_defaults): Remove.
1031 (two_byte_segment_defaults): Remove.
1032 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1033
1034 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1035
1036 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1037 (cgen_hw_lookup_by_num): Declare.
1038
1039 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1040
1041 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1042 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1043
1044 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1045
1046 * cgen.h (cgen_asm_init_parse): Delete.
1047 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1048 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1049
1050 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1051
1052 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1053 (cgen_asm_finish_insn): Update prototype.
1054 (cgen_insn): New members num, data.
1055 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1056 dis_hash, dis_hash_table_size moved to ...
1057 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1058 All uses updated. New members asm_hash_p, dis_hash_p.
1059 (CGEN_MINSN_EXPANSION): New struct.
1060 (cgen_expand_macro_insn): Declare.
1061 (cgen_macro_insn_count): Declare.
1062 (get_insn_operands): Update prototype.
1063 (lookup_get_insn_operands): Declare.
1064
1065 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1066
1067 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1068 regKludge. Add operands types for string instructions.
1069
1070 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1071
1072 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1073 table.
1074
1075 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1076
1077 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1078 for `gettext'.
1079
1080 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1081
1082 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1083 Add IsString flag to string instructions.
1084 (IS_STRING): Don't define.
1085 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1086 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1087 (SS_PREFIX_OPCODE): Define.
1088
1089 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1090
1091 * i386.h: Revert March 24 patch; no more LinearAddress.
1092
1093 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1094
1095 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1096 instructions, and instead add FWait opcode modifier. Add short
1097 form of fldenv and fstenv.
1098 (FWAIT_OPCODE): Define.
1099
1100 * i386.h (i386_optab): Change second operand constraint of `mov
1101 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1102 allow legal instructions such as `movl %gs,%esi'
1103
1104 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1105
1106 * h8300.h: Various changes to fully bracket initializers.
1107
1108 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1109
1110 * i386.h: Set LinearAddress for lidt and lgdt.
1111
1112 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1113
1114 * cgen.h (CGEN_BOOL_ATTR): New macro.
1115
1116 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1117
1118 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1119
1120 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1121
1122 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1123 (cgen_insn): Record syntax and format entries here, rather than
1124 separately.
1125
1126 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1127
1128 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1129
1130 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1131
1132 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1133 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1134 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1135
1136 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1137
1138 * cgen.h (lookup_insn): New argument alias_p.
1139
1140 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1141
1142 Fix rac to accept only a0:
1143 * d10v.h (OPERAND_ACC): Split into:
1144 (OPERAND_ACC0, OPERAND_ACC1) .
1145 (OPERAND_GPR): Define.
1146
1147 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1148
1149 * cgen.h (CGEN_FIELDS): Define here.
1150 (CGEN_HW_ENTRY): New member `type'.
1151 (hw_list): Delete decl.
1152 (enum cgen_mode): Declare.
1153 (CGEN_OPERAND): New member `hw'.
1154 (enum cgen_operand_instance_type): Declare.
1155 (CGEN_OPERAND_INSTANCE): New type.
1156 (CGEN_INSN): New member `operands'.
1157 (CGEN_OPCODE_DATA): Make hw_list const.
1158 (get_insn_operands,lookup_insn): Add prototypes for.
1159
1160 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1161
1162 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1163 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1164 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1165 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1166
1167 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1168
1169 * cgen.h: Correct typo in comment end marker.
1170
1171 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1172
1173 * tic30.h: New file.
1174
1175 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1176
1177 * cgen.h: Add prototypes for cgen_save_fixups(),
1178 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1179 of cgen_asm_finish_insn() to return a char *.
1180
1181 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1182
1183 * cgen.h: Formatting changes to improve readability.
1184
1185 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1186
1187 * cgen.h (*): Clean up pass over `struct foo' usage.
1188 (CGEN_ATTR): Make unsigned char.
1189 (CGEN_ATTR_TYPE): Update.
1190 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1191 (cgen_base): Move member `attrs' to cgen_insn.
1192 (CGEN_KEYWORD): New member `null_entry'.
1193 (CGEN_{SYNTAX,FORMAT}): New types.
1194 (cgen_insn): Format and syntax separated from each other.
1195
1196 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1197
1198 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1199 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1200 flags_{used,set} long.
1201 (d30v_operand): Make flags field long.
1202
1203 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1204
1205 * m68k.h: Fix comment describing operand types.
1206
1207 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1208
1209 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1210 everything else after down.
1211
1212 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1213
1214 * d10v.h (OPERAND_FLAG): Split into:
1215 (OPERAND_FFLAG, OPERAND_CFLAG) .
1216
1217 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1218
1219 * mips.h (struct mips_opcode): Changed comments to reflect new
1220 field usage.
1221
1222 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1223
1224 * mips.h: Added to comments a quick-ref list of all assigned
1225 operand type characters.
1226 (OP_{MASK,SH}_PERFREG): New macros.
1227
1228 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1229
1230 * sparc.h: Add '_' and '/' for v9a asr's.
1231 Patch from David Miller <davem@vger.rutgers.edu>
1232
1233 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1234
1235 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1236 area are not available in the base model (H8/300).
1237
1238 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1239
1240 * m68k.h: Remove documentation of ` operand specifier.
1241
1242 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1243
1244 * m68k.h: Document q and v operand specifiers.
1245
1246 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1247
1248 * v850.h (struct v850_opcode): Add processors field.
1249 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1250 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1251 (PROCESSOR_V850EA): New bit constants.
1252
1253 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1254
1255 Merge changes from Martin Hunt:
1256
1257 * d30v.h: Allow up to 64 control registers. Add
1258 SHORT_A5S format.
1259
1260 * d30v.h (LONG_Db): New form for delayed branches.
1261
1262 * d30v.h: (LONG_Db): New form for repeati.
1263
1264 * d30v.h (SHORT_D2B): New form.
1265
1266 * d30v.h (SHORT_A2): New form.
1267
1268 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1269 registers are used. Needed for VLIW optimization.
1270
1271 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1272
1273 * cgen.h: Move assembler interface section
1274 up so cgen_parse_operand_result is defined for cgen_parse_address.
1275 (cgen_parse_address): Update prototype.
1276
1277 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1278
1279 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1280
1281 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1282
1283 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1284 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1285 <paubert@iram.es>.
1286
1287 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1288 <paubert@iram.es>.
1289
1290 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1291 <paubert@iram.es>.
1292
1293 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1294 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1295
1296 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1297
1298 * v850.h (V850_NOT_R0): New flag.
1299
1300 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1301
1302 * v850.h (struct v850_opcode): Remove flags field.
1303
1304 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1305
1306 * v850.h (struct v850_opcode): Add flags field.
1307 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1308 fields.
1309 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1310 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1311
1312 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1313
1314 * arc.h: New file.
1315
1316 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1317
1318 * sparc.h (sparc_opcodes): Declare as const.
1319
1320 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1321
1322 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1323 uses single or double precision floating point resources.
1324 (INSN_NO_ISA, INSN_ISA1): Define.
1325 (cpu specific INSN macros): Tweak into bitmasks outside the range
1326 of INSN_ISA field.
1327
1328 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1329
1330 * i386.h: Fix pand opcode.
1331
1332 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1333
1334 * mips.h: Widen INSN_ISA and move it to a more convenient
1335 bit position. Add INSN_3900.
1336
1337 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1338
1339 * mips.h (struct mips_opcode): added new field membership.
1340
1341 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1342
1343 * i386.h (movd): only Reg32 is allowed.
1344
1345 * i386.h: add fcomp and ud2. From Wayne Scott
1346 <wscott@ichips.intel.com>.
1347
1348 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1349
1350 * i386.h: Add MMX instructions.
1351
1352 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1353
1354 * i386.h: Remove W modifier from conditional move instructions.
1355
1356 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1357
1358 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1359 with no arguments to match that generated by the UnixWare
1360 assembler.
1361
1362 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1363
1364 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1365 (cgen_parse_operand_fn): Declare.
1366 (cgen_init_parse_operand): Declare.
1367 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1368 new argument `want'.
1369 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1370 (enum cgen_parse_operand_type): New enum.
1371
1372 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1373
1374 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1375
1376 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1377
1378 * cgen.h: New file.
1379
1380 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1381
1382 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1383 fdivrp.
1384
1385 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1386
1387 * v850.h (extract): Make unsigned.
1388
1389 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1390
1391 * i386.h: Add iclr.
1392
1393 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1394
1395 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1396 take a direction bit.
1397
1398 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1399
1400 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1401
1402 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1403
1404 * sparc.h: Include <ansidecl.h>. Update function declarations to
1405 use prototypes, and to use const when appropriate.
1406
1407 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1408
1409 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1410
1411 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1412
1413 * d10v.h: Change pre_defined_registers to
1414 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1415
1416 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1417
1418 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1419 Change mips_opcodes from const array to a pointer,
1420 and change bfd_mips_num_opcodes from const int to int,
1421 so that we can increase the size of the mips opcodes table
1422 dynamically.
1423
1424 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1425
1426 * d30v.h (FLAG_X): Remove unused flag.
1427
1428 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1429
1430 * d30v.h: New file.
1431
1432 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1433
1434 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1435 (PDS_VALUE): Macro to access value field of predefined symbols.
1436 (tic80_next_predefined_symbol): Add prototype.
1437
1438 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1439
1440 * tic80.h (tic80_symbol_to_value): Change prototype to match
1441 change in function, added class parameter.
1442
1443 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1444
1445 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1446 endmask fields, which are somewhat weird in that 0 and 32 are
1447 treated exactly the same.
1448
1449 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1450
1451 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1452 rather than a constant that is 2**X. Reorder them to put bits for
1453 operands that have symbolic names in the upper bits, so they can
1454 be packed into an int where the lower bits contain the value that
1455 corresponds to that symbolic name.
1456 (predefined_symbo): Add struct.
1457 (tic80_predefined_symbols): Declare array of translations.
1458 (tic80_num_predefined_symbols): Declare size of that array.
1459 (tic80_value_to_symbol): Declare function.
1460 (tic80_symbol_to_value): Declare function.
1461
1462 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1463
1464 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1465
1466 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1467
1468 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1469 be the destination register.
1470
1471 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1472
1473 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1474 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1475 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1476 that the opcode can have two vector instructions in a single
1477 32 bit word and we have to encode/decode both.
1478
1479 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1480
1481 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1482 TIC80_OPERAND_RELATIVE for PC relative.
1483 (TIC80_OPERAND_BASEREL): New flag bit for register
1484 base relative.
1485
1486 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1487
1488 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1489
1490 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1491
1492 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1493 ":s" modifier for scaling.
1494
1495 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1496
1497 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1498 (TIC80_OPERAND_M_LI): Ditto
1499
1500 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1501
1502 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1503 (TIC80_OPERAND_CC): New define for condition code operand.
1504 (TIC80_OPERAND_CR): New define for control register operand.
1505
1506 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1507
1508 * tic80.h (struct tic80_opcode): Name changed.
1509 (struct tic80_opcode): Remove format field.
1510 (struct tic80_operand): Add insertion and extraction functions.
1511 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1512 correct ones.
1513 (FMT_*): Ditto.
1514
1515 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1516
1517 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1518 type IV instruction offsets.
1519
1520 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1521
1522 * tic80.h: New file.
1523
1524 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1525
1526 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1527
1528 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1529
1530 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1531 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1532 * v850.h: Fix comment, v850_operand not powerpc_operand.
1533
1534 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1535
1536 * mn10200.h: Flesh out structures and definitions needed by
1537 the mn10200 assembler & disassembler.
1538
1539 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1540
1541 * mips.h: Add mips16 definitions.
1542
1543 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1544
1545 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1546
1547 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1548
1549 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1550 (MN10300_OPERAND_MEMADDR): Define.
1551
1552 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1553
1554 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1555
1556 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1557
1558 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1559
1560 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1561
1562 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1563
1564 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1565
1566 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1567
1568 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1569
1570 * alpha.h: Don't include "bfd.h"; private relocation types are now
1571 negative to minimize problems with shared libraries. Organize
1572 instruction subsets by AMASK extensions and PALcode
1573 implementation.
1574 (struct alpha_operand): Move flags slot for better packing.
1575
1576 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1577
1578 * v850.h (V850_OPERAND_RELAX): New operand flag.
1579
1580 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1581
1582 * mn10300.h (FMT_*): Move operand format definitions
1583 here.
1584
1585 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1586
1587 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1588
1589 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1590
1591 * mn10300.h (mn10300_opcode): Add "format" field.
1592 (MN10300_OPERAND_*): Define.
1593
1594 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1595
1596 * mn10x00.h: Delete.
1597 * mn10200.h, mn10300.h: New files.
1598
1599 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1600
1601 * mn10x00.h: New file.
1602
1603 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1604
1605 * v850.h: Add new flag to indicate this instruction uses a PC
1606 displacement.
1607
1608 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1609
1610 * h8300.h (stmac): Add missing instruction.
1611
1612 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1613
1614 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1615 field.
1616
1617 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1618
1619 * v850.h (V850_OPERAND_EP): Define.
1620
1621 * v850.h (v850_opcode): Add size field.
1622
1623 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1624
1625 * v850.h (v850_operands): Add insert and extract fields, pointers
1626 to functions used to handle unusual operand encoding.
1627 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1628 V850_OPERAND_SIGNED): Defined.
1629
1630 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1631
1632 * v850.h (v850_operands): Add flags field.
1633 (OPERAND_REG, OPERAND_NUM): Defined.
1634
1635 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1636
1637 * v850.h: New file.
1638
1639 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1640
1641 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1642 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1643 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1644 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1645 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1646 Defined.
1647
1648 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1649
1650 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1651 a 3 bit space id instead of a 2 bit space id.
1652
1653 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1654
1655 * d10v.h: Add some additional defines to support the
1656 assembler in determining which operations can be done in parallel.
1657
1658 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1659
1660 * h8300.h (SN): Define.
1661 (eepmov.b): Renamed from "eepmov"
1662 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1663 with them.
1664
1665 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1666
1667 * d10v.h (OPERAND_SHIFT): New operand flag.
1668
1669 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1670
1671 * d10v.h: Changes for divs, parallel-only instructions, and
1672 signed numbers.
1673
1674 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1675
1676 * d10v.h (pd_reg): Define. Putting the definition here allows
1677 the assembler and disassembler to share the same struct.
1678
1679 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1680
1681 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1682 Williams <steve@icarus.com>.
1683
1684 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1685
1686 * d10v.h: New file.
1687
1688 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1689
1690 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1691
1692 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1693
1694 * m68k.h (mcf5200): New macro.
1695 Document names of coldfire control registers.
1696
1697 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1698
1699 * h8300.h (SRC_IN_DST): Define.
1700
1701 * h8300.h (UNOP3): Mark the register operand in this insn
1702 as a source operand, not a destination operand.
1703 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1704 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1705 register operand with SRC_IN_DST.
1706
1707 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1708
1709 * alpha.h: New file.
1710
1711 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1712
1713 * rs6k.h: Remove obsolete file.
1714
1715 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1716
1717 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1718 fdivp, and fdivrp. Add ffreep.
1719
1720 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1721
1722 * h8300.h: Reorder various #defines for readability.
1723 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1724 (BITOP): Accept additional (unused) argument. All callers changed.
1725 (EBITOP): Likewise.
1726 (O_LAST): Bump.
1727 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1728
1729 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1730 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1731 (BITOP, EBITOP): Handle new H8/S addressing modes for
1732 bit insns.
1733 (UNOP3): Handle new shift/rotate insns on the H8/S.
1734 (insns using exr): New instructions.
1735 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1736
1737 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1738
1739 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1740 was incorrect.
1741
1742 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1743
1744 * h8300.h (START): Remove.
1745 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1746 and mov.l insns that can be relaxed.
1747
1748 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1749
1750 * i386.h: Remove Abs32 from lcall.
1751
1752 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1753
1754 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1755 (SLCPOP): New macro.
1756 Mark X,Y opcode letters as in use.
1757
1758 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1759
1760 * sparc.h (F_FLOAT, F_FBR): Define.
1761
1762 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1763
1764 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1765 from all insns.
1766 (ABS8SRC,ABS8DST): Add ABS8MEM.
1767 (add.l): Fix reg+reg variant.
1768 (eepmov.w): Renamed from eepmovw.
1769 (ldc,stc): Fix many cases.
1770
1771 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1772
1773 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1774
1775 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1776
1777 * sparc.h (O): Mark operand letter as in use.
1778
1779 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1780
1781 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1782 Mark operand letters uU as in use.
1783
1784 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1785
1786 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1787 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1788 (SPARC_OPCODE_SUPPORTED): New macro.
1789 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1790 (F_NOTV9): Delete.
1791
1792 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1793
1794 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1795 declaration consistent with return type in definition.
1796
1797 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1798
1799 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1800
1801 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1802
1803 * i386.h (i386_regtab): Add 80486 test registers.
1804
1805 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1806
1807 * i960.h (I_HX): Define.
1808 (i960_opcodes): Add HX instruction.
1809
1810 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1811
1812 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1813 and fclex.
1814
1815 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1816
1817 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1818 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1819 (bfd_* defines): Delete.
1820 (sparc_opcode_archs): Replaces architecture_pname.
1821 (sparc_opcode_lookup_arch): Declare.
1822 (NUMOPCODES): Delete.
1823
1824 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1825
1826 * sparc.h (enum sparc_architecture): Add v9a.
1827 (ARCHITECTURES_CONFLICT_P): Update.
1828
1829 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1830
1831 * i386.h: Added Pentium Pro instructions.
1832
1833 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1834
1835 * m68k.h: Document new 'W' operand place.
1836
1837 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1838
1839 * hppa.h: Add lci and syncdma instructions.
1840
1841 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1842
1843 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1844 instructions.
1845
1846 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1847
1848 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1849 assembler's -mcom and -many switches.
1850
1851 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1852
1853 * i386.h: Fix cmpxchg8b extension opcode description.
1854
1855 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1856
1857 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1858 and register cr4.
1859
1860 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1861
1862 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1863
1864 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1865
1866 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1867
1868 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1869
1870 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1871
1872 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1873
1874 * m68kmri.h: Remove.
1875
1876 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1877 declarations. Remove F_ALIAS and flag field of struct
1878 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1879 int. Make name and args fields of struct m68k_opcode const.
1880
1881 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1882
1883 * sparc.h (F_NOTV9): Define.
1884
1885 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1886
1887 * mips.h (INSN_4010): Define.
1888
1889 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1890
1891 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1892
1893 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1894 * m68k.h: Fix argument descriptions of coprocessor
1895 instructions to allow only alterable operands where appropriate.
1896 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1897 (m68k_opcode_aliases): Add more aliases.
1898
1899 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1900
1901 * m68k.h: Added explcitly short-sized conditional branches, and a
1902 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1903 svr4-based configurations.
1904
1905 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1906
1907 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1908 * i386.h: added missing Data16/Data32 flags to a few instructions.
1909
1910 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1911
1912 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1913 (OP_MASK_BCC, OP_SH_BCC): Define.
1914 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1915 (OP_MASK_CCC, OP_SH_CCC): Define.
1916 (INSN_READ_FPR_R): Define.
1917 (INSN_RFE): Delete.
1918
1919 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1920
1921 * m68k.h (enum m68k_architecture): Deleted.
1922 (struct m68k_opcode_alias): New type.
1923 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1924 matching constraints, values and flags. As a side effect of this,
1925 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1926 as I know were never used, now may need re-examining.
1927 (numopcodes): Now const.
1928 (m68k_opcode_aliases, numaliases): New variables.
1929 (endop): Deleted.
1930 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1931 m68k_opcode_aliases; update declaration of m68k_opcodes.
1932
1933 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1934
1935 * hppa.h (delay_type): Delete unused enumeration.
1936 (pa_opcode): Replace unused delayed field with an architecture
1937 field.
1938 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1939
1940 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1941
1942 * mips.h (INSN_ISA4): Define.
1943
1944 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1945
1946 * mips.h (M_DLA_AB, M_DLI): Define.
1947
1948 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1949
1950 * hppa.h (fstwx): Fix single-bit error.
1951
1952 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1953
1954 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1955
1956 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1957
1958 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1959 debug registers. From Charles Hannum (mycroft@netbsd.org).
1960
1961 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1962
1963 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1964 i386 support:
1965 * i386.h (MOV_AX_DISP32): New macro.
1966 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1967 of several call/return instructions.
1968 (ADDR_PREFIX_OPCODE): New macro.
1969
1970 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1971
1972 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1973
1974 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1975 char.
1976 (struct vot, field `name'): ditto.
1977
1978 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1979
1980 * vax.h: Supply and properly group all values in end sentinel.
1981
1982 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1983
1984 * mips.h (INSN_ISA, INSN_4650): Define.
1985
1986 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1987
1988 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1989 systems with a separate instruction and data cache, such as the
1990 29040, these instructions take an optional argument.
1991
1992 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1993
1994 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1995 INSN_TRAP.
1996
1997 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1998
1999 * mips.h (INSN_STORE_MEMORY): Define.
2000
2001 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2002
2003 * sparc.h: Document new operand type 'x'.
2004
2005 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2006
2007 * i960.h (I_CX2): New instruction category. It includes
2008 instructions available on Cx and Jx processors.
2009 (I_JX): New instruction category, for JX-only instructions.
2010 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2011 Jx-only instructions, in I_JX category.
2012
2013 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2014
2015 * ns32k.h (endop): Made pointer const too.
2016
2017 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2018
2019 * ns32k.h: Drop Q operand type as there is no correct use
2020 for it. Add I and Z operand types which allow better checking.
2021
2022 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2023
2024 * h8300.h (xor.l) :fix bit pattern.
2025 (L_2): New size of operand.
2026 (trapa): Use it.
2027
2028 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2029
2030 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2031
2032 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2033
2034 * sparc.h: Include v9 definitions.
2035
2036 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2037
2038 * m68k.h (m68060): Defined.
2039 (m68040up, mfloat, mmmu): Include it.
2040 (struct m68k_opcode): Widen `arch' field.
2041 (m68k_opcodes): Updated for M68060. Removed comments that were
2042 instructions commented out by "JF" years ago.
2043
2044 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2045
2046 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2047 add a one-bit `flags' field.
2048 (F_ALIAS): New macro.
2049
2050 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2051
2052 * h8300.h (dec, inc): Get encoding right.
2053
2054 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2055
2056 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2057 a flag instead.
2058 (PPC_OPERAND_SIGNED): Define.
2059 (PPC_OPERAND_SIGNOPT): Define.
2060
2061 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2062
2063 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2064 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2065
2066 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2067
2068 * i386.h: Reverse last change. It'll be handled in gas instead.
2069
2070 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2071
2072 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2073 slower on the 486 and used the implicit shift count despite the
2074 explicit operand. The one-operand form is still available to get
2075 the shorter form with the implicit shift count.
2076
2077 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2078
2079 * hppa.h: Fix typo in fstws arg string.
2080
2081 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2082
2083 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2084
2085 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2086
2087 * ppc.h (PPC_OPCODE_601): Define.
2088
2089 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2090
2091 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2092 (so we can determine valid completers for both addb and addb[tf].)
2093
2094 * hppa.h (xmpyu): No floating point format specifier for the
2095 xmpyu instruction.
2096
2097 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2098
2099 * ppc.h (PPC_OPERAND_NEXT): Define.
2100 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2101 (struct powerpc_macro): Define.
2102 (powerpc_macros, powerpc_num_macros): Declare.
2103
2104 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2105
2106 * ppc.h: New file. Header file for PowerPC opcode table.
2107
2108 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2109
2110 * hppa.h: More minor template fixes for sfu and copr (to allow
2111 for easier disassembly).
2112
2113 * hppa.h: Fix templates for all the sfu and copr instructions.
2114
2115 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2116
2117 * i386.h (push): Permit Imm16 operand too.
2118
2119 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2120
2121 * h8300.h (andc): Exists in base arch.
2122
2123 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2124
2125 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2126 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2127
2128 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2129
2130 * hppa.h: Add FP quadword store instructions.
2131
2132 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2133
2134 * mips.h: (M_J_A): Added.
2135 (M_LA): Removed.
2136
2137 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2138
2139 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2140 <mellon@pepper.ncd.com>.
2141
2142 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2143
2144 * hppa.h: Immediate field in probei instructions is unsigned,
2145 not low-sign extended.
2146
2147 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2148
2149 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2150
2151 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2152
2153 * i386.h: Add "fxch" without operand.
2154
2155 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2156
2157 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2158
2159 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2160
2161 * hppa.h: Add gfw and gfr to the opcode table.
2162
2163 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2164
2165 * m88k.h: extended to handle m88110.
2166
2167 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2168
2169 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2170 addresses.
2171
2172 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2173
2174 * i960.h (i960_opcodes): Properly bracket initializers.
2175
2176 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2177
2178 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2179
2180 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2181
2182 * m68k.h (two): Protect second argument with parentheses.
2183
2184 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2185
2186 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2187 Deleted old in/out instructions in "#if 0" section.
2188
2189 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2190
2191 * i386.h (i386_optab): Properly bracket initializers.
2192
2193 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2194
2195 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2196 Jeff Law, law@cs.utah.edu).
2197
2198 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2199
2200 * i386.h (lcall): Accept Imm32 operand also.
2201
2202 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2203
2204 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2205 (M_DABS): Added.
2206
2207 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2208
2209 * mips.h (INSN_*): Changed values. Removed unused definitions.
2210 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2211 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2212 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2213 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2214 (M_*): Added new values for r6000 and r4000 macros.
2215 (ANY_DELAY): Removed.
2216
2217 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2218
2219 * mips.h: Added M_LI_S and M_LI_SS.
2220
2221 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2222
2223 * h8300.h: Get some rare mov.bs correct.
2224
2225 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2226
2227 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2228 been included.
2229
2230 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2231
2232 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2233 jump instructions, for use in disassemblers.
2234
2235 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2236
2237 * m88k.h: Make bitfields just unsigned, not unsigned long or
2238 unsigned short.
2239
2240 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2241
2242 * hppa.h: New argument type 'y'. Use in various float instructions.
2243
2244 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2245
2246 * hppa.h (break): First immediate field is unsigned.
2247
2248 * hppa.h: Add rfir instruction.
2249
2250 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2251
2252 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2253
2254 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2255
2256 * mips.h: Reworked the hazard information somewhat, and fixed some
2257 bugs in the instruction hazard descriptions.
2258
2259 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2260
2261 * m88k.h: Corrected a couple of opcodes.
2262
2263 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2264
2265 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2266 new version includes instruction hazard information, but is
2267 otherwise reasonably similar.
2268
2269 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2270
2271 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2272
2273 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2274
2275 Patches from Jeff Law, law@cs.utah.edu:
2276 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2277 Make the tables be the same for the following instructions:
2278 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2279 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2280 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2281 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2282 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2283 "fcmp", and "ftest".
2284
2285 * hppa.h: Make new and old tables the same for "break", "mtctl",
2286 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2287 Fix typo in last patch. Collapse several #ifdefs into a
2288 single #ifdef.
2289
2290 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2291 of the comments up-to-date.
2292
2293 * hppa.h: Update "free list" of letters and update
2294 comments describing each letter's function.
2295
2296 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2297
2298 * h8300.h: Lots of little fixes for the h8/300h.
2299
2300 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2301
2302 Support for H8/300-H
2303 * h8300.h: Lots of new opcodes.
2304
2305 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2306
2307 * h8300.h: checkpoint, includes H8/300-H opcodes.
2308
2309 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2310
2311 * Patches from Jeffrey Law <law@cs.utah.edu>.
2312 * hppa.h: Rework single precision FP
2313 instructions so that they correctly disassemble code
2314 PA1.1 code.
2315
2316 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2317
2318 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2319 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2320
2321 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2322
2323 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2324 gdb will define it for now.
2325
2326 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2327
2328 * sparc.h: Don't end enumerator list with comma.
2329
2330 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2331
2332 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2333 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2334 ("bc2t"): Correct typo.
2335 ("[ls]wc[023]"): Use T rather than t.
2336 ("c[0123]"): Define general coprocessor instructions.
2337
2338 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2339
2340 * m68k.h: Move split point for gcc compilation more towards
2341 middle.
2342
2343 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2344
2345 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2346 simply wrong, ics, rfi, & rfsvc were missing).
2347 Add "a" to opr_ext for "bb". Doc fix.
2348
2349 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2350
2351 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2352 * mips.h: Add casts, to suppress warnings about shifting too much.
2353 * m68k.h: Document the placement code '9'.
2354
2355 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2356
2357 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2358 allows callers to break up the large initialized struct full of
2359 opcodes into two half-sized ones. This permits GCC to compile
2360 this module, since it takes exponential space for initializers.
2361 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2362
2363 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2364
2365 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2366 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2367 initialized structs in it.
2368
2369 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2370
2371 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2372 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2373 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2374
2375 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2376
2377 * mips.h: document "i" and "j" operands correctly.
2378
2379 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2380
2381 * mips.h: Removed endianness dependency.
2382
2383 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2384
2385 * h8300.h: include info on number of cycles per instruction.
2386
2387 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2388
2389 * hppa.h: Move handy aliases to the front. Fix masks for extract
2390 and deposit instructions.
2391
2392 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2393
2394 * i386.h: accept shld and shrd both with and without the shift
2395 count argument, which is always %cl.
2396
2397 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2398
2399 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2400 (one_byte_segment_defaults, two_byte_segment_defaults,
2401 i386_prefixtab_end): Ditto.
2402
2403 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2404
2405 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2406 for operand 2; from John Carr, jfc@dsg.dec.com.
2407
2408 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2409
2410 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2411 always use 16-bit offsets. Makes calculated-size jump tables
2412 feasible.
2413
2414 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2415
2416 * i386.h: Fix one-operand forms of in* and out* patterns.
2417
2418 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2419
2420 * m68k.h: Added CPU32 support.
2421
2422 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2423
2424 * mips.h (break): Disassemble the argument. Patch from
2425 jonathan@cs.stanford.edu (Jonathan Stone).
2426
2427 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2428
2429 * m68k.h: merged Motorola and MIT syntax.
2430
2431 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2432
2433 * m68k.h (pmove): make the tests less strict, the 68k book is
2434 wrong.
2435
2436 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2437
2438 * m68k.h (m68ec030): Defined as alias for 68030.
2439 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2440 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2441 them. Tightened description of "fmovex" to distinguish it from
2442 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2443 up descriptions that claimed versions were available for chips not
2444 supporting them. Added "pmovefd".
2445
2446 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2447
2448 * m68k.h: fix where the . goes in divull
2449
2450 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2451
2452 * m68k.h: the cas2 instruction is supposed to be written with
2453 indirection on the last two operands, which can be either data or
2454 address registers. Added a new operand type 'r' which accepts
2455 either register type. Added new cases for cas2l and cas2w which
2456 use them. Corrected masks for cas2 which failed to recognize use
2457 of address register.
2458
2459 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2460
2461 * m68k.h: Merged in patches (mostly m68040-specific) from
2462 Colin Smith <colin@wrs.com>.
2463
2464 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2465 base). Also cleaned up duplicates, re-ordered instructions for
2466 the sake of dis-assembling (so aliases come after standard names).
2467 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2468
2469 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2470
2471 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2472 all missing .s
2473
2474 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2475
2476 * sparc.h: Moved tables to BFD library.
2477
2478 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2479
2480 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2481
2482 * h8300.h: Finish filling in all the holes in the opcode table,
2483 so that the Lucid C compiler can digest this as well...
2484
2485 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2486
2487 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2488 Fix opcodes on various sizes of fild/fist instructions
2489 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2490 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2491
2492 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2493
2494 * h8300.h: Fill in all the holes in the opcode table so that the
2495 losing HPUX C compiler can digest this...
2496
2497 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2498
2499 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2500 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2501
2502 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2503
2504 * sparc.h: Add new architecture variant sparclite; add its scan
2505 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2506
2507 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2508
2509 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2510 fy@lucid.com).
2511
2512 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2513
2514 * rs6k.h: New version from IBM (Metin).
2515
2516 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2517
2518 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2519 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2520
2521 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2522
2523 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2524
2525 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2526
2527 * m68k.h (one, two): Cast macro args to unsigned to suppress
2528 complaints from compiler and lint about integer overflow during
2529 shift.
2530
2531 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2532
2533 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2534
2535 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2536
2537 * mips.h: Make bitfield layout depend on the HOST compiler,
2538 not on the TARGET system.
2539
2540 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2541
2542 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2543 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2544 <TRANLE@INTELLICORP.COM>.
2545
2546 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2547
2548 * h8300.h: turned op_type enum into #define list
2549
2550 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2551
2552 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2553 similar instructions -- they've been renamed to "fitoq", etc.
2554 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2555 number of arguments.
2556 * h8300.h: Remove extra ; which produces compiler warning.
2557
2558 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2559
2560 * sparc.h: fix opcode for tsubcctv.
2561
2562 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2563
2564 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2565
2566 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2567
2568 * sparc.h (nop): Made the 'lose' field be even tighter,
2569 so only a standard 'nop' is disassembled as a nop.
2570
2571 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2572
2573 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2574 disassembled as a nop.
2575
2576 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2577
2578 * m68k.h, sparc.h: ANSIfy enums.
2579
2580 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2581
2582 * sparc.h: fix a typo.
2583
2584 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2585
2586 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2587 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2588 vax.h: Renamed from ../<foo>-opcode.h.
2589
2590 \f
2591 Local Variables:
2592 version-control: never
2593 End:
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