* i386.h (i386_optab): SSE integer converison instructions have
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 Mon Feb 12 17:40:54 CET 2001 Jan Hubicka <jh@suse.cz>
2
3 * i386.h (i386_optab): SSE integer converison instructions have
4 64bit versions on x86-64.
5
6 2001-02-10 Nick Clifton <nickc@redhat.com>
7
8 * mips.h: Remove extraneous whitespace. Formating change to allow
9 for future contribution.
10
11 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
12
13 * s390.h: New file.
14
15 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
16
17 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
18 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
19 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
20
21 2001-01-24 Karsten Keil <kkeil@suse.de>
22
23 * i386.h (i386_optab): Fix swapgs
24
25 2001-01-14 Alan Modra <alan@linuxcare.com.au>
26
27 * hppa.h: Describe new '<' and '>' operand types, and tidy
28 existing comments.
29 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
30 Remove duplicate "ldw j(s,b),x". Sort some entries.
31
32 Sat Jan 13 09:56:32 MET 2001 Jan Hubicka <jh@suse.cz>
33
34 * i386.h (i386_optab): Fix pusha and ret templates.
35
36 2001-01-11 Peter Targett <peter.targett@arccores.com>
37
38 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
39 definitions for masking cpu type.
40 (arc_ext_operand_value) New structure for storing extended
41 operands.
42 (ARC_OPERAND_*) Flags for operand values.
43
44 2001-01-10 Jan Hubicka <jh@suse.cz>
45
46 * i386.h (pinsrw): Add.
47 (pshufw): Remove.
48 (cvttpd2dq): Fix operands.
49 (cvttps2dq): Likewise.
50 (movq2q): Rename to movdq2q.
51
52 2001-01-10 Richard Schaal <richard.schaal@intel.com>
53
54 * i386.h: Correct movnti instruction.
55
56 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
57
58 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
59 of operands (unsigned char or unsigned short).
60 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
61 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
62
63 2001-01-05 Jan Hubicka <jh@suse.cz>
64
65 * i386.h (i386_optab): Make [sml]fence template to use immext field.
66
67 2001-01-03 Jan Hubicka <jh@suse.cz>
68
69 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
70 introduced by Pentium4
71
72 2000-12-30 Jan Hubicka <jh@suse.cz>
73
74 * i386.h (i386_optab): Add "rex*" instructions;
75 add swapgs; disable jmp/call far direct instructions for
76 64bit mode; add syscall and sysret; disable registers for 0xc6
77 template. Add 'q' suffixes to extendable instructions, disable
78 obsolete instructions, add new sign/zero extension ones.
79 (i386_regtab): Add extended registers.
80 (*Suf): Add No_qSuf.
81 (q_Suf, wlq_Suf, bwlq_Suf): New.
82
83 2000-12-20 Jan Hubicka <jh@suse.cz>
84
85 * i386.h (i386_optab): Replace "Imm" with "EncImm".
86 (i386_regtab): Add flags field.
87
88 2000-12-12 Nick Clifton <nickc@redhat.com>
89
90 * mips.h: Fix formatting.
91
92 2000-12-01 Chris Demetriou <cgd@sibyte.com>
93
94 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
95 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
96 OP_*_SYSCALL definitions.
97 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
98 19 bit wait codes.
99 (MIPS operand specifier comments): Remove 'm', add 'U' and
100 'J', and update the meaning of 'B' so that it's more general.
101
102 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
103 INSN_ISA5): Renumber, redefine to mean the ISA at which the
104 instruction was added.
105 (INSN_ISA32): New constant.
106 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
107 Renumber to avoid new and/or renumbered INSN_* constants.
108 (INSN_MIPS32): Delete.
109 (ISA_UNKNOWN): New constant to indicate unknown ISA.
110 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
111 ISA_MIPS32): New constants, defined to be the mask of INSN_*
112 constants available at that ISA level.
113 (CPU_UNKNOWN): New constant to indicate unknown CPU.
114 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
115 define it with a unique value.
116 (OPCODE_IS_MEMBER): Update for new ISA membership-related
117 constant meanings.
118
119 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
120 definitions.
121
122 * mips.h (CPU_SB1): New constant.
123
124 2000-10-20 Jakub Jelinek <jakub@redhat.com>
125
126 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
127 Note that '3' is used for siam operand.
128
129 2000-09-22 Jim Wilson <wilson@cygnus.com>
130
131 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
132
133 2000-09-13 Anders Norlander <anorland@acc.umu.se>
134
135 * mips.h: Use defines instead of hard-coded processor numbers.
136 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
137 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
138 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
139 CPU_4KC, CPU_4KM, CPU_4KP): Define..
140 (OPCODE_IS_MEMBER): Use new defines.
141 (OP_MASK_SEL, OP_SH_SEL): Define.
142 (OP_MASK_CODE20, OP_SH_CODE20): Define.
143 Add 'P' to used characters.
144 Use 'H' for coprocessor select field.
145 Use 'm' for 20 bit breakpoint code.
146 Document new arg characters and add to used characters.
147 (INSN_MIPS32): New define for MIPS32 extensions.
148 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
149
150 2000-09-05 Alan Modra <alan@linuxcare.com.au>
151
152 * hppa.h: Mention cz completer.
153
154 2000-08-16 Jim Wilson <wilson@cygnus.com>
155
156 * ia64.h (IA64_OPCODE_POSTINC): New.
157
158 2000-08-15 H.J. Lu <hjl@gnu.org>
159
160 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
161 IgnoreSize change.
162
163 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
164
165 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
166 Move related opcodes closer to each other.
167 Minor changes in comments, list undefined opcodes.
168
169 2000-07-26 Dave Brolley <brolley@redhat.com>
170
171 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
172
173 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
174
175 cris.h: New file.
176
177 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
178
179 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
180 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
181 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
182 (AVR_ISA_M83): Define for ATmega83, ATmega85.
183 (espm): Remove, because ESPM removed in databook update.
184 (eicall, eijmp): Move to the end of opcode table.
185
186 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
187
188 * m68hc11.h: New file for support of Motorola 68hc11.
189
190 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
191
192 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
193
194 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
195
196 * avr.h: New file with AVR opcodes.
197
198 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
199
200 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
201
202 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
203
204 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
205
206 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
207
208 * i386.h: Use sl_FP, not sl_Suf for fild.
209
210 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
211
212 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
213 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
214 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
215 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
216
217 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
218
219 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
220
221 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
222 Alexander Sokolov <robocop@netlink.ru>
223
224 * i386.h (i386_optab): Add cpu_flags for all instructions.
225
226 2000-05-13 Alan Modra <alan@linuxcare.com.au>
227
228 From Gavin Romig-Koch <gavin@cygnus.com>
229 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
230
231 2000-05-04 Timothy Wall <twall@cygnus.com>
232
233 * tic54x.h: New.
234
235 2000-05-03 J.T. Conklin <jtc@redback.com>
236
237 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
238 (PPC_OPERAND_VR): New operand flag for vector registers.
239
240 2000-05-01 Kazu Hirata <kazu@hxi.com>
241
242 * h8300.h (EOP): Add missing initializer.
243
244 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
245
246 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
247 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
248 New operand types l,y,&,fe,fE,fx added to support above forms.
249 (pa_opcodes): Replaced usage of 'x' as source/target for
250 floating point double-word loads/stores with 'fx'.
251
252 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
253 David Mosberger <davidm@hpl.hp.com>
254 Timothy Wall <twall@cygnus.com>
255 Jim Wilson <wilson@cygnus.com>
256
257 * ia64.h: New file.
258
259 2000-03-27 Nick Clifton <nickc@cygnus.com>
260
261 * d30v.h (SHORT_A1): Fix value.
262 (SHORT_AR): Renumber so that it is at the end of the list of short
263 instructions, not the end of the list of long instructions.
264
265 2000-03-26 Alan Modra <alan@linuxcare.com>
266
267 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
268 problem isn't really specific to Unixware.
269 (OLDGCC_COMPAT): Define.
270 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
271 destination %st(0).
272 Fix lots of comments.
273
274 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
275
276 * d30v.h:
277 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
278 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
279 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
280 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
281 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
282 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
283 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
284
285 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
286
287 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
288 fistpd without suffix.
289
290 2000-02-24 Nick Clifton <nickc@cygnus.com>
291
292 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
293 'signed_overflow_ok_p'.
294 Delete prototypes for cgen_set_flags() and cgen_get_flags().
295
296 2000-02-24 Andrew Haley <aph@cygnus.com>
297
298 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
299 (CGEN_CPU_TABLE): flags: new field.
300 Add prototypes for new functions.
301
302 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
303
304 * i386.h: Add some more UNIXWARE_COMPAT comments.
305
306 2000-02-23 Linas Vepstas <linas@linas.org>
307
308 * i370.h: New file.
309
310 2000-02-22 Andrew Haley <aph@cygnus.com>
311
312 * mips.h: (OPCODE_IS_MEMBER): Add comment.
313
314 1999-12-30 Andrew Haley <aph@cygnus.com>
315
316 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
317 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
318 insns.
319
320 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
321
322 * i386.h: Qualify intel mode far call and jmp with x_Suf.
323
324 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
325
326 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
327 indirect jumps and calls. Add FF/3 call for intel mode.
328
329 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
330
331 * mn10300.h: Add new operand types. Add new instruction formats.
332
333 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
334
335 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
336 instruction.
337
338 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
339
340 * mips.h (INSN_ISA5): New.
341
342 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
343
344 * mips.h (OPCODE_IS_MEMBER): New.
345
346 1999-10-29 Nick Clifton <nickc@cygnus.com>
347
348 * d30v.h (SHORT_AR): Define.
349
350 1999-10-18 Michael Meissner <meissner@cygnus.com>
351
352 * alpha.h (alpha_num_opcodes): Convert to unsigned.
353 (alpha_num_operands): Ditto.
354
355 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
356
357 * hppa.h (pa_opcodes): Add load and store cache control to
358 instructions. Add ordered access load and store.
359
360 * hppa.h (pa_opcode): Add new entries for addb and addib.
361
362 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
363
364 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
365
366 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
367
368 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
369
370 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
371
372 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
373 and "be" using completer prefixes.
374
375 * hppa.h (pa_opcodes): Add initializers to silence compiler.
376
377 * hppa.h: Update comments about character usage.
378
379 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
380
381 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
382 up the new fstw & bve instructions.
383
384 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
385
386 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
387 instructions.
388
389 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
390
391 * hppa.h (pa_opcodes): Add long offset double word load/store
392 instructions.
393
394 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
395 stores.
396
397 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
398
399 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
400
401 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
402
403 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
404
405 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
406
407 * hppa.h (pa_opcodes): Add support for "b,l".
408
409 * hppa.h (pa_opcodes): Add support for "b,gate".
410
411 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
412
413 * hppa.h (pa_opcodes): Use 'fX' for first register operand
414 in xmpyu.
415
416 * hppa.h (pa_opcodes): Fix mask for probe and probei.
417
418 * hppa.h (pa_opcodes): Fix mask for depwi.
419
420 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
421
422 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
423 an explicit output argument.
424
425 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
426
427 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
428 Add a few PA2.0 loads and store variants.
429
430 1999-09-04 Steve Chamberlain <sac@pobox.com>
431
432 * pj.h: New file.
433
434 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
435
436 * i386.h (i386_regtab): Move %st to top of table, and split off
437 other fp reg entries.
438 (i386_float_regtab): To here.
439
440 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
441
442 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
443 by 'f'.
444
445 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
446 Add supporting args.
447
448 * hppa.h: Document new completers and args.
449 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
450 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
451 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
452 pmenb and pmdis.
453
454 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
455 hshr, hsub, mixh, mixw, permh.
456
457 * hppa.h (pa_opcodes): Change completers in instructions to
458 use 'c' prefix.
459
460 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
461 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
462
463 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
464 fnegabs to use 'I' instead of 'F'.
465
466 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
467
468 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
469 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
470 Alphabetically sort PIII insns.
471
472 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
473
474 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
475
476 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
477
478 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
479 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
480
481 * hppa.h: Document 64 bit condition completers.
482
483 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
484
485 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
486
487 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
488
489 * i386.h (i386_optab): Add DefaultSize modifier to all insns
490 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
491 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
492
493 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
494 Jeff Law <law@cygnus.com>
495
496 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
497
498 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
499
500 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
501 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
502
503 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
504
505 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
506
507 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
508
509 * hppa.h (struct pa_opcode): Add new field "flags".
510 (FLAGS_STRICT): Define.
511
512 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
513 Jeff Law <law@cygnus.com>
514
515 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
516
517 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
518
519 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
520
521 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
522 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
523 flag to fcomi and friends.
524
525 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
526
527 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
528 integer logical instructions.
529
530 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
531
532 * m68k.h: Document new formats `E', `G', `H' and new places `N',
533 `n', `o'.
534
535 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
536 and new places `m', `M', `h'.
537
538 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
539
540 * hppa.h (pa_opcodes): Add several processor specific system
541 instructions.
542
543 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
544
545 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
546 "addb", and "addib" to be used by the disassembler.
547
548 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
549
550 * i386.h (ReverseModrm): Remove all occurences.
551 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
552 movmskps, pextrw, pmovmskb, maskmovq.
553 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
554 ignore the data size prefix.
555
556 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
557 Mostly stolen from Doug Ledford <dledford@redhat.com>
558
559 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
560
561 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
562
563 1999-04-14 Doug Evans <devans@casey.cygnus.com>
564
565 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
566 (CGEN_ATTR_TYPE): Update.
567 (CGEN_ATTR_MASK): Number booleans starting at 0.
568 (CGEN_ATTR_VALUE): Update.
569 (CGEN_INSN_ATTR): Update.
570
571 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
572
573 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
574 instructions.
575
576 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
577
578 * hppa.h (bb, bvb): Tweak opcode/mask.
579
580
581 1999-03-22 Doug Evans <devans@casey.cygnus.com>
582
583 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
584 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
585 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
586 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
587 Delete member max_insn_size.
588 (enum cgen_cpu_open_arg): New enum.
589 (cpu_open): Update prototype.
590 (cpu_open_1): Declare.
591 (cgen_set_cpu): Delete.
592
593 1999-03-11 Doug Evans <devans@casey.cygnus.com>
594
595 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
596 (CGEN_OPERAND_NIL): New macro.
597 (CGEN_OPERAND): New member `type'.
598 (@arch@_cgen_operand_table): Delete decl.
599 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
600 (CGEN_OPERAND_TABLE): New struct.
601 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
602 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
603 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
604 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
605 {get,set}_{int,vma}_operand.
606 (@arch@_cgen_cpu_open): New arg `isa'.
607 (cgen_set_cpu): Ditto.
608
609 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
610
611 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
612
613 1999-02-25 Doug Evans <devans@casey.cygnus.com>
614
615 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
616 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
617 enum cgen_hw_type.
618 (CGEN_HW_TABLE): New struct.
619 (hw_table): Delete declaration.
620 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
621 to table entry to enum.
622 (CGEN_OPINST): Ditto.
623 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
624
625 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
626
627 * alpha.h (AXP_OPCODE_EV6): New.
628 (AXP_OPCODE_NOPAL): Include it.
629
630 1999-02-09 Doug Evans <devans@casey.cygnus.com>
631
632 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
633 All uses updated. New members int_insn_p, max_insn_size,
634 parse_operand,insert_operand,extract_operand,print_operand,
635 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
636 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
637 extract_handlers,print_handlers.
638 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
639 (CGEN_ATTR_BOOL_OFFSET): New macro.
640 (CGEN_ATTR_MASK): Subtract it to compute bit number.
641 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
642 (cgen_opcode_handler): Renamed from cgen_base.
643 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
644 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
645 all uses updated.
646 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
647 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
648 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
649 (CGEN_OPCODE,CGEN_IBASE): New types.
650 (CGEN_INSN): Rewrite.
651 (CGEN_{ASM,DIS}_HASH*): Delete.
652 (init_opcode_table,init_ibld_table): Declare.
653 (CGEN_INSN_ATTR): New type.
654
655 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
656
657 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
658 (x_FP, d_FP, dls_FP, sldx_FP): Define.
659 Change *Suf definitions to include x and d suffixes.
660 (movsx): Use w_Suf and b_Suf.
661 (movzx): Likewise.
662 (movs): Use bwld_Suf.
663 (fld): Change ordering. Use sld_FP.
664 (fild): Add Intel Syntax equivalent of fildq.
665 (fst): Use sld_FP.
666 (fist): Use sld_FP.
667 (fstp): Use sld_FP. Add x_FP version.
668 (fistp): LLongMem version for Intel Syntax.
669 (fcom, fcomp): Use sld_FP.
670 (fadd, fiadd, fsub): Use sld_FP.
671 (fsubr): Use sld_FP.
672 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
673
674 1999-01-27 Doug Evans <devans@casey.cygnus.com>
675
676 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
677 CGEN_MODE_UINT.
678
679 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
680
681 * hppa.h (bv): Fix mask.
682
683 1999-01-05 Doug Evans <devans@casey.cygnus.com>
684
685 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
686 (CGEN_ATTR): Use it.
687 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
688 (CGEN_ATTR_TABLE): New member dfault.
689
690 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
691
692 * mips.h (MIPS16_INSN_BRANCH): New.
693
694 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
695
696 The following is part of a change made by Edith Epstein
697 <eepstein@sophia.cygnus.com> as part of a project to merge in
698 changes by HP; HP did not create ChangeLog entries.
699
700 * hppa.h (completer_chars): list of chars to not put a space
701 after.
702
703 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
704
705 * i386.h (i386_optab): Permit w suffix on processor control and
706 status word instructions.
707
708 1998-11-30 Doug Evans <devans@casey.cygnus.com>
709
710 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
711 (struct cgen_keyword_entry): Ditto.
712 (struct cgen_operand): Ditto.
713 (CGEN_IFLD): New typedef, with associated access macros.
714 (CGEN_IFMT): New typedef, with associated access macros.
715 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
716 (CGEN_IVALUE): New typedef.
717 (struct cgen_insn): Delete const on syntax,attrs members.
718 `format' now points to format data. Type of `value' is now
719 CGEN_IVALUE.
720 (struct cgen_opcode_table): New member ifld_table.
721
722 1998-11-18 Doug Evans <devans@casey.cygnus.com>
723
724 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
725 (CGEN_OPERAND_INSTANCE): New member `attrs'.
726 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
727 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
728 (cgen_opcode_table): Update type of dis_hash fn.
729 (extract_operand): Update type of `insn_value' arg.
730
731 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
732
733 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
734
735 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
736
737 * mips.h (INSN_MULT): Added.
738
739 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
740
741 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
742
743 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
744
745 * cgen.h (CGEN_INSN_INT): New typedef.
746 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
747 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
748 (CGEN_INSN_BYTES_PTR): New typedef.
749 (CGEN_EXTRACT_INFO): New typedef.
750 (cgen_insert_fn,cgen_extract_fn): Update.
751 (cgen_opcode_table): New member `insn_endian'.
752 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
753 (insert_operand,extract_operand): Update.
754 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
755
756 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
757
758 * cgen.h (CGEN_ATTR_BOOLS): New macro.
759 (struct CGEN_HW_ENTRY): New member `attrs'.
760 (CGEN_HW_ATTR): New macro.
761 (struct CGEN_OPERAND_INSTANCE): New member `name'.
762 (CGEN_INSN_INVALID_P): New macro.
763
764 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
765
766 * hppa.h: Add "fid".
767
768 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
769
770 From Robert Andrew Dale <rob@nb.net>
771 * i386.h (i386_optab): Add AMD 3DNow! instructions.
772 (AMD_3DNOW_OPCODE): Define.
773
774 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
775
776 * d30v.h (EITHER_BUT_PREFER_MU): Define.
777
778 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
779
780 * cgen.h (cgen_insn): #if 0 out element `cdx'.
781
782 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
783
784 Move all global state data into opcode table struct, and treat
785 opcode table as something that is "opened/closed".
786 * cgen.h (CGEN_OPCODE_DESC): New type.
787 (all fns): New first arg of opcode table descriptor.
788 (cgen_set_parse_operand_fn): Add prototype.
789 (cgen_current_machine,cgen_current_endian): Delete.
790 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
791 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
792 dis_hash_table,dis_hash_table_entries.
793 (opcode_open,opcode_close): Add prototypes.
794
795 * cgen.h (cgen_insn): New element `cdx'.
796
797 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
798
799 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
800
801 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
802
803 * mn10300.h: Add "no_match_operands" field for instructions.
804 (MN10300_MAX_OPERANDS): Define.
805
806 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
807
808 * cgen.h (cgen_macro_insn_count): Declare.
809
810 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
811
812 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
813 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
814 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
815 set_{int,vma}_operand.
816
817 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
818
819 * mn10300.h: Add "machine" field for instructions.
820 (MN103, AM30): Define machine types.
821
822 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
823
824 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
825
826 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
827
828 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
829
830 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
831
832 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
833 and ud2b.
834 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
835 those that happen to be implemented on pentiums.
836
837 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
838
839 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
840 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
841 with Size16|IgnoreSize or Size32|IgnoreSize.
842
843 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
844
845 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
846 (REPE): Rename to REPE_PREFIX_OPCODE.
847 (i386_regtab_end): Remove.
848 (i386_prefixtab, i386_prefixtab_end): Remove.
849 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
850 of md_begin.
851 (MAX_OPCODE_SIZE): Define.
852 (i386_optab_end): Remove.
853 (sl_Suf): Define.
854 (sl_FP): Use sl_Suf.
855
856 * i386.h (i386_optab): Allow 16 bit displacement for `mov
857 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
858 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
859 data32, dword, and adword prefixes.
860 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
861 regs.
862
863 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
864
865 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
866
867 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
868 register operands, because this is a common idiom. Flag them with
869 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
870 fdivrp because gcc erroneously generates them. Also flag with a
871 warning.
872
873 * i386.h: Add suffix modifiers to most insns, and tighter operand
874 checks in some cases. Fix a number of UnixWare compatibility
875 issues with float insns. Merge some floating point opcodes, using
876 new FloatMF modifier.
877 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
878 consistency.
879
880 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
881 IgnoreDataSize where appropriate.
882
883 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
884
885 * i386.h: (one_byte_segment_defaults): Remove.
886 (two_byte_segment_defaults): Remove.
887 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
888
889 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
890
891 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
892 (cgen_hw_lookup_by_num): Declare.
893
894 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
895
896 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
897 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
898
899 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
900
901 * cgen.h (cgen_asm_init_parse): Delete.
902 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
903 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
904
905 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
906
907 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
908 (cgen_asm_finish_insn): Update prototype.
909 (cgen_insn): New members num, data.
910 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
911 dis_hash, dis_hash_table_size moved to ...
912 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
913 All uses updated. New members asm_hash_p, dis_hash_p.
914 (CGEN_MINSN_EXPANSION): New struct.
915 (cgen_expand_macro_insn): Declare.
916 (cgen_macro_insn_count): Declare.
917 (get_insn_operands): Update prototype.
918 (lookup_get_insn_operands): Declare.
919
920 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
921
922 * i386.h (i386_optab): Change iclrKludge and imulKludge to
923 regKludge. Add operands types for string instructions.
924
925 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
926
927 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
928 table.
929
930 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
931
932 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
933 for `gettext'.
934
935 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
936
937 * i386.h: Remove NoModrm flag from all insns: it's never checked.
938 Add IsString flag to string instructions.
939 (IS_STRING): Don't define.
940 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
941 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
942 (SS_PREFIX_OPCODE): Define.
943
944 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
945
946 * i386.h: Revert March 24 patch; no more LinearAddress.
947
948 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
949
950 * i386.h (i386_optab): Remove fwait (9b) from all floating point
951 instructions, and instead add FWait opcode modifier. Add short
952 form of fldenv and fstenv.
953 (FWAIT_OPCODE): Define.
954
955 * i386.h (i386_optab): Change second operand constraint of `mov
956 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
957 allow legal instructions such as `movl %gs,%esi'
958
959 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
960
961 * h8300.h: Various changes to fully bracket initializers.
962
963 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
964
965 * i386.h: Set LinearAddress for lidt and lgdt.
966
967 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
968
969 * cgen.h (CGEN_BOOL_ATTR): New macro.
970
971 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
972
973 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
974
975 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
976
977 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
978 (cgen_insn): Record syntax and format entries here, rather than
979 separately.
980
981 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
982
983 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
984
985 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
986
987 * cgen.h (cgen_insert_fn): Change type of result to const char *.
988 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
989 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
990
991 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
992
993 * cgen.h (lookup_insn): New argument alias_p.
994
995 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
996
997 Fix rac to accept only a0:
998 * d10v.h (OPERAND_ACC): Split into:
999 (OPERAND_ACC0, OPERAND_ACC1) .
1000 (OPERAND_GPR): Define.
1001
1002 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1003
1004 * cgen.h (CGEN_FIELDS): Define here.
1005 (CGEN_HW_ENTRY): New member `type'.
1006 (hw_list): Delete decl.
1007 (enum cgen_mode): Declare.
1008 (CGEN_OPERAND): New member `hw'.
1009 (enum cgen_operand_instance_type): Declare.
1010 (CGEN_OPERAND_INSTANCE): New type.
1011 (CGEN_INSN): New member `operands'.
1012 (CGEN_OPCODE_DATA): Make hw_list const.
1013 (get_insn_operands,lookup_insn): Add prototypes for.
1014
1015 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1016
1017 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1018 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1019 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1020 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1021
1022 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1023
1024 * cgen.h: Correct typo in comment end marker.
1025
1026 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1027
1028 * tic30.h: New file.
1029
1030 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1031
1032 * cgen.h: Add prototypes for cgen_save_fixups(),
1033 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1034 of cgen_asm_finish_insn() to return a char *.
1035
1036 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1037
1038 * cgen.h: Formatting changes to improve readability.
1039
1040 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1041
1042 * cgen.h (*): Clean up pass over `struct foo' usage.
1043 (CGEN_ATTR): Make unsigned char.
1044 (CGEN_ATTR_TYPE): Update.
1045 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1046 (cgen_base): Move member `attrs' to cgen_insn.
1047 (CGEN_KEYWORD): New member `null_entry'.
1048 (CGEN_{SYNTAX,FORMAT}): New types.
1049 (cgen_insn): Format and syntax separated from each other.
1050
1051 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1052
1053 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1054 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1055 flags_{used,set} long.
1056 (d30v_operand): Make flags field long.
1057
1058 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1059
1060 * m68k.h: Fix comment describing operand types.
1061
1062 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1063
1064 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1065 everything else after down.
1066
1067 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1068
1069 * d10v.h (OPERAND_FLAG): Split into:
1070 (OPERAND_FFLAG, OPERAND_CFLAG) .
1071
1072 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1073
1074 * mips.h (struct mips_opcode): Changed comments to reflect new
1075 field usage.
1076
1077 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1078
1079 * mips.h: Added to comments a quick-ref list of all assigned
1080 operand type characters.
1081 (OP_{MASK,SH}_PERFREG): New macros.
1082
1083 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1084
1085 * sparc.h: Add '_' and '/' for v9a asr's.
1086 Patch from David Miller <davem@vger.rutgers.edu>
1087
1088 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1089
1090 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1091 area are not available in the base model (H8/300).
1092
1093 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1094
1095 * m68k.h: Remove documentation of ` operand specifier.
1096
1097 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1098
1099 * m68k.h: Document q and v operand specifiers.
1100
1101 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1102
1103 * v850.h (struct v850_opcode): Add processors field.
1104 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1105 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1106 (PROCESSOR_V850EA): New bit constants.
1107
1108 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1109
1110 Merge changes from Martin Hunt:
1111
1112 * d30v.h: Allow up to 64 control registers. Add
1113 SHORT_A5S format.
1114
1115 * d30v.h (LONG_Db): New form for delayed branches.
1116
1117 * d30v.h: (LONG_Db): New form for repeati.
1118
1119 * d30v.h (SHORT_D2B): New form.
1120
1121 * d30v.h (SHORT_A2): New form.
1122
1123 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1124 registers are used. Needed for VLIW optimization.
1125
1126 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1127
1128 * cgen.h: Move assembler interface section
1129 up so cgen_parse_operand_result is defined for cgen_parse_address.
1130 (cgen_parse_address): Update prototype.
1131
1132 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1133
1134 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1135
1136 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1137
1138 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1139 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1140 <paubert@iram.es>.
1141
1142 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1143 <paubert@iram.es>.
1144
1145 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1146 <paubert@iram.es>.
1147
1148 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1149 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1150
1151 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1152
1153 * v850.h (V850_NOT_R0): New flag.
1154
1155 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1156
1157 * v850.h (struct v850_opcode): Remove flags field.
1158
1159 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1160
1161 * v850.h (struct v850_opcode): Add flags field.
1162 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1163 fields.
1164 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1165 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1166
1167 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1168
1169 * arc.h: New file.
1170
1171 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1172
1173 * sparc.h (sparc_opcodes): Declare as const.
1174
1175 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1176
1177 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1178 uses single or double precision floating point resources.
1179 (INSN_NO_ISA, INSN_ISA1): Define.
1180 (cpu specific INSN macros): Tweak into bitmasks outside the range
1181 of INSN_ISA field.
1182
1183 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1184
1185 * i386.h: Fix pand opcode.
1186
1187 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1188
1189 * mips.h: Widen INSN_ISA and move it to a more convenient
1190 bit position. Add INSN_3900.
1191
1192 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1193
1194 * mips.h (struct mips_opcode): added new field membership.
1195
1196 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1197
1198 * i386.h (movd): only Reg32 is allowed.
1199
1200 * i386.h: add fcomp and ud2. From Wayne Scott
1201 <wscott@ichips.intel.com>.
1202
1203 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1204
1205 * i386.h: Add MMX instructions.
1206
1207 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1208
1209 * i386.h: Remove W modifier from conditional move instructions.
1210
1211 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1212
1213 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1214 with no arguments to match that generated by the UnixWare
1215 assembler.
1216
1217 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1218
1219 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1220 (cgen_parse_operand_fn): Declare.
1221 (cgen_init_parse_operand): Declare.
1222 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1223 new argument `want'.
1224 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1225 (enum cgen_parse_operand_type): New enum.
1226
1227 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1228
1229 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1230
1231 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1232
1233 * cgen.h: New file.
1234
1235 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1236
1237 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1238 fdivrp.
1239
1240 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1241
1242 * v850.h (extract): Make unsigned.
1243
1244 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1245
1246 * i386.h: Add iclr.
1247
1248 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1249
1250 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1251 take a direction bit.
1252
1253 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1254
1255 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1256
1257 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1258
1259 * sparc.h: Include <ansidecl.h>. Update function declarations to
1260 use prototypes, and to use const when appropriate.
1261
1262 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1263
1264 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1265
1266 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1267
1268 * d10v.h: Change pre_defined_registers to
1269 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1270
1271 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1272
1273 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1274 Change mips_opcodes from const array to a pointer,
1275 and change bfd_mips_num_opcodes from const int to int,
1276 so that we can increase the size of the mips opcodes table
1277 dynamically.
1278
1279 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1280
1281 * d30v.h (FLAG_X): Remove unused flag.
1282
1283 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1284
1285 * d30v.h: New file.
1286
1287 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1288
1289 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1290 (PDS_VALUE): Macro to access value field of predefined symbols.
1291 (tic80_next_predefined_symbol): Add prototype.
1292
1293 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1294
1295 * tic80.h (tic80_symbol_to_value): Change prototype to match
1296 change in function, added class parameter.
1297
1298 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1299
1300 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1301 endmask fields, which are somewhat weird in that 0 and 32 are
1302 treated exactly the same.
1303
1304 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1305
1306 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1307 rather than a constant that is 2**X. Reorder them to put bits for
1308 operands that have symbolic names in the upper bits, so they can
1309 be packed into an int where the lower bits contain the value that
1310 corresponds to that symbolic name.
1311 (predefined_symbo): Add struct.
1312 (tic80_predefined_symbols): Declare array of translations.
1313 (tic80_num_predefined_symbols): Declare size of that array.
1314 (tic80_value_to_symbol): Declare function.
1315 (tic80_symbol_to_value): Declare function.
1316
1317 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1318
1319 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1320
1321 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1322
1323 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1324 be the destination register.
1325
1326 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1327
1328 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1329 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1330 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1331 that the opcode can have two vector instructions in a single
1332 32 bit word and we have to encode/decode both.
1333
1334 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1335
1336 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1337 TIC80_OPERAND_RELATIVE for PC relative.
1338 (TIC80_OPERAND_BASEREL): New flag bit for register
1339 base relative.
1340
1341 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1342
1343 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1344
1345 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1346
1347 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1348 ":s" modifier for scaling.
1349
1350 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1351
1352 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1353 (TIC80_OPERAND_M_LI): Ditto
1354
1355 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1356
1357 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1358 (TIC80_OPERAND_CC): New define for condition code operand.
1359 (TIC80_OPERAND_CR): New define for control register operand.
1360
1361 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1362
1363 * tic80.h (struct tic80_opcode): Name changed.
1364 (struct tic80_opcode): Remove format field.
1365 (struct tic80_operand): Add insertion and extraction functions.
1366 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1367 correct ones.
1368 (FMT_*): Ditto.
1369
1370 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1371
1372 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1373 type IV instruction offsets.
1374
1375 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1376
1377 * tic80.h: New file.
1378
1379 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1380
1381 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1382
1383 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1384
1385 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1386 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1387 * v850.h: Fix comment, v850_operand not powerpc_operand.
1388
1389 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1390
1391 * mn10200.h: Flesh out structures and definitions needed by
1392 the mn10200 assembler & disassembler.
1393
1394 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1395
1396 * mips.h: Add mips16 definitions.
1397
1398 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1399
1400 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1401
1402 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1403
1404 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1405 (MN10300_OPERAND_MEMADDR): Define.
1406
1407 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1408
1409 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1410
1411 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1412
1413 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1414
1415 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1416
1417 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1418
1419 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1420
1421 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1422
1423 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1424
1425 * alpha.h: Don't include "bfd.h"; private relocation types are now
1426 negative to minimize problems with shared libraries. Organize
1427 instruction subsets by AMASK extensions and PALcode
1428 implementation.
1429 (struct alpha_operand): Move flags slot for better packing.
1430
1431 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1432
1433 * v850.h (V850_OPERAND_RELAX): New operand flag.
1434
1435 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1436
1437 * mn10300.h (FMT_*): Move operand format definitions
1438 here.
1439
1440 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1441
1442 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1443
1444 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1445
1446 * mn10300.h (mn10300_opcode): Add "format" field.
1447 (MN10300_OPERAND_*): Define.
1448
1449 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1450
1451 * mn10x00.h: Delete.
1452 * mn10200.h, mn10300.h: New files.
1453
1454 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1455
1456 * mn10x00.h: New file.
1457
1458 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1459
1460 * v850.h: Add new flag to indicate this instruction uses a PC
1461 displacement.
1462
1463 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1464
1465 * h8300.h (stmac): Add missing instruction.
1466
1467 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1468
1469 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1470 field.
1471
1472 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1473
1474 * v850.h (V850_OPERAND_EP): Define.
1475
1476 * v850.h (v850_opcode): Add size field.
1477
1478 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1479
1480 * v850.h (v850_operands): Add insert and extract fields, pointers
1481 to functions used to handle unusual operand encoding.
1482 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1483 V850_OPERAND_SIGNED): Defined.
1484
1485 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1486
1487 * v850.h (v850_operands): Add flags field.
1488 (OPERAND_REG, OPERAND_NUM): Defined.
1489
1490 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1491
1492 * v850.h: New file.
1493
1494 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1495
1496 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1497 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1498 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1499 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1500 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1501 Defined.
1502
1503 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1504
1505 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1506 a 3 bit space id instead of a 2 bit space id.
1507
1508 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1509
1510 * d10v.h: Add some additional defines to support the
1511 assembler in determining which operations can be done in parallel.
1512
1513 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1514
1515 * h8300.h (SN): Define.
1516 (eepmov.b): Renamed from "eepmov"
1517 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1518 with them.
1519
1520 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1521
1522 * d10v.h (OPERAND_SHIFT): New operand flag.
1523
1524 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1525
1526 * d10v.h: Changes for divs, parallel-only instructions, and
1527 signed numbers.
1528
1529 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1530
1531 * d10v.h (pd_reg): Define. Putting the definition here allows
1532 the assembler and disassembler to share the same struct.
1533
1534 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1535
1536 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1537 Williams <steve@icarus.com>.
1538
1539 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1540
1541 * d10v.h: New file.
1542
1543 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1544
1545 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1546
1547 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1548
1549 * m68k.h (mcf5200): New macro.
1550 Document names of coldfire control registers.
1551
1552 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1553
1554 * h8300.h (SRC_IN_DST): Define.
1555
1556 * h8300.h (UNOP3): Mark the register operand in this insn
1557 as a source operand, not a destination operand.
1558 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1559 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1560 register operand with SRC_IN_DST.
1561
1562 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1563
1564 * alpha.h: New file.
1565
1566 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1567
1568 * rs6k.h: Remove obsolete file.
1569
1570 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1571
1572 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1573 fdivp, and fdivrp. Add ffreep.
1574
1575 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1576
1577 * h8300.h: Reorder various #defines for readability.
1578 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1579 (BITOP): Accept additional (unused) argument. All callers changed.
1580 (EBITOP): Likewise.
1581 (O_LAST): Bump.
1582 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1583
1584 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1585 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1586 (BITOP, EBITOP): Handle new H8/S addressing modes for
1587 bit insns.
1588 (UNOP3): Handle new shift/rotate insns on the H8/S.
1589 (insns using exr): New instructions.
1590 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1591
1592 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1593
1594 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1595 was incorrect.
1596
1597 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1598
1599 * h8300.h (START): Remove.
1600 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1601 and mov.l insns that can be relaxed.
1602
1603 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1604
1605 * i386.h: Remove Abs32 from lcall.
1606
1607 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1608
1609 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1610 (SLCPOP): New macro.
1611 Mark X,Y opcode letters as in use.
1612
1613 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1614
1615 * sparc.h (F_FLOAT, F_FBR): Define.
1616
1617 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1618
1619 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1620 from all insns.
1621 (ABS8SRC,ABS8DST): Add ABS8MEM.
1622 (add.l): Fix reg+reg variant.
1623 (eepmov.w): Renamed from eepmovw.
1624 (ldc,stc): Fix many cases.
1625
1626 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1627
1628 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1629
1630 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1631
1632 * sparc.h (O): Mark operand letter as in use.
1633
1634 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1635
1636 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1637 Mark operand letters uU as in use.
1638
1639 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1640
1641 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1642 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1643 (SPARC_OPCODE_SUPPORTED): New macro.
1644 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1645 (F_NOTV9): Delete.
1646
1647 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1648
1649 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1650 declaration consistent with return type in definition.
1651
1652 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1653
1654 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1655
1656 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1657
1658 * i386.h (i386_regtab): Add 80486 test registers.
1659
1660 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1661
1662 * i960.h (I_HX): Define.
1663 (i960_opcodes): Add HX instruction.
1664
1665 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1666
1667 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1668 and fclex.
1669
1670 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1671
1672 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1673 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1674 (bfd_* defines): Delete.
1675 (sparc_opcode_archs): Replaces architecture_pname.
1676 (sparc_opcode_lookup_arch): Declare.
1677 (NUMOPCODES): Delete.
1678
1679 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1680
1681 * sparc.h (enum sparc_architecture): Add v9a.
1682 (ARCHITECTURES_CONFLICT_P): Update.
1683
1684 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1685
1686 * i386.h: Added Pentium Pro instructions.
1687
1688 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1689
1690 * m68k.h: Document new 'W' operand place.
1691
1692 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1693
1694 * hppa.h: Add lci and syncdma instructions.
1695
1696 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1697
1698 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1699 instructions.
1700
1701 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1702
1703 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1704 assembler's -mcom and -many switches.
1705
1706 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1707
1708 * i386.h: Fix cmpxchg8b extension opcode description.
1709
1710 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1711
1712 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1713 and register cr4.
1714
1715 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1716
1717 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1718
1719 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1720
1721 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1722
1723 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1724
1725 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1726
1727 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1728
1729 * m68kmri.h: Remove.
1730
1731 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1732 declarations. Remove F_ALIAS and flag field of struct
1733 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1734 int. Make name and args fields of struct m68k_opcode const.
1735
1736 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1737
1738 * sparc.h (F_NOTV9): Define.
1739
1740 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1741
1742 * mips.h (INSN_4010): Define.
1743
1744 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1745
1746 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1747
1748 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1749 * m68k.h: Fix argument descriptions of coprocessor
1750 instructions to allow only alterable operands where appropriate.
1751 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1752 (m68k_opcode_aliases): Add more aliases.
1753
1754 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1755
1756 * m68k.h: Added explcitly short-sized conditional branches, and a
1757 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1758 svr4-based configurations.
1759
1760 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1761
1762 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1763 * i386.h: added missing Data16/Data32 flags to a few instructions.
1764
1765 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1766
1767 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1768 (OP_MASK_BCC, OP_SH_BCC): Define.
1769 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1770 (OP_MASK_CCC, OP_SH_CCC): Define.
1771 (INSN_READ_FPR_R): Define.
1772 (INSN_RFE): Delete.
1773
1774 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1775
1776 * m68k.h (enum m68k_architecture): Deleted.
1777 (struct m68k_opcode_alias): New type.
1778 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1779 matching constraints, values and flags. As a side effect of this,
1780 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1781 as I know were never used, now may need re-examining.
1782 (numopcodes): Now const.
1783 (m68k_opcode_aliases, numaliases): New variables.
1784 (endop): Deleted.
1785 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1786 m68k_opcode_aliases; update declaration of m68k_opcodes.
1787
1788 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1789
1790 * hppa.h (delay_type): Delete unused enumeration.
1791 (pa_opcode): Replace unused delayed field with an architecture
1792 field.
1793 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1794
1795 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1796
1797 * mips.h (INSN_ISA4): Define.
1798
1799 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1800
1801 * mips.h (M_DLA_AB, M_DLI): Define.
1802
1803 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1804
1805 * hppa.h (fstwx): Fix single-bit error.
1806
1807 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1808
1809 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1810
1811 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1812
1813 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1814 debug registers. From Charles Hannum (mycroft@netbsd.org).
1815
1816 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1817
1818 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1819 i386 support:
1820 * i386.h (MOV_AX_DISP32): New macro.
1821 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1822 of several call/return instructions.
1823 (ADDR_PREFIX_OPCODE): New macro.
1824
1825 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1826
1827 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1828
1829 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1830 it pointer to const char;
1831 (struct vot, field `name'): ditto.
1832
1833 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1834
1835 * vax.h: Supply and properly group all values in end sentinel.
1836
1837 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1838
1839 * mips.h (INSN_ISA, INSN_4650): Define.
1840
1841 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1842
1843 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1844 systems with a separate instruction and data cache, such as the
1845 29040, these instructions take an optional argument.
1846
1847 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1848
1849 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1850 INSN_TRAP.
1851
1852 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1853
1854 * mips.h (INSN_STORE_MEMORY): Define.
1855
1856 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1857
1858 * sparc.h: Document new operand type 'x'.
1859
1860 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1861
1862 * i960.h (I_CX2): New instruction category. It includes
1863 instructions available on Cx and Jx processors.
1864 (I_JX): New instruction category, for JX-only instructions.
1865 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1866 Jx-only instructions, in I_JX category.
1867
1868 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1869
1870 * ns32k.h (endop): Made pointer const too.
1871
1872 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1873
1874 * ns32k.h: Drop Q operand type as there is no correct use
1875 for it. Add I and Z operand types which allow better checking.
1876
1877 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1878
1879 * h8300.h (xor.l) :fix bit pattern.
1880 (L_2): New size of operand.
1881 (trapa): Use it.
1882
1883 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1884
1885 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1886
1887 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1888
1889 * sparc.h: Include v9 definitions.
1890
1891 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1892
1893 * m68k.h (m68060): Defined.
1894 (m68040up, mfloat, mmmu): Include it.
1895 (struct m68k_opcode): Widen `arch' field.
1896 (m68k_opcodes): Updated for M68060. Removed comments that were
1897 instructions commented out by "JF" years ago.
1898
1899 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1900
1901 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1902 add a one-bit `flags' field.
1903 (F_ALIAS): New macro.
1904
1905 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1906
1907 * h8300.h (dec, inc): Get encoding right.
1908
1909 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1910
1911 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1912 a flag instead.
1913 (PPC_OPERAND_SIGNED): Define.
1914 (PPC_OPERAND_SIGNOPT): Define.
1915
1916 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1917
1918 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1919 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1920
1921 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1922
1923 * i386.h: Reverse last change. It'll be handled in gas instead.
1924
1925 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1926
1927 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1928 slower on the 486 and used the implicit shift count despite the
1929 explicit operand. The one-operand form is still available to get
1930 the shorter form with the implicit shift count.
1931
1932 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1933
1934 * hppa.h: Fix typo in fstws arg string.
1935
1936 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1937
1938 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1939
1940 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1941
1942 * ppc.h (PPC_OPCODE_601): Define.
1943
1944 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1945
1946 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1947 (so we can determine valid completers for both addb and addb[tf].)
1948
1949 * hppa.h (xmpyu): No floating point format specifier for the
1950 xmpyu instruction.
1951
1952 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1953
1954 * ppc.h (PPC_OPERAND_NEXT): Define.
1955 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1956 (struct powerpc_macro): Define.
1957 (powerpc_macros, powerpc_num_macros): Declare.
1958
1959 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1960
1961 * ppc.h: New file. Header file for PowerPC opcode table.
1962
1963 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1964
1965 * hppa.h: More minor template fixes for sfu and copr (to allow
1966 for easier disassembly).
1967
1968 * hppa.h: Fix templates for all the sfu and copr instructions.
1969
1970 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1971
1972 * i386.h (push): Permit Imm16 operand too.
1973
1974 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1975
1976 * h8300.h (andc): Exists in base arch.
1977
1978 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1979
1980 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1981 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1982
1983 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1984
1985 * hppa.h: Add FP quadword store instructions.
1986
1987 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1988
1989 * mips.h: (M_J_A): Added.
1990 (M_LA): Removed.
1991
1992 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1993
1994 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1995 <mellon@pepper.ncd.com>.
1996
1997 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1998
1999 * hppa.h: Immediate field in probei instructions is unsigned,
2000 not low-sign extended.
2001
2002 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2003
2004 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2005
2006 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2007
2008 * i386.h: Add "fxch" without operand.
2009
2010 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2011
2012 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2013
2014 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2015
2016 * hppa.h: Add gfw and gfr to the opcode table.
2017
2018 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2019
2020 * m88k.h: extended to handle m88110.
2021
2022 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2023
2024 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2025 addresses.
2026
2027 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2028
2029 * i960.h (i960_opcodes): Properly bracket initializers.
2030
2031 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2032
2033 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2034
2035 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2036
2037 * m68k.h (two): Protect second argument with parentheses.
2038
2039 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2040
2041 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2042 Deleted old in/out instructions in "#if 0" section.
2043
2044 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2045
2046 * i386.h (i386_optab): Properly bracket initializers.
2047
2048 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2049
2050 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2051 Jeff Law, law@cs.utah.edu).
2052
2053 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2054
2055 * i386.h (lcall): Accept Imm32 operand also.
2056
2057 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2058
2059 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2060 (M_DABS): Added.
2061
2062 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2063
2064 * mips.h (INSN_*): Changed values. Removed unused definitions.
2065 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2066 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2067 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2068 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2069 (M_*): Added new values for r6000 and r4000 macros.
2070 (ANY_DELAY): Removed.
2071
2072 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2073
2074 * mips.h: Added M_LI_S and M_LI_SS.
2075
2076 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2077
2078 * h8300.h: Get some rare mov.bs correct.
2079
2080 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2081
2082 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2083 been included.
2084
2085 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2086
2087 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2088 jump instructions, for use in disassemblers.
2089
2090 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2091
2092 * m88k.h: Make bitfields just unsigned, not unsigned long or
2093 unsigned short.
2094
2095 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2096
2097 * hppa.h: New argument type 'y'. Use in various float instructions.
2098
2099 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2100
2101 * hppa.h (break): First immediate field is unsigned.
2102
2103 * hppa.h: Add rfir instruction.
2104
2105 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2106
2107 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2108
2109 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2110
2111 * mips.h: Reworked the hazard information somewhat, and fixed some
2112 bugs in the instruction hazard descriptions.
2113
2114 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2115
2116 * m88k.h: Corrected a couple of opcodes.
2117
2118 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2119
2120 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2121 new version includes instruction hazard information, but is
2122 otherwise reasonably similar.
2123
2124 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2125
2126 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2127
2128 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2129
2130 Patches from Jeff Law, law@cs.utah.edu:
2131 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2132 Make the tables be the same for the following instructions:
2133 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2134 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2135 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2136 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2137 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2138 "fcmp", and "ftest".
2139
2140 * hppa.h: Make new and old tables the same for "break", "mtctl",
2141 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2142 Fix typo in last patch. Collapse several #ifdefs into a
2143 single #ifdef.
2144
2145 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2146 of the comments up-to-date.
2147
2148 * hppa.h: Update "free list" of letters and update
2149 comments describing each letter's function.
2150
2151 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2152
2153 * h8300.h: checkpoint, includes H8/300-H opcodes.
2154
2155 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2156
2157 * Patches from Jeffrey Law <law@cs.utah.edu>.
2158 * hppa.h: Rework single precision FP
2159 instructions so that they correctly disassemble code
2160 PA1.1 code.
2161
2162 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2163
2164 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2165 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2166
2167 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2168
2169 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2170 gdb will define it for now.
2171
2172 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2173
2174 * sparc.h: Don't end enumerator list with comma.
2175
2176 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2177
2178 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2179 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2180 ("bc2t"): Correct typo.
2181 ("[ls]wc[023]"): Use T rather than t.
2182 ("c[0123]"): Define general coprocessor instructions.
2183
2184 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2185
2186 * m68k.h: Move split point for gcc compilation more towards
2187 middle.
2188
2189 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2190
2191 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2192 simply wrong, ics, rfi, & rfsvc were missing).
2193 Add "a" to opr_ext for "bb". Doc fix.
2194
2195 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2196
2197 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2198 * mips.h: Add casts, to suppress warnings about shifting too much.
2199 * m68k.h: Document the placement code '9'.
2200
2201 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2202
2203 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2204 allows callers to break up the large initialized struct full of
2205 opcodes into two half-sized ones. This permits GCC to compile
2206 this module, since it takes exponential space for initializers.
2207 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2208
2209 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2210
2211 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2212 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2213 initialized structs in it.
2214
2215 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2216
2217 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2218 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2219 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2220
2221 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2222
2223 * mips.h: document "i" and "j" operands correctly.
2224
2225 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2226
2227 * mips.h: Removed endianness dependency.
2228
2229 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2230
2231 * h8300.h: include info on number of cycles per instruction.
2232
2233 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2234
2235 * hppa.h: Move handy aliases to the front. Fix masks for extract
2236 and deposit instructions.
2237
2238 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2239
2240 * i386.h: accept shld and shrd both with and without the shift
2241 count argument, which is always %cl.
2242
2243 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2244
2245 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2246 (one_byte_segment_defaults, two_byte_segment_defaults,
2247 i386_prefixtab_end): Ditto.
2248
2249 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2250
2251 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2252 for operand 2; from John Carr, jfc@dsg.dec.com.
2253
2254 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2255
2256 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2257 always use 16-bit offsets. Makes calculated-size jump tables
2258 feasible.
2259
2260 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2261
2262 * i386.h: Fix one-operand forms of in* and out* patterns.
2263
2264 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2265
2266 * m68k.h: Added CPU32 support.
2267
2268 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2269
2270 * mips.h (break): Disassemble the argument. Patch from
2271 jonathan@cs.stanford.edu (Jonathan Stone).
2272
2273 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2274
2275 * m68k.h: merged Motorola and MIT syntax.
2276
2277 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2278
2279 * m68k.h (pmove): make the tests less strict, the 68k book is
2280 wrong.
2281
2282 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2283
2284 * m68k.h (m68ec030): Defined as alias for 68030.
2285 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2286 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2287 them. Tightened description of "fmovex" to distinguish it from
2288 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2289 up descriptions that claimed versions were available for chips not
2290 supporting them. Added "pmovefd".
2291
2292 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2293
2294 * m68k.h: fix where the . goes in divull
2295
2296 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2297
2298 * m68k.h: the cas2 instruction is supposed to be written with
2299 indirection on the last two operands, which can be either data or
2300 address registers. Added a new operand type 'r' which accepts
2301 either register type. Added new cases for cas2l and cas2w which
2302 use them. Corrected masks for cas2 which failed to recognize use
2303 of address register.
2304
2305 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2306
2307 * m68k.h: Merged in patches (mostly m68040-specific) from
2308 Colin Smith <colin@wrs.com>.
2309
2310 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2311 base). Also cleaned up duplicates, re-ordered instructions for
2312 the sake of dis-assembling (so aliases come after standard names).
2313 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2314
2315 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2316
2317 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2318 all missing .s
2319
2320 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2321
2322 * sparc.h: Moved tables to BFD library.
2323
2324 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2325
2326 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2327
2328 * h8300.h: Finish filling in all the holes in the opcode table,
2329 so that the Lucid C compiler can digest this as well...
2330
2331 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2332
2333 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2334 Fix opcodes on various sizes of fild/fist instructions
2335 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2336 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2337
2338 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2339
2340 * h8300.h: Fill in all the holes in the opcode table so that the
2341 losing HPUX C compiler can digest this...
2342
2343 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2344
2345 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2346 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2347
2348 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2349
2350 * sparc.h: Add new architecture variant sparclite; add its scan
2351 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2352
2353 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2354
2355 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2356 fy@lucid.com).
2357
2358 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2359
2360 * rs6k.h: New version from IBM (Metin).
2361
2362 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2363
2364 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2365 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2366
2367 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2368
2369 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2370
2371 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2372
2373 * m68k.h (one, two): Cast macro args to unsigned to suppress
2374 complaints from compiler and lint about integer overflow during
2375 shift.
2376
2377 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2378
2379 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2380
2381 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2382
2383 * mips.h: Make bitfield layout depend on the HOST compiler,
2384 not on the TARGET system.
2385
2386 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2387
2388 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2389 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2390 <TRANLE@INTELLICORP.COM>.
2391
2392 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2393
2394 * h8300.h: turned op_type enum into #define list
2395
2396 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2397
2398 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2399 similar instructions -- they've been renamed to "fitoq", etc.
2400 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2401 number of arguments.
2402 * h8300.h: Remove extra ; which produces compiler warning.
2403
2404 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2405
2406 * sparc.h: fix opcode for tsubcctv.
2407
2408 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2409
2410 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2411
2412 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2413
2414 * sparc.h (nop): Made the 'lose' field be even tighter,
2415 so only a standard 'nop' is disassembled as a nop.
2416
2417 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2418
2419 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2420 disassembled as a nop.
2421
2422 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2423
2424 * sparc.h: fix a typo.
2425
2426 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2427
2428 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2429 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2430 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2431
2432 \f
2433 Local Variables:
2434 version-control: never
2435 End:
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