1 2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
3 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
5 2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
7 * h8300.h: Corrected defs of all control regs
10 2002-04-11 Alan Modra <amodra@bigpond.net.au>
12 * i386.h: Add intel mode cmpsd and movsd.
13 Put them before SSE2 insns, so that rep prefix works.
15 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
17 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
19 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
20 may be passed along with the ISA bitmask.
22 2002-03-05 Paul Koning <pkoning@equallogic.com>
24 * pdp11.h: Add format codes for float instruction formats.
26 2002-02-25 Alan Modra <amodra@bigpond.net.au>
28 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
30 Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
32 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
34 Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
36 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
38 (in, out): Disable 64bit operands.
39 (call, jmp): Avoid REX prefixes.
40 (jcxz): Prohibit in 64bit mode
41 (jrcxz, loop): Add 64bit variants.
43 (movmskps, pextrw, pinstrw): Add 64bit variants.
45 2002-01-31 Ivan Guzvinec <ivang@opencores.org>
49 2002-01-22 Graydon Hoare <graydon@redhat.com>
51 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
52 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
54 2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
56 * h8300.h: Comment typo fix.
58 2002-01-03 matthew green <mrg@redhat.com>
60 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
61 (PPC_OPCODE_BOOKE64): Likewise.
63 Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
65 * hppa.h (call, ret): Move to end of table.
66 (addb, addib): PA2.0 variants should have been PA2.0W.
67 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
69 (fldw, fldd, fstw, fstd, bb): Likewise.
70 (short loads/stores): Tweak format specifier slightly to keep
72 (indexed loads/stores): Likewise.
73 (absolute loads/stores): Likewise.
75 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
77 * d10v.h (OPERAND_NOSP): New macro.
79 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
81 * d10v.h (OPERAND_SP): New macro.
83 2001-11-15 Alan Modra <amodra@bigpond.net.au>
85 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
87 2001-11-11 Timothy Wall <twall@alum.mit.edu>
89 * tic54x.h: Revise opcode layout; don't really need a separate
90 structure for parallel opcodes.
92 2001-11-13 Zack Weinberg <zack@codesourcery.com>
93 Alan Modra <amodra@bigpond.net.au>
95 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
98 2001-11-04 Chris Demetriou <cgd@broadcom.com>
100 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
102 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
106 2001-10-18 Chris Demetriou <cgd@broadcom.com>
108 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
109 of the expression, to make source code merging easier.
111 2001-10-17 Chris Demetriou <cgd@broadcom.com>
113 * mips.h: Sort coprocessor instruction argument characters
114 in comment, add a few more words of description for "H".
116 2001-10-17 Chris Demetriou <cgd@broadcom.com>
118 * mips.h (INSN_SB1): New cpu-specific instruction bit.
119 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
122 2001-10-17 matthew green <mrg@redhat.com>
124 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
126 2001-10-12 matthew green <mrg@redhat.com>
128 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
129 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
130 instructions, respectively.
132 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
134 * v850.h: Remove spurious comment.
136 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
138 * h8300.h: Fix compile time warning messages
140 2001-09-04 Richard Henderson <rth@redhat.com>
142 * alpha.h (struct alpha_operand): Pack elements into bitfields.
144 2001-08-31 Eric Christopher <echristo@redhat.com>
146 * mips.h: Remove CPU_MIPS32_4K.
148 2001-08-27 Torbjorn Granlund <tege@swox.com>
150 * ppc.h (PPC_OPERAND_DS): Define.
152 2001-08-25 Andreas Jaeger <aj@suse.de>
154 * d30v.h: Fix declaration of reg_name_cnt.
156 * d10v.h: Fix declaration of d10v_reg_name_cnt.
158 * arc.h: Add prototypes from opcodes/arc-opc.c.
160 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
162 * mips.h (INSN_10000): Define.
163 (OPCODE_IS_MEMBER): Check for INSN_10000.
165 2001-08-10 Alan Modra <amodra@one.net.au>
167 * ppc.h: Revert 2001-08-08.
169 2001-08-10 Richard Sandiford <rsandifo@redhat.com>
171 * mips.h (INSN_GP32): Remove.
172 (OPCODE_IS_MEMBER): Remove gp32 parameter.
173 (M_MOVE): New macro identifier.
175 2001-08-08 Alan Modra <amodra@one.net.au>
177 1999-10-25 Torbjorn Granlund <tege@swox.com>
178 * ppc.h (struct powerpc_operand): New field `reloc'.
180 2001-08-01 Aldy Hernandez <aldyh@redhat.com>
182 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
184 2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
186 * cgen.h (CGEN_INSN): Add regex support.
187 (build_insn_regex): Declare.
189 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
191 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
192 (cgen_cpu_desc): Ditto.
194 2001-07-07 Ben Elliston <bje@redhat.com>
196 * m88k.h: Clean up and reformat. Remove unused code.
198 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
200 * cgen.h (cgen_keyword): Add nonalpha_chars field.
202 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
204 * mips.h (CPU_R12000): Define.
206 2001-05-23 John Healy <jhealy@redhat.com>
208 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
210 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
212 * mips.h (INSN_ISA_MASK): Define.
214 2001-05-12 Alan Modra <amodra@one.net.au>
216 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
217 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
218 and use InvMem as these insns must have register operands.
220 2001-05-04 Alan Modra <amodra@one.net.au>
222 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
223 and pextrw to swap reg/rm assignments.
225 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
227 * cris.h (enum cris_insn_version_usage): Correct comment for
230 2001-03-24 Alan Modra <alan@linuxcare.com.au>
232 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
233 Add InvMem to first operand of "maskmovdqu".
235 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
237 * cris.h (ADD_PC_INCR_OPCODE): New macro.
239 2001-03-21 Kazu Hirata <kazu@hxi.com>
241 * h8300.h: Fix formatting.
243 2001-03-22 Alan Modra <alan@linuxcare.com.au>
245 * i386.h (i386_optab): Add paddq, psubq.
247 2001-03-19 Alan Modra <alan@linuxcare.com.au>
249 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
251 2001-02-28 Igor Shevlyakov <igor@windriver.com>
253 * m68k.h: new defines for Coldfire V4. Update mcf to know
256 2001-02-18 lars brinkhoff <lars@nocrew.org>
260 2001-02-12 Jan Hubicka <jh@suse.cz>
262 * i386.h (i386_optab): SSE integer converison instructions have
263 64bit versions on x86-64.
265 2001-02-10 Nick Clifton <nickc@redhat.com>
267 * mips.h: Remove extraneous whitespace. Formating change to allow
268 for future contribution.
270 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
274 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
276 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
277 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
278 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
280 2001-01-24 Karsten Keil <kkeil@suse.de>
282 * i386.h (i386_optab): Fix swapgs
284 2001-01-14 Alan Modra <alan@linuxcare.com.au>
286 * hppa.h: Describe new '<' and '>' operand types, and tidy
288 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
289 Remove duplicate "ldw j(s,b),x". Sort some entries.
291 2001-01-13 Jan Hubicka <jh@suse.cz>
293 * i386.h (i386_optab): Fix pusha and ret templates.
295 2001-01-11 Peter Targett <peter.targett@arccores.com>
297 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
298 definitions for masking cpu type.
299 (arc_ext_operand_value) New structure for storing extended
301 (ARC_OPERAND_*) Flags for operand values.
303 2001-01-10 Jan Hubicka <jh@suse.cz>
305 * i386.h (pinsrw): Add.
307 (cvttpd2dq): Fix operands.
308 (cvttps2dq): Likewise.
309 (movq2q): Rename to movdq2q.
311 2001-01-10 Richard Schaal <richard.schaal@intel.com>
313 * i386.h: Correct movnti instruction.
315 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
317 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
318 of operands (unsigned char or unsigned short).
319 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
320 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
322 2001-01-05 Jan Hubicka <jh@suse.cz>
324 * i386.h (i386_optab): Make [sml]fence template to use immext field.
326 2001-01-03 Jan Hubicka <jh@suse.cz>
328 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
329 introduced by Pentium4
331 2000-12-30 Jan Hubicka <jh@suse.cz>
333 * i386.h (i386_optab): Add "rex*" instructions;
334 add swapgs; disable jmp/call far direct instructions for
335 64bit mode; add syscall and sysret; disable registers for 0xc6
336 template. Add 'q' suffixes to extendable instructions, disable
337 obsolete instructions, add new sign/zero extension ones.
338 (i386_regtab): Add extended registers.
340 (q_Suf, wlq_Suf, bwlq_Suf): New.
342 2000-12-20 Jan Hubicka <jh@suse.cz>
344 * i386.h (i386_optab): Replace "Imm" with "EncImm".
345 (i386_regtab): Add flags field.
347 2000-12-12 Nick Clifton <nickc@redhat.com>
349 * mips.h: Fix formatting.
351 2000-12-01 Chris Demetriou <cgd@sibyte.com>
353 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
354 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
355 OP_*_SYSCALL definitions.
356 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
358 (MIPS operand specifier comments): Remove 'm', add 'U' and
359 'J', and update the meaning of 'B' so that it's more general.
361 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
362 INSN_ISA5): Renumber, redefine to mean the ISA at which the
363 instruction was added.
364 (INSN_ISA32): New constant.
365 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
366 Renumber to avoid new and/or renumbered INSN_* constants.
367 (INSN_MIPS32): Delete.
368 (ISA_UNKNOWN): New constant to indicate unknown ISA.
369 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
370 ISA_MIPS32): New constants, defined to be the mask of INSN_*
371 constants available at that ISA level.
372 (CPU_UNKNOWN): New constant to indicate unknown CPU.
373 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
374 define it with a unique value.
375 (OPCODE_IS_MEMBER): Update for new ISA membership-related
378 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
381 * mips.h (CPU_SB1): New constant.
383 2000-10-20 Jakub Jelinek <jakub@redhat.com>
385 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
386 Note that '3' is used for siam operand.
388 2000-09-22 Jim Wilson <wilson@cygnus.com>
390 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
392 2000-09-13 Anders Norlander <anorland@acc.umu.se>
394 * mips.h: Use defines instead of hard-coded processor numbers.
395 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
396 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
397 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
398 CPU_4KC, CPU_4KM, CPU_4KP): Define..
399 (OPCODE_IS_MEMBER): Use new defines.
400 (OP_MASK_SEL, OP_SH_SEL): Define.
401 (OP_MASK_CODE20, OP_SH_CODE20): Define.
402 Add 'P' to used characters.
403 Use 'H' for coprocessor select field.
404 Use 'm' for 20 bit breakpoint code.
405 Document new arg characters and add to used characters.
406 (INSN_MIPS32): New define for MIPS32 extensions.
407 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
409 2000-09-05 Alan Modra <alan@linuxcare.com.au>
411 * hppa.h: Mention cz completer.
413 2000-08-16 Jim Wilson <wilson@cygnus.com>
415 * ia64.h (IA64_OPCODE_POSTINC): New.
417 2000-08-15 H.J. Lu <hjl@gnu.org>
419 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
422 2000-08-08 Jason Eckhardt <jle@cygnus.com>
424 * i860.h: Small formatting adjustments.
426 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
428 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
429 Move related opcodes closer to each other.
430 Minor changes in comments, list undefined opcodes.
432 2000-07-26 Dave Brolley <brolley@redhat.com>
434 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
436 2000-07-22 Jason Eckhardt <jle@cygnus.com>
438 * i860.h (btne, bte, bla): Changed these opcodes
439 to use sbroff ('r') instead of split16 ('s').
440 (J, K, L, M): New operand types for 16-bit aligned fields.
441 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
442 use I, J, K, L, M instead of just I.
443 (T, U): New operand types for split 16-bit aligned fields.
444 (st.x): Changed these opcodes to use S, T, U instead of just S.
445 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
447 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
448 (pfeq.ss, pfeq.dd): New opcodes.
449 (st.s): Fixed incorrect mask bits.
450 (fmlow): Fixed incorrect mask bits.
451 (fzchkl, pfzchkl): Fixed incorrect mask bits.
452 (faddz, pfaddz): Fixed incorrect mask bits.
453 (form, pform): Fixed incorrect mask bits.
454 (pfld.l): Fixed incorrect mask bits.
455 (fst.q): Fixed incorrect mask bits.
456 (all floating point opcodes): Fixed incorrect mask bits for
457 handling of dual bit.
459 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
463 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
465 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
466 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
467 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
468 (AVR_ISA_M83): Define for ATmega83, ATmega85.
469 (espm): Remove, because ESPM removed in databook update.
470 (eicall, eijmp): Move to the end of opcode table.
472 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
474 * m68hc11.h: New file for support of Motorola 68hc11.
476 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
478 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
480 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
482 * avr.h: New file with AVR opcodes.
484 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
486 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
488 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
490 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
492 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
494 * i386.h: Use sl_FP, not sl_Suf for fild.
496 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
498 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
499 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
500 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
501 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
503 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
505 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
507 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
508 Alexander Sokolov <robocop@netlink.ru>
510 * i386.h (i386_optab): Add cpu_flags for all instructions.
512 2000-05-13 Alan Modra <alan@linuxcare.com.au>
514 From Gavin Romig-Koch <gavin@cygnus.com>
515 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
517 2000-05-04 Timothy Wall <twall@cygnus.com>
521 2000-05-03 J.T. Conklin <jtc@redback.com>
523 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
524 (PPC_OPERAND_VR): New operand flag for vector registers.
526 2000-05-01 Kazu Hirata <kazu@hxi.com>
528 * h8300.h (EOP): Add missing initializer.
530 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
532 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
533 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
534 New operand types l,y,&,fe,fE,fx added to support above forms.
535 (pa_opcodes): Replaced usage of 'x' as source/target for
536 floating point double-word loads/stores with 'fx'.
538 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
539 David Mosberger <davidm@hpl.hp.com>
540 Timothy Wall <twall@cygnus.com>
541 Jim Wilson <wilson@cygnus.com>
545 2000-03-27 Nick Clifton <nickc@cygnus.com>
547 * d30v.h (SHORT_A1): Fix value.
548 (SHORT_AR): Renumber so that it is at the end of the list of short
549 instructions, not the end of the list of long instructions.
551 2000-03-26 Alan Modra <alan@linuxcare.com>
553 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
554 problem isn't really specific to Unixware.
555 (OLDGCC_COMPAT): Define.
556 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
558 Fix lots of comments.
560 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
563 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
564 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
565 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
566 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
567 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
568 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
569 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
571 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
573 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
574 fistpd without suffix.
576 2000-02-24 Nick Clifton <nickc@cygnus.com>
578 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
579 'signed_overflow_ok_p'.
580 Delete prototypes for cgen_set_flags() and cgen_get_flags().
582 2000-02-24 Andrew Haley <aph@cygnus.com>
584 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
585 (CGEN_CPU_TABLE): flags: new field.
586 Add prototypes for new functions.
588 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
590 * i386.h: Add some more UNIXWARE_COMPAT comments.
592 2000-02-23 Linas Vepstas <linas@linas.org>
596 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
598 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
599 cannot be combined in parallel with ADD/SUBppp.
601 2000-02-22 Andrew Haley <aph@cygnus.com>
603 * mips.h: (OPCODE_IS_MEMBER): Add comment.
605 1999-12-30 Andrew Haley <aph@cygnus.com>
607 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
608 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
611 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
613 * i386.h: Qualify intel mode far call and jmp with x_Suf.
615 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
617 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
618 indirect jumps and calls. Add FF/3 call for intel mode.
620 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
622 * mn10300.h: Add new operand types. Add new instruction formats.
624 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
626 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
629 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
631 * mips.h (INSN_ISA5): New.
633 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
635 * mips.h (OPCODE_IS_MEMBER): New.
637 1999-10-29 Nick Clifton <nickc@cygnus.com>
639 * d30v.h (SHORT_AR): Define.
641 1999-10-18 Michael Meissner <meissner@cygnus.com>
643 * alpha.h (alpha_num_opcodes): Convert to unsigned.
644 (alpha_num_operands): Ditto.
646 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
648 * hppa.h (pa_opcodes): Add load and store cache control to
649 instructions. Add ordered access load and store.
651 * hppa.h (pa_opcode): Add new entries for addb and addib.
653 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
655 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
657 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
659 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
661 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
663 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
664 and "be" using completer prefixes.
666 * hppa.h (pa_opcodes): Add initializers to silence compiler.
668 * hppa.h: Update comments about character usage.
670 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
672 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
673 up the new fstw & bve instructions.
675 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
677 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
680 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
682 * hppa.h (pa_opcodes): Add long offset double word load/store
685 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
688 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
690 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
692 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
694 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
696 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
698 * hppa.h (pa_opcodes): Add support for "b,l".
700 * hppa.h (pa_opcodes): Add support for "b,gate".
702 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
704 * hppa.h (pa_opcodes): Use 'fX' for first register operand
707 * hppa.h (pa_opcodes): Fix mask for probe and probei.
709 * hppa.h (pa_opcodes): Fix mask for depwi.
711 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
713 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
714 an explicit output argument.
716 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
718 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
719 Add a few PA2.0 loads and store variants.
721 1999-09-04 Steve Chamberlain <sac@pobox.com>
725 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
727 * i386.h (i386_regtab): Move %st to top of table, and split off
728 other fp reg entries.
729 (i386_float_regtab): To here.
731 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
733 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
736 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
739 * hppa.h: Document new completers and args.
740 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
741 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
742 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
745 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
746 hshr, hsub, mixh, mixw, permh.
748 * hppa.h (pa_opcodes): Change completers in instructions to
751 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
752 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
754 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
755 fnegabs to use 'I' instead of 'F'.
757 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
759 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
760 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
761 Alphabetically sort PIII insns.
763 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
765 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
767 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
769 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
770 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
772 * hppa.h: Document 64 bit condition completers.
774 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
776 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
778 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
780 * i386.h (i386_optab): Add DefaultSize modifier to all insns
781 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
782 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
784 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
785 Jeff Law <law@cygnus.com>
787 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
789 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
791 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
792 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
794 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
796 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
798 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
800 * hppa.h (struct pa_opcode): Add new field "flags".
801 (FLAGS_STRICT): Define.
803 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
804 Jeff Law <law@cygnus.com>
806 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
808 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
810 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
812 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
813 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
814 flag to fcomi and friends.
816 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
818 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
819 integer logical instructions.
821 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
823 * m68k.h: Document new formats `E', `G', `H' and new places `N',
826 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
827 and new places `m', `M', `h'.
829 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
831 * hppa.h (pa_opcodes): Add several processor specific system
834 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
836 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
837 "addb", and "addib" to be used by the disassembler.
839 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
841 * i386.h (ReverseModrm): Remove all occurences.
842 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
843 movmskps, pextrw, pmovmskb, maskmovq.
844 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
845 ignore the data size prefix.
847 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
848 Mostly stolen from Doug Ledford <dledford@redhat.com>
850 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
852 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
854 1999-04-14 Doug Evans <devans@casey.cygnus.com>
856 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
857 (CGEN_ATTR_TYPE): Update.
858 (CGEN_ATTR_MASK): Number booleans starting at 0.
859 (CGEN_ATTR_VALUE): Update.
860 (CGEN_INSN_ATTR): Update.
862 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
864 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
867 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
869 * hppa.h (bb, bvb): Tweak opcode/mask.
872 1999-03-22 Doug Evans <devans@casey.cygnus.com>
874 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
875 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
876 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
877 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
878 Delete member max_insn_size.
879 (enum cgen_cpu_open_arg): New enum.
880 (cpu_open): Update prototype.
881 (cpu_open_1): Declare.
882 (cgen_set_cpu): Delete.
884 1999-03-11 Doug Evans <devans@casey.cygnus.com>
886 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
887 (CGEN_OPERAND_NIL): New macro.
888 (CGEN_OPERAND): New member `type'.
889 (@arch@_cgen_operand_table): Delete decl.
890 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
891 (CGEN_OPERAND_TABLE): New struct.
892 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
893 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
894 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
895 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
896 {get,set}_{int,vma}_operand.
897 (@arch@_cgen_cpu_open): New arg `isa'.
898 (cgen_set_cpu): Ditto.
900 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
902 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
904 1999-02-25 Doug Evans <devans@casey.cygnus.com>
906 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
907 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
909 (CGEN_HW_TABLE): New struct.
910 (hw_table): Delete declaration.
911 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
912 to table entry to enum.
913 (CGEN_OPINST): Ditto.
914 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
916 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
918 * alpha.h (AXP_OPCODE_EV6): New.
919 (AXP_OPCODE_NOPAL): Include it.
921 1999-02-09 Doug Evans <devans@casey.cygnus.com>
923 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
924 All uses updated. New members int_insn_p, max_insn_size,
925 parse_operand,insert_operand,extract_operand,print_operand,
926 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
927 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
928 extract_handlers,print_handlers.
929 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
930 (CGEN_ATTR_BOOL_OFFSET): New macro.
931 (CGEN_ATTR_MASK): Subtract it to compute bit number.
932 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
933 (cgen_opcode_handler): Renamed from cgen_base.
934 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
935 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
937 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
938 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
939 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
940 (CGEN_OPCODE,CGEN_IBASE): New types.
941 (CGEN_INSN): Rewrite.
942 (CGEN_{ASM,DIS}_HASH*): Delete.
943 (init_opcode_table,init_ibld_table): Declare.
944 (CGEN_INSN_ATTR): New type.
946 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
948 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
949 (x_FP, d_FP, dls_FP, sldx_FP): Define.
950 Change *Suf definitions to include x and d suffixes.
951 (movsx): Use w_Suf and b_Suf.
953 (movs): Use bwld_Suf.
954 (fld): Change ordering. Use sld_FP.
955 (fild): Add Intel Syntax equivalent of fildq.
958 (fstp): Use sld_FP. Add x_FP version.
959 (fistp): LLongMem version for Intel Syntax.
960 (fcom, fcomp): Use sld_FP.
961 (fadd, fiadd, fsub): Use sld_FP.
963 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
965 1999-01-27 Doug Evans <devans@casey.cygnus.com>
967 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
970 1999-01-16 Jeffrey A Law (law@cygnus.com)
972 * hppa.h (bv): Fix mask.
974 1999-01-05 Doug Evans <devans@casey.cygnus.com>
976 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
978 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
979 (CGEN_ATTR_TABLE): New member dfault.
981 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
983 * mips.h (MIPS16_INSN_BRANCH): New.
985 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
987 The following is part of a change made by Edith Epstein
988 <eepstein@sophia.cygnus.com> as part of a project to merge in
989 changes by HP; HP did not create ChangeLog entries.
991 * hppa.h (completer_chars): list of chars to not put a space
994 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
996 * i386.h (i386_optab): Permit w suffix on processor control and
997 status word instructions.
999 1998-11-30 Doug Evans <devans@casey.cygnus.com>
1001 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1002 (struct cgen_keyword_entry): Ditto.
1003 (struct cgen_operand): Ditto.
1004 (CGEN_IFLD): New typedef, with associated access macros.
1005 (CGEN_IFMT): New typedef, with associated access macros.
1006 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1007 (CGEN_IVALUE): New typedef.
1008 (struct cgen_insn): Delete const on syntax,attrs members.
1009 `format' now points to format data. Type of `value' is now
1011 (struct cgen_opcode_table): New member ifld_table.
1013 1998-11-18 Doug Evans <devans@casey.cygnus.com>
1015 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1016 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1017 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1018 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1019 (cgen_opcode_table): Update type of dis_hash fn.
1020 (extract_operand): Update type of `insn_value' arg.
1022 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1024 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1026 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1028 * mips.h (INSN_MULT): Added.
1030 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1032 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1034 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1036 * cgen.h (CGEN_INSN_INT): New typedef.
1037 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1038 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1039 (CGEN_INSN_BYTES_PTR): New typedef.
1040 (CGEN_EXTRACT_INFO): New typedef.
1041 (cgen_insert_fn,cgen_extract_fn): Update.
1042 (cgen_opcode_table): New member `insn_endian'.
1043 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1044 (insert_operand,extract_operand): Update.
1045 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1047 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1049 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1050 (struct CGEN_HW_ENTRY): New member `attrs'.
1051 (CGEN_HW_ATTR): New macro.
1052 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1053 (CGEN_INSN_INVALID_P): New macro.
1055 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1057 * hppa.h: Add "fid".
1059 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1061 From Robert Andrew Dale <rob@nb.net>
1062 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1063 (AMD_3DNOW_OPCODE): Define.
1065 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1067 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1069 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1071 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1073 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1075 Move all global state data into opcode table struct, and treat
1076 opcode table as something that is "opened/closed".
1077 * cgen.h (CGEN_OPCODE_DESC): New type.
1078 (all fns): New first arg of opcode table descriptor.
1079 (cgen_set_parse_operand_fn): Add prototype.
1080 (cgen_current_machine,cgen_current_endian): Delete.
1081 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1082 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1083 dis_hash_table,dis_hash_table_entries.
1084 (opcode_open,opcode_close): Add prototypes.
1086 * cgen.h (cgen_insn): New element `cdx'.
1088 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1090 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1092 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1094 * mn10300.h: Add "no_match_operands" field for instructions.
1095 (MN10300_MAX_OPERANDS): Define.
1097 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1099 * cgen.h (cgen_macro_insn_count): Declare.
1101 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1103 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1104 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1105 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1106 set_{int,vma}_operand.
1108 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1110 * mn10300.h: Add "machine" field for instructions.
1111 (MN103, AM30): Define machine types.
1113 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1115 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1117 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1119 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1121 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1123 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1125 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1126 those that happen to be implemented on pentiums.
1128 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1130 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1131 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1132 with Size16|IgnoreSize or Size32|IgnoreSize.
1134 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1136 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1137 (REPE): Rename to REPE_PREFIX_OPCODE.
1138 (i386_regtab_end): Remove.
1139 (i386_prefixtab, i386_prefixtab_end): Remove.
1140 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1142 (MAX_OPCODE_SIZE): Define.
1143 (i386_optab_end): Remove.
1145 (sl_FP): Use sl_Suf.
1147 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1148 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1149 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1150 data32, dword, and adword prefixes.
1151 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1154 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1156 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1158 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1159 register operands, because this is a common idiom. Flag them with
1160 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1161 fdivrp because gcc erroneously generates them. Also flag with a
1164 * i386.h: Add suffix modifiers to most insns, and tighter operand
1165 checks in some cases. Fix a number of UnixWare compatibility
1166 issues with float insns. Merge some floating point opcodes, using
1167 new FloatMF modifier.
1168 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1171 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1172 IgnoreDataSize where appropriate.
1174 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1176 * i386.h: (one_byte_segment_defaults): Remove.
1177 (two_byte_segment_defaults): Remove.
1178 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1180 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1182 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1183 (cgen_hw_lookup_by_num): Declare.
1185 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1187 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1188 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1190 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1192 * cgen.h (cgen_asm_init_parse): Delete.
1193 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1194 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1196 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1198 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1199 (cgen_asm_finish_insn): Update prototype.
1200 (cgen_insn): New members num, data.
1201 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1202 dis_hash, dis_hash_table_size moved to ...
1203 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1204 All uses updated. New members asm_hash_p, dis_hash_p.
1205 (CGEN_MINSN_EXPANSION): New struct.
1206 (cgen_expand_macro_insn): Declare.
1207 (cgen_macro_insn_count): Declare.
1208 (get_insn_operands): Update prototype.
1209 (lookup_get_insn_operands): Declare.
1211 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1213 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1214 regKludge. Add operands types for string instructions.
1216 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1218 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1221 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1223 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1226 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1228 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1229 Add IsString flag to string instructions.
1230 (IS_STRING): Don't define.
1231 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1232 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1233 (SS_PREFIX_OPCODE): Define.
1235 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1237 * i386.h: Revert March 24 patch; no more LinearAddress.
1239 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1241 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1242 instructions, and instead add FWait opcode modifier. Add short
1243 form of fldenv and fstenv.
1244 (FWAIT_OPCODE): Define.
1246 * i386.h (i386_optab): Change second operand constraint of `mov
1247 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1248 allow legal instructions such as `movl %gs,%esi'
1250 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1252 * h8300.h: Various changes to fully bracket initializers.
1254 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1256 * i386.h: Set LinearAddress for lidt and lgdt.
1258 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1260 * cgen.h (CGEN_BOOL_ATTR): New macro.
1262 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1264 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1266 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1268 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1269 (cgen_insn): Record syntax and format entries here, rather than
1272 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1274 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1276 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1278 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1279 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1280 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1282 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1284 * cgen.h (lookup_insn): New argument alias_p.
1286 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1288 Fix rac to accept only a0:
1289 * d10v.h (OPERAND_ACC): Split into:
1290 (OPERAND_ACC0, OPERAND_ACC1) .
1291 (OPERAND_GPR): Define.
1293 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1295 * cgen.h (CGEN_FIELDS): Define here.
1296 (CGEN_HW_ENTRY): New member `type'.
1297 (hw_list): Delete decl.
1298 (enum cgen_mode): Declare.
1299 (CGEN_OPERAND): New member `hw'.
1300 (enum cgen_operand_instance_type): Declare.
1301 (CGEN_OPERAND_INSTANCE): New type.
1302 (CGEN_INSN): New member `operands'.
1303 (CGEN_OPCODE_DATA): Make hw_list const.
1304 (get_insn_operands,lookup_insn): Add prototypes for.
1306 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1308 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1309 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1310 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1311 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1313 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1315 * cgen.h: Correct typo in comment end marker.
1317 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1319 * tic30.h: New file.
1321 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1323 * cgen.h: Add prototypes for cgen_save_fixups(),
1324 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1325 of cgen_asm_finish_insn() to return a char *.
1327 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1329 * cgen.h: Formatting changes to improve readability.
1331 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1333 * cgen.h (*): Clean up pass over `struct foo' usage.
1334 (CGEN_ATTR): Make unsigned char.
1335 (CGEN_ATTR_TYPE): Update.
1336 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1337 (cgen_base): Move member `attrs' to cgen_insn.
1338 (CGEN_KEYWORD): New member `null_entry'.
1339 (CGEN_{SYNTAX,FORMAT}): New types.
1340 (cgen_insn): Format and syntax separated from each other.
1342 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1344 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1345 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1346 flags_{used,set} long.
1347 (d30v_operand): Make flags field long.
1349 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1351 * m68k.h: Fix comment describing operand types.
1353 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1355 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1356 everything else after down.
1358 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1360 * d10v.h (OPERAND_FLAG): Split into:
1361 (OPERAND_FFLAG, OPERAND_CFLAG) .
1363 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1365 * mips.h (struct mips_opcode): Changed comments to reflect new
1368 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1370 * mips.h: Added to comments a quick-ref list of all assigned
1371 operand type characters.
1372 (OP_{MASK,SH}_PERFREG): New macros.
1374 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1376 * sparc.h: Add '_' and '/' for v9a asr's.
1377 Patch from David Miller <davem@vger.rutgers.edu>
1379 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1381 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1382 area are not available in the base model (H8/300).
1384 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1386 * m68k.h: Remove documentation of ` operand specifier.
1388 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1390 * m68k.h: Document q and v operand specifiers.
1392 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1394 * v850.h (struct v850_opcode): Add processors field.
1395 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1396 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1397 (PROCESSOR_V850EA): New bit constants.
1399 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1401 Merge changes from Martin Hunt:
1403 * d30v.h: Allow up to 64 control registers. Add
1406 * d30v.h (LONG_Db): New form for delayed branches.
1408 * d30v.h: (LONG_Db): New form for repeati.
1410 * d30v.h (SHORT_D2B): New form.
1412 * d30v.h (SHORT_A2): New form.
1414 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1415 registers are used. Needed for VLIW optimization.
1417 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1419 * cgen.h: Move assembler interface section
1420 up so cgen_parse_operand_result is defined for cgen_parse_address.
1421 (cgen_parse_address): Update prototype.
1423 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1425 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1427 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1429 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1430 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1433 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1436 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1439 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1440 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1442 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1444 * v850.h (V850_NOT_R0): New flag.
1446 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1448 * v850.h (struct v850_opcode): Remove flags field.
1450 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1452 * v850.h (struct v850_opcode): Add flags field.
1453 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1455 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1456 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1458 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1462 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1464 * sparc.h (sparc_opcodes): Declare as const.
1466 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1468 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1469 uses single or double precision floating point resources.
1470 (INSN_NO_ISA, INSN_ISA1): Define.
1471 (cpu specific INSN macros): Tweak into bitmasks outside the range
1474 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1476 * i386.h: Fix pand opcode.
1478 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1480 * mips.h: Widen INSN_ISA and move it to a more convenient
1481 bit position. Add INSN_3900.
1483 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1485 * mips.h (struct mips_opcode): added new field membership.
1487 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1489 * i386.h (movd): only Reg32 is allowed.
1491 * i386.h: add fcomp and ud2. From Wayne Scott
1492 <wscott@ichips.intel.com>.
1494 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1496 * i386.h: Add MMX instructions.
1498 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1500 * i386.h: Remove W modifier from conditional move instructions.
1502 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1504 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1505 with no arguments to match that generated by the UnixWare
1508 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1510 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1511 (cgen_parse_operand_fn): Declare.
1512 (cgen_init_parse_operand): Declare.
1513 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1514 new argument `want'.
1515 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1516 (enum cgen_parse_operand_type): New enum.
1518 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1520 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1522 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1526 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1528 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1531 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1533 * v850.h (extract): Make unsigned.
1535 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1539 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1541 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1542 take a direction bit.
1544 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1546 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1548 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1550 * sparc.h: Include <ansidecl.h>. Update function declarations to
1551 use prototypes, and to use const when appropriate.
1553 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1555 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1557 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1559 * d10v.h: Change pre_defined_registers to
1560 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1562 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1564 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1565 Change mips_opcodes from const array to a pointer,
1566 and change bfd_mips_num_opcodes from const int to int,
1567 so that we can increase the size of the mips opcodes table
1570 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1572 * d30v.h (FLAG_X): Remove unused flag.
1574 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1578 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1580 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1581 (PDS_VALUE): Macro to access value field of predefined symbols.
1582 (tic80_next_predefined_symbol): Add prototype.
1584 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1586 * tic80.h (tic80_symbol_to_value): Change prototype to match
1587 change in function, added class parameter.
1589 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1591 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1592 endmask fields, which are somewhat weird in that 0 and 32 are
1593 treated exactly the same.
1595 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1597 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1598 rather than a constant that is 2**X. Reorder them to put bits for
1599 operands that have symbolic names in the upper bits, so they can
1600 be packed into an int where the lower bits contain the value that
1601 corresponds to that symbolic name.
1602 (predefined_symbo): Add struct.
1603 (tic80_predefined_symbols): Declare array of translations.
1604 (tic80_num_predefined_symbols): Declare size of that array.
1605 (tic80_value_to_symbol): Declare function.
1606 (tic80_symbol_to_value): Declare function.
1608 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1610 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1612 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1614 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1615 be the destination register.
1617 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1619 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1620 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1621 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1622 that the opcode can have two vector instructions in a single
1623 32 bit word and we have to encode/decode both.
1625 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1627 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1628 TIC80_OPERAND_RELATIVE for PC relative.
1629 (TIC80_OPERAND_BASEREL): New flag bit for register
1632 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1634 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1636 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1638 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1639 ":s" modifier for scaling.
1641 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1643 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1644 (TIC80_OPERAND_M_LI): Ditto
1646 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1648 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1649 (TIC80_OPERAND_CC): New define for condition code operand.
1650 (TIC80_OPERAND_CR): New define for control register operand.
1652 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1654 * tic80.h (struct tic80_opcode): Name changed.
1655 (struct tic80_opcode): Remove format field.
1656 (struct tic80_operand): Add insertion and extraction functions.
1657 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1661 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1663 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1664 type IV instruction offsets.
1666 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1668 * tic80.h: New file.
1670 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1672 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1674 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1676 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1677 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1678 * v850.h: Fix comment, v850_operand not powerpc_operand.
1680 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1682 * mn10200.h: Flesh out structures and definitions needed by
1683 the mn10200 assembler & disassembler.
1685 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1687 * mips.h: Add mips16 definitions.
1689 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1691 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1693 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1695 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1696 (MN10300_OPERAND_MEMADDR): Define.
1698 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1700 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1702 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1704 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1706 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1708 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1710 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1712 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1714 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1716 * alpha.h: Don't include "bfd.h"; private relocation types are now
1717 negative to minimize problems with shared libraries. Organize
1718 instruction subsets by AMASK extensions and PALcode
1720 (struct alpha_operand): Move flags slot for better packing.
1722 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1724 * v850.h (V850_OPERAND_RELAX): New operand flag.
1726 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1728 * mn10300.h (FMT_*): Move operand format definitions
1731 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1733 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1735 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1737 * mn10300.h (mn10300_opcode): Add "format" field.
1738 (MN10300_OPERAND_*): Define.
1740 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1742 * mn10x00.h: Delete.
1743 * mn10200.h, mn10300.h: New files.
1745 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1747 * mn10x00.h: New file.
1749 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1751 * v850.h: Add new flag to indicate this instruction uses a PC
1754 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1756 * h8300.h (stmac): Add missing instruction.
1758 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1760 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1763 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1765 * v850.h (V850_OPERAND_EP): Define.
1767 * v850.h (v850_opcode): Add size field.
1769 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1771 * v850.h (v850_operands): Add insert and extract fields, pointers
1772 to functions used to handle unusual operand encoding.
1773 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1774 V850_OPERAND_SIGNED): Defined.
1776 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1778 * v850.h (v850_operands): Add flags field.
1779 (OPERAND_REG, OPERAND_NUM): Defined.
1781 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1785 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1787 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1788 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1789 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1790 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1791 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1794 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1796 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1797 a 3 bit space id instead of a 2 bit space id.
1799 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1801 * d10v.h: Add some additional defines to support the
1802 assembler in determining which operations can be done in parallel.
1804 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1806 * h8300.h (SN): Define.
1807 (eepmov.b): Renamed from "eepmov"
1808 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1811 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1813 * d10v.h (OPERAND_SHIFT): New operand flag.
1815 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1817 * d10v.h: Changes for divs, parallel-only instructions, and
1820 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1822 * d10v.h (pd_reg): Define. Putting the definition here allows
1823 the assembler and disassembler to share the same struct.
1825 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1827 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1828 Williams <steve@icarus.com>.
1830 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1834 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1836 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1838 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1840 * m68k.h (mcf5200): New macro.
1841 Document names of coldfire control registers.
1843 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1845 * h8300.h (SRC_IN_DST): Define.
1847 * h8300.h (UNOP3): Mark the register operand in this insn
1848 as a source operand, not a destination operand.
1849 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1850 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1851 register operand with SRC_IN_DST.
1853 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1855 * alpha.h: New file.
1857 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1859 * rs6k.h: Remove obsolete file.
1861 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1863 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1864 fdivp, and fdivrp. Add ffreep.
1866 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1868 * h8300.h: Reorder various #defines for readability.
1869 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1870 (BITOP): Accept additional (unused) argument. All callers changed.
1873 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1875 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1876 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1877 (BITOP, EBITOP): Handle new H8/S addressing modes for
1879 (UNOP3): Handle new shift/rotate insns on the H8/S.
1880 (insns using exr): New instructions.
1881 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1883 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1885 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1888 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1890 * h8300.h (START): Remove.
1891 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1892 and mov.l insns that can be relaxed.
1894 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1896 * i386.h: Remove Abs32 from lcall.
1898 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1900 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1901 (SLCPOP): New macro.
1902 Mark X,Y opcode letters as in use.
1904 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1906 * sparc.h (F_FLOAT, F_FBR): Define.
1908 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1910 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1912 (ABS8SRC,ABS8DST): Add ABS8MEM.
1913 (add.l): Fix reg+reg variant.
1914 (eepmov.w): Renamed from eepmovw.
1915 (ldc,stc): Fix many cases.
1917 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1919 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1921 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1923 * sparc.h (O): Mark operand letter as in use.
1925 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1927 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1928 Mark operand letters uU as in use.
1930 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1932 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1933 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1934 (SPARC_OPCODE_SUPPORTED): New macro.
1935 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1938 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1940 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1941 declaration consistent with return type in definition.
1943 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1945 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1947 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1949 * i386.h (i386_regtab): Add 80486 test registers.
1951 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1953 * i960.h (I_HX): Define.
1954 (i960_opcodes): Add HX instruction.
1956 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1958 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1961 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1963 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1964 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1965 (bfd_* defines): Delete.
1966 (sparc_opcode_archs): Replaces architecture_pname.
1967 (sparc_opcode_lookup_arch): Declare.
1968 (NUMOPCODES): Delete.
1970 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1972 * sparc.h (enum sparc_architecture): Add v9a.
1973 (ARCHITECTURES_CONFLICT_P): Update.
1975 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1977 * i386.h: Added Pentium Pro instructions.
1979 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1981 * m68k.h: Document new 'W' operand place.
1983 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1985 * hppa.h: Add lci and syncdma instructions.
1987 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1989 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1992 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1994 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1995 assembler's -mcom and -many switches.
1997 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1999 * i386.h: Fix cmpxchg8b extension opcode description.
2001 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2003 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2006 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2008 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2010 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2012 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2014 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2016 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2018 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2020 * m68kmri.h: Remove.
2022 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2023 declarations. Remove F_ALIAS and flag field of struct
2024 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2025 int. Make name and args fields of struct m68k_opcode const.
2027 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2029 * sparc.h (F_NOTV9): Define.
2031 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2033 * mips.h (INSN_4010): Define.
2035 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2037 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2039 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2040 * m68k.h: Fix argument descriptions of coprocessor
2041 instructions to allow only alterable operands where appropriate.
2042 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2043 (m68k_opcode_aliases): Add more aliases.
2045 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2047 * m68k.h: Added explcitly short-sized conditional branches, and a
2048 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2049 svr4-based configurations.
2051 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2053 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2054 * i386.h: added missing Data16/Data32 flags to a few instructions.
2056 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2058 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2059 (OP_MASK_BCC, OP_SH_BCC): Define.
2060 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2061 (OP_MASK_CCC, OP_SH_CCC): Define.
2062 (INSN_READ_FPR_R): Define.
2065 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2067 * m68k.h (enum m68k_architecture): Deleted.
2068 (struct m68k_opcode_alias): New type.
2069 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2070 matching constraints, values and flags. As a side effect of this,
2071 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2072 as I know were never used, now may need re-examining.
2073 (numopcodes): Now const.
2074 (m68k_opcode_aliases, numaliases): New variables.
2076 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2077 m68k_opcode_aliases; update declaration of m68k_opcodes.
2079 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2081 * hppa.h (delay_type): Delete unused enumeration.
2082 (pa_opcode): Replace unused delayed field with an architecture
2084 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2086 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2088 * mips.h (INSN_ISA4): Define.
2090 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2092 * mips.h (M_DLA_AB, M_DLI): Define.
2094 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2096 * hppa.h (fstwx): Fix single-bit error.
2098 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2100 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2102 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2104 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2105 debug registers. From Charles Hannum (mycroft@netbsd.org).
2107 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2109 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2111 * i386.h (MOV_AX_DISP32): New macro.
2112 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2113 of several call/return instructions.
2114 (ADDR_PREFIX_OPCODE): New macro.
2116 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2118 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2120 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2122 (struct vot, field `name'): ditto.
2124 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2126 * vax.h: Supply and properly group all values in end sentinel.
2128 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2130 * mips.h (INSN_ISA, INSN_4650): Define.
2132 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2134 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2135 systems with a separate instruction and data cache, such as the
2136 29040, these instructions take an optional argument.
2138 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2140 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2143 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2145 * mips.h (INSN_STORE_MEMORY): Define.
2147 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2149 * sparc.h: Document new operand type 'x'.
2151 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2153 * i960.h (I_CX2): New instruction category. It includes
2154 instructions available on Cx and Jx processors.
2155 (I_JX): New instruction category, for JX-only instructions.
2156 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2157 Jx-only instructions, in I_JX category.
2159 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2161 * ns32k.h (endop): Made pointer const too.
2163 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2165 * ns32k.h: Drop Q operand type as there is no correct use
2166 for it. Add I and Z operand types which allow better checking.
2168 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2170 * h8300.h (xor.l) :fix bit pattern.
2171 (L_2): New size of operand.
2174 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2176 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2178 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2180 * sparc.h: Include v9 definitions.
2182 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2184 * m68k.h (m68060): Defined.
2185 (m68040up, mfloat, mmmu): Include it.
2186 (struct m68k_opcode): Widen `arch' field.
2187 (m68k_opcodes): Updated for M68060. Removed comments that were
2188 instructions commented out by "JF" years ago.
2190 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2192 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2193 add a one-bit `flags' field.
2194 (F_ALIAS): New macro.
2196 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2198 * h8300.h (dec, inc): Get encoding right.
2200 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2202 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2204 (PPC_OPERAND_SIGNED): Define.
2205 (PPC_OPERAND_SIGNOPT): Define.
2207 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2209 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2210 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2212 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2214 * i386.h: Reverse last change. It'll be handled in gas instead.
2216 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2218 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2219 slower on the 486 and used the implicit shift count despite the
2220 explicit operand. The one-operand form is still available to get
2221 the shorter form with the implicit shift count.
2223 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2225 * hppa.h: Fix typo in fstws arg string.
2227 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2229 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2231 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2233 * ppc.h (PPC_OPCODE_601): Define.
2235 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2237 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2238 (so we can determine valid completers for both addb and addb[tf].)
2240 * hppa.h (xmpyu): No floating point format specifier for the
2243 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2245 * ppc.h (PPC_OPERAND_NEXT): Define.
2246 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2247 (struct powerpc_macro): Define.
2248 (powerpc_macros, powerpc_num_macros): Declare.
2250 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2252 * ppc.h: New file. Header file for PowerPC opcode table.
2254 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2256 * hppa.h: More minor template fixes for sfu and copr (to allow
2257 for easier disassembly).
2259 * hppa.h: Fix templates for all the sfu and copr instructions.
2261 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2263 * i386.h (push): Permit Imm16 operand too.
2265 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2267 * h8300.h (andc): Exists in base arch.
2269 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2271 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2272 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2274 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2276 * hppa.h: Add FP quadword store instructions.
2278 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2280 * mips.h: (M_J_A): Added.
2283 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2285 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2286 <mellon@pepper.ncd.com>.
2288 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2290 * hppa.h: Immediate field in probei instructions is unsigned,
2291 not low-sign extended.
2293 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2295 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2297 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2299 * i386.h: Add "fxch" without operand.
2301 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2303 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2305 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2307 * hppa.h: Add gfw and gfr to the opcode table.
2309 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2311 * m88k.h: extended to handle m88110.
2313 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2315 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2318 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2320 * i960.h (i960_opcodes): Properly bracket initializers.
2322 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2324 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2326 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2328 * m68k.h (two): Protect second argument with parentheses.
2330 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2332 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2333 Deleted old in/out instructions in "#if 0" section.
2335 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2337 * i386.h (i386_optab): Properly bracket initializers.
2339 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2341 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2342 Jeff Law, law@cs.utah.edu).
2344 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2346 * i386.h (lcall): Accept Imm32 operand also.
2348 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2350 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2353 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2355 * mips.h (INSN_*): Changed values. Removed unused definitions.
2356 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2357 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2358 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2359 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2360 (M_*): Added new values for r6000 and r4000 macros.
2361 (ANY_DELAY): Removed.
2363 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2365 * mips.h: Added M_LI_S and M_LI_SS.
2367 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2369 * h8300.h: Get some rare mov.bs correct.
2371 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2373 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2376 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2378 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2379 jump instructions, for use in disassemblers.
2381 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2383 * m88k.h: Make bitfields just unsigned, not unsigned long or
2386 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2388 * hppa.h: New argument type 'y'. Use in various float instructions.
2390 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2392 * hppa.h (break): First immediate field is unsigned.
2394 * hppa.h: Add rfir instruction.
2396 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2398 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2400 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2402 * mips.h: Reworked the hazard information somewhat, and fixed some
2403 bugs in the instruction hazard descriptions.
2405 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2407 * m88k.h: Corrected a couple of opcodes.
2409 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2411 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2412 new version includes instruction hazard information, but is
2413 otherwise reasonably similar.
2415 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2417 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2419 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2421 Patches from Jeff Law, law@cs.utah.edu:
2422 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2423 Make the tables be the same for the following instructions:
2424 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2425 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2426 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2427 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2428 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2429 "fcmp", and "ftest".
2431 * hppa.h: Make new and old tables the same for "break", "mtctl",
2432 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2433 Fix typo in last patch. Collapse several #ifdefs into a
2436 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2437 of the comments up-to-date.
2439 * hppa.h: Update "free list" of letters and update
2440 comments describing each letter's function.
2442 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2444 * h8300.h: Lots of little fixes for the h8/300h.
2446 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2448 Support for H8/300-H
2449 * h8300.h: Lots of new opcodes.
2451 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2453 * h8300.h: checkpoint, includes H8/300-H opcodes.
2455 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2457 * Patches from Jeffrey Law <law@cs.utah.edu>.
2458 * hppa.h: Rework single precision FP
2459 instructions so that they correctly disassemble code
2462 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2464 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2465 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2467 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2469 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2470 gdb will define it for now.
2472 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2474 * sparc.h: Don't end enumerator list with comma.
2476 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2478 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2479 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2480 ("bc2t"): Correct typo.
2481 ("[ls]wc[023]"): Use T rather than t.
2482 ("c[0123]"): Define general coprocessor instructions.
2484 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2486 * m68k.h: Move split point for gcc compilation more towards
2489 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2491 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2492 simply wrong, ics, rfi, & rfsvc were missing).
2493 Add "a" to opr_ext for "bb". Doc fix.
2495 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2497 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2498 * mips.h: Add casts, to suppress warnings about shifting too much.
2499 * m68k.h: Document the placement code '9'.
2501 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2503 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2504 allows callers to break up the large initialized struct full of
2505 opcodes into two half-sized ones. This permits GCC to compile
2506 this module, since it takes exponential space for initializers.
2507 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2509 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2511 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2512 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2513 initialized structs in it.
2515 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2517 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2518 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2519 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2521 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2523 * mips.h: document "i" and "j" operands correctly.
2525 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2527 * mips.h: Removed endianness dependency.
2529 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2531 * h8300.h: include info on number of cycles per instruction.
2533 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2535 * hppa.h: Move handy aliases to the front. Fix masks for extract
2536 and deposit instructions.
2538 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2540 * i386.h: accept shld and shrd both with and without the shift
2541 count argument, which is always %cl.
2543 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2545 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2546 (one_byte_segment_defaults, two_byte_segment_defaults,
2547 i386_prefixtab_end): Ditto.
2549 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2551 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2552 for operand 2; from John Carr, jfc@dsg.dec.com.
2554 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2556 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2557 always use 16-bit offsets. Makes calculated-size jump tables
2560 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2562 * i386.h: Fix one-operand forms of in* and out* patterns.
2564 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2566 * m68k.h: Added CPU32 support.
2568 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2570 * mips.h (break): Disassemble the argument. Patch from
2571 jonathan@cs.stanford.edu (Jonathan Stone).
2573 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2575 * m68k.h: merged Motorola and MIT syntax.
2577 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2579 * m68k.h (pmove): make the tests less strict, the 68k book is
2582 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2584 * m68k.h (m68ec030): Defined as alias for 68030.
2585 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2586 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2587 them. Tightened description of "fmovex" to distinguish it from
2588 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2589 up descriptions that claimed versions were available for chips not
2590 supporting them. Added "pmovefd".
2592 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2594 * m68k.h: fix where the . goes in divull
2596 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2598 * m68k.h: the cas2 instruction is supposed to be written with
2599 indirection on the last two operands, which can be either data or
2600 address registers. Added a new operand type 'r' which accepts
2601 either register type. Added new cases for cas2l and cas2w which
2602 use them. Corrected masks for cas2 which failed to recognize use
2603 of address register.
2605 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2607 * m68k.h: Merged in patches (mostly m68040-specific) from
2608 Colin Smith <colin@wrs.com>.
2610 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2611 base). Also cleaned up duplicates, re-ordered instructions for
2612 the sake of dis-assembling (so aliases come after standard names).
2613 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2615 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2617 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2620 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2622 * sparc.h: Moved tables to BFD library.
2624 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2626 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2628 * h8300.h: Finish filling in all the holes in the opcode table,
2629 so that the Lucid C compiler can digest this as well...
2631 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2633 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2634 Fix opcodes on various sizes of fild/fist instructions
2635 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2636 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2638 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2640 * h8300.h: Fill in all the holes in the opcode table so that the
2641 losing HPUX C compiler can digest this...
2643 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2645 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2646 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2648 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2650 * sparc.h: Add new architecture variant sparclite; add its scan
2651 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2653 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2655 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2658 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2660 * rs6k.h: New version from IBM (Metin).
2662 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2664 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2665 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2667 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2669 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2671 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2673 * m68k.h (one, two): Cast macro args to unsigned to suppress
2674 complaints from compiler and lint about integer overflow during
2677 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2679 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2681 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2683 * mips.h: Make bitfield layout depend on the HOST compiler,
2684 not on the TARGET system.
2686 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2688 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2689 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2690 <TRANLE@INTELLICORP.COM>.
2692 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2694 * h8300.h: turned op_type enum into #define list
2696 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2698 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2699 similar instructions -- they've been renamed to "fitoq", etc.
2700 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2701 number of arguments.
2702 * h8300.h: Remove extra ; which produces compiler warning.
2704 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2706 * sparc.h: fix opcode for tsubcctv.
2708 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2710 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2712 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2714 * sparc.h (nop): Made the 'lose' field be even tighter,
2715 so only a standard 'nop' is disassembled as a nop.
2717 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2719 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2720 disassembled as a nop.
2722 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2724 * m68k.h, sparc.h: ANSIfy enums.
2726 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2728 * sparc.h: fix a typo.
2730 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2732 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2733 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2734 vax.h: Renamed from ../<foo>-opcode.h.
2738 version-control: never
projects / deliverable / binutils-gdb.git / blob