comment typo fixes
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
2
3 * h8300.h: Comment typo fix.
4
5 2002-01-03 matthew green <mrg@redhat.com>
6
7 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
8 (PPC_OPCODE_BOOKE64): Likewise.
9
10 Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
11
12 * hppa.h (call, ret): Move to end of table.
13 (addb, addib): PA2.0 variants should have been PA2.0W.
14 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
15 happy.
16 (fldw, fldd, fstw, fstd, bb): Likewise.
17 (short loads/stores): Tweak format specifier slightly to keep
18 disassembler happy.
19 (indexed loads/stores): Likewise.
20 (absolute loads/stores): Likewise.
21
22 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
23
24 * d10v.h (OPERAND_NOSP): New macro.
25
26 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
27
28 * d10v.h (OPERAND_SP): New macro.
29
30 2001-11-15 Alan Modra <amodra@bigpond.net.au>
31
32 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
33
34 2001-11-11 Timothy Wall <twall@alum.mit.edu>
35
36 * tic54x.h: Revise opcode layout; don't really need a separate
37 structure for parallel opcodes.
38
39 2001-11-13 Zack Weinberg <zack@codesourcery.com>
40 Alan Modra <amodra@bigpond.net.au>
41
42 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
43 accept WordReg.
44
45 2001-11-04 Chris Demetriou <cgd@broadcom.com>
46
47 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
48
49 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
50
51 * mmix.h: New file.
52
53 2001-10-18 Chris Demetriou <cgd@broadcom.com>
54
55 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
56 of the expression, to make source code merging easier.
57
58 2001-10-17 Chris Demetriou <cgd@broadcom.com>
59
60 * mips.h: Sort coprocessor instruction argument characters
61 in comment, add a few more words of description for "H".
62
63 2001-10-17 Chris Demetriou <cgd@broadcom.com>
64
65 * mips.h (INSN_SB1): New cpu-specific instruction bit.
66 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
67 if cpu is CPU_SB1.
68
69 2001-10-17 matthew green <mrg@redhat.com>
70
71 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
72
73 2001-10-12 matthew green <mrg@redhat.com>
74
75 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
76 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
77 instructions, respectively.
78
79 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
80
81 * v850.h: Remove spurious comment.
82
83 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
84
85 * h8300.h: Fix compile time warning messages
86
87 2001-09-04 Richard Henderson <rth@redhat.com>
88
89 * alpha.h (struct alpha_operand): Pack elements into bitfields.
90
91 2001-08-31 Eric Christopher <echristo@redhat.com>
92
93 * mips.h: Remove CPU_MIPS32_4K.
94
95 2001-08-27 Torbjorn Granlund <tege@swox.com>
96
97 * ppc.h (PPC_OPERAND_DS): Define.
98
99 2001-08-25 Andreas Jaeger <aj@suse.de>
100
101 * d30v.h: Fix declaration of reg_name_cnt.
102
103 * d10v.h: Fix declaration of d10v_reg_name_cnt.
104
105 * arc.h: Add prototypes from opcodes/arc-opc.c.
106
107 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
108
109 * mips.h (INSN_10000): Define.
110 (OPCODE_IS_MEMBER): Check for INSN_10000.
111
112 2001-08-10 Alan Modra <amodra@one.net.au>
113
114 * ppc.h: Revert 2001-08-08.
115
116 2001-08-08 Alan Modra <amodra@one.net.au>
117
118 1999-10-25 Torbjorn Granlund <tege@swox.com>
119 * ppc.h (struct powerpc_operand): New field `reloc'.
120
121 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
122
123 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
124 (cgen_cpu_desc): Ditto.
125
126 2001-07-07 Ben Elliston <bje@redhat.com>
127
128 * m88k.h: Clean up and reformat. Remove unused code.
129
130 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
131
132 * cgen.h (cgen_keyword): Add nonalpha_chars field.
133
134 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
135
136 * mips.h (CPU_R12000): Define.
137
138 2001-05-23 John Healy <jhealy@redhat.com>
139
140 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
141
142 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
143
144 * mips.h (INSN_ISA_MASK): Define.
145
146 2001-05-12 Alan Modra <amodra@one.net.au>
147
148 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
149 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
150 and use InvMem as these insns must have register operands.
151
152 2001-05-04 Alan Modra <amodra@one.net.au>
153
154 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
155 and pextrw to swap reg/rm assignments.
156
157 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
158
159 * cris.h (enum cris_insn_version_usage): Correct comment for
160 cris_ver_v3p.
161
162 2001-03-24 Alan Modra <alan@linuxcare.com.au>
163
164 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
165 Add InvMem to first operand of "maskmovdqu".
166
167 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
168
169 * cris.h (ADD_PC_INCR_OPCODE): New macro.
170
171 2001-03-21 Kazu Hirata <kazu@hxi.com>
172
173 * h8300.h: Fix formatting.
174
175 2001-03-22 Alan Modra <alan@linuxcare.com.au>
176
177 * i386.h (i386_optab): Add paddq, psubq.
178
179 2001-03-19 Alan Modra <alan@linuxcare.com.au>
180
181 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
182
183 2001-02-28 Igor Shevlyakov <igor@windriver.com>
184
185 * m68k.h: new defines for Coldfire V4. Update mcf to know
186 about mcf5407.
187
188 2001-02-18 lars brinkhoff <lars@nocrew.org>
189
190 * pdp11.h: New file.
191
192 2001-02-12 Jan Hubicka <jh@suse.cz>
193
194 * i386.h (i386_optab): SSE integer converison instructions have
195 64bit versions on x86-64.
196
197 2001-02-10 Nick Clifton <nickc@redhat.com>
198
199 * mips.h: Remove extraneous whitespace. Formating change to allow
200 for future contribution.
201
202 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
203
204 * s390.h: New file.
205
206 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
207
208 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
209 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
210 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
211
212 2001-01-24 Karsten Keil <kkeil@suse.de>
213
214 * i386.h (i386_optab): Fix swapgs
215
216 2001-01-14 Alan Modra <alan@linuxcare.com.au>
217
218 * hppa.h: Describe new '<' and '>' operand types, and tidy
219 existing comments.
220 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
221 Remove duplicate "ldw j(s,b),x". Sort some entries.
222
223 2001-01-13 Jan Hubicka <jh@suse.cz>
224
225 * i386.h (i386_optab): Fix pusha and ret templates.
226
227 2001-01-11 Peter Targett <peter.targett@arccores.com>
228
229 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
230 definitions for masking cpu type.
231 (arc_ext_operand_value) New structure for storing extended
232 operands.
233 (ARC_OPERAND_*) Flags for operand values.
234
235 2001-01-10 Jan Hubicka <jh@suse.cz>
236
237 * i386.h (pinsrw): Add.
238 (pshufw): Remove.
239 (cvttpd2dq): Fix operands.
240 (cvttps2dq): Likewise.
241 (movq2q): Rename to movdq2q.
242
243 2001-01-10 Richard Schaal <richard.schaal@intel.com>
244
245 * i386.h: Correct movnti instruction.
246
247 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
248
249 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
250 of operands (unsigned char or unsigned short).
251 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
252 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
253
254 2001-01-05 Jan Hubicka <jh@suse.cz>
255
256 * i386.h (i386_optab): Make [sml]fence template to use immext field.
257
258 2001-01-03 Jan Hubicka <jh@suse.cz>
259
260 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
261 introduced by Pentium4
262
263 2000-12-30 Jan Hubicka <jh@suse.cz>
264
265 * i386.h (i386_optab): Add "rex*" instructions;
266 add swapgs; disable jmp/call far direct instructions for
267 64bit mode; add syscall and sysret; disable registers for 0xc6
268 template. Add 'q' suffixes to extendable instructions, disable
269 obsolete instructions, add new sign/zero extension ones.
270 (i386_regtab): Add extended registers.
271 (*Suf): Add No_qSuf.
272 (q_Suf, wlq_Suf, bwlq_Suf): New.
273
274 2000-12-20 Jan Hubicka <jh@suse.cz>
275
276 * i386.h (i386_optab): Replace "Imm" with "EncImm".
277 (i386_regtab): Add flags field.
278
279 2000-12-12 Nick Clifton <nickc@redhat.com>
280
281 * mips.h: Fix formatting.
282
283 2000-12-01 Chris Demetriou <cgd@sibyte.com>
284
285 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
286 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
287 OP_*_SYSCALL definitions.
288 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
289 19 bit wait codes.
290 (MIPS operand specifier comments): Remove 'm', add 'U' and
291 'J', and update the meaning of 'B' so that it's more general.
292
293 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
294 INSN_ISA5): Renumber, redefine to mean the ISA at which the
295 instruction was added.
296 (INSN_ISA32): New constant.
297 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
298 Renumber to avoid new and/or renumbered INSN_* constants.
299 (INSN_MIPS32): Delete.
300 (ISA_UNKNOWN): New constant to indicate unknown ISA.
301 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
302 ISA_MIPS32): New constants, defined to be the mask of INSN_*
303 constants available at that ISA level.
304 (CPU_UNKNOWN): New constant to indicate unknown CPU.
305 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
306 define it with a unique value.
307 (OPCODE_IS_MEMBER): Update for new ISA membership-related
308 constant meanings.
309
310 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
311 definitions.
312
313 * mips.h (CPU_SB1): New constant.
314
315 2000-10-20 Jakub Jelinek <jakub@redhat.com>
316
317 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
318 Note that '3' is used for siam operand.
319
320 2000-09-22 Jim Wilson <wilson@cygnus.com>
321
322 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
323
324 2000-09-13 Anders Norlander <anorland@acc.umu.se>
325
326 * mips.h: Use defines instead of hard-coded processor numbers.
327 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
328 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
329 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
330 CPU_4KC, CPU_4KM, CPU_4KP): Define..
331 (OPCODE_IS_MEMBER): Use new defines.
332 (OP_MASK_SEL, OP_SH_SEL): Define.
333 (OP_MASK_CODE20, OP_SH_CODE20): Define.
334 Add 'P' to used characters.
335 Use 'H' for coprocessor select field.
336 Use 'm' for 20 bit breakpoint code.
337 Document new arg characters and add to used characters.
338 (INSN_MIPS32): New define for MIPS32 extensions.
339 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
340
341 2000-09-05 Alan Modra <alan@linuxcare.com.au>
342
343 * hppa.h: Mention cz completer.
344
345 2000-08-16 Jim Wilson <wilson@cygnus.com>
346
347 * ia64.h (IA64_OPCODE_POSTINC): New.
348
349 2000-08-15 H.J. Lu <hjl@gnu.org>
350
351 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
352 IgnoreSize change.
353
354 2000-08-08 Jason Eckhardt <jle@cygnus.com>
355
356 * i860.h: Small formatting adjustments.
357
358 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
359
360 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
361 Move related opcodes closer to each other.
362 Minor changes in comments, list undefined opcodes.
363
364 2000-07-26 Dave Brolley <brolley@redhat.com>
365
366 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
367
368 2000-07-22 Jason Eckhardt <jle@cygnus.com>
369
370 * i860.h (btne, bte, bla): Changed these opcodes
371 to use sbroff ('r') instead of split16 ('s').
372 (J, K, L, M): New operand types for 16-bit aligned fields.
373 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
374 use I, J, K, L, M instead of just I.
375 (T, U): New operand types for split 16-bit aligned fields.
376 (st.x): Changed these opcodes to use S, T, U instead of just S.
377 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
378 exist on the i860.
379 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
380 (pfeq.ss, pfeq.dd): New opcodes.
381 (st.s): Fixed incorrect mask bits.
382 (fmlow): Fixed incorrect mask bits.
383 (fzchkl, pfzchkl): Fixed incorrect mask bits.
384 (faddz, pfaddz): Fixed incorrect mask bits.
385 (form, pform): Fixed incorrect mask bits.
386 (pfld.l): Fixed incorrect mask bits.
387 (fst.q): Fixed incorrect mask bits.
388 (all floating point opcodes): Fixed incorrect mask bits for
389 handling of dual bit.
390
391 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
392
393 cris.h: New file.
394
395 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
396
397 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
398 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
399 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
400 (AVR_ISA_M83): Define for ATmega83, ATmega85.
401 (espm): Remove, because ESPM removed in databook update.
402 (eicall, eijmp): Move to the end of opcode table.
403
404 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
405
406 * m68hc11.h: New file for support of Motorola 68hc11.
407
408 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
409
410 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
411
412 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
413
414 * avr.h: New file with AVR opcodes.
415
416 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
417
418 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
419
420 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
421
422 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
423
424 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
425
426 * i386.h: Use sl_FP, not sl_Suf for fild.
427
428 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
429
430 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
431 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
432 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
433 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
434
435 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
436
437 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
438
439 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
440 Alexander Sokolov <robocop@netlink.ru>
441
442 * i386.h (i386_optab): Add cpu_flags for all instructions.
443
444 2000-05-13 Alan Modra <alan@linuxcare.com.au>
445
446 From Gavin Romig-Koch <gavin@cygnus.com>
447 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
448
449 2000-05-04 Timothy Wall <twall@cygnus.com>
450
451 * tic54x.h: New.
452
453 2000-05-03 J.T. Conklin <jtc@redback.com>
454
455 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
456 (PPC_OPERAND_VR): New operand flag for vector registers.
457
458 2000-05-01 Kazu Hirata <kazu@hxi.com>
459
460 * h8300.h (EOP): Add missing initializer.
461
462 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
463
464 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
465 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
466 New operand types l,y,&,fe,fE,fx added to support above forms.
467 (pa_opcodes): Replaced usage of 'x' as source/target for
468 floating point double-word loads/stores with 'fx'.
469
470 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
471 David Mosberger <davidm@hpl.hp.com>
472 Timothy Wall <twall@cygnus.com>
473 Jim Wilson <wilson@cygnus.com>
474
475 * ia64.h: New file.
476
477 2000-03-27 Nick Clifton <nickc@cygnus.com>
478
479 * d30v.h (SHORT_A1): Fix value.
480 (SHORT_AR): Renumber so that it is at the end of the list of short
481 instructions, not the end of the list of long instructions.
482
483 2000-03-26 Alan Modra <alan@linuxcare.com>
484
485 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
486 problem isn't really specific to Unixware.
487 (OLDGCC_COMPAT): Define.
488 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
489 destination %st(0).
490 Fix lots of comments.
491
492 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
493
494 * d30v.h:
495 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
496 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
497 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
498 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
499 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
500 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
501 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
502
503 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
504
505 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
506 fistpd without suffix.
507
508 2000-02-24 Nick Clifton <nickc@cygnus.com>
509
510 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
511 'signed_overflow_ok_p'.
512 Delete prototypes for cgen_set_flags() and cgen_get_flags().
513
514 2000-02-24 Andrew Haley <aph@cygnus.com>
515
516 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
517 (CGEN_CPU_TABLE): flags: new field.
518 Add prototypes for new functions.
519
520 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
521
522 * i386.h: Add some more UNIXWARE_COMPAT comments.
523
524 2000-02-23 Linas Vepstas <linas@linas.org>
525
526 * i370.h: New file.
527
528 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
529
530 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
531 cannot be combined in parallel with ADD/SUBppp.
532
533 2000-02-22 Andrew Haley <aph@cygnus.com>
534
535 * mips.h: (OPCODE_IS_MEMBER): Add comment.
536
537 1999-12-30 Andrew Haley <aph@cygnus.com>
538
539 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
540 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
541 insns.
542
543 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
544
545 * i386.h: Qualify intel mode far call and jmp with x_Suf.
546
547 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
548
549 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
550 indirect jumps and calls. Add FF/3 call for intel mode.
551
552 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
553
554 * mn10300.h: Add new operand types. Add new instruction formats.
555
556 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
557
558 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
559 instruction.
560
561 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
562
563 * mips.h (INSN_ISA5): New.
564
565 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
566
567 * mips.h (OPCODE_IS_MEMBER): New.
568
569 1999-10-29 Nick Clifton <nickc@cygnus.com>
570
571 * d30v.h (SHORT_AR): Define.
572
573 1999-10-18 Michael Meissner <meissner@cygnus.com>
574
575 * alpha.h (alpha_num_opcodes): Convert to unsigned.
576 (alpha_num_operands): Ditto.
577
578 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
579
580 * hppa.h (pa_opcodes): Add load and store cache control to
581 instructions. Add ordered access load and store.
582
583 * hppa.h (pa_opcode): Add new entries for addb and addib.
584
585 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
586
587 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
588
589 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
590
591 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
592
593 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
594
595 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
596 and "be" using completer prefixes.
597
598 * hppa.h (pa_opcodes): Add initializers to silence compiler.
599
600 * hppa.h: Update comments about character usage.
601
602 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
603
604 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
605 up the new fstw & bve instructions.
606
607 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
608
609 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
610 instructions.
611
612 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
613
614 * hppa.h (pa_opcodes): Add long offset double word load/store
615 instructions.
616
617 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
618 stores.
619
620 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
621
622 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
623
624 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
625
626 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
627
628 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
629
630 * hppa.h (pa_opcodes): Add support for "b,l".
631
632 * hppa.h (pa_opcodes): Add support for "b,gate".
633
634 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
635
636 * hppa.h (pa_opcodes): Use 'fX' for first register operand
637 in xmpyu.
638
639 * hppa.h (pa_opcodes): Fix mask for probe and probei.
640
641 * hppa.h (pa_opcodes): Fix mask for depwi.
642
643 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
644
645 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
646 an explicit output argument.
647
648 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
649
650 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
651 Add a few PA2.0 loads and store variants.
652
653 1999-09-04 Steve Chamberlain <sac@pobox.com>
654
655 * pj.h: New file.
656
657 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
658
659 * i386.h (i386_regtab): Move %st to top of table, and split off
660 other fp reg entries.
661 (i386_float_regtab): To here.
662
663 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
664
665 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
666 by 'f'.
667
668 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
669 Add supporting args.
670
671 * hppa.h: Document new completers and args.
672 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
673 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
674 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
675 pmenb and pmdis.
676
677 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
678 hshr, hsub, mixh, mixw, permh.
679
680 * hppa.h (pa_opcodes): Change completers in instructions to
681 use 'c' prefix.
682
683 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
684 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
685
686 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
687 fnegabs to use 'I' instead of 'F'.
688
689 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
690
691 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
692 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
693 Alphabetically sort PIII insns.
694
695 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
696
697 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
698
699 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
700
701 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
702 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
703
704 * hppa.h: Document 64 bit condition completers.
705
706 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
707
708 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
709
710 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
711
712 * i386.h (i386_optab): Add DefaultSize modifier to all insns
713 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
714 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
715
716 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
717 Jeff Law <law@cygnus.com>
718
719 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
720
721 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
722
723 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
724 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
725
726 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
727
728 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
729
730 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
731
732 * hppa.h (struct pa_opcode): Add new field "flags".
733 (FLAGS_STRICT): Define.
734
735 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
736 Jeff Law <law@cygnus.com>
737
738 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
739
740 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
741
742 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
743
744 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
745 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
746 flag to fcomi and friends.
747
748 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
749
750 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
751 integer logical instructions.
752
753 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
754
755 * m68k.h: Document new formats `E', `G', `H' and new places `N',
756 `n', `o'.
757
758 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
759 and new places `m', `M', `h'.
760
761 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
762
763 * hppa.h (pa_opcodes): Add several processor specific system
764 instructions.
765
766 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
767
768 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
769 "addb", and "addib" to be used by the disassembler.
770
771 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
772
773 * i386.h (ReverseModrm): Remove all occurences.
774 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
775 movmskps, pextrw, pmovmskb, maskmovq.
776 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
777 ignore the data size prefix.
778
779 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
780 Mostly stolen from Doug Ledford <dledford@redhat.com>
781
782 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
783
784 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
785
786 1999-04-14 Doug Evans <devans@casey.cygnus.com>
787
788 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
789 (CGEN_ATTR_TYPE): Update.
790 (CGEN_ATTR_MASK): Number booleans starting at 0.
791 (CGEN_ATTR_VALUE): Update.
792 (CGEN_INSN_ATTR): Update.
793
794 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
795
796 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
797 instructions.
798
799 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
800
801 * hppa.h (bb, bvb): Tweak opcode/mask.
802
803
804 1999-03-22 Doug Evans <devans@casey.cygnus.com>
805
806 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
807 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
808 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
809 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
810 Delete member max_insn_size.
811 (enum cgen_cpu_open_arg): New enum.
812 (cpu_open): Update prototype.
813 (cpu_open_1): Declare.
814 (cgen_set_cpu): Delete.
815
816 1999-03-11 Doug Evans <devans@casey.cygnus.com>
817
818 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
819 (CGEN_OPERAND_NIL): New macro.
820 (CGEN_OPERAND): New member `type'.
821 (@arch@_cgen_operand_table): Delete decl.
822 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
823 (CGEN_OPERAND_TABLE): New struct.
824 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
825 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
826 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
827 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
828 {get,set}_{int,vma}_operand.
829 (@arch@_cgen_cpu_open): New arg `isa'.
830 (cgen_set_cpu): Ditto.
831
832 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
833
834 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
835
836 1999-02-25 Doug Evans <devans@casey.cygnus.com>
837
838 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
839 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
840 enum cgen_hw_type.
841 (CGEN_HW_TABLE): New struct.
842 (hw_table): Delete declaration.
843 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
844 to table entry to enum.
845 (CGEN_OPINST): Ditto.
846 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
847
848 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
849
850 * alpha.h (AXP_OPCODE_EV6): New.
851 (AXP_OPCODE_NOPAL): Include it.
852
853 1999-02-09 Doug Evans <devans@casey.cygnus.com>
854
855 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
856 All uses updated. New members int_insn_p, max_insn_size,
857 parse_operand,insert_operand,extract_operand,print_operand,
858 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
859 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
860 extract_handlers,print_handlers.
861 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
862 (CGEN_ATTR_BOOL_OFFSET): New macro.
863 (CGEN_ATTR_MASK): Subtract it to compute bit number.
864 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
865 (cgen_opcode_handler): Renamed from cgen_base.
866 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
867 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
868 all uses updated.
869 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
870 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
871 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
872 (CGEN_OPCODE,CGEN_IBASE): New types.
873 (CGEN_INSN): Rewrite.
874 (CGEN_{ASM,DIS}_HASH*): Delete.
875 (init_opcode_table,init_ibld_table): Declare.
876 (CGEN_INSN_ATTR): New type.
877
878 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
879
880 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
881 (x_FP, d_FP, dls_FP, sldx_FP): Define.
882 Change *Suf definitions to include x and d suffixes.
883 (movsx): Use w_Suf and b_Suf.
884 (movzx): Likewise.
885 (movs): Use bwld_Suf.
886 (fld): Change ordering. Use sld_FP.
887 (fild): Add Intel Syntax equivalent of fildq.
888 (fst): Use sld_FP.
889 (fist): Use sld_FP.
890 (fstp): Use sld_FP. Add x_FP version.
891 (fistp): LLongMem version for Intel Syntax.
892 (fcom, fcomp): Use sld_FP.
893 (fadd, fiadd, fsub): Use sld_FP.
894 (fsubr): Use sld_FP.
895 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
896
897 1999-01-27 Doug Evans <devans@casey.cygnus.com>
898
899 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
900 CGEN_MODE_UINT.
901
902 1999-01-16 Jeffrey A Law (law@cygnus.com)
903
904 * hppa.h (bv): Fix mask.
905
906 1999-01-05 Doug Evans <devans@casey.cygnus.com>
907
908 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
909 (CGEN_ATTR): Use it.
910 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
911 (CGEN_ATTR_TABLE): New member dfault.
912
913 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
914
915 * mips.h (MIPS16_INSN_BRANCH): New.
916
917 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
918
919 The following is part of a change made by Edith Epstein
920 <eepstein@sophia.cygnus.com> as part of a project to merge in
921 changes by HP; HP did not create ChangeLog entries.
922
923 * hppa.h (completer_chars): list of chars to not put a space
924 after.
925
926 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
927
928 * i386.h (i386_optab): Permit w suffix on processor control and
929 status word instructions.
930
931 1998-11-30 Doug Evans <devans@casey.cygnus.com>
932
933 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
934 (struct cgen_keyword_entry): Ditto.
935 (struct cgen_operand): Ditto.
936 (CGEN_IFLD): New typedef, with associated access macros.
937 (CGEN_IFMT): New typedef, with associated access macros.
938 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
939 (CGEN_IVALUE): New typedef.
940 (struct cgen_insn): Delete const on syntax,attrs members.
941 `format' now points to format data. Type of `value' is now
942 CGEN_IVALUE.
943 (struct cgen_opcode_table): New member ifld_table.
944
945 1998-11-18 Doug Evans <devans@casey.cygnus.com>
946
947 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
948 (CGEN_OPERAND_INSTANCE): New member `attrs'.
949 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
950 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
951 (cgen_opcode_table): Update type of dis_hash fn.
952 (extract_operand): Update type of `insn_value' arg.
953
954 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
955
956 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
957
958 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
959
960 * mips.h (INSN_MULT): Added.
961
962 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
963
964 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
965
966 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
967
968 * cgen.h (CGEN_INSN_INT): New typedef.
969 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
970 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
971 (CGEN_INSN_BYTES_PTR): New typedef.
972 (CGEN_EXTRACT_INFO): New typedef.
973 (cgen_insert_fn,cgen_extract_fn): Update.
974 (cgen_opcode_table): New member `insn_endian'.
975 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
976 (insert_operand,extract_operand): Update.
977 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
978
979 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
980
981 * cgen.h (CGEN_ATTR_BOOLS): New macro.
982 (struct CGEN_HW_ENTRY): New member `attrs'.
983 (CGEN_HW_ATTR): New macro.
984 (struct CGEN_OPERAND_INSTANCE): New member `name'.
985 (CGEN_INSN_INVALID_P): New macro.
986
987 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
988
989 * hppa.h: Add "fid".
990
991 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
992
993 From Robert Andrew Dale <rob@nb.net>
994 * i386.h (i386_optab): Add AMD 3DNow! instructions.
995 (AMD_3DNOW_OPCODE): Define.
996
997 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
998
999 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1000
1001 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1002
1003 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1004
1005 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1006
1007 Move all global state data into opcode table struct, and treat
1008 opcode table as something that is "opened/closed".
1009 * cgen.h (CGEN_OPCODE_DESC): New type.
1010 (all fns): New first arg of opcode table descriptor.
1011 (cgen_set_parse_operand_fn): Add prototype.
1012 (cgen_current_machine,cgen_current_endian): Delete.
1013 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1014 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1015 dis_hash_table,dis_hash_table_entries.
1016 (opcode_open,opcode_close): Add prototypes.
1017
1018 * cgen.h (cgen_insn): New element `cdx'.
1019
1020 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1021
1022 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1023
1024 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1025
1026 * mn10300.h: Add "no_match_operands" field for instructions.
1027 (MN10300_MAX_OPERANDS): Define.
1028
1029 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1030
1031 * cgen.h (cgen_macro_insn_count): Declare.
1032
1033 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1034
1035 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1036 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1037 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1038 set_{int,vma}_operand.
1039
1040 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1041
1042 * mn10300.h: Add "machine" field for instructions.
1043 (MN103, AM30): Define machine types.
1044
1045 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1046
1047 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1048
1049 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1050
1051 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1052
1053 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1054
1055 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1056 and ud2b.
1057 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1058 those that happen to be implemented on pentiums.
1059
1060 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1061
1062 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1063 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1064 with Size16|IgnoreSize or Size32|IgnoreSize.
1065
1066 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1067
1068 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1069 (REPE): Rename to REPE_PREFIX_OPCODE.
1070 (i386_regtab_end): Remove.
1071 (i386_prefixtab, i386_prefixtab_end): Remove.
1072 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1073 of md_begin.
1074 (MAX_OPCODE_SIZE): Define.
1075 (i386_optab_end): Remove.
1076 (sl_Suf): Define.
1077 (sl_FP): Use sl_Suf.
1078
1079 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1080 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1081 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1082 data32, dword, and adword prefixes.
1083 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1084 regs.
1085
1086 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1087
1088 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1089
1090 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1091 register operands, because this is a common idiom. Flag them with
1092 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1093 fdivrp because gcc erroneously generates them. Also flag with a
1094 warning.
1095
1096 * i386.h: Add suffix modifiers to most insns, and tighter operand
1097 checks in some cases. Fix a number of UnixWare compatibility
1098 issues with float insns. Merge some floating point opcodes, using
1099 new FloatMF modifier.
1100 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1101 consistency.
1102
1103 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1104 IgnoreDataSize where appropriate.
1105
1106 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1107
1108 * i386.h: (one_byte_segment_defaults): Remove.
1109 (two_byte_segment_defaults): Remove.
1110 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1111
1112 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1113
1114 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1115 (cgen_hw_lookup_by_num): Declare.
1116
1117 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1118
1119 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1120 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1121
1122 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1123
1124 * cgen.h (cgen_asm_init_parse): Delete.
1125 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1126 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1127
1128 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1129
1130 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1131 (cgen_asm_finish_insn): Update prototype.
1132 (cgen_insn): New members num, data.
1133 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1134 dis_hash, dis_hash_table_size moved to ...
1135 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1136 All uses updated. New members asm_hash_p, dis_hash_p.
1137 (CGEN_MINSN_EXPANSION): New struct.
1138 (cgen_expand_macro_insn): Declare.
1139 (cgen_macro_insn_count): Declare.
1140 (get_insn_operands): Update prototype.
1141 (lookup_get_insn_operands): Declare.
1142
1143 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1144
1145 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1146 regKludge. Add operands types for string instructions.
1147
1148 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1149
1150 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1151 table.
1152
1153 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1154
1155 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1156 for `gettext'.
1157
1158 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1159
1160 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1161 Add IsString flag to string instructions.
1162 (IS_STRING): Don't define.
1163 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1164 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1165 (SS_PREFIX_OPCODE): Define.
1166
1167 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1168
1169 * i386.h: Revert March 24 patch; no more LinearAddress.
1170
1171 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1172
1173 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1174 instructions, and instead add FWait opcode modifier. Add short
1175 form of fldenv and fstenv.
1176 (FWAIT_OPCODE): Define.
1177
1178 * i386.h (i386_optab): Change second operand constraint of `mov
1179 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1180 allow legal instructions such as `movl %gs,%esi'
1181
1182 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1183
1184 * h8300.h: Various changes to fully bracket initializers.
1185
1186 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1187
1188 * i386.h: Set LinearAddress for lidt and lgdt.
1189
1190 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1191
1192 * cgen.h (CGEN_BOOL_ATTR): New macro.
1193
1194 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1195
1196 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1197
1198 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1199
1200 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1201 (cgen_insn): Record syntax and format entries here, rather than
1202 separately.
1203
1204 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1205
1206 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1207
1208 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1209
1210 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1211 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1212 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1213
1214 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1215
1216 * cgen.h (lookup_insn): New argument alias_p.
1217
1218 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1219
1220 Fix rac to accept only a0:
1221 * d10v.h (OPERAND_ACC): Split into:
1222 (OPERAND_ACC0, OPERAND_ACC1) .
1223 (OPERAND_GPR): Define.
1224
1225 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1226
1227 * cgen.h (CGEN_FIELDS): Define here.
1228 (CGEN_HW_ENTRY): New member `type'.
1229 (hw_list): Delete decl.
1230 (enum cgen_mode): Declare.
1231 (CGEN_OPERAND): New member `hw'.
1232 (enum cgen_operand_instance_type): Declare.
1233 (CGEN_OPERAND_INSTANCE): New type.
1234 (CGEN_INSN): New member `operands'.
1235 (CGEN_OPCODE_DATA): Make hw_list const.
1236 (get_insn_operands,lookup_insn): Add prototypes for.
1237
1238 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1239
1240 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1241 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1242 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1243 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1244
1245 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1246
1247 * cgen.h: Correct typo in comment end marker.
1248
1249 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1250
1251 * tic30.h: New file.
1252
1253 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1254
1255 * cgen.h: Add prototypes for cgen_save_fixups(),
1256 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1257 of cgen_asm_finish_insn() to return a char *.
1258
1259 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1260
1261 * cgen.h: Formatting changes to improve readability.
1262
1263 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1264
1265 * cgen.h (*): Clean up pass over `struct foo' usage.
1266 (CGEN_ATTR): Make unsigned char.
1267 (CGEN_ATTR_TYPE): Update.
1268 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1269 (cgen_base): Move member `attrs' to cgen_insn.
1270 (CGEN_KEYWORD): New member `null_entry'.
1271 (CGEN_{SYNTAX,FORMAT}): New types.
1272 (cgen_insn): Format and syntax separated from each other.
1273
1274 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1275
1276 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1277 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1278 flags_{used,set} long.
1279 (d30v_operand): Make flags field long.
1280
1281 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1282
1283 * m68k.h: Fix comment describing operand types.
1284
1285 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1286
1287 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1288 everything else after down.
1289
1290 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1291
1292 * d10v.h (OPERAND_FLAG): Split into:
1293 (OPERAND_FFLAG, OPERAND_CFLAG) .
1294
1295 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1296
1297 * mips.h (struct mips_opcode): Changed comments to reflect new
1298 field usage.
1299
1300 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1301
1302 * mips.h: Added to comments a quick-ref list of all assigned
1303 operand type characters.
1304 (OP_{MASK,SH}_PERFREG): New macros.
1305
1306 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1307
1308 * sparc.h: Add '_' and '/' for v9a asr's.
1309 Patch from David Miller <davem@vger.rutgers.edu>
1310
1311 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1312
1313 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1314 area are not available in the base model (H8/300).
1315
1316 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1317
1318 * m68k.h: Remove documentation of ` operand specifier.
1319
1320 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1321
1322 * m68k.h: Document q and v operand specifiers.
1323
1324 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1325
1326 * v850.h (struct v850_opcode): Add processors field.
1327 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1328 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1329 (PROCESSOR_V850EA): New bit constants.
1330
1331 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1332
1333 Merge changes from Martin Hunt:
1334
1335 * d30v.h: Allow up to 64 control registers. Add
1336 SHORT_A5S format.
1337
1338 * d30v.h (LONG_Db): New form for delayed branches.
1339
1340 * d30v.h: (LONG_Db): New form for repeati.
1341
1342 * d30v.h (SHORT_D2B): New form.
1343
1344 * d30v.h (SHORT_A2): New form.
1345
1346 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1347 registers are used. Needed for VLIW optimization.
1348
1349 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1350
1351 * cgen.h: Move assembler interface section
1352 up so cgen_parse_operand_result is defined for cgen_parse_address.
1353 (cgen_parse_address): Update prototype.
1354
1355 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1356
1357 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1358
1359 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1360
1361 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1362 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1363 <paubert@iram.es>.
1364
1365 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1366 <paubert@iram.es>.
1367
1368 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1369 <paubert@iram.es>.
1370
1371 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1372 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1373
1374 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1375
1376 * v850.h (V850_NOT_R0): New flag.
1377
1378 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1379
1380 * v850.h (struct v850_opcode): Remove flags field.
1381
1382 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1383
1384 * v850.h (struct v850_opcode): Add flags field.
1385 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1386 fields.
1387 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1388 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1389
1390 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1391
1392 * arc.h: New file.
1393
1394 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1395
1396 * sparc.h (sparc_opcodes): Declare as const.
1397
1398 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1399
1400 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1401 uses single or double precision floating point resources.
1402 (INSN_NO_ISA, INSN_ISA1): Define.
1403 (cpu specific INSN macros): Tweak into bitmasks outside the range
1404 of INSN_ISA field.
1405
1406 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1407
1408 * i386.h: Fix pand opcode.
1409
1410 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1411
1412 * mips.h: Widen INSN_ISA and move it to a more convenient
1413 bit position. Add INSN_3900.
1414
1415 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1416
1417 * mips.h (struct mips_opcode): added new field membership.
1418
1419 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1420
1421 * i386.h (movd): only Reg32 is allowed.
1422
1423 * i386.h: add fcomp and ud2. From Wayne Scott
1424 <wscott@ichips.intel.com>.
1425
1426 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1427
1428 * i386.h: Add MMX instructions.
1429
1430 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1431
1432 * i386.h: Remove W modifier from conditional move instructions.
1433
1434 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1435
1436 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1437 with no arguments to match that generated by the UnixWare
1438 assembler.
1439
1440 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1441
1442 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1443 (cgen_parse_operand_fn): Declare.
1444 (cgen_init_parse_operand): Declare.
1445 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1446 new argument `want'.
1447 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1448 (enum cgen_parse_operand_type): New enum.
1449
1450 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1451
1452 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1453
1454 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1455
1456 * cgen.h: New file.
1457
1458 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1459
1460 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1461 fdivrp.
1462
1463 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1464
1465 * v850.h (extract): Make unsigned.
1466
1467 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1468
1469 * i386.h: Add iclr.
1470
1471 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1472
1473 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1474 take a direction bit.
1475
1476 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1477
1478 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1479
1480 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1481
1482 * sparc.h: Include <ansidecl.h>. Update function declarations to
1483 use prototypes, and to use const when appropriate.
1484
1485 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1486
1487 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1488
1489 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1490
1491 * d10v.h: Change pre_defined_registers to
1492 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1493
1494 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1495
1496 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1497 Change mips_opcodes from const array to a pointer,
1498 and change bfd_mips_num_opcodes from const int to int,
1499 so that we can increase the size of the mips opcodes table
1500 dynamically.
1501
1502 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1503
1504 * d30v.h (FLAG_X): Remove unused flag.
1505
1506 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1507
1508 * d30v.h: New file.
1509
1510 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1511
1512 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1513 (PDS_VALUE): Macro to access value field of predefined symbols.
1514 (tic80_next_predefined_symbol): Add prototype.
1515
1516 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1517
1518 * tic80.h (tic80_symbol_to_value): Change prototype to match
1519 change in function, added class parameter.
1520
1521 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1522
1523 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1524 endmask fields, which are somewhat weird in that 0 and 32 are
1525 treated exactly the same.
1526
1527 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1528
1529 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1530 rather than a constant that is 2**X. Reorder them to put bits for
1531 operands that have symbolic names in the upper bits, so they can
1532 be packed into an int where the lower bits contain the value that
1533 corresponds to that symbolic name.
1534 (predefined_symbo): Add struct.
1535 (tic80_predefined_symbols): Declare array of translations.
1536 (tic80_num_predefined_symbols): Declare size of that array.
1537 (tic80_value_to_symbol): Declare function.
1538 (tic80_symbol_to_value): Declare function.
1539
1540 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1541
1542 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1543
1544 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1545
1546 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1547 be the destination register.
1548
1549 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1550
1551 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1552 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1553 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1554 that the opcode can have two vector instructions in a single
1555 32 bit word and we have to encode/decode both.
1556
1557 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1558
1559 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1560 TIC80_OPERAND_RELATIVE for PC relative.
1561 (TIC80_OPERAND_BASEREL): New flag bit for register
1562 base relative.
1563
1564 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1565
1566 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1567
1568 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1569
1570 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1571 ":s" modifier for scaling.
1572
1573 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1574
1575 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1576 (TIC80_OPERAND_M_LI): Ditto
1577
1578 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1579
1580 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1581 (TIC80_OPERAND_CC): New define for condition code operand.
1582 (TIC80_OPERAND_CR): New define for control register operand.
1583
1584 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1585
1586 * tic80.h (struct tic80_opcode): Name changed.
1587 (struct tic80_opcode): Remove format field.
1588 (struct tic80_operand): Add insertion and extraction functions.
1589 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1590 correct ones.
1591 (FMT_*): Ditto.
1592
1593 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1594
1595 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1596 type IV instruction offsets.
1597
1598 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1599
1600 * tic80.h: New file.
1601
1602 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1603
1604 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1605
1606 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1607
1608 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1609 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1610 * v850.h: Fix comment, v850_operand not powerpc_operand.
1611
1612 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1613
1614 * mn10200.h: Flesh out structures and definitions needed by
1615 the mn10200 assembler & disassembler.
1616
1617 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1618
1619 * mips.h: Add mips16 definitions.
1620
1621 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1622
1623 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1624
1625 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1626
1627 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1628 (MN10300_OPERAND_MEMADDR): Define.
1629
1630 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1631
1632 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1633
1634 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1635
1636 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1637
1638 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1639
1640 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1641
1642 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1643
1644 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1645
1646 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1647
1648 * alpha.h: Don't include "bfd.h"; private relocation types are now
1649 negative to minimize problems with shared libraries. Organize
1650 instruction subsets by AMASK extensions and PALcode
1651 implementation.
1652 (struct alpha_operand): Move flags slot for better packing.
1653
1654 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1655
1656 * v850.h (V850_OPERAND_RELAX): New operand flag.
1657
1658 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1659
1660 * mn10300.h (FMT_*): Move operand format definitions
1661 here.
1662
1663 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1664
1665 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1666
1667 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1668
1669 * mn10300.h (mn10300_opcode): Add "format" field.
1670 (MN10300_OPERAND_*): Define.
1671
1672 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1673
1674 * mn10x00.h: Delete.
1675 * mn10200.h, mn10300.h: New files.
1676
1677 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1678
1679 * mn10x00.h: New file.
1680
1681 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1682
1683 * v850.h: Add new flag to indicate this instruction uses a PC
1684 displacement.
1685
1686 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1687
1688 * h8300.h (stmac): Add missing instruction.
1689
1690 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1691
1692 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1693 field.
1694
1695 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1696
1697 * v850.h (V850_OPERAND_EP): Define.
1698
1699 * v850.h (v850_opcode): Add size field.
1700
1701 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1702
1703 * v850.h (v850_operands): Add insert and extract fields, pointers
1704 to functions used to handle unusual operand encoding.
1705 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1706 V850_OPERAND_SIGNED): Defined.
1707
1708 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1709
1710 * v850.h (v850_operands): Add flags field.
1711 (OPERAND_REG, OPERAND_NUM): Defined.
1712
1713 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1714
1715 * v850.h: New file.
1716
1717 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1718
1719 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1720 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1721 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1722 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1723 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1724 Defined.
1725
1726 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1727
1728 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1729 a 3 bit space id instead of a 2 bit space id.
1730
1731 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1732
1733 * d10v.h: Add some additional defines to support the
1734 assembler in determining which operations can be done in parallel.
1735
1736 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1737
1738 * h8300.h (SN): Define.
1739 (eepmov.b): Renamed from "eepmov"
1740 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1741 with them.
1742
1743 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1744
1745 * d10v.h (OPERAND_SHIFT): New operand flag.
1746
1747 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1748
1749 * d10v.h: Changes for divs, parallel-only instructions, and
1750 signed numbers.
1751
1752 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1753
1754 * d10v.h (pd_reg): Define. Putting the definition here allows
1755 the assembler and disassembler to share the same struct.
1756
1757 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1758
1759 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1760 Williams <steve@icarus.com>.
1761
1762 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1763
1764 * d10v.h: New file.
1765
1766 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1767
1768 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1769
1770 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1771
1772 * m68k.h (mcf5200): New macro.
1773 Document names of coldfire control registers.
1774
1775 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1776
1777 * h8300.h (SRC_IN_DST): Define.
1778
1779 * h8300.h (UNOP3): Mark the register operand in this insn
1780 as a source operand, not a destination operand.
1781 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1782 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1783 register operand with SRC_IN_DST.
1784
1785 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1786
1787 * alpha.h: New file.
1788
1789 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1790
1791 * rs6k.h: Remove obsolete file.
1792
1793 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1794
1795 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1796 fdivp, and fdivrp. Add ffreep.
1797
1798 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1799
1800 * h8300.h: Reorder various #defines for readability.
1801 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1802 (BITOP): Accept additional (unused) argument. All callers changed.
1803 (EBITOP): Likewise.
1804 (O_LAST): Bump.
1805 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1806
1807 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1808 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1809 (BITOP, EBITOP): Handle new H8/S addressing modes for
1810 bit insns.
1811 (UNOP3): Handle new shift/rotate insns on the H8/S.
1812 (insns using exr): New instructions.
1813 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1814
1815 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1816
1817 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1818 was incorrect.
1819
1820 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1821
1822 * h8300.h (START): Remove.
1823 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1824 and mov.l insns that can be relaxed.
1825
1826 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1827
1828 * i386.h: Remove Abs32 from lcall.
1829
1830 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1831
1832 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1833 (SLCPOP): New macro.
1834 Mark X,Y opcode letters as in use.
1835
1836 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1837
1838 * sparc.h (F_FLOAT, F_FBR): Define.
1839
1840 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1841
1842 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1843 from all insns.
1844 (ABS8SRC,ABS8DST): Add ABS8MEM.
1845 (add.l): Fix reg+reg variant.
1846 (eepmov.w): Renamed from eepmovw.
1847 (ldc,stc): Fix many cases.
1848
1849 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1850
1851 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1852
1853 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1854
1855 * sparc.h (O): Mark operand letter as in use.
1856
1857 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1858
1859 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1860 Mark operand letters uU as in use.
1861
1862 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1863
1864 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1865 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1866 (SPARC_OPCODE_SUPPORTED): New macro.
1867 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1868 (F_NOTV9): Delete.
1869
1870 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1871
1872 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1873 declaration consistent with return type in definition.
1874
1875 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1876
1877 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1878
1879 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1880
1881 * i386.h (i386_regtab): Add 80486 test registers.
1882
1883 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1884
1885 * i960.h (I_HX): Define.
1886 (i960_opcodes): Add HX instruction.
1887
1888 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1889
1890 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1891 and fclex.
1892
1893 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1894
1895 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1896 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1897 (bfd_* defines): Delete.
1898 (sparc_opcode_archs): Replaces architecture_pname.
1899 (sparc_opcode_lookup_arch): Declare.
1900 (NUMOPCODES): Delete.
1901
1902 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1903
1904 * sparc.h (enum sparc_architecture): Add v9a.
1905 (ARCHITECTURES_CONFLICT_P): Update.
1906
1907 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1908
1909 * i386.h: Added Pentium Pro instructions.
1910
1911 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1912
1913 * m68k.h: Document new 'W' operand place.
1914
1915 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1916
1917 * hppa.h: Add lci and syncdma instructions.
1918
1919 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1920
1921 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1922 instructions.
1923
1924 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1925
1926 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1927 assembler's -mcom and -many switches.
1928
1929 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1930
1931 * i386.h: Fix cmpxchg8b extension opcode description.
1932
1933 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1934
1935 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1936 and register cr4.
1937
1938 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1939
1940 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1941
1942 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1943
1944 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1945
1946 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1947
1948 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1949
1950 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1951
1952 * m68kmri.h: Remove.
1953
1954 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1955 declarations. Remove F_ALIAS and flag field of struct
1956 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1957 int. Make name and args fields of struct m68k_opcode const.
1958
1959 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1960
1961 * sparc.h (F_NOTV9): Define.
1962
1963 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1964
1965 * mips.h (INSN_4010): Define.
1966
1967 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1968
1969 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1970
1971 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1972 * m68k.h: Fix argument descriptions of coprocessor
1973 instructions to allow only alterable operands where appropriate.
1974 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1975 (m68k_opcode_aliases): Add more aliases.
1976
1977 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1978
1979 * m68k.h: Added explcitly short-sized conditional branches, and a
1980 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1981 svr4-based configurations.
1982
1983 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1984
1985 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1986 * i386.h: added missing Data16/Data32 flags to a few instructions.
1987
1988 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1989
1990 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1991 (OP_MASK_BCC, OP_SH_BCC): Define.
1992 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1993 (OP_MASK_CCC, OP_SH_CCC): Define.
1994 (INSN_READ_FPR_R): Define.
1995 (INSN_RFE): Delete.
1996
1997 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1998
1999 * m68k.h (enum m68k_architecture): Deleted.
2000 (struct m68k_opcode_alias): New type.
2001 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2002 matching constraints, values and flags. As a side effect of this,
2003 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2004 as I know were never used, now may need re-examining.
2005 (numopcodes): Now const.
2006 (m68k_opcode_aliases, numaliases): New variables.
2007 (endop): Deleted.
2008 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2009 m68k_opcode_aliases; update declaration of m68k_opcodes.
2010
2011 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2012
2013 * hppa.h (delay_type): Delete unused enumeration.
2014 (pa_opcode): Replace unused delayed field with an architecture
2015 field.
2016 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2017
2018 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2019
2020 * mips.h (INSN_ISA4): Define.
2021
2022 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2023
2024 * mips.h (M_DLA_AB, M_DLI): Define.
2025
2026 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2027
2028 * hppa.h (fstwx): Fix single-bit error.
2029
2030 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2031
2032 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2033
2034 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2035
2036 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2037 debug registers. From Charles Hannum (mycroft@netbsd.org).
2038
2039 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2040
2041 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2042 i386 support:
2043 * i386.h (MOV_AX_DISP32): New macro.
2044 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2045 of several call/return instructions.
2046 (ADDR_PREFIX_OPCODE): New macro.
2047
2048 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2049
2050 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2051
2052 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2053 char.
2054 (struct vot, field `name'): ditto.
2055
2056 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2057
2058 * vax.h: Supply and properly group all values in end sentinel.
2059
2060 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2061
2062 * mips.h (INSN_ISA, INSN_4650): Define.
2063
2064 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2065
2066 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2067 systems with a separate instruction and data cache, such as the
2068 29040, these instructions take an optional argument.
2069
2070 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2071
2072 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2073 INSN_TRAP.
2074
2075 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2076
2077 * mips.h (INSN_STORE_MEMORY): Define.
2078
2079 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2080
2081 * sparc.h: Document new operand type 'x'.
2082
2083 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2084
2085 * i960.h (I_CX2): New instruction category. It includes
2086 instructions available on Cx and Jx processors.
2087 (I_JX): New instruction category, for JX-only instructions.
2088 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2089 Jx-only instructions, in I_JX category.
2090
2091 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2092
2093 * ns32k.h (endop): Made pointer const too.
2094
2095 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2096
2097 * ns32k.h: Drop Q operand type as there is no correct use
2098 for it. Add I and Z operand types which allow better checking.
2099
2100 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2101
2102 * h8300.h (xor.l) :fix bit pattern.
2103 (L_2): New size of operand.
2104 (trapa): Use it.
2105
2106 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2107
2108 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2109
2110 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2111
2112 * sparc.h: Include v9 definitions.
2113
2114 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2115
2116 * m68k.h (m68060): Defined.
2117 (m68040up, mfloat, mmmu): Include it.
2118 (struct m68k_opcode): Widen `arch' field.
2119 (m68k_opcodes): Updated for M68060. Removed comments that were
2120 instructions commented out by "JF" years ago.
2121
2122 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2123
2124 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2125 add a one-bit `flags' field.
2126 (F_ALIAS): New macro.
2127
2128 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2129
2130 * h8300.h (dec, inc): Get encoding right.
2131
2132 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2133
2134 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2135 a flag instead.
2136 (PPC_OPERAND_SIGNED): Define.
2137 (PPC_OPERAND_SIGNOPT): Define.
2138
2139 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2140
2141 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2142 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2143
2144 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2145
2146 * i386.h: Reverse last change. It'll be handled in gas instead.
2147
2148 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2149
2150 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2151 slower on the 486 and used the implicit shift count despite the
2152 explicit operand. The one-operand form is still available to get
2153 the shorter form with the implicit shift count.
2154
2155 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2156
2157 * hppa.h: Fix typo in fstws arg string.
2158
2159 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2160
2161 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2162
2163 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2164
2165 * ppc.h (PPC_OPCODE_601): Define.
2166
2167 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2168
2169 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2170 (so we can determine valid completers for both addb and addb[tf].)
2171
2172 * hppa.h (xmpyu): No floating point format specifier for the
2173 xmpyu instruction.
2174
2175 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2176
2177 * ppc.h (PPC_OPERAND_NEXT): Define.
2178 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2179 (struct powerpc_macro): Define.
2180 (powerpc_macros, powerpc_num_macros): Declare.
2181
2182 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2183
2184 * ppc.h: New file. Header file for PowerPC opcode table.
2185
2186 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2187
2188 * hppa.h: More minor template fixes for sfu and copr (to allow
2189 for easier disassembly).
2190
2191 * hppa.h: Fix templates for all the sfu and copr instructions.
2192
2193 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2194
2195 * i386.h (push): Permit Imm16 operand too.
2196
2197 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2198
2199 * h8300.h (andc): Exists in base arch.
2200
2201 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2202
2203 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2204 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2205
2206 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2207
2208 * hppa.h: Add FP quadword store instructions.
2209
2210 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2211
2212 * mips.h: (M_J_A): Added.
2213 (M_LA): Removed.
2214
2215 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2216
2217 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2218 <mellon@pepper.ncd.com>.
2219
2220 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2221
2222 * hppa.h: Immediate field in probei instructions is unsigned,
2223 not low-sign extended.
2224
2225 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2226
2227 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2228
2229 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2230
2231 * i386.h: Add "fxch" without operand.
2232
2233 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2234
2235 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2236
2237 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2238
2239 * hppa.h: Add gfw and gfr to the opcode table.
2240
2241 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2242
2243 * m88k.h: extended to handle m88110.
2244
2245 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2246
2247 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2248 addresses.
2249
2250 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2251
2252 * i960.h (i960_opcodes): Properly bracket initializers.
2253
2254 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2255
2256 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2257
2258 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2259
2260 * m68k.h (two): Protect second argument with parentheses.
2261
2262 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2263
2264 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2265 Deleted old in/out instructions in "#if 0" section.
2266
2267 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2268
2269 * i386.h (i386_optab): Properly bracket initializers.
2270
2271 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2272
2273 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2274 Jeff Law, law@cs.utah.edu).
2275
2276 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2277
2278 * i386.h (lcall): Accept Imm32 operand also.
2279
2280 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2281
2282 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2283 (M_DABS): Added.
2284
2285 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2286
2287 * mips.h (INSN_*): Changed values. Removed unused definitions.
2288 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2289 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2290 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2291 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2292 (M_*): Added new values for r6000 and r4000 macros.
2293 (ANY_DELAY): Removed.
2294
2295 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2296
2297 * mips.h: Added M_LI_S and M_LI_SS.
2298
2299 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2300
2301 * h8300.h: Get some rare mov.bs correct.
2302
2303 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2304
2305 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2306 been included.
2307
2308 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2309
2310 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2311 jump instructions, for use in disassemblers.
2312
2313 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2314
2315 * m88k.h: Make bitfields just unsigned, not unsigned long or
2316 unsigned short.
2317
2318 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2319
2320 * hppa.h: New argument type 'y'. Use in various float instructions.
2321
2322 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2323
2324 * hppa.h (break): First immediate field is unsigned.
2325
2326 * hppa.h: Add rfir instruction.
2327
2328 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2329
2330 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2331
2332 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2333
2334 * mips.h: Reworked the hazard information somewhat, and fixed some
2335 bugs in the instruction hazard descriptions.
2336
2337 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2338
2339 * m88k.h: Corrected a couple of opcodes.
2340
2341 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2342
2343 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2344 new version includes instruction hazard information, but is
2345 otherwise reasonably similar.
2346
2347 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2348
2349 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2350
2351 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2352
2353 Patches from Jeff Law, law@cs.utah.edu:
2354 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2355 Make the tables be the same for the following instructions:
2356 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2357 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2358 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2359 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2360 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2361 "fcmp", and "ftest".
2362
2363 * hppa.h: Make new and old tables the same for "break", "mtctl",
2364 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2365 Fix typo in last patch. Collapse several #ifdefs into a
2366 single #ifdef.
2367
2368 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2369 of the comments up-to-date.
2370
2371 * hppa.h: Update "free list" of letters and update
2372 comments describing each letter's function.
2373
2374 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2375
2376 * h8300.h: Lots of little fixes for the h8/300h.
2377
2378 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2379
2380 Support for H8/300-H
2381 * h8300.h: Lots of new opcodes.
2382
2383 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2384
2385 * h8300.h: checkpoint, includes H8/300-H opcodes.
2386
2387 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2388
2389 * Patches from Jeffrey Law <law@cs.utah.edu>.
2390 * hppa.h: Rework single precision FP
2391 instructions so that they correctly disassemble code
2392 PA1.1 code.
2393
2394 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2395
2396 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2397 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2398
2399 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2400
2401 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2402 gdb will define it for now.
2403
2404 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2405
2406 * sparc.h: Don't end enumerator list with comma.
2407
2408 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2409
2410 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2411 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2412 ("bc2t"): Correct typo.
2413 ("[ls]wc[023]"): Use T rather than t.
2414 ("c[0123]"): Define general coprocessor instructions.
2415
2416 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2417
2418 * m68k.h: Move split point for gcc compilation more towards
2419 middle.
2420
2421 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2422
2423 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2424 simply wrong, ics, rfi, & rfsvc were missing).
2425 Add "a" to opr_ext for "bb". Doc fix.
2426
2427 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2428
2429 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2430 * mips.h: Add casts, to suppress warnings about shifting too much.
2431 * m68k.h: Document the placement code '9'.
2432
2433 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2434
2435 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2436 allows callers to break up the large initialized struct full of
2437 opcodes into two half-sized ones. This permits GCC to compile
2438 this module, since it takes exponential space for initializers.
2439 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2440
2441 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2442
2443 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2444 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2445 initialized structs in it.
2446
2447 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2448
2449 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2450 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2451 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2452
2453 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2454
2455 * mips.h: document "i" and "j" operands correctly.
2456
2457 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2458
2459 * mips.h: Removed endianness dependency.
2460
2461 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2462
2463 * h8300.h: include info on number of cycles per instruction.
2464
2465 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2466
2467 * hppa.h: Move handy aliases to the front. Fix masks for extract
2468 and deposit instructions.
2469
2470 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2471
2472 * i386.h: accept shld and shrd both with and without the shift
2473 count argument, which is always %cl.
2474
2475 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2476
2477 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2478 (one_byte_segment_defaults, two_byte_segment_defaults,
2479 i386_prefixtab_end): Ditto.
2480
2481 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2482
2483 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2484 for operand 2; from John Carr, jfc@dsg.dec.com.
2485
2486 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2487
2488 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2489 always use 16-bit offsets. Makes calculated-size jump tables
2490 feasible.
2491
2492 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2493
2494 * i386.h: Fix one-operand forms of in* and out* patterns.
2495
2496 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2497
2498 * m68k.h: Added CPU32 support.
2499
2500 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2501
2502 * mips.h (break): Disassemble the argument. Patch from
2503 jonathan@cs.stanford.edu (Jonathan Stone).
2504
2505 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2506
2507 * m68k.h: merged Motorola and MIT syntax.
2508
2509 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2510
2511 * m68k.h (pmove): make the tests less strict, the 68k book is
2512 wrong.
2513
2514 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2515
2516 * m68k.h (m68ec030): Defined as alias for 68030.
2517 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2518 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2519 them. Tightened description of "fmovex" to distinguish it from
2520 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2521 up descriptions that claimed versions were available for chips not
2522 supporting them. Added "pmovefd".
2523
2524 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2525
2526 * m68k.h: fix where the . goes in divull
2527
2528 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2529
2530 * m68k.h: the cas2 instruction is supposed to be written with
2531 indirection on the last two operands, which can be either data or
2532 address registers. Added a new operand type 'r' which accepts
2533 either register type. Added new cases for cas2l and cas2w which
2534 use them. Corrected masks for cas2 which failed to recognize use
2535 of address register.
2536
2537 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2538
2539 * m68k.h: Merged in patches (mostly m68040-specific) from
2540 Colin Smith <colin@wrs.com>.
2541
2542 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2543 base). Also cleaned up duplicates, re-ordered instructions for
2544 the sake of dis-assembling (so aliases come after standard names).
2545 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2546
2547 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2548
2549 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2550 all missing .s
2551
2552 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2553
2554 * sparc.h: Moved tables to BFD library.
2555
2556 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2557
2558 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2559
2560 * h8300.h: Finish filling in all the holes in the opcode table,
2561 so that the Lucid C compiler can digest this as well...
2562
2563 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2564
2565 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2566 Fix opcodes on various sizes of fild/fist instructions
2567 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2568 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2569
2570 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2571
2572 * h8300.h: Fill in all the holes in the opcode table so that the
2573 losing HPUX C compiler can digest this...
2574
2575 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2576
2577 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2578 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2579
2580 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2581
2582 * sparc.h: Add new architecture variant sparclite; add its scan
2583 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2584
2585 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2586
2587 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2588 fy@lucid.com).
2589
2590 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2591
2592 * rs6k.h: New version from IBM (Metin).
2593
2594 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2595
2596 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2597 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2598
2599 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2600
2601 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2602
2603 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2604
2605 * m68k.h (one, two): Cast macro args to unsigned to suppress
2606 complaints from compiler and lint about integer overflow during
2607 shift.
2608
2609 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2610
2611 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2612
2613 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2614
2615 * mips.h: Make bitfield layout depend on the HOST compiler,
2616 not on the TARGET system.
2617
2618 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2619
2620 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2621 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2622 <TRANLE@INTELLICORP.COM>.
2623
2624 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2625
2626 * h8300.h: turned op_type enum into #define list
2627
2628 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2629
2630 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2631 similar instructions -- they've been renamed to "fitoq", etc.
2632 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2633 number of arguments.
2634 * h8300.h: Remove extra ; which produces compiler warning.
2635
2636 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2637
2638 * sparc.h: fix opcode for tsubcctv.
2639
2640 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2641
2642 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2643
2644 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2645
2646 * sparc.h (nop): Made the 'lose' field be even tighter,
2647 so only a standard 'nop' is disassembled as a nop.
2648
2649 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2650
2651 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2652 disassembled as a nop.
2653
2654 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2655
2656 * m68k.h, sparc.h: ANSIfy enums.
2657
2658 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2659
2660 * sparc.h: fix a typo.
2661
2662 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2663
2664 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2665 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2666 vax.h: Renamed from ../<foo>-opcode.h.
2667
2668 \f
2669 Local Variables:
2670 version-control: never
2671 End:
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