include/opcode/ChangeLog

   1 2002-12-16  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
   4         "default_args".
   5         (struct not_wot): Constify "args".
   6         (struct not): Constify "name".
   7         (numopcodes): Delete.
   8         (endop): Delete.
   9
  10 2002-12-13  Alan Modra  <amodra@bigpond.net.au>
  11
  12         * pj.h (pj_opc_info_t): Add union.
  13
  14 2002-12-04  David Mosberger  <davidm@hpl.hp.com>
  15
  16         * ia64.h: Fix copyright message.
  17         (IA64_OPND_AR_CSD): New operand kind.
  18
  19 2002-12-03  Richard Henderson  <rth@redhat.com>
  20
  21         * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
  22
  23 2002-12-03  Alan Modra  <amodra@bigpond.net.au>
  24
  25         * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
  26         Constify "leaf" and "multi".
  27
  28 2002-11-19  Klee Dienes  <kdienes@apple.com>
  29
  30         * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
  31         fields.
  32         (h8_opcodes). Modify initializer and initializer macros to no
  33         longer initialize the removed fields.
  34
  35 2002-11-19  Svein E. Seldal  <Svein.Seldal@solidas.com>
  36
  37         * tic4x.h (c4x_insts): Fixed LDHI constraint
  38
  39 2002-11-18  Klee Dienes  <kdienes@apple.com>
  40
  41         * h8300.h (h8_opcode): Remove 'length' field.
  42         (h8_opcodes): Mark as 'const' (both the declaration and
  43         definition).  Modify initializer and initializer macros to no
  44         longer initialize the length field.
  45
  46 2002-11-18  Klee Dienes  <kdienes@apple.com>
  47
  48         * arc.h (arc_ext_opcodes): Declare as extern.
  49         (arc_ext_operands): Declare as extern.
  50         * i860.h (i860_opcodes): Declare as const.
  51
  52 2002-11-18  Svein E. Seldal  <Svein.Seldal@solidas.com>
  53
  54         * tic4x.h: File reordering. Added enhanced opcodes.
  55
  56 2002-11-16  Svein E. Seldal  <Svein.Seldal@solidas.com>
  57
  58         * tic4x.h: Major rewrite of entire file. Define instruction
  59           classes, and put each instruction into a class.
  60
  61 2002-11-11  Svein E. Seldal  <Svein.Seldal@solidas.com>
  62
  63         * tic4x.h: Added new opcodes and corrected some bugs.  Add support
  64         for new DSP types.
  65
  66 2002-10-14  Alan Modra  <amodra@bigpond.net.au>
  67
  68         * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
  69
  70 2002-09-30  Gavin Romig-Koch  <gavin@redhat.com>
  71             Ken Raeburn  <raeburn@cygnus.com>
  72             Aldy Hernandez  <aldyh@redhat.com>
  73             Eric Christopher  <echristo@redhat.com>
  74             Richard Sandiford  <rsandifo@redhat.com>
  75
  76         * mips.h: Update comment for new opcodes.
  77         (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
  78         (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
  79         (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
  80         (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
  81         (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
  82         Don't match CPU_R4111 with INSN_4100.
  83
  84 2002-08-19  Elena Zannoni <ezannoni@redhat.com>
  85
  86         From matthew green  <mrg@redhat.com>
  87
  88         * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
  89         instructions.
  90         (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
  91         PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
  92         e500x2 Integer select, branch locking, performance monitor,
  93         cache locking and machine check APUs, respectively.
  94         (PPC_OPCODE_EFS): New opcode type for efs* instructions.
  95         (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
  96
  97 2002-08-13  Stephane Carrez  <stcarrez@nerim.fr>
  98
  99         * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
 100         (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
 101         M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
 102         memory banks.
 103         (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
 104
 105 2002-07-09  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
 106
 107         * mips.h (INSN_MIPS16): New define.
 108
 109 2002-07-08  Alan Modra  <amodra@bigpond.net.au>
 110
 111         * i386.h: Remove IgnoreSize from movsx and movzx.
 112
 113 2002-06-08  Alan Modra  <amodra@bigpond.net.au>
 114
 115         * a29k.h: Replace CONST with const.
 116         (CONST): Don't define.
 117         * convex.h: Replace CONST with const.
 118         (CONST): Don't define.
 119         * dlx.h: Replace CONST with const.
 120         * or32.h (CONST): Don't define.
 121
 122 2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>
 123
 124         * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
 125         (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
 126         (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
 127         (INSN_MDMX): New constants, for MDMX support.
 128         (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
 129
 130 2002-05-28  Kuang Hwa Lin <kuang@sbcglobal.net>
 131
 132         * dlx.h: New file.
 133
 134 2002-05-25  Alan Modra  <amodra@bigpond.net.au>
 135
 136         * ia64.h: Use #include "" instead of <> for local header files.
 137         * sparc.h: Likewise.
 138
 139 2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
 140
 141         * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
 142
 143 2002-05-17  Andrey Volkov  <avolkov@sources.redhat.com>
 144
 145         * h8300.h: Corrected defs of all control regs
 146         and eepmov instr.
 147
 148 2002-04-11  Alan Modra  <amodra@bigpond.net.au>
 149
 150         * i386.h: Add intel mode cmpsd and movsd.
 151         Put them before SSE2 insns, so that rep prefix works.
 152
 153 2002-03-15  Chris G. Demetriou  <cgd@broadcom.com>
 154
 155         * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
 156         instructions.
 157         (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
 158         may be passed along with the ISA bitmask.
 159
 160 2002-03-05  Paul Koning  <pkoning@equallogic.com>
 161
 162         * pdp11.h: Add format codes for float instruction formats.
 163
 164 2002-02-25  Alan Modra  <amodra@bigpond.net.au>
 165
 166         * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
 167
 168 Mon Feb 18 17:31:48 CET 2002  Jan Hubicka  <jh@suse.cz>
 169
 170         * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
 171
 172 Mon Feb 11 12:53:19 CET 2002  Jan Hubicka  <jh@suse.cz>
 173
 174         * i386.h (push,pop): Allow 16bit operands in 64bit mode.
 175         (xchg): Fix.
 176         (in, out): Disable 64bit operands.
 177         (call, jmp): Avoid REX prefixes.
 178         (jcxz): Prohibit in 64bit mode
 179         (jrcxz, loop): Add 64bit variants.
 180         (movq): Fix patterns.
 181         (movmskps, pextrw, pinstrw): Add 64bit variants.
 182
 183 2002-01-31  Ivan Guzvinec  <ivang@opencores.org>
 184
 185         * or32.h: New file.
 186
 187 2002-01-22  Graydon Hoare  <graydon@redhat.com>
 188
 189         * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
 190         (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
 191
 192 2002-01-21  Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
 193
 194         * h8300.h: Comment typo fix.
 195
 196 2002-01-03  matthew green  <mrg@redhat.com>
 197
 198         * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
 199         (PPC_OPCODE_BOOKE64): Likewise.
 200
 201 Mon Dec 31 16:45:41 2001  Jeffrey A Law  (law@cygnus.com)
 202
 203         * hppa.h (call, ret): Move to end of table.
 204         (addb, addib): PA2.0 variants should have been PA2.0W.
 205         (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
 206         happy.
 207         (fldw, fldd, fstw, fstd, bb): Likewise.
 208         (short loads/stores): Tweak format specifier slightly to keep
 209         disassembler happy.
 210         (indexed loads/stores): Likewise.
 211         (absolute loads/stores): Likewise.
 212
 213 2001-12-04  Alexandre Oliva  <aoliva@redhat.com>
 214
 215         * d10v.h (OPERAND_NOSP): New macro.
 216
 217 2001-11-29  Alexandre Oliva  <aoliva@redhat.com>
 218
 219         * d10v.h (OPERAND_SP): New macro.
 220
 221 2001-11-15  Alan Modra  <amodra@bigpond.net.au>
 222
 223         * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
 224
 225 2001-11-11  Timothy Wall  <twall@alum.mit.edu>
 226
 227         * tic54x.h: Revise opcode layout; don't really need a separate
 228         structure for parallel opcodes.
 229
 230 2001-11-13  Zack Weinberg <zack@codesourcery.com>
 231             Alan Modra  <amodra@bigpond.net.au>
 232
 233         * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
 234         accept WordReg.
 235
 236 2001-11-04  Chris Demetriou  <cgd@broadcom.com>
 237
 238         * mips.h (OPCODE_IS_MEMBER): Remove extra space.
 239
 240 2001-10-30  Hans-Peter Nilsson  <hp@bitrange.com>
 241
 242         * mmix.h: New file.
 243
 244 2001-10-18  Chris Demetriou  <cgd@broadcom.com>
 245
 246         * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
 247         of the expression, to make source code merging easier.
 248
 249 2001-10-17  Chris Demetriou  <cgd@broadcom.com>
 250
 251         * mips.h: Sort coprocessor instruction argument characters
 252         in comment, add a few more words of description for "H".
 253
 254 2001-10-17  Chris Demetriou  <cgd@broadcom.com>
 255
 256         * mips.h (INSN_SB1): New cpu-specific instruction bit.
 257         (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
 258         if cpu is CPU_SB1.
 259
 260 2001-10-17  matthew green  <mrg@redhat.com>
 261
 262         * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
 263
 264 2001-10-12  matthew green  <mrg@redhat.com>
 265
 266         * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
 267         opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
 268         instructions, respectively.
 269
 270 2001-09-27  Nick Clifton  <nickc@cambridge.redhat.com>
 271
 272         * v850.h: Remove spurious comment.
 273
 274 2001-09-21  Nick Clifton  <nickc@cambridge.redhat.com>
 275
 276         * h8300.h: Fix compile time warning messages
 277
 278 2001-09-04  Richard Henderson  <rth@redhat.com>
 279
 280         * alpha.h (struct alpha_operand): Pack elements into bitfields.
 281
 282 2001-08-31  Eric Christopher  <echristo@redhat.com>
 283
 284         * mips.h: Remove CPU_MIPS32_4K.
 285
 286 2001-08-27  Torbjorn Granlund  <tege@swox.com>
 287
 288         * ppc.h (PPC_OPERAND_DS): Define.
 289
 290 2001-08-25  Andreas Jaeger  <aj@suse.de>
 291
 292         * d30v.h: Fix declaration of reg_name_cnt.
 293
 294         * d10v.h: Fix declaration of d10v_reg_name_cnt.
 295
 296         * arc.h: Add prototypes from opcodes/arc-opc.c.
 297
 298 2001-08-16  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
 299
 300         * mips.h (INSN_10000): Define.
 301         (OPCODE_IS_MEMBER): Check for INSN_10000.
 302
 303 2001-08-10  Alan Modra  <amodra@one.net.au>
 304
 305         * ppc.h: Revert 2001-08-08.
 306
 307 2001-08-10  Richard Sandiford  <rsandifo@redhat.com>
 308
 309         * mips.h (INSN_GP32): Remove.
 310         (OPCODE_IS_MEMBER): Remove gp32 parameter.
 311         (M_MOVE): New macro identifier.
 312
 313 2001-08-08  Alan Modra  <amodra@one.net.au>
 314
 315         1999-10-25  Torbjorn Granlund  <tege@swox.com>
 316         * ppc.h (struct powerpc_operand): New field `reloc'.
 317
 318 2001-08-01  Aldy Hernandez  <aldyh@redhat.com>
 319
 320         * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
 321
 322 2001-07-12  Jeff Johnston  <jjohnstn@redhat.com>
 323
 324         * cgen.h (CGEN_INSN): Add regex support.
 325         (build_insn_regex): Declare.
 326
 327 2001-07-11  Frank Ch. Eigler  <fche@redhat.com>
 328
 329         * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
 330         (cgen_cpu_desc): Ditto.
 331
 332 2001-07-07  Ben Elliston  <bje@redhat.com>
 333
 334         * m88k.h: Clean up and reformat. Remove unused code.
 335
 336 2001-06-14  Geoffrey Keating  <geoffk@redhat.com>
 337
 338         * cgen.h (cgen_keyword): Add nonalpha_chars field.
 339
 340 2001-05-23  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
 341
 342         * mips.h (CPU_R12000): Define.
 343
 344 2001-05-23  John Healy  <jhealy@redhat.com>
 345
 346         * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
 347
 348 2001-05-15  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
 349
 350         * mips.h (INSN_ISA_MASK): Define.
 351
 352 2001-05-12  Alan Modra  <amodra@one.net.au>
 353
 354         * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
 355         not an mmx reg.  Swap xmm/mmx regs on both movdq2q and movq2dq,
 356         and use InvMem as these insns must have register operands.
 357
 358 2001-05-04  Alan Modra  <amodra@one.net.au>
 359
 360         * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
 361         and pextrw to swap reg/rm assignments.
 362
 363 2001-04-05  Hans-Peter Nilsson  <hp@axis.com>
 364
 365         * cris.h (enum cris_insn_version_usage): Correct comment for
 366         cris_ver_v3p.
 367
 368 2001-03-24  Alan Modra  <alan@linuxcare.com.au>
 369
 370         * i386.h (i386_optab): Correct entry for "movntdq".  Add "punpcklqdq".
 371         Add InvMem to first operand of "maskmovdqu".
 372
 373 2001-03-22  Hans-Peter Nilsson  <hp@axis.com>
 374
 375         * cris.h (ADD_PC_INCR_OPCODE): New macro.
 376
 377 2001-03-21  Kazu Hirata  <kazu@hxi.com>
 378
 379         * h8300.h: Fix formatting.
 380
 381 2001-03-22  Alan Modra  <alan@linuxcare.com.au>
 382
 383         * i386.h (i386_optab): Add paddq, psubq.
 384
 385 2001-03-19  Alan Modra  <alan@linuxcare.com.au>
 386
 387         * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
 388
 389 2001-02-28  Igor Shevlyakov  <igor@windriver.com>
 390
 391         * m68k.h: new defines for Coldfire V4. Update mcf to know
 392         about mcf5407.
 393
 394 2001-02-18  lars brinkhoff  <lars@nocrew.org>
 395
 396         * pdp11.h: New file.
 397
 398 2001-02-12  Jan Hubicka  <jh@suse.cz>
 399
 400         * i386.h (i386_optab): SSE integer converison instructions have
 401         64bit versions on x86-64.
 402
 403 2001-02-10  Nick Clifton  <nickc@redhat.com>
 404
 405         * mips.h: Remove extraneous whitespace.  Formating change to allow
 406         for future contribution.
 407
 408 2001-02-09  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 409
 410         * s390.h: New file.
 411
 412 2001-02-02  Patrick Macdonald  <patrickm@redhat.com>
 413
 414         * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
 415         (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
 416         (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
 417
 418 2001-01-24  Karsten Keil  <kkeil@suse.de>
 419
 420         * i386.h (i386_optab): Fix swapgs
 421
 422 2001-01-14  Alan Modra  <alan@linuxcare.com.au>
 423
 424         * hppa.h: Describe new '<' and '>' operand types, and tidy
 425         existing comments.
 426         (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
 427         Remove duplicate "ldw j(s,b),x".  Sort some entries.
 428
 429 2001-01-13  Jan Hubicka  <jh@suse.cz>
 430
 431         * i386.h (i386_optab): Fix pusha and ret templates.
 432
 433 2001-01-11  Peter Targett  <peter.targett@arccores.com>
 434
 435         * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
 436         definitions for masking cpu type.
 437         (arc_ext_operand_value) New structure for storing extended
 438         operands.
 439         (ARC_OPERAND_*) Flags for operand values.
 440
 441 2001-01-10  Jan Hubicka  <jh@suse.cz>
 442
 443         * i386.h (pinsrw): Add.
 444         (pshufw): Remove.
 445         (cvttpd2dq): Fix operands.
 446         (cvttps2dq): Likewise.
 447         (movq2q): Rename to movdq2q.
 448
 449 2001-01-10  Richard Schaal  <richard.schaal@intel.com>
 450
 451         * i386.h: Correct movnti instruction.
 452
 453 2001-01-09  Jeff Johnston  <jjohnstn@redhat.com>
 454
 455         * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
 456         of operands (unsigned char or unsigned short).
 457         (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
 458         (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
 459
 460 2001-01-05  Jan Hubicka  <jh@suse.cz>
 461
 462         * i386.h (i386_optab): Make [sml]fence template to use immext field.
 463
 464 2001-01-03  Jan Hubicka  <jh@suse.cz>
 465
 466         * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
 467         introduced by Pentium4
 468
 469 2000-12-30  Jan Hubicka  <jh@suse.cz>
 470
 471         * i386.h (i386_optab): Add "rex*" instructions;
 472         add swapgs; disable jmp/call far direct instructions for
 473         64bit mode; add syscall and sysret; disable registers for 0xc6
 474         template.  Add 'q' suffixes to extendable instructions, disable
 475         obsolete instructions, add new sign/zero extension ones.
 476         (i386_regtab): Add extended registers.
 477         (*Suf): Add No_qSuf.
 478         (q_Suf, wlq_Suf, bwlq_Suf): New.
 479
 480 2000-12-20  Jan Hubicka  <jh@suse.cz>
 481
 482         * i386.h (i386_optab): Replace "Imm" with "EncImm".
 483         (i386_regtab): Add flags field.
 484
 485 2000-12-12  Nick Clifton  <nickc@redhat.com>
 486
 487         * mips.h: Fix formatting.
 488
 489 2000-12-01  Chris Demetriou  <cgd@sibyte.com>
 490
 491         mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
 492         (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
 493         OP_*_SYSCALL definitions.
 494         (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
 495         19 bit wait codes.
 496         (MIPS operand specifier comments): Remove 'm', add 'U' and
 497         'J', and update the meaning of 'B' so that it's more general.
 498
 499         * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
 500         INSN_ISA5): Renumber, redefine to mean the ISA at which the
 501         instruction was added.
 502         (INSN_ISA32): New constant.
 503         (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
 504         Renumber to avoid new and/or renumbered INSN_* constants.
 505         (INSN_MIPS32): Delete.
 506         (ISA_UNKNOWN): New constant to indicate unknown ISA.
 507         (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
 508         ISA_MIPS32): New constants, defined to be the mask of INSN_*
 509         constants available at that ISA level.
 510         (CPU_UNKNOWN): New constant to indicate unknown CPU.
 511         (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
 512         define it with a unique value.
 513         (OPCODE_IS_MEMBER): Update for new ISA membership-related
 514         constant meanings.
 515
 516         * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
 517         definitions.
 518
 519         * mips.h (CPU_SB1): New constant.
 520
 521 2000-10-20  Jakub Jelinek  <jakub@redhat.com>
 522
 523         * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
 524         Note that '3' is used for siam operand.
 525
 526 2000-09-22  Jim Wilson  <wilson@cygnus.com>
 527
 528         * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
 529
 530 2000-09-13  Anders Norlander  <anorland@acc.umu.se>
 531
 532         * mips.h: Use defines instead of hard-coded processor numbers.
 533         (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
 534         CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
 535         CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
 536         CPU_4KC, CPU_4KM, CPU_4KP): Define..
 537         (OPCODE_IS_MEMBER): Use new defines.
 538         (OP_MASK_SEL, OP_SH_SEL): Define.
 539         (OP_MASK_CODE20, OP_SH_CODE20): Define.
 540         Add 'P' to used characters.
 541         Use 'H' for coprocessor select field.
 542         Use 'm' for 20 bit breakpoint code.
 543         Document new arg characters and add to used characters.
 544         (INSN_MIPS32): New define for MIPS32 extensions.
 545         (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
 546
 547 2000-09-05  Alan Modra  <alan@linuxcare.com.au>
 548
 549         * hppa.h: Mention cz completer.
 550
 551 2000-08-16  Jim Wilson  <wilson@cygnus.com>
 552
 553         * ia64.h (IA64_OPCODE_POSTINC): New.
 554
 555 2000-08-15  H.J. Lu  <hjl@gnu.org>
 556
 557         * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
 558         IgnoreSize change.
 559
 560 2000-08-08  Jason Eckhardt  <jle@cygnus.com>
 561
 562         * i860.h: Small formatting adjustments.
 563
 564 2000-07-29  Marek Michalkiewicz  <marekm@linux.org.pl>
 565
 566         * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
 567         Move related opcodes closer to each other.
 568         Minor changes in comments, list undefined opcodes.
 569
 570 2000-07-26  Dave Brolley  <brolley@redhat.com>
 571
 572         * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
 573
 574 2000-07-22  Jason Eckhardt  <jle@cygnus.com>
 575
 576         * i860.h (btne, bte, bla): Changed these opcodes
 577         to use sbroff ('r') instead of split16 ('s').
 578         (J, K, L, M): New operand types for 16-bit aligned fields.
 579         (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
 580         use I, J, K, L, M instead of just I.
 581         (T, U): New operand types for split 16-bit aligned fields.
 582         (st.x): Changed these opcodes to use S, T, U instead of just S.
 583         (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
 584         exist on the i860.
 585         (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
 586         (pfeq.ss, pfeq.dd): New opcodes.
 587         (st.s): Fixed incorrect mask bits.
 588         (fmlow): Fixed incorrect mask bits.
 589         (fzchkl, pfzchkl): Fixed incorrect mask bits.
 590         (faddz, pfaddz): Fixed incorrect mask bits.
 591         (form, pform): Fixed incorrect mask bits.
 592         (pfld.l): Fixed incorrect mask bits.
 593         (fst.q): Fixed incorrect mask bits.
 594         (all floating point opcodes): Fixed incorrect mask bits for
 595         handling of dual bit.
 596
 597 2000-07-20  Hans-Peter Nilsson  <hp@axis.com>
 598
 599         cris.h: New file.
 600
 601 2000-06-26  Marek Michalkiewicz  <marekm@linux.org.pl>
 602
 603         * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
 604         (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
 605         (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
 606         (AVR_ISA_M83): Define for ATmega83, ATmega85.
 607         (espm): Remove, because ESPM removed in databook update.
 608         (eicall, eijmp): Move to the end of opcode table.
 609
 610 2000-06-18  Stephane Carrez  <stcarrez@worldnet.fr>
 611
 612         * m68hc11.h: New file for support of Motorola 68hc11.
 613
 614 Fri Jun  9 21:51:50 2000  Denis Chertykov  <denisc@overta.ru>
 615
 616         * avr.h: clr,lsl,rol, ... moved after add,adc, ...
 617
 618 Wed Jun  7 21:39:54 2000  Denis Chertykov  <denisc@overta.ru>
 619
 620         * avr.h: New file with AVR opcodes.
 621
 622 Wed Apr 12 17:11:20 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
 623
 624         * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
 625
 626 2000-05-23  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 627
 628         * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
 629
 630 2000-05-17  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 631
 632         * i386.h: Use sl_FP, not sl_Suf for fild.
 633
 634 2000-05-16  Frank Ch. Eigler  <fche@redhat.com>
 635
 636         * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32.  Check that
 637         it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
 638         (CGEN_MAX_IFMT_OPERANDS): Increase to 16.  Check that it exceeds
 639         CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
 640
 641 2000-05-13  Alan Modra  <alan@linuxcare.com.au>,
 642
 643         * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
 644
 645 2000-05-13  Alan Modra  <alan@linuxcare.com.au>,
 646             Alexander Sokolov <robocop@netlink.ru>
 647
 648         * i386.h (i386_optab): Add cpu_flags for all instructions.
 649
 650 2000-05-13  Alan Modra  <alan@linuxcare.com.au>
 651
 652         From Gavin Romig-Koch <gavin@cygnus.com>
 653         * i386.h (wld_Suf): Define.  Use on pushf, popf, pusha, popa.
 654
 655 2000-05-04  Timothy Wall  <twall@cygnus.com>
 656
 657         * tic54x.h: New.
 658
 659 2000-05-03  J.T. Conklin  <jtc@redback.com>
 660
 661         * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
 662         (PPC_OPERAND_VR): New operand flag for vector registers.
 663
 664 2000-05-01  Kazu Hirata  <kazu@hxi.com>
 665
 666         * h8300.h (EOP): Add missing initializer.
 667
 668 Fri Apr 21 15:03:37 2000  Jason Eckhardt  <jle@cygnus.com>
 669
 670         * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
 671         forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
 672         New operand types l,y,&,fe,fE,fx added to support above forms.
 673         (pa_opcodes): Replaced usage of 'x' as source/target for
 674         floating point double-word loads/stores with 'fx'.
 675
 676 Fri Apr 21 13:20:53 2000  Richard Henderson  <rth@cygnus.com>
 677                           David Mosberger  <davidm@hpl.hp.com>
 678                           Timothy Wall <twall@cygnus.com>
 679                           Jim Wilson  <wilson@cygnus.com>
 680
 681         * ia64.h: New file.
 682
 683 2000-03-27  Nick Clifton  <nickc@cygnus.com>
 684
 685         * d30v.h (SHORT_A1): Fix value.
 686         (SHORT_AR): Renumber so that it is at the end of the list of short
 687         instructions, not the end of the list of long instructions.
 688
 689 2000-03-26  Alan Modra  <alan@linuxcare.com>
 690
 691         * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
 692         problem isn't really specific to Unixware.
 693         (OLDGCC_COMPAT): Define.
 694         (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
 695         destination %st(0).
 696         Fix lots of comments.
 697
 698 2000-03-02  J"orn Rennecke <amylaar@cygnus.co.uk>
 699
 700         * d30v.h:
 701         (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
 702         (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
 703         (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
 704         (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
 705         (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
 706         (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
 707         (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
 708
 709 2000-02-25  Alan Modra  <alan@spri.levels.unisa.edu.au>
 710
 711         * i386.h (fild, fistp): Change intel d_Suf form to fildd and
 712         fistpd without suffix.
 713
 714 2000-02-24  Nick Clifton  <nickc@cygnus.com>
 715
 716         * cgen.h (cgen_cpu_desc): Rename field 'flags' to
 717         'signed_overflow_ok_p'.
 718         Delete prototypes for cgen_set_flags() and cgen_get_flags().
 719
 720 2000-02-24  Andrew Haley  <aph@cygnus.com>
 721
 722         * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
 723         (CGEN_CPU_TABLE): flags: new field.
 724         Add prototypes for new functions.
 725
 726 2000-02-24  Alan Modra  <alan@spri.levels.unisa.edu.au>
 727
 728         * i386.h: Add some more UNIXWARE_COMPAT comments.
 729
 730 2000-02-23  Linas Vepstas <linas@linas.org>
 731
 732         * i370.h: New file.
 733
 734 2000-02-22  Chandra Chavva  <cchavva@cygnus.com>
 735
 736         * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
 737         cannot be combined in parallel with ADD/SUBppp.
 738
 739 2000-02-22  Andrew Haley  <aph@cygnus.com>
 740
 741         * mips.h: (OPCODE_IS_MEMBER): Add comment.
 742
 743 1999-12-30  Andrew Haley  <aph@cygnus.com>
 744
 745         * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
 746         whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
 747         insns.
 748
 749 2000-01-15  Alan Modra  <alan@spri.levels.unisa.edu.au>
 750
 751         * i386.h: Qualify intel mode far call and jmp with x_Suf.
 752
 753 1999-12-27  Alan Modra  <alan@spri.levels.unisa.edu.au>
 754
 755         * i386.h: Add JumpAbsolute qualifier to all non-intel mode
 756         indirect jumps and calls.  Add FF/3 call for intel mode.
 757
 758 Wed Dec  1 03:05:25 1999  Jeffrey A Law  (law@cygnus.com)
 759
 760         * mn10300.h: Add new operand types.  Add new instruction formats.
 761
 762 Wed Nov 24 20:28:58 1999  Jeffrey A Law  (law@cygnus.com)
 763
 764         * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
 765         instruction.
 766
 767 1999-11-18  Gavin Romig-Koch  <gavin@cygnus.com>
 768
 769         * mips.h (INSN_ISA5): New.
 770
 771 1999-11-01  Gavin Romig-Koch  <gavin@cygnus.com>
 772
 773         * mips.h (OPCODE_IS_MEMBER): New.
 774
 775 1999-10-29  Nick Clifton  <nickc@cygnus.com>
 776
 777         * d30v.h (SHORT_AR): Define.
 778
 779 1999-10-18  Michael Meissner  <meissner@cygnus.com>
 780
 781         * alpha.h (alpha_num_opcodes): Convert to unsigned.
 782         (alpha_num_operands): Ditto.
 783
 784 Sun Oct 10 01:46:56 1999  Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
 785
 786         * hppa.h (pa_opcodes):  Add load and store cache control to
 787         instructions.  Add ordered access load and store.
 788
 789         * hppa.h (pa_opcode): Add new entries for addb and addib.
 790
 791         * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
 792
 793         * hppa.h (pa_opcodes):  Add entries for cmpb and cmpib.
 794
 795 Thu Oct  7 00:12:25 MDT 1999    Diego Novillo <dnovillo@cygnus.com>
 796
 797         * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
 798
 799 Thu Sep 23 07:08:38 1999  Jerry Quinn <jquinn@nortelnetworks.com>
 800
 801         * hppa.h (pa_opcodes): Add "call" and "ret".  Clean up "b", "bve"
 802         and "be" using completer prefixes.
 803
 804         * hppa.h (pa_opcodes): Add initializers to silence compiler.
 805
 806         * hppa.h: Update comments about character usage.
 807
 808 Mon Sep 20 03:55:31 1999  Jeffrey A Law  (law@cygnus.com)
 809
 810         * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
 811         up the new fstw & bve instructions.
 812
 813 Sun Sep 19 10:40:59 1999  Jeffrey A Law  (law@cygnus.com)
 814
 815         * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
 816         instructions.
 817
 818         * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
 819
 820         * hppa.h (pa_opcodes): Add long offset double word load/store
 821         instructions.
 822
 823         * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
 824         stores.
 825
 826         * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
 827
 828         * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
 829
 830         * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
 831
 832         * hppa.h (pa_opcodes): Add new syntax "be" instructions.
 833
 834         * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
 835
 836         * hppa.h (pa_opcodes): Add support for "b,l".
 837
 838         * hppa.h (pa_opcodes): Add support for "b,gate".
 839
 840 Sat Sep 18 11:41:16 1999  Jeffrey A Law  (law@cygnus.com)
 841
 842         * hppa.h (pa_opcodes): Use 'fX' for first register operand
 843         in xmpyu.
 844
 845         * hppa.h (pa_opcodes): Fix mask for probe and probei.
 846
 847         * hppa.h (pa_opcodes): Fix mask for depwi.
 848
 849 Tue Sep  7 13:44:25 1999  Jeffrey A Law  (law@cygnus.com)
 850
 851         * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
 852         an explicit output argument.
 853
 854 Mon Sep  6 04:41:42 1999  Jeffrey A Law  (law@cygnus.com)
 855
 856         * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
 857         Add a few PA2.0 loads and store variants.
 858
 859 1999-09-04  Steve Chamberlain  <sac@pobox.com>
 860
 861         * pj.h: New file.
 862
 863 1999-08-29  Alan Modra  <alan@spri.levels.unisa.edu.au>
 864
 865         * i386.h (i386_regtab): Move %st to top of table, and split off
 866         other fp reg entries.
 867         (i386_float_regtab): To here.
 868
 869 Sat Aug 28 00:25:25 1999  Jerry Quinn <jquinn@nortelnetworks.com>
 870
 871         * hppa.h (pa_opcodes): Replace 'f' by 'v'.  Prefix float register args
 872         by 'f'.
 873
 874         * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
 875         Add supporting args.
 876
 877         * hppa.h:  Document new completers and args.
 878         * hppa.h (pa_opcodes):  Add 64 bit patterns and pa2.0 syntax for uxor,
 879         uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe.  Add pa2.0
 880         extensions for ssm, rsm, pdtlb, pitlb.  Add performance instructions
 881         pmenb and pmdis.
 882
 883         * hppa.h (pa_opcodes):  Add pa2.0 instructions hadd, hshl,
 884         hshr, hsub, mixh, mixw, permh.
 885
 886         * hppa.h (pa_opcodes): Change completers in instructions to
 887         use 'c' prefix.
 888
 889         * hppa.h (pa_opcodes):  Add popbts, new forms of bb, havg,
 890         hshladd, hshradd, shrpd, and shrpw instructions.  Update arg comments.
 891
 892         * hppa.h (pa_opcodes):  Change fmpyfadd, fmpynfadd, fneg,
 893         fnegabs to use 'I' instead of 'F'.
 894
 895 1999-08-21  Alan Modra  <alan@spri.levels.unisa.edu.au>
 896
 897         * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
 898         Document pf2iw and pi2fw as athlon insns.  Remove pswapw.
 899         Alphabetically sort PIII insns.
 900
 901 Wed Aug 18 18:14:40 1999  Doug Evans  <devans@canuck.cygnus.com>
 902
 903         * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
 904
 905 Fri Aug  6 09:46:35 1999  Jerry Quinn <jquinn@nortelnetworks.com>
 906
 907         * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
 908         and andcm.  Add 32 and 64 bit version of cmpclr, cmpiclr.
 909
 910         * hppa.h:  Document 64 bit condition completers.
 911
 912 Thu Aug  5 16:56:07 1999  Jerry Quinn <jquinn@nortelnetworks.com>
 913
 914         * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
 915
 916 1999-08-04  Alan Modra  <alan@spri.levels.unisa.edu.au>
 917
 918         * i386.h (i386_optab): Add DefaultSize modifier to all insns
 919         that implicitly modify %esp.  #undef d_Suf, x_suf, sld_suf,
 920         sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
 921
 922 Wed Jul 28 02:04:24 1999  Jerry Quinn <jquinn@nortelnetworks.com>
 923                           Jeff Law <law@cygnus.com>
 924
 925         * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
 926
 927         * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
 928
 929         * hppa.h (pa_opcodes):  Change xmpyu, fmpyfadd,
 930         and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
 931
 932 1999-07-13  Alan Modra  <alan@spri.levels.unisa.edu.au>
 933
 934         * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
 935
 936 Thu Jul  1 00:17:24 1999  Jeffrey A Law  (law@cygnus.com)
 937
 938         * hppa.h (struct pa_opcode): Add new field "flags".
 939         (FLAGS_STRICT): Define.
 940
 941 Fri Jun 25 04:22:04 1999  Jerry Quinn <jquinn@nortelnetworks.com>
 942                           Jeff Law <law@cygnus.com>
 943
 944         * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
 945
 946         * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
 947
 948 1999-06-23  Alan Modra  <alan@spri.levels.unisa.edu.au>
 949
 950         * i386.h: Allow `l' suffix on bswap.  Allow `w' suffix on arpl,
 951         lldt, lmsw, ltr, str, verr, verw.  Add FP flag to fcmov*.  Add FP
 952         flag to fcomi and friends.
 953
 954 Fri May 28 15:26:11 1999  Jeffrey A Law  (law@cygnus.com)
 955
 956         * hppa.h (pa_opcodes): Move integer arithmetic instructions after
 957         integer logical instructions.
 958
 959 1999-05-28  Linus Nordberg  <linus.nordberg@canit.se>
 960
 961         * m68k.h: Document new formats `E', `G', `H' and new places `N',
 962         `n', `o'.
 963
 964         * m68k.h: Define mcf5206e, mcf5307, mcf.  Document new format `u'
 965         and new places `m', `M', `h'.
 966
 967 Thu May 27 04:13:54 1999  Joel Sherrill (joel@OARcorp.com
 968
 969         * hppa.h (pa_opcodes): Add several processor specific system
 970         instructions.
 971
 972 Wed May 26 16:57:44 1999  Jeffrey A Law  (law@cygnus.com)
 973
 974         * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
 975         "addb", and "addib" to be used by the disassembler.
 976
 977 1999-05-12  Alan Modra  <alan@apri.levels.unisa.edu.au>
 978
 979         * i386.h (ReverseModrm): Remove all occurences.
 980         (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
 981         movmskps, pextrw, pmovmskb, maskmovq.
 982         Change NoSuf to FP on all MMX, XMM and AMD insns as these all
 983         ignore the data size prefix.
 984
 985         * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
 986         Mostly stolen from Doug Ledford <dledford@redhat.com>
 987
 988 Sat May  8 23:27:35 1999  Richard Henderson  <rth@cygnus.com>
 989
 990         * ppc.h (PPC_OPCODE_64_BRIDGE): New.
 991
 992 1999-04-14  Doug Evans  <devans@casey.cygnus.com>
 993
 994         * cgen.h (CGEN_ATTR): Delete member num_nonbools.
 995         (CGEN_ATTR_TYPE): Update.
 996         (CGEN_ATTR_MASK): Number booleans starting at 0.
 997         (CGEN_ATTR_VALUE): Update.
 998         (CGEN_INSN_ATTR): Update.
 999
1000 Mon Apr 12 23:43:27 1999  Jeffrey A Law  (law@cygnus.com)
1001
1002         * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1003         instructions.
1004
1005 Tue Mar 23 11:24:38 1999  Jeffrey A Law  (law@cygnus.com)
1006
1007         * hppa.h (bb, bvb): Tweak opcode/mask.
1008
1009
1010 1999-03-22  Doug Evans  <devans@casey.cygnus.com>
1011
1012         * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1013         (struct cgen_cpu_desc): Rename member mach to machs.  New member isas.
1014         New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1015         min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1016         Delete member max_insn_size.
1017         (enum cgen_cpu_open_arg): New enum.
1018         (cpu_open): Update prototype.
1019         (cpu_open_1): Declare.
1020         (cgen_set_cpu): Delete.
1021
1022 1999-03-11  Doug Evans  <devans@casey.cygnus.com>
1023
1024         * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1025         (CGEN_OPERAND_NIL): New macro.
1026         (CGEN_OPERAND): New member `type'.
1027         (@arch@_cgen_operand_table): Delete decl.
1028         (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1029         (CGEN_OPERAND_TABLE): New struct.
1030         (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1031         (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1032         (CGEN_CPU_TABLE): New member `isa'.  Change member `operand_table',
1033         now a CGEN_OPERAND_TABLE.  Add CGEN_CPU_DESC arg to
1034         {get,set}_{int,vma}_operand.
1035         (@arch@_cgen_cpu_open): New arg `isa'.
1036         (cgen_set_cpu): Ditto.
1037
1038 Fri Feb 26 02:36:45 1999  Richard Henderson  <rth@cygnus.com>
1039
1040         * i386.h: Fill in cmov and fcmov alternates.  Add fcomi short forms.
1041
1042 1999-02-25  Doug Evans  <devans@casey.cygnus.com>
1043
1044         * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1045         (CGEN_HW_ENTRY): Delete member `next'.  Change type of `type' to
1046         enum cgen_hw_type.
1047         (CGEN_HW_TABLE): New struct.
1048         (hw_table): Delete declaration.
1049         (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1050         to table entry to enum.
1051         (CGEN_OPINST): Ditto.
1052         (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1053
1054 Sat Feb 13 14:13:44 1999  Richard Henderson  <rth@cygnus.com>
1055
1056         * alpha.h (AXP_OPCODE_EV6): New.
1057         (AXP_OPCODE_NOPAL): Include it.
1058
1059 1999-02-09  Doug Evans  <devans@casey.cygnus.com>
1060
1061         * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1062         All uses updated.  New members int_insn_p, max_insn_size,
1063         parse_operand,insert_operand,extract_operand,print_operand,
1064         sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1065         get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1066         extract_handlers,print_handlers.
1067         (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1068         (CGEN_ATTR_BOOL_OFFSET): New macro.
1069         (CGEN_ATTR_MASK): Subtract it to compute bit number.
1070         (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1071         (cgen_opcode_handler): Renamed from cgen_base.
1072         (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1073         (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1074         all uses updated.
1075         (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1076         (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1077         (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1078         (CGEN_OPCODE,CGEN_IBASE): New types.
1079         (CGEN_INSN): Rewrite.
1080         (CGEN_{ASM,DIS}_HASH*): Delete.
1081         (init_opcode_table,init_ibld_table): Declare.
1082         (CGEN_INSN_ATTR): New type.
1083
1084 Mon Feb  1 21:09:14 1999  Catherine Moore  <clm@cygnus.com>
1085
1086         * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf):  Define.
1087         (x_FP, d_FP, dls_FP, sldx_FP):  Define.
1088         Change *Suf definitions to include x and d suffixes.
1089         (movsx):  Use w_Suf and b_Suf.
1090         (movzx):  Likewise.
1091         (movs):  Use bwld_Suf.
1092         (fld):  Change ordering.  Use sld_FP.
1093         (fild):  Add Intel Syntax equivalent of fildq.
1094         (fst):  Use sld_FP.
1095         (fist):  Use sld_FP.
1096         (fstp):  Use sld_FP.  Add x_FP version.
1097         (fistp):  LLongMem version for Intel Syntax.
1098         (fcom, fcomp):  Use sld_FP.
1099         (fadd, fiadd, fsub):  Use sld_FP.
1100         (fsubr):  Use sld_FP.
1101         (fmul, fimul, fdvi, fidiv, fdivr):  Use sld_FP.
1102
1103 1999-01-27  Doug Evans  <devans@casey.cygnus.com>
1104
1105         * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1106         CGEN_MODE_UINT.
1107
1108 1999-01-16  Jeffrey A Law  (law@cygnus.com)
1109
1110         * hppa.h (bv): Fix mask.
1111
1112 1999-01-05  Doug Evans  <devans@casey.cygnus.com>
1113
1114         * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1115         (CGEN_ATTR): Use it.
1116         (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1117         (CGEN_ATTR_TABLE): New member dfault.
1118
1119 1998-12-30  Gavin Romig-Koch  <gavin@cygnus.com>
1120
1121         * mips.h (MIPS16_INSN_BRANCH): New.
1122
1123 Wed Dec  9 10:38:48 1998  David Taylor  <taylor@texas.cygnus.com>
1124
1125         The following is part of a change made by Edith Epstein
1126         <eepstein@sophia.cygnus.com> as part of a project to merge in
1127         changes by HP; HP did not create ChangeLog entries.
1128
1129         * hppa.h (completer_chars): list of chars to not put a space
1130         after.
1131
1132 Sun Dec  6 13:21:34 1998  Ian Lance Taylor  <ian@cygnus.com>
1133
1134         * i386.h (i386_optab): Permit w suffix on processor control and
1135         status word instructions.
1136
1137 1998-11-30  Doug Evans  <devans@casey.cygnus.com>
1138
1139         * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1140         (struct cgen_keyword_entry): Ditto.
1141         (struct cgen_operand): Ditto.
1142         (CGEN_IFLD): New typedef, with associated access macros.
1143         (CGEN_IFMT): New typedef, with associated access macros.
1144         (CGEN_IFMT): Renamed from CGEN_FORMAT.  New member `iflds'.
1145         (CGEN_IVALUE): New typedef.
1146         (struct cgen_insn): Delete const on syntax,attrs members.
1147         `format' now points to format data.  Type of `value' is now
1148         CGEN_IVALUE.
1149         (struct cgen_opcode_table): New member ifld_table.
1150
1151 1998-11-18  Doug Evans  <devans@casey.cygnus.com>
1152
1153         * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1154         (CGEN_OPERAND_INSTANCE): New member `attrs'.
1155         (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1156         (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1157         (cgen_opcode_table): Update type of dis_hash fn.
1158         (extract_operand): Update type of `insn_value' arg.
1159
1160 Thu Oct 29 11:38:36 1998  Doug Evans  <devans@canuck.cygnus.com>
1161
1162         * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1163
1164 Tue Oct 27 08:57:59 1998  Gavin Romig-Koch  <gavin@cygnus.com>
1165
1166         * mips.h (INSN_MULT): Added.
1167
1168 Tue Oct 20 11:31:34 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1169
1170         * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1171
1172 Mon Oct 19 12:50:00 1998  Doug Evans  <devans@seba.cygnus.com>
1173
1174         * cgen.h (CGEN_INSN_INT): New typedef.
1175         (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1176         (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1177         (CGEN_INSN_BYTES_PTR): New typedef.
1178         (CGEN_EXTRACT_INFO): New typedef.
1179         (cgen_insert_fn,cgen_extract_fn): Update.
1180         (cgen_opcode_table): New member `insn_endian'.
1181         (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1182         (insert_operand,extract_operand): Update.
1183         (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1184
1185 Fri Oct  9 13:38:13 1998  Doug Evans  <devans@seba.cygnus.com>
1186
1187         * cgen.h (CGEN_ATTR_BOOLS): New macro.
1188         (struct CGEN_HW_ENTRY): New member `attrs'.
1189         (CGEN_HW_ATTR): New macro.
1190         (struct CGEN_OPERAND_INSTANCE): New member `name'.
1191         (CGEN_INSN_INVALID_P): New macro.
1192
1193 Mon Oct  5 00:21:07 1998  Jeffrey A Law  (law@cygnus.com)
1194
1195         * hppa.h: Add "fid".
1196
1197 Sun Oct  4 21:00:00 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1198
1199         From Robert Andrew Dale <rob@nb.net>
1200         * i386.h (i386_optab): Add AMD 3DNow! instructions.
1201         (AMD_3DNOW_OPCODE): Define.
1202
1203 Tue Sep 22 17:53:47 1998  Nick Clifton  <nickc@cygnus.com>
1204
1205         * d30v.h (EITHER_BUT_PREFER_MU): Define.
1206
1207 Mon Aug 10 14:09:38 1998  Doug Evans  <devans@canuck.cygnus.com>
1208
1209         * cgen.h (cgen_insn): #if 0 out element `cdx'.
1210
1211 Mon Aug  3 12:21:57 1998  Doug Evans  <devans@seba.cygnus.com>
1212
1213         Move all global state data into opcode table struct, and treat
1214         opcode table as something that is "opened/closed".
1215         * cgen.h (CGEN_OPCODE_DESC): New type.
1216         (all fns): New first arg of opcode table descriptor.
1217         (cgen_set_parse_operand_fn): Add prototype.
1218         (cgen_current_machine,cgen_current_endian): Delete.
1219         (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1220         parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1221         dis_hash_table,dis_hash_table_entries.
1222         (opcode_open,opcode_close): Add prototypes.
1223
1224         * cgen.h (cgen_insn): New element `cdx'.
1225
1226 Thu Jul 30 21:44:25 1998  Frank Ch. Eigler  <fche@cygnus.com>
1227
1228         * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1229
1230 Tue Jul 28 10:59:07 1998  Jeffrey A Law  (law@cygnus.com)
1231
1232         * mn10300.h: Add "no_match_operands" field for instructions.
1233         (MN10300_MAX_OPERANDS): Define.
1234
1235 Fri Jul 24 11:44:24 1998  Doug Evans  <devans@canuck.cygnus.com>
1236
1237         * cgen.h (cgen_macro_insn_count): Declare.
1238
1239 Tue Jul 21 13:12:13 1998  Doug Evans  <devans@seba.cygnus.com>
1240
1241         * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1242         (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1243         (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1244         set_{int,vma}_operand.
1245
1246 Fri Jun 26 11:09:06 1998  Jeffrey A Law  (law@cygnus.com)
1247
1248         * mn10300.h: Add "machine" field for instructions.
1249         (MN103, AM30): Define machine types.
1250
1251 Fri Jun 19 16:09:09 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1252
1253         * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1254
1255 1998-06-18  Ulrich Drepper  <drepper@cygnus.com>
1256
1257         * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1258
1259 Sat Jun 13 11:31:35 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1260
1261         * i386.h (i386_optab): Add general form of aad and aam.  Add ud2a
1262         and ud2b.
1263         (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1264         those that happen to be implemented on pentiums.
1265
1266 Tue Jun  9 12:16:01 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1267
1268         * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1269         IgnoreDataSize to IgnoreSize.  Flag address and data size prefixes
1270         with Size16|IgnoreSize or Size32|IgnoreSize.
1271
1272 Mon Jun  8 12:15:52 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1273
1274         * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1275         (REPE): Rename to REPE_PREFIX_OPCODE.
1276         (i386_regtab_end): Remove.
1277         (i386_prefixtab, i386_prefixtab_end): Remove.
1278         (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1279         of md_begin.
1280         (MAX_OPCODE_SIZE): Define.
1281         (i386_optab_end): Remove.
1282         (sl_Suf): Define.
1283         (sl_FP): Use sl_Suf.
1284
1285         * i386.h (i386_optab): Allow 16 bit displacement for `mov
1286         mem,acc'.  Combine 16 and 32 bit forms of various insns.  Allow 16
1287         bit form of ljmp.  Add IsPrefix modifier to prefixes.  Add addr32,
1288         data32, dword, and adword prefixes.
1289         (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1290         regs.
1291
1292 Fri Jun  5 23:42:43 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1293
1294         * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1295
1296         * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1297         register operands, because this is a common idiom.  Flag them with
1298         a warning.  Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1299         fdivrp because gcc erroneously generates them.  Also flag with a
1300         warning.
1301
1302         * i386.h: Add suffix modifiers to most insns, and tighter operand
1303         checks in some cases.  Fix a number of UnixWare compatibility
1304         issues with float insns.  Merge some floating point opcodes, using
1305         new FloatMF modifier.
1306         (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1307         consistency.
1308
1309         * i386.h: Change occurence of ShortformW to W|ShortForm.  Add
1310         IgnoreDataSize where appropriate.
1311
1312 Wed Jun  3 18:28:45 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1313
1314         * i386.h: (one_byte_segment_defaults): Remove.
1315         (two_byte_segment_defaults): Remove.
1316         (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1317
1318 Fri May 15 15:59:04 1998  Doug Evans  <devans@seba.cygnus.com>
1319
1320         * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1321         (cgen_hw_lookup_by_num): Declare.
1322
1323 Thu May  7 09:27:58 1998  Frank Ch. Eigler  <fche@cygnus.com>
1324
1325         * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1326         ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1327
1328 Thu May  7 02:14:08 1998  Doug Evans  <devans@charmed.cygnus.com>
1329
1330         * cgen.h (cgen_asm_init_parse): Delete.
1331         (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1332         (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1333
1334 Mon Apr 27 10:13:11 1998  Doug Evans  <devans@seba.cygnus.com>
1335
1336         * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1337         (cgen_asm_finish_insn): Update prototype.
1338         (cgen_insn): New members num, data.
1339         (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1340         dis_hash, dis_hash_table_size moved to ...
1341         (CGEN_OPCODE_TABLE).  Here.  Renamed from CGEN_OPCODE_DATA.
1342         All uses updated.  New members asm_hash_p, dis_hash_p.
1343         (CGEN_MINSN_EXPANSION): New struct.
1344         (cgen_expand_macro_insn): Declare.
1345         (cgen_macro_insn_count): Declare.
1346         (get_insn_operands): Update prototype.
1347         (lookup_get_insn_operands): Declare.
1348
1349 Tue Apr 21 17:11:32 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1350
1351         * i386.h (i386_optab): Change iclrKludge and imulKludge to
1352         regKludge.  Add operands types for string instructions.
1353
1354 Mon Apr 20 14:40:29 1998  Tom Tromey  <tromey@cygnus.com>
1355
1356         * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1357         table.
1358
1359 Sun Apr 19 13:54:06 1998  Tom Tromey  <tromey@cygnus.com>
1360
1361         * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1362         for `gettext'.
1363
1364 Fri Apr  3 12:04:48 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1365
1366         * i386.h: Remove NoModrm flag from all insns: it's never checked.
1367         Add IsString flag to string instructions.
1368         (IS_STRING): Don't define.
1369         (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1370         (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1371         (SS_PREFIX_OPCODE): Define.
1372
1373 Mon Mar 30 21:31:56 1998  Ian Lance Taylor  <ian@cygnus.com>
1374
1375         * i386.h: Revert March 24 patch; no more LinearAddress.
1376
1377 Mon Mar 30 10:25:54 1998  Alan Modra  <alan@spri.levels.unisa.edu.au>
1378
1379         * i386.h (i386_optab): Remove fwait (9b) from all floating point
1380         instructions, and instead add FWait opcode modifier.  Add short
1381         form of fldenv and fstenv.
1382         (FWAIT_OPCODE): Define.
1383
1384         * i386.h (i386_optab): Change second operand constraint of `mov
1385         sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1386         allow legal instructions such as `movl %gs,%esi'
1387
1388 Fri Mar 27 18:30:52 1998  Ian Lance Taylor  <ian@cygnus.com>
1389
1390         * h8300.h: Various changes to fully bracket initializers.
1391
1392 Tue Mar 24 18:32:47 1998  H.J. Lu  <hjl@gnu.org>
1393
1394         * i386.h: Set LinearAddress for lidt and lgdt.
1395
1396 Mon Mar  2 10:44:07 1998  Doug Evans  <devans@seba.cygnus.com>
1397
1398         * cgen.h (CGEN_BOOL_ATTR): New macro.
1399
1400 Thu Feb 26 15:54:31 1998  Michael Meissner  <meissner@cygnus.com>
1401
1402         * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1403
1404 Mon Feb 23 10:38:21 1998  Doug Evans  <devans@seba.cygnus.com>
1405
1406         * cgen.h (CGEN_CAT3): Delete.  Use CONCAT3 now.
1407         (cgen_insn): Record syntax and format entries here, rather than
1408         separately.
1409
1410 Tue Feb 17 21:42:56 1998  Nick Clifton  <nickc@cygnus.com>
1411
1412         * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1413
1414 Tue Feb 17 16:00:56 1998  Doug Evans  <devans@seba.cygnus.com>
1415
1416         * cgen.h (cgen_insert_fn): Change type of result to const char *.
1417         (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1418         (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1419
1420 Thu Feb 12 18:30:41 1998  Doug Evans  <devans@canuck.cygnus.com>
1421
1422         * cgen.h (lookup_insn): New argument alias_p.
1423
1424 Thu Feb 12 03:41:00 1998  J"orn Rennecke  <amylaar@cygnus.co.uk>
1425
1426 Fix rac to accept only a0:
1427         * d10v.h (OPERAND_ACC): Split into:
1428         (OPERAND_ACC0, OPERAND_ACC1) .
1429         (OPERAND_GPR): Define.
1430
1431 Wed Feb 11 17:31:53 1998  Doug Evans  <devans@seba.cygnus.com>
1432
1433         * cgen.h (CGEN_FIELDS): Define here.
1434         (CGEN_HW_ENTRY): New member `type'.
1435         (hw_list): Delete decl.
1436         (enum cgen_mode): Declare.
1437         (CGEN_OPERAND): New member `hw'.
1438         (enum cgen_operand_instance_type): Declare.
1439         (CGEN_OPERAND_INSTANCE): New type.
1440         (CGEN_INSN): New member `operands'.
1441         (CGEN_OPCODE_DATA): Make hw_list const.
1442         (get_insn_operands,lookup_insn): Add prototypes for.
1443
1444 Tue Feb  3 17:11:23 1998  Doug Evans  <devans@seba.cygnus.com>
1445
1446         * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1447         (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1448         (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1449         (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1450
1451 Mon Feb  2 19:19:15 1998  Ian Lance Taylor  <ian@cygnus.com>
1452
1453         * cgen.h: Correct typo in comment end marker.
1454
1455 Mon Feb  2 17:10:38 1998  Steve Haworth  <steve@pm.cse.rmit.EDU.AU>
1456
1457         * tic30.h: New file.
1458
1459 Thu Jan 22 17:54:56 1998  Nick Clifton  <nickc@cygnus.com>
1460
1461         * cgen.h: Add prototypes for cgen_save_fixups(),
1462         cgen_restore_fixups(), and cgen_swap_fixups().  Change prototype
1463         of cgen_asm_finish_insn() to return a char *.
1464
1465 Wed Jan 14 17:21:43 1998  Nick Clifton  <nickc@cygnus.com>
1466
1467         * cgen.h: Formatting changes to improve readability.
1468
1469 Mon Jan 12 11:37:36 1998  Doug Evans  <devans@seba.cygnus.com>
1470
1471         * cgen.h (*): Clean up pass over `struct foo' usage.
1472         (CGEN_ATTR): Make unsigned char.
1473         (CGEN_ATTR_TYPE): Update.
1474         (CGEN_ATTR_{ENTRY,TABLE}): New types.
1475         (cgen_base): Move member `attrs' to cgen_insn.
1476         (CGEN_KEYWORD): New member `null_entry'.
1477         (CGEN_{SYNTAX,FORMAT}): New types.
1478         (cgen_insn): Format and syntax separated from each other.
1479
1480 Tue Dec 16 15:15:52 1997  Michael Meissner  <meissner@cygnus.com>
1481
1482         * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1483         2 word load/store, ADDppp/SUBppp, 16/32 bit multiply.  Make
1484         flags_{used,set} long.
1485         (d30v_operand): Make flags field long.
1486
1487 Mon Dec  1 12:24:44 1997  Andreas Schwab  <schwab@issan.informatik.uni-dortmund.de>
1488
1489         * m68k.h: Fix comment describing operand types.
1490
1491 Sun Nov 23 22:31:27 1997  Michael Meissner  <meissner@cygnus.com>
1492
1493         * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1494         everything else after down.
1495
1496 Tue Nov 18 18:45:14 1997  J"orn Rennecke  <amylaar@cygnus.co.uk>
1497
1498         * d10v.h (OPERAND_FLAG): Split into:
1499         (OPERAND_FFLAG, OPERAND_CFLAG) .
1500
1501 Thu Nov 13 11:04:24 1997  Gavin Koch  <gavin@cygnus.com>
1502
1503         * mips.h (struct mips_opcode): Changed comments to reflect new
1504         field usage.
1505
1506 Fri Oct 24 22:36:20 1997  Ken Raeburn  <raeburn@cygnus.com>
1507
1508         * mips.h: Added to comments a quick-ref list of all assigned
1509         operand type characters.
1510         (OP_{MASK,SH}_PERFREG): New macros.
1511
1512 Wed Oct 22 17:28:33 1997  Richard Henderson  <rth@cygnus.com>
1513
1514         * sparc.h: Add '_' and '/' for v9a asr's.
1515         Patch from David Miller <davem@vger.rutgers.edu>
1516
1517 Tue Oct 14 13:22:29 1997  Jeffrey A Law  (law@cygnus.com)
1518
1519         * h8300.h: Bit ops with absolute addresses not in the 8 bit
1520         area are not available in the base model (H8/300).
1521
1522 Thu Sep 25 13:03:41 1997  Ian Lance Taylor  <ian@cygnus.com>
1523
1524         * m68k.h: Remove documentation of ` operand specifier.
1525
1526 Wed Sep 24 19:00:34 1997  Ian Lance Taylor  <ian@cygnus.com>
1527
1528         * m68k.h: Document q and v operand specifiers.
1529
1530 Mon Sep 15 18:28:37 1997  Nick Clifton  <nickc@cygnus.com>
1531
1532         * v850.h (struct v850_opcode): Add processors field.
1533         (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1534         (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1535         (PROCESSOR_V850EA): New bit constants.
1536
1537 Mon Sep 15 11:29:43 1997  Ken Raeburn  <raeburn@cygnus.com>
1538
1539         Merge changes from Martin Hunt:
1540
1541         * d30v.h: Allow up to 64 control registers. Add
1542         SHORT_A5S format.
1543
1544         * d30v.h (LONG_Db): New form for delayed branches.
1545
1546         * d30v.h: (LONG_Db): New form for repeati.
1547
1548         * d30v.h (SHORT_D2B): New form.
1549
1550         * d30v.h (SHORT_A2): New form.
1551
1552         * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1553         registers are used.  Needed for VLIW optimization.
1554
1555 Mon Sep  8 14:05:45 1997  Doug Evans  <dje@canuck.cygnus.com>
1556
1557         * cgen.h: Move assembler interface section
1558         up so cgen_parse_operand_result is defined for cgen_parse_address.
1559         (cgen_parse_address): Update prototype.
1560
1561 Tue Sep  2 15:32:32 1997  Nick Clifton  <nickc@cygnus.com>
1562
1563         * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1564
1565 Tue Aug 26 12:21:52 1997  Ian Lance Taylor  <ian@cygnus.com>
1566
1567         * i386.h (two_byte_segment_defaults): Correct base register 5 in
1568         modes 1 and 2 to be ss rather than ds.  From Gabriel Paubert
1569         <paubert@iram.es>.
1570
1571         * i386.h: Set ud2 to 0x0f0b.  From Gabriel Paubert
1572         <paubert@iram.es>.
1573
1574         * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1575         <paubert@iram.es>.
1576
1577         * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1578         (JUMP_ON_ECX_ZERO): Remove commented out macro.
1579
1580 Fri Aug 22 10:38:29 1997  Nick Clifton  <nickc@cygnus.com>
1581
1582         * v850.h (V850_NOT_R0): New flag.
1583
1584 Mon Aug 18 11:05:58 1997  Nick Clifton  <nickc@cygnus.com>
1585
1586         * v850.h (struct v850_opcode): Remove flags field.
1587
1588 Wed Aug 13 18:45:48 1997  Nick Clifton  <nickc@cygnus.com>
1589
1590         * v850.h (struct v850_opcode): Add flags field.
1591         (struct v850_operand): Extend meaning of 'bits' and 'shift'
1592         fields.
1593         (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1594         (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1595
1596 Fri Aug  8 16:58:42 1997  Doug Evans  <dje@canuck.cygnus.com>
1597
1598         * arc.h: New file.
1599
1600 Thu Jul 24 21:16:58 1997  Doug Evans  <dje@canuck.cygnus.com>
1601
1602         * sparc.h (sparc_opcodes): Declare as const.
1603
1604 Thu Jul 10 12:53:25 1997  Jeffrey A Law  (law@cygnus.com)
1605
1606         * mips.h (FP_S, FP_D): Define.  Bitmasks indicating if an insn
1607         uses single or double precision floating point resources.
1608         (INSN_NO_ISA, INSN_ISA1): Define.
1609         (cpu specific INSN macros): Tweak into bitmasks outside the range
1610         of INSN_ISA field.
1611
1612 Mon Jun 16 14:10:00 1997  H.J. Lu  <hjl@gnu.ai.mit.edu>
1613
1614         * i386.h: Fix pand opcode.
1615
1616 Mon Jun  2 11:35:09 1997  Gavin Koch  <gavin@cygnus.com>
1617
1618         * mips.h: Widen INSN_ISA and move it to a more convenient
1619         bit position.  Add INSN_3900.
1620
1621 Tue May 20 11:25:29 1997  Gavin Koch  <gavin@cygnus.com>
1622
1623         * mips.h (struct mips_opcode): added new field membership.
1624
1625 Mon May 12 16:26:50 1997  H.J. Lu  <hjl@gnu.ai.mit.edu>
1626
1627         * i386.h (movd): only Reg32 is allowed.
1628
1629         * i386.h: add fcomp and ud2.  From Wayne Scott
1630         <wscott@ichips.intel.com>.
1631
1632 Mon May  5 17:16:21 1997  Ian Lance Taylor  <ian@cygnus.com>
1633
1634         * i386.h: Add MMX instructions.
1635
1636 Mon May  5 12:45:19 1997  H.J. Lu  <hjl@gnu.ai.mit.edu>
1637
1638         * i386.h: Remove W modifier from conditional move instructions.
1639
1640 Mon Apr 14 14:56:58 1997  Ian Lance Taylor  <ian@cygnus.com>
1641
1642         * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1643         with no arguments to match that generated by the UnixWare
1644         assembler.
1645
1646 Thu Apr 10 14:35:00 1997  Doug Evans  <dje@canuck.cygnus.com>
1647
1648         * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1649         (cgen_parse_operand_fn): Declare.
1650         (cgen_init_parse_operand): Declare.
1651         (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1652         new argument `want'.
1653         (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1654         (enum cgen_parse_operand_type): New enum.
1655
1656 Sat Apr  5 13:14:05 1997  Ian Lance Taylor  <ian@cygnus.com>
1657
1658         * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1659
1660 Fri Apr  4 11:46:11 1997  Doug Evans  <dje@canuck.cygnus.com>
1661
1662         * cgen.h: New file.
1663
1664 Fri Apr  4 14:02:32 1997  Ian Lance Taylor  <ian@cygnus.com>
1665
1666         * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1667         fdivrp.
1668
1669 Tue Mar 25 22:57:26 1997  Stu Grossman  (grossman@critters.cygnus.com)
1670
1671         * v850.h (extract):  Make unsigned.
1672
1673 Mon Mar 24 14:38:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1674
1675         * i386.h: Add iclr.
1676
1677 Thu Mar 20 19:49:10 1997  Ian Lance Taylor  <ian@cygnus.com>
1678
1679         * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1680         take a direction bit.
1681
1682 Sat Mar 15 19:03:29 1997  H.J. Lu  <hjl@lucon.org>
1683
1684         * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1685
1686 Fri Mar 14 15:22:01 1997  Ian Lance Taylor  <ian@cygnus.com>
1687
1688         * sparc.h: Include <ansidecl.h>.  Update function declarations to
1689         use prototypes, and to use const when appropriate.
1690
1691 Thu Mar  6 14:18:30 1997  Jeffrey A Law  (law@cygnus.com)
1692
1693         * mn10300.h (MN10300_OPERAND_RELAX): Define.
1694
1695 Mon Feb 24 15:15:56 1997  Martin M. Hunt  <hunt@pizza.cygnus.com>
1696
1697         * d10v.h: Change pre_defined_registers to
1698         d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1699
1700 Sat Feb 22 21:25:00 1997  Dawn Perchik  <dawn@cygnus.com>
1701
1702         * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1703         Change mips_opcodes from const array to a pointer,
1704         and change bfd_mips_num_opcodes from const int to int,
1705         so that we can increase the size of the mips opcodes table
1706         dynamically.
1707
1708 Fri Feb 21 16:34:18 1997  Martin M. Hunt  <hunt@pizza.cygnus.com>
1709
1710         * d30v.h (FLAG_X): Remove unused flag.
1711
1712 Tue Feb 18 17:37:20 1997  Martin M. Hunt  <hunt@pizza.cygnus.com>
1713
1714         * d30v.h: New file.
1715
1716 Fri Feb 14 13:16:15 1997  Fred Fish  <fnf@cygnus.com>
1717
1718         * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1719         (PDS_VALUE): Macro to access value field of predefined symbols.
1720         (tic80_next_predefined_symbol): Add prototype.
1721
1722 Mon Feb 10 10:32:17 1997  Fred Fish  <fnf@cygnus.com>
1723
1724         * tic80.h (tic80_symbol_to_value): Change prototype to match
1725         change in function, added class parameter.
1726
1727 Thu Feb  6 17:30:15 1997  Fred Fish  <fnf@cygnus.com>
1728
1729         * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1730         endmask fields, which are somewhat weird in that 0 and 32 are
1731         treated exactly the same.
1732
1733 Thu Jan 30 13:46:18 1997  Fred Fish  <fnf@cygnus.com>
1734
1735         * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1736         rather than a constant that is 2**X.  Reorder them to put bits for
1737         operands that have symbolic names in the upper bits, so they can
1738         be packed into an int where the lower bits contain the value that
1739         corresponds to that symbolic name.
1740         (predefined_symbo): Add struct.
1741         (tic80_predefined_symbols): Declare array of translations.
1742         (tic80_num_predefined_symbols): Declare size of that array.
1743         (tic80_value_to_symbol): Declare function.
1744         (tic80_symbol_to_value): Declare function.
1745
1746 Wed Jan 29 09:37:25 1997  Jeffrey A Law  (law@cygnus.com)
1747
1748         * mn10200.h (MN10200_OPERAND_RELAX): Define.
1749
1750 Sat Jan 18 15:18:59 1997  Fred Fish  <fnf@cygnus.com>
1751
1752         * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1753         be the destination register.
1754
1755 Thu Jan 16 20:48:55 1997  Fred Fish  <fnf@cygnus.com>
1756
1757         * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1758         (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1759         (TIC80_VECTOR): Define a flag bit for the flags.  This one means
1760         that the opcode can have two vector instructions in a single
1761         32 bit word and we have to encode/decode both.
1762
1763 Tue Jan 14 19:37:09 1997  Fred Fish  <fnf@cygnus.com>
1764
1765         * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1766         TIC80_OPERAND_RELATIVE for PC relative.
1767         (TIC80_OPERAND_BASEREL): New flag bit for register
1768         base relative.
1769
1770 Mon Jan 13 15:56:38 1997  Fred Fish  <fnf@cygnus.com>
1771
1772         * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1773
1774 Mon Jan  6 10:51:15 1997  Fred Fish  <fnf@cygnus.com>
1775
1776         * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1777         ":s" modifier for scaling.
1778
1779 Sun Jan  5 12:12:19 1997  Fred Fish  <fnf@cygnus.com>
1780
1781         * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1782         (TIC80_OPERAND_M_LI): Ditto
1783
1784 Sat Jan  4 19:02:44 1997  Fred Fish  <fnf@cygnus.com>
1785
1786         * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1787         (TIC80_OPERAND_CC): New define for condition code operand.
1788         (TIC80_OPERAND_CR): New define for control register operand.
1789
1790 Fri Jan  3 16:22:23 1997  Fred Fish  <fnf@cygnus.com>
1791
1792         * tic80.h (struct tic80_opcode): Name changed.
1793         (struct tic80_opcode): Remove format field.
1794         (struct tic80_operand): Add insertion and extraction functions.
1795         (TIC80_OPERAND_*): Remove old bogus values, start adding new
1796         correct ones.
1797         (FMT_*): Ditto.
1798
1799 Tue Dec 31 15:05:41 1996  Michael Meissner  <meissner@tiktok.cygnus.com>
1800
1801         * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1802         type IV instruction offsets.
1803
1804 Fri Dec 27 22:23:10 1996  Fred Fish  <fnf@cygnus.com>
1805
1806         * tic80.h: New file.
1807
1808 Wed Dec 18 10:06:31 1996  Jeffrey A Law  (law@cygnus.com)
1809
1810         * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1811
1812 Sat Dec 14 10:48:31 1996  Fred Fish  <fnf@ninemoons.com>
1813
1814         * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1815         * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1816         * v850.h: Fix comment, v850_operand not powerpc_operand.
1817
1818 Mon Dec  9 16:45:39 1996  Jeffrey A Law  (law@cygnus.com)
1819
1820         * mn10200.h: Flesh out structures and definitions needed by
1821         the mn10200 assembler & disassembler.
1822
1823 Tue Nov 26 10:46:56 1996  Ian Lance Taylor  <ian@cygnus.com>
1824
1825         * mips.h: Add mips16 definitions.
1826
1827 Mon Nov 25 17:56:54 1996  J.T. Conklin  <jtc@cygnus.com>
1828
1829         * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1830
1831 Wed Nov 20 10:59:41 1996  Jeffrey A Law  (law@cygnus.com)
1832
1833         * mn10300.h (MN10300_OPERAND_PCREL): Define.
1834         (MN10300_OPERAND_MEMADDR): Define.
1835
1836 Tue Nov 19 13:30:40 1996  Jeffrey A Law  (law@cygnus.com)
1837
1838         * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1839
1840 Wed Nov  6 13:41:08 1996  Jeffrey A Law  (law@cygnus.com)
1841
1842         * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1843
1844 Tue Nov  5 13:26:12 1996  Jeffrey A Law  (law@cygnus.com)
1845
1846         * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1847
1848 Mon Nov  4 12:52:48 1996  Jeffrey A Law  (law@cygnus.com)
1849
1850         * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1851
1852 Fri Nov  1 10:31:02 1996  Richard Henderson  <rth@tamu.edu>
1853
1854         * alpha.h: Don't include "bfd.h"; private relocation types are now
1855         negative to minimize problems with shared libraries.  Organize
1856         instruction subsets by AMASK extensions and PALcode
1857         implementation.
1858         (struct alpha_operand): Move flags slot for better packing.
1859
1860 Tue Oct 29 12:19:10 1996  Jeffrey A Law  (law@cygnus.com)
1861
1862         * v850.h (V850_OPERAND_RELAX): New operand flag.
1863
1864 Thu Oct 10 14:29:11 1996  Jeffrey A Law  (law@cygnus.com)
1865
1866         * mn10300.h (FMT_*): Move operand format definitions
1867         here.
1868
1869 Tue Oct  8 14:48:07 1996  Jeffrey A Law  (law@cygnus.com)
1870
1871         * mn10300.h (MN10300_OPERAND_PAREN): Define.
1872
1873 Mon Oct  7 16:52:11 1996  Jeffrey A Law  (law@cygnus.com)
1874
1875         * mn10300.h (mn10300_opcode): Add "format" field.
1876         (MN10300_OPERAND_*): Define.
1877
1878 Thu Oct  3 10:33:46 1996  Jeffrey A Law  (law@cygnus.com)
1879
1880         * mn10x00.h: Delete.
1881         * mn10200.h, mn10300.h: New files.
1882
1883 Wed Oct  2 21:31:26 1996  Jeffrey A Law  (law@cygnus.com)
1884
1885         * mn10x00.h: New file.
1886
1887 Fri Sep 27 18:26:46 1996  Stu Grossman  (grossman@critters.cygnus.com)
1888
1889         * v850.h:  Add new flag to indicate this instruction uses a PC
1890         displacement.
1891
1892 Fri Sep 13 14:58:13 1996  Jeffrey A Law  (law@cygnus.com)
1893
1894         * h8300.h (stmac): Add missing instruction.
1895
1896 Sat Aug 31 16:02:03 1996  Jeffrey A Law  (law@cygnus.com)
1897
1898         * v850.h (v850_opcode): Remove "size" field.  Add "memop"
1899         field.
1900
1901 Fri Aug 23 10:39:08 1996  Jeffrey A Law  (law@cygnus.com)
1902
1903         * v850.h (V850_OPERAND_EP): Define.
1904
1905         * v850.h (v850_opcode): Add size field.
1906
1907 Thu Aug 22 16:51:25 1996  J.T. Conklin  <jtc@rtl.cygnus.com>
1908
1909         * v850.h (v850_operands): Add insert and extract fields, pointers
1910         to functions used to handle unusual operand encoding.
1911         (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1912         V850_OPERAND_SIGNED): Defined.
1913
1914 Wed Aug 21 17:45:10 1996  J.T. Conklin  <jtc@rtl.cygnus.com>
1915
1916         * v850.h (v850_operands): Add flags field.
1917         (OPERAND_REG, OPERAND_NUM): Defined.
1918
1919 Tue Aug 20 14:52:02 1996  J.T. Conklin  <jtc@rtl.cygnus.com>
1920
1921         * v850.h: New file.
1922
1923 Fri Aug 16 14:44:15 1996  James G. Smith  <jsmith@cygnus.co.uk>
1924
1925         * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1926         OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1927         OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1928         OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1929         OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1930         Defined.
1931
1932 Fri Aug 16 00:15:15 1996  Jeffrey A Law  (law@cygnus.com)
1933
1934         * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1935         a 3 bit space id instead of a 2 bit space id.
1936
1937 Thu Aug 15 13:11:46 1996  Martin M. Hunt  <hunt@pizza.cygnus.com>
1938
1939         * d10v.h: Add some additional defines to support the
1940         assembler in determining which operations can be done in parallel.
1941
1942 Tue Aug  6 11:13:22 1996  Jeffrey A Law  (law@cygnus.com)
1943
1944         * h8300.h (SN): Define.
1945         (eepmov.b): Renamed from "eepmov"
1946         (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1947         with them.
1948
1949 Fri Jul 26 11:47:10 1996  Martin M. Hunt  <hunt@pizza.cygnus.com>
1950
1951         * d10v.h (OPERAND_SHIFT): New operand flag.
1952
1953 Thu Jul 25 12:06:22 1996  Martin M. Hunt  <hunt@pizza.cygnus.com>
1954
1955         * d10v.h: Changes for divs, parallel-only instructions, and
1956         signed numbers.
1957
1958 Mon Jul 22 11:21:15 1996  Martin M. Hunt  <hunt@pizza.cygnus.com>
1959
1960         * d10v.h (pd_reg): Define. Putting the definition here allows
1961         the assembler and disassembler to share the same struct.
1962
1963 Mon Jul 22 12:15:25 1996  Ian Lance Taylor  <ian@cygnus.com>
1964
1965         * i960.h (i960_opcodes): "halt" takes an argument.  From Stephen
1966         Williams <steve@icarus.com>.
1967
1968 Wed Jul 17 14:46:38 1996  Martin M. Hunt  <hunt@pizza.cygnus.com>
1969
1970         * d10v.h: New file.
1971
1972 Thu Jul 11 12:09:15 1996  Jeffrey A Law  (law@cygnus.com)
1973
1974         * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1975
1976 Wed Jul  3 14:30:12 1996  J.T. Conklin  <jtc@rtl.cygnus.com>
1977
1978         * m68k.h (mcf5200): New macro.
1979         Document names of coldfire control registers.
1980
1981 Tue Jul  2 23:05:45 1996  Jeffrey A Law  (law@cygnus.com)
1982
1983         * h8300.h (SRC_IN_DST): Define.
1984
1985         * h8300.h (UNOP3): Mark the register operand in this insn
1986         as a source operand, not a destination operand.
1987         (SHIFT_2, SHIFT_IMM): Remove.  Eliminate all references.
1988         (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops.  Mark
1989         register operand with SRC_IN_DST.
1990
1991 Fri Jun 21 13:52:17 1996  Richard Henderson  <rth@tamu.edu>
1992
1993         * alpha.h: New file.
1994
1995 Thu Jun 20 15:02:57 1996  Ian Lance Taylor  <ian@cygnus.com>
1996
1997         * rs6k.h: Remove obsolete file.
1998
1999 Wed Jun 19 15:29:38 1996  Ian Lance Taylor  <ian@cygnus.com>
2000
2001         * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2002         fdivp, and fdivrp.  Add ffreep.
2003
2004 Tue Jun 18 16:06:00 1996  Jeffrey A. Law  <law@rtl.cygnus.com>
2005
2006         * h8300.h: Reorder various #defines for readability.
2007         (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2008         (BITOP): Accept additional (unused) argument.  All callers changed.
2009         (EBITOP): Likewise.
2010         (O_LAST): Bump.
2011         (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2012
2013         * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2014         (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2015         (BITOP, EBITOP): Handle new H8/S addressing modes for
2016         bit insns.
2017         (UNOP3): Handle new shift/rotate insns on the H8/S.
2018         (insns using exr): New instructions.
2019         (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2020
2021 Thu May 23 16:56:48 1996  Jeffrey A Law  (law@cygnus.com)
2022
2023         * h8300.h (add.l): Undo Apr 5th change.  The manual I had
2024         was incorrect.
2025
2026 Mon May  6 23:38:22 1996  Jeffrey A Law  (law@cygnus.com)
2027
2028         * h8300.h (START): Remove.
2029         (MEMRELAX): Define.  Mark absolute memory operands in mov.b, mov.w
2030         and mov.l insns that can be relaxed.
2031
2032 Tue Apr 30 18:30:58 1996  Ian Lance Taylor  <ian@cygnus.com>
2033
2034         * i386.h: Remove Abs32 from lcall.
2035
2036 Mon Apr 22 17:09:23 1996  Doug Evans  <dje@blues.cygnus.com>
2037
2038         * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2039         (SLCPOP): New macro.
2040         Mark X,Y opcode letters as in use.
2041
2042 Thu Apr 11 17:28:18 1996  Ian Lance Taylor  <ian@cygnus.com>
2043
2044         * sparc.h (F_FLOAT, F_FBR): Define.
2045
2046 Fri Apr  5 16:55:34 1996  Jeffrey A Law  (law@cygnus.com)
2047
2048         * h8300.h (ABS8MEM): Renamed from ABSMOV.  Remove ABSMOV
2049         from all insns.
2050         (ABS8SRC,ABS8DST): Add ABS8MEM.
2051         (add.l): Fix reg+reg variant.
2052         (eepmov.w): Renamed from eepmovw.
2053         (ldc,stc): Fix many cases.
2054
2055 Sun Mar 31 13:30:03 1996  Doug Evans  <dje@canuck.cygnus.com>
2056
2057         * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2058
2059 Thu Mar  7 15:08:23 1996  Doug Evans  <dje@charmed.cygnus.com>
2060
2061         * sparc.h (O): Mark operand letter as in use.
2062
2063 Tue Feb 20 20:46:21 1996  Doug Evans  <dje@charmed.cygnus.com>
2064
2065         * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2066         Mark operand letters uU as in use.
2067
2068 Mon Feb 19 01:59:08 1996  Doug Evans  <dje@charmed.cygnus.com>
2069
2070         * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2071         (sparc_opcode_arch): Delete member `conflicts'.  Add `supported'.
2072         (SPARC_OPCODE_SUPPORTED): New macro.
2073         (SPARC_OPCODE_CONFLICT_P): Rewrite.
2074         (F_NOTV9): Delete.
2075
2076 Fri Feb 16 12:23:34 1996  Jeffrey A Law  (law@cygnus.com)
2077
2078         * sparc.h (sparc_opcode_lookup_arch) Make return type in
2079         declaration consistent with return type in definition.
2080
2081 Wed Feb 14 18:14:11 1996  Alan Modra  <alan@spri.levels.unisa.edu.au>
2082
2083         * i386.h (i386_optab): Remove Data32 from pushf and popf.
2084
2085 Thu Feb  8 14:27:21 1996  James Carlson <carlson@xylogics.com>
2086
2087         * i386.h (i386_regtab): Add 80486 test registers.
2088
2089 Mon Feb  5 18:35:46 1996  Ian Lance Taylor  <ian@cygnus.com>
2090
2091         * i960.h (I_HX): Define.
2092         (i960_opcodes): Add HX instruction.
2093
2094 Mon Jan 29 12:43:39 1996  Ken Raeburn  <raeburn@cygnus.com>
2095
2096         * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2097         and fclex.
2098
2099 Wed Jan 24 22:36:59 1996  Doug Evans  <dje@charmed.cygnus.com>
2100
2101         * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2102         (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2103         (bfd_* defines): Delete.
2104         (sparc_opcode_archs): Replaces architecture_pname.
2105         (sparc_opcode_lookup_arch): Declare.
2106         (NUMOPCODES): Delete.
2107
2108 Mon Jan 22 08:24:32 1996  Doug Evans  <dje@charmed.cygnus.com>
2109
2110         * sparc.h (enum sparc_architecture): Add v9a.
2111         (ARCHITECTURES_CONFLICT_P): Update.
2112
2113 Thu Dec 28 13:27:53 1995  John Hassey  <hassey@rtp.dg.com>
2114
2115         * i386.h: Added Pentium Pro instructions.
2116
2117 Thu Nov  2 22:59:22 1995  Ian Lance Taylor  <ian@cygnus.com>
2118
2119         * m68k.h: Document new 'W' operand place.
2120
2121 Tue Oct 24 10:49:10 1995  Jeffrey A Law  (law@cygnus.com)
2122
2123         * hppa.h: Add lci and syncdma instructions.
2124
2125 Mon Oct 23 11:09:16 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
2126
2127         * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
2128         instructions.
2129
2130 Mon Oct 16 10:28:15 1995  Michael Meissner  <meissner@tiktok.cygnus.com>
2131
2132         * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2133         assembler's -mcom and -many switches.
2134
2135 Wed Oct 11 16:56:33 1995  Ken Raeburn  <raeburn@cygnus.com>
2136
2137         * i386.h: Fix cmpxchg8b extension opcode description.
2138
2139 Thu Oct  5 18:03:36 1995  Ken Raeburn  <raeburn@cygnus.com>
2140
2141         * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2142         and register cr4.
2143
2144 Tue Sep 19 15:26:43 1995  Ian Lance Taylor  <ian@cygnus.com>
2145
2146         * m68k.h: Change comment: split type P into types 0, 1 and 2.
2147
2148 Wed Aug 30 13:50:55 1995  Doug Evans  <dje@canuck.cygnus.com>
2149
2150         * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2151
2152 Tue Aug 29 15:34:58 1995  Doug Evans  <dje@canuck.cygnus.com>
2153
2154         * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2155
2156 Wed Aug  2 18:32:19 1995  Ian Lance Taylor  <ian@cygnus.com>
2157
2158         * m68kmri.h: Remove.
2159
2160         * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2161         declarations.  Remove F_ALIAS and flag field of struct
2162         m68k_opcode.  Change arch field of struct m68k_opcode to unsigned
2163         int.  Make name and args fields of struct m68k_opcode const.
2164
2165 Wed Aug  2 08:16:46 1995  Doug Evans  <dje@canuck.cygnus.com>
2166
2167         * sparc.h (F_NOTV9): Define.
2168
2169 Tue Jul 11 14:20:42 1995  Jeff Spiegel  <jeffs@lsil.com>
2170
2171         * mips.h (INSN_4010): Define.
2172
2173 Wed Jun 21 18:49:51 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
2174
2175         * m68k.h (TBL1): Reverse sense of "round" argument in result.
2176
2177         Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2178         * m68k.h: Fix argument descriptions of coprocessor
2179         instructions to allow only alterable operands where appropriate.
2180         [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2181         (m68k_opcode_aliases): Add more aliases.
2182
2183 Fri Apr 14 22:15:34 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
2184
2185         * m68k.h: Added explcitly short-sized conditional branches, and a
2186         bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2187         svr4-based configurations.
2188
2189 Mon Mar 13 21:30:01 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
2190
2191         Mon Feb 27 08:36:39 1995  Bryan Ford  <baford@cs.utah.edu>
2192         * i386.h: added missing Data16/Data32 flags to a few instructions.
2193
2194 Wed Mar  8 15:19:53 1995  Ian Lance Taylor  <ian@cygnus.com>
2195
2196         * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2197         (OP_MASK_BCC, OP_SH_BCC): Define.
2198         (OP_MASK_PREFX, OP_SH_PREFX): Define.
2199         (OP_MASK_CCC, OP_SH_CCC): Define.
2200         (INSN_READ_FPR_R): Define.
2201         (INSN_RFE): Delete.
2202
2203 Wed Mar  8 03:13:23 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
2204
2205         * m68k.h (enum m68k_architecture): Deleted.
2206         (struct m68k_opcode_alias): New type.
2207         (m68k_opcodes): Now const.  Deleted opcode aliases with exactly
2208         matching constraints, values and flags.  As a side effect of this,
2209         the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2210         as I know were never used, now may need re-examining.
2211         (numopcodes): Now const.
2212         (m68k_opcode_aliases, numaliases): New variables.
2213         (endop): Deleted.
2214         [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2215         m68k_opcode_aliases; update declaration of m68k_opcodes.
2216
2217 Mon Mar  6 10:02:00 1995  Jeff Law  (law@snake.cs.utah.edu)
2218
2219         * hppa.h (delay_type): Delete unused enumeration.
2220         (pa_opcode): Replace unused delayed field with an architecture
2221         field.
2222         (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2223
2224 Fri Mar  3 16:10:24 1995  Ian Lance Taylor  <ian@cygnus.com>
2225
2226         * mips.h (INSN_ISA4): Define.
2227
2228 Fri Feb 24 19:13:37 1995  Ian Lance Taylor  <ian@cygnus.com>
2229
2230         * mips.h (M_DLA_AB, M_DLI): Define.
2231
2232 Thu Feb 23 17:33:09 1995  Jeff Law  (law@snake.cs.utah.edu)
2233
2234         * hppa.h (fstwx): Fix single-bit error.
2235
2236 Wed Feb 15 12:19:52 1995  Ian Lance Taylor  <ian@cygnus.com>
2237
2238         * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2239
2240 Mon Feb  6 10:35:23 1995  J.T. Conklin  <jtc@rtl.cygnus.com>
2241
2242         * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2243           debug registers.  From Charles Hannum (mycroft@netbsd.org).
2244
2245 Mon Feb  6 03:31:54 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
2246
2247         Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2248         i386 support:
2249         * i386.h (MOV_AX_DISP32): New macro.
2250         (i386_optab): Added Data16 and Data32 as needed.  Added "w" forms
2251         of several call/return instructions.
2252         (ADDR_PREFIX_OPCODE): New macro.
2253
2254 Mon Jan 23 16:45:43 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
2255
2256         Sat Jan 21 17:50:38 1995  Pat Rankin  (rankin@eql.caltech.edu)
2257
2258         * vax.h (struct vot_wot, field `args'):  Make it pointer to const
2259         char.
2260         (struct vot, field `name'):  ditto.
2261
2262 Thu Jan 19 14:47:53 1995  Ken Raeburn  <raeburn@cujo.cygnus.com>
2263
2264         * vax.h: Supply and properly group all values in end sentinel.
2265
2266 Tue Jan 17 10:55:30 1995  Ian Lance Taylor  <ian@sanguine.cygnus.com>
2267
2268         * mips.h (INSN_ISA, INSN_4650): Define.
2269
2270 Wed Oct 19 13:34:17 1994  Ian Lance Taylor  <ian@sanguine.cygnus.com>
2271
2272         * a29k.h: Add operand type 'I' for `inv' and `iretinv'.  On
2273         systems with a separate instruction and data cache, such as the
2274         29040, these instructions take an optional argument.
2275
2276 Wed Sep 14 17:44:20 1994  Ian Lance Taylor  (ian@sanguine.cygnus.com)
2277
2278         * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2279         INSN_TRAP.
2280
2281 Tue Sep  6 11:39:08 1994  Ian Lance Taylor  (ian@sanguine.cygnus.com)
2282
2283         * mips.h (INSN_STORE_MEMORY): Define.
2284
2285 Thu Jul 28 19:28:07 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2286
2287         * sparc.h: Document new operand type 'x'.
2288
2289 Tue Jul 26 17:48:05 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2290
2291         * i960.h (I_CX2): New instruction category.  It includes
2292         instructions available on Cx and Jx processors.
2293         (I_JX): New instruction category, for JX-only instructions.
2294         (i960_opcodes): Put eshro and sysctl in I_CX2 category.  Added
2295         Jx-only instructions, in I_JX category.
2296
2297 Wed Jul 13 18:43:47 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2298
2299         * ns32k.h (endop): Made pointer const too.
2300
2301 Sun Jul 10 11:01:09 1994  Ian Dall  (dall@hfrd.dsto.gov.au)
2302
2303         * ns32k.h: Drop Q operand type as there is no correct use
2304         for it. Add I and Z operand types which allow better checking.
2305
2306 Thu Jul  7 12:34:48 1994  Steve Chamberlain  (sac@jonny.cygnus.com)
2307
2308         * h8300.h (xor.l) :fix bit pattern.
2309         (L_2): New size of operand.
2310         (trapa): Use it.
2311
2312 Fri Jun 10 16:38:11 1994  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2313
2314         * m68k.h: Move "trap" before "tpcc" to change disassembly.
2315
2316 Fri Jun  3 15:57:36 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2317
2318         * sparc.h: Include v9 definitions.
2319
2320 Thu Jun  2 12:23:17 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2321
2322         * m68k.h (m68060): Defined.
2323         (m68040up, mfloat, mmmu): Include it.
2324         (struct m68k_opcode): Widen `arch' field.
2325         (m68k_opcodes): Updated for M68060.  Removed comments that were
2326         instructions commented out by "JF" years ago.
2327
2328 Thu Apr 28 18:31:14 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2329
2330         * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2331         add a one-bit `flags' field.
2332         (F_ALIAS): New macro.
2333
2334 Wed Apr 27 11:29:52 1994  Steve Chamberlain  (sac@cygnus.com)
2335
2336         * h8300.h (dec, inc): Get encoding right.
2337
2338 Mon Apr  4 13:12:43 1994  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2339
2340         * ppc.h (struct powerpc_operand): Removed signedp field; just use
2341         a flag instead.
2342         (PPC_OPERAND_SIGNED): Define.
2343         (PPC_OPERAND_SIGNOPT): Define.
2344
2345 Thu Mar 31 19:34:08 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2346
2347         * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2348         prefix is 0x66, not 0x67.  Patch from H.J. Lu (hlu@nynexst.com).
2349
2350 Thu Mar  3 15:51:05 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2351
2352         * i386.h: Reverse last change.  It'll be handled in gas instead.
2353
2354 Thu Feb 24 15:29:05 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
2355
2356         * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2357         slower on the 486 and used the implicit shift count despite the
2358         explicit operand.  The one-operand form is still available to get
2359         the shorter form with the implicit shift count.
2360
2361 Thu Feb 17 12:27:52 1994  Torbjorn Granlund  (tege@mexican.cygnus.com)
2362
2363         * hppa.h: Fix typo in fstws arg string.
2364
2365 Wed Feb  9 21:23:52 1994  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2366
2367         * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2368
2369 Mon Feb  7 19:14:58 1994  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2370
2371         * ppc.h (PPC_OPCODE_601): Define.
2372
2373 Fri Feb  4 23:43:50 1994  Jeffrey A. Law  (law@snake.cs.utah.edu)
2374
2375         * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2376         (so we can determine valid completers for both addb and addb[tf].)
2377
2378         * hppa.h (xmpyu): No floating point format specifier for the
2379         xmpyu instruction.
2380
2381 Fri Feb  4 23:36:52 1994  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2382
2383         * ppc.h (PPC_OPERAND_NEXT): Define.
2384         (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2385         (struct powerpc_macro): Define.
2386         (powerpc_macros, powerpc_num_macros): Declare.
2387
2388 Fri Jan 21 19:13:50 1994  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2389
2390         * ppc.h: New file.  Header file for PowerPC opcode table.
2391
2392 Mon Jan 17 00:14:23 1994  Jeffrey A. Law  (law@snake.cs.utah.edu)
2393
2394         * hppa.h: More minor template fixes for sfu and copr (to allow
2395         for easier disassembly).
2396
2397         * hppa.h: Fix templates for all the sfu and copr instructions.
2398
2399 Wed Dec 15 15:12:42 1993  Ken Raeburn  (raeburn@cujo.cygnus.com)
2400
2401         * i386.h (push): Permit Imm16 operand too.
2402
2403 Sat Dec 11 16:14:06 1993  Steve Chamberlain  (sac@thepub.cygnus.com)
2404
2405         *  h8300.h (andc): Exists in base arch.
2406
2407 Wed Dec  1 12:15:32 1993  Jeffrey A. Law  (law@snake.cs.utah.edu)
2408
2409         * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2410         * hppa.h: #undef NONE to avoid conflict with hiux include files.
2411
2412 Sun Nov 21 22:06:57 1993  Jeffrey A. Law  (law@snake.cs.utah.edu)
2413
2414         * hppa.h: Add FP quadword store instructions.
2415
2416 Wed Nov 17 17:13:16 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2417
2418         * mips.h: (M_J_A): Added.
2419         (M_LA): Removed.
2420
2421 Mon Nov  8 12:12:47 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2422
2423         * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define.  From Ted Lemon
2424         <mellon@pepper.ncd.com>.
2425
2426 Sun Nov  7 00:30:11 1993  Jeffrey A. Law  (law@snake.cs.utah.edu)
2427
2428         * hppa.h: Immediate field in probei instructions is unsigned,
2429         not low-sign extended.
2430
2431 Wed Nov  3 10:30:00 1993  Jim Kingdon  (kingdon@lioth.cygnus.com)
2432
2433         * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2434
2435 Tue Nov  2 12:41:30 1993  Ken Raeburn  (raeburn@rover.cygnus.com)
2436
2437         * i386.h: Add "fxch" without operand.
2438
2439 Mon Nov  1 18:13:03 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2440
2441         * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2442
2443 Sat Oct  2 22:26:11 1993  Jeffrey A Law  (law@snake.cs.utah.edu)
2444
2445         * hppa.h: Add gfw and gfr to the opcode table.
2446
2447 Wed Sep 29 16:23:00 1993  K. Richard Pixley  (rich@sendai.cygnus.com)
2448
2449         * m88k.h: extended to handle m88110.
2450
2451 Tue Sep 28 19:19:08 1993  Jeffrey A Law  (law@snake.cs.utah.edu)
2452
2453         * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2454         addresses.
2455
2456 Tue Sep 14 14:04:35 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2457
2458         * i960.h (i960_opcodes): Properly bracket initializers.
2459
2460 Mon Sep 13 12:50:52 1993  K. Richard Pixley  (rich@sendai.cygnus.com)
2461
2462         * m88k.h (BOFLAG): rewrite to avoid nested comment.
2463
2464 Mon Sep 13 15:46:06 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2465
2466         * m68k.h (two): Protect second argument with parentheses.
2467
2468 Fri Sep 10 16:29:47 1993  Ken Raeburn  (raeburn@cambridge.cygnus.com)
2469
2470         * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2471         Deleted old in/out instructions in "#if 0" section.
2472
2473 Thu Sep  9 17:42:19 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2474
2475         * i386.h (i386_optab): Properly bracket initializers.
2476
2477 Wed Aug 25 13:50:56 1993  Ken Raeburn  (raeburn@cambridge.cygnus.com)
2478
2479         * hppa.h (pa_opcode): Use '|' for movb and movib insns.  (From
2480         Jeff Law, law@cs.utah.edu).
2481
2482 Mon Aug 23 16:55:03 1993  Ken Raeburn  (raeburn@cambridge.cygnus.com)
2483
2484         * i386.h (lcall): Accept Imm32 operand also.
2485
2486 Mon Aug 23 12:43:11 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2487
2488         * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2489         (M_DABS): Added.
2490
2491 Thu Aug 19 15:08:37 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2492
2493         * mips.h (INSN_*): Changed values.  Removed unused definitions.
2494         Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3.  Split
2495         INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2496         INSN_LOAD_COPROC_DELAY.  Split INSN_COPROC_DELAY into
2497         INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2498         (M_*): Added new values for r6000 and r4000 macros.
2499         (ANY_DELAY): Removed.
2500
2501 Wed Aug 18 15:37:48 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2502
2503         * mips.h: Added M_LI_S and M_LI_SS.
2504
2505 Tue Aug 17 07:08:08 1993  Steve Chamberlain  (sac@phydeaux.cygnus.com)
2506
2507         * h8300.h: Get some rare mov.bs correct.
2508
2509 Thu Aug  5 09:15:17 1993  Jim Kingdon  (kingdon@lioth.cygnus.com)
2510
2511         * sparc.h: Don't define const ourself; rely on ansidecl.h having
2512         been included.
2513
2514 Fri Jul 30 18:41:11 1993  John Gilmore  (gnu@cygnus.com)
2515
2516         * sparc.h (F_JSR, F_UNBR, F_CONDBR):  Add new flags to mark
2517         jump instructions, for use in disassemblers.
2518
2519 Thu Jul 22 07:25:27 1993  Ian Lance Taylor  (ian@cygnus.com)
2520
2521         * m88k.h: Make bitfields just unsigned, not unsigned long or
2522         unsigned short.
2523
2524 Wed Jul 21 11:55:31 1993  Jim Kingdon  (kingdon@deneb.cygnus.com)
2525
2526         * hppa.h: New argument type 'y'.  Use in various float instructions.
2527
2528 Mon Jul 19 17:17:03 1993  Jim Kingdon  (kingdon@deneb.cygnus.com)
2529
2530         * hppa.h (break): First immediate field is unsigned.
2531
2532         * hppa.h: Add rfir instruction.
2533
2534 Sun Jul 18 16:28:08 1993  Jim Kingdon  (kingdon@rtl.cygnus.com)
2535
2536         * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2537
2538 Fri Jul 16 09:59:29 1993  Ian Lance Taylor  (ian@cygnus.com)
2539
2540         * mips.h: Reworked the hazard information somewhat, and fixed some
2541         bugs in the instruction hazard descriptions.
2542
2543 Thu Jul 15 12:42:01 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2544
2545         * m88k.h: Corrected a couple of opcodes.
2546
2547 Tue Jul  6 15:17:35 1993  Ian Lance Taylor  (ian@cygnus.com)
2548
2549         * mips.h: Replaced with version from Ralph Campbell and OSF.  The
2550         new version includes instruction hazard information, but is
2551         otherwise reasonably similar.
2552
2553 Thu Jul  1 20:36:17 1993  Doug Evans  (dje@canuck.cygnus.com)
2554
2555         * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2556
2557 Fri Jun 11 18:38:44 1993  Ken Raeburn  (raeburn@cygnus.com)
2558
2559         Patches from Jeff Law, law@cs.utah.edu:
2560         * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2561         Make the tables be the same for the following instructions:
2562         "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2563         "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2564         "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2565         "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2566         "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2567         "fcmp", and "ftest".
2568
2569         * hppa.h: Make new and old tables the same for "break", "mtctl",
2570         "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2571         Fix typo in last patch.  Collapse several #ifdefs into a
2572         single #ifdef.
2573
2574         * hppa.h: Delete remaining OLD_TABLE code.  Bring some
2575         of the comments up-to-date.
2576
2577         * hppa.h: Update "free list" of letters and update
2578         comments describing each letter's function.
2579
2580 Thu Jul  8 09:05:26 1993  Doug Evans  (dje@canuck.cygnus.com)
2581
2582         * h8300.h: Lots of little fixes for the h8/300h.
2583
2584 Tue Jun  8 12:16:03 1993  Steve Chamberlain  (sac@phydeaux.cygnus.com)
2585
2586          Support for H8/300-H
2587         * h8300.h: Lots of new opcodes.
2588
2589 Fri Jun  4 15:41:37 1993  Steve Chamberlain  (sac@phydeaux.cygnus.com)
2590
2591         * h8300.h: checkpoint, includes H8/300-H opcodes.
2592
2593 Thu Jun  3 15:42:59 1993  Stu Grossman  (grossman@cygnus.com)
2594
2595         * Patches from Jeffrey Law <law@cs.utah.edu>.
2596         * hppa.h: Rework single precision FP
2597         instructions so that they correctly disassemble code
2598         PA1.1 code.
2599
2600 Thu May 27 19:21:22 1993  Bruce Bauman  (boot@osf.org)
2601
2602         * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2603         mov to allow instructions like mov ss,xyz(ecx) to assemble.
2604
2605 Tue May 25 00:39:40 1993  Ken Raeburn  (raeburn@cygnus.com)
2606
2607         * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2608         gdb will define it for now.
2609
2610 Mon May 24 15:20:06 1993  Ken Raeburn  (raeburn@cambridge.cygnus.com)
2611
2612         * sparc.h: Don't end enumerator list with comma.
2613
2614 Fri May 14 15:15:50 1993  Ian Lance Taylor  (ian@cygnus.com)
2615
2616         * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2617         * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2618         ("bc2t"): Correct typo.
2619         ("[ls]wc[023]"): Use T rather than t.
2620         ("c[0123]"): Define general coprocessor instructions.
2621
2622 Mon May 10 06:02:25 1993  Ken Raeburn  (raeburn@kr-pc.cygnus.com)
2623
2624         * m68k.h: Move split point for gcc compilation more towards
2625         middle.
2626
2627 Fri Apr  9 13:26:16 1993  Jim Kingdon  (kingdon@cygnus.com)
2628
2629         * rs6k.h: Clean up instructions for primary opcode 19 (many were
2630         simply wrong, ics, rfi, & rfsvc were missing).
2631         Add "a" to opr_ext for "bb".  Doc fix.
2632
2633 Thu Mar 18 13:45:31 1993  Per Bothner  (bothner@rtl.cygnus.com)
2634
2635         * i386.h:  486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2636         * mips.h:  Add casts, to suppress warnings about shifting too much.
2637         * m68k.h:  Document the placement code '9'.
2638
2639 Thu Feb 18 02:03:14 1993  John Gilmore  (gnu@cygnus.com)
2640
2641         * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART):  Add kludge which
2642         allows callers to break up the large initialized struct full of
2643         opcodes into two half-sized ones.  This permits GCC to compile
2644         this module, since it takes exponential space for initializers.
2645         (numopcodes, endop):  Revise to use AND_OTHER_PART in size calcs.
2646
2647 Thu Feb  4 02:06:56 1993  John Gilmore  (gnu@cygnus.com)
2648
2649         * a29k.h:  Remove RCS crud, update GPL to v2, update copyrights.
2650         * convex.h:  Added, from GDB's convx-opcode.h.  Added CONST to all
2651         initialized structs in it.
2652
2653 Thu Jan 28 21:32:22 1993  John Gilmore  (gnu@cygnus.com)
2654
2655         Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2656         * m88k.h (PMEM):  Avoid previous definition from <sys/param.h>.
2657         (AND):  Change to AND_ to avoid ansidecl.h `AND' conflict.
2658
2659 Sat Jan 23 18:10:49 PST 1993  Ralph Campbell  (ralphc@pyramid.com)
2660
2661         * mips.h: document "i" and "j" operands correctly.
2662
2663 Thu Jan  7 15:58:13 1993  Ian Lance Taylor  (ian@tweedledumb.cygnus.com)
2664
2665         * mips.h: Removed endianness dependency.
2666
2667 Sun Jan  3 14:13:35 1993  Steve Chamberlain  (sac@thepub.cygnus.com)
2668
2669         * h8300.h: include info on number of cycles per instruction.
2670
2671 Mon Dec 21 21:29:08 1992  Stu Grossman  (grossman at cygnus.com)
2672
2673         * hppa.h:  Move handy aliases to the front.  Fix masks for extract
2674         and deposit instructions.
2675
2676 Sat Dec 12 16:09:48 1992  Ian Lance Taylor  (ian@cygnus.com)
2677
2678         * i386.h: accept shld and shrd both with and without the shift
2679         count argument, which is always %cl.
2680
2681 Fri Nov 27 17:13:18 1992  Ken Raeburn  (raeburn at cygnus.com)
2682
2683         * i386.h (i386_optab_end, i386_regtab_end): Now const.
2684         (one_byte_segment_defaults, two_byte_segment_defaults,
2685         i386_prefixtab_end): Ditto.
2686
2687 Mon Nov 23 10:47:25 1992  Ken Raeburn  (raeburn@cygnus.com)
2688
2689         * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2690         for operand 2; from John Carr, jfc@dsg.dec.com.
2691
2692 Wed Nov  4 07:36:49 1992  Ken Raeburn  (raeburn@cygnus.com)
2693
2694         * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2695         always use 16-bit offsets.  Makes calculated-size jump tables
2696         feasible.
2697
2698 Fri Oct 16 22:52:43 1992  Ken Raeburn  (raeburn@cygnus.com)
2699
2700         * i386.h: Fix one-operand forms of in* and out* patterns.
2701
2702 Tue Sep 22 14:08:14 1992  Ken Raeburn  (raeburn@cambridge.cygnus.com)
2703
2704         * m68k.h: Added CPU32 support.
2705
2706 Tue Sep 22 00:38:41 1992  John Gilmore  (gnu@cygnus.com)
2707
2708         * mips.h (break):  Disassemble the argument.  Patch from
2709         jonathan@cs.stanford.edu (Jonathan Stone).
2710
2711 Wed Sep  9 11:25:28 1992  Ian Lance Taylor  (ian@cygnus.com)
2712
2713         * m68k.h: merged Motorola and MIT syntax.
2714
2715 Thu Sep  3 09:33:22 1992  Steve Chamberlain  (sac@thepub.cygnus.com)
2716
2717         * m68k.h (pmove): make the tests less strict, the 68k book is
2718         wrong.
2719
2720 Tue Aug 25 23:25:19 1992  Ken Raeburn  (raeburn@cambridge.cygnus.com)
2721
2722         * m68k.h (m68ec030): Defined as alias for 68030.
2723         (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2724         for immediate 0-7 added.  Set up some opcodes (ptest, bkpt) to use
2725         them.  Tightened description of "fmovex" to distinguish it from
2726         some "pmove" encodings.  Added "pmove" for 68030 MMU regs, cleaned
2727         up descriptions that claimed versions were available for chips not
2728         supporting them.  Added "pmovefd".
2729
2730 Mon Aug 24 12:04:51 1992  Steve Chamberlain  (sac@thepub.cygnus.com)
2731
2732         * m68k.h: fix where the . goes in divull
2733
2734 Wed Aug 19 11:22:24 1992  Ian Lance Taylor  (ian@cygnus.com)
2735
2736         * m68k.h: the cas2 instruction is supposed to be written with
2737         indirection on the last two operands, which can be either data or
2738         address registers.  Added a new operand type 'r' which accepts
2739         either register type.  Added new cases for cas2l and cas2w which
2740         use them.  Corrected masks for cas2 which failed to recognize use
2741         of address register.
2742
2743 Fri Aug 14 14:20:38 1992  Per Bothner  (bothner@cygnus.com)
2744
2745         * m68k.h:  Merged in patches (mostly m68040-specific) from
2746         Colin Smith <colin@wrs.com>.
2747
2748         * m68k.h:  Merged m68kmri.h and m68k.h (using the former as a
2749         base).  Also cleaned up duplicates, re-ordered instructions for
2750         the sake of dis-assembling (so aliases come after standard names).
2751         * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2752
2753 Wed Aug 12 16:38:15 1992  Steve Chamberlain  (sac@thepub.cygnus.com)
2754
2755         * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2756         all missing .s
2757
2758 Mon Aug 10 23:22:33 1992  Ken Raeburn  (raeburn@cygnus.com)
2759
2760         * sparc.h: Moved tables to BFD library.
2761
2762         * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2763
2764 Sun Jun 28 13:29:03 1992  Fred Fish  (fnf@cygnus.com)
2765
2766         * h8300.h:  Finish filling in all the holes in the opcode table,
2767         so that the Lucid C compiler can digest this as well...
2768
2769 Fri Jun 26 21:27:17 1992  John Gilmore  (gnu at cygnus.com)
2770
2771         * i386.h:  Add setc, setnc, addr16, data16, repz, repnz aliases.
2772         Fix opcodes on various sizes of fild/fist instructions
2773         (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2774         Use tabs to indent for comments.  Fixes suggested by Minh Tran-Le.
2775
2776 Thu Jun 25 16:13:26 1992  Stu Grossman  (grossman at cygnus.com)
2777
2778         * h8300.h:  Fill in all the holes in the opcode table so that the
2779         losing HPUX C compiler can digest this...
2780
2781 Thu Jun 11 12:15:25 1992  John Gilmore  (gnu at cygnus.com)
2782
2783         * mips.h:  Fix decoding of coprocessor instructions, somewhat.
2784         (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2785
2786 Thu May 28 11:17:44 1992  Jim Wilson  (wilson@sphagnum.cygnus.com)
2787
2788         * sparc.h: Add new architecture variant sparclite; add its scan
2789         and divscc opcodes.  Define ARCHITECTURES_CONFLICT_P macro.
2790
2791 Tue May  5 14:23:27 1992  Per Bothner  (bothner@rtl.cygnus.com)
2792
2793         * mips.h:  Add some more opcode synonyms (from Frank Yellin,
2794         fy@lucid.com).
2795
2796 Thu Apr 16 18:25:26 1992  Per Bothner  (bothner@cygnus.com)
2797
2798         * rs6k.h:  New version from IBM (Metin).
2799
2800 Thu Apr  9 00:31:19 1992  Per Bothner  (bothner@rtl.cygnus.com)
2801
2802         * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2803         and `fd'.  (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2804
2805 Tue Apr  7 13:38:47 1992  Stu Grossman  (grossman at cygnus.com)
2806
2807         * rs6k.h:  Move from ../../gdb/rs6k-opcode.h.
2808
2809 Fri Apr  3 11:30:20 1992  Fred Fish  (fnf@cygnus.com)
2810
2811         * m68k.h (one, two):  Cast macro args to unsigned to suppress
2812         complaints from compiler and lint about integer overflow during
2813         shift.
2814
2815 Sun Mar 29 12:22:08 1992  John Gilmore  (gnu at cygnus.com)
2816
2817         * sparc.h (OP):  Avoid signed overflow when shifting to high order bit.
2818
2819 Fri Mar  6 00:22:38 1992  John Gilmore  (gnu at cygnus.com)
2820
2821         * mips.h:  Make bitfield layout depend on the HOST compiler,
2822         not on the TARGET system.
2823
2824 Fri Feb 21 01:29:51 1992  K. Richard Pixley  (rich@cygnus.com)
2825
2826         * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2827           scmp, slod, smov, ssca, ssto.  Curtesy Minh Tran-Le
2828           <TRANLE@INTELLICORP.COM>.
2829
2830 Thu Jan 30 07:31:44 1992  Steve Chamberlain  (sac at rtl.cygnus.com)
2831
2832         * h8300.h: turned op_type enum into #define list
2833
2834 Thu Jan 30 01:07:24 1992  John Gilmore  (gnu at cygnus.com)
2835
2836         * sparc.h:  Remove "cypress" architecture.  Remove "fitox" and
2837         similar instructions -- they've been renamed to "fitoq", etc.
2838         REALLY fix tsubcctv.  Fix "fcmpeq" and "fcmpq" which had wrong
2839         number of arguments.
2840         * h8300.h:  Remove extra ; which produces compiler warning.
2841
2842 Tue Jan 28 22:59:22 1992  Stu Grossman  (grossman at cygnus.com)
2843
2844         * sparc.h:  fix opcode for tsubcctv.
2845
2846 Tue Jan  7 17:19:39 1992  K. Richard Pixley  (rich at cygnus.com)
2847
2848         * sparc.h: fba and cba are now aliases for fb and cb respectively.
2849
2850 Fri Dec 27 10:55:50 1991  Per Bothner  (bothner at cygnus.com)
2851
2852         * sparc.h (nop):  Made the 'lose' field be even tighter,
2853         so only a standard 'nop' is disassembled as a nop.
2854
2855 Sun Dec 22 12:18:18 1991  Michael Tiemann  (tiemann at cygnus.com)
2856
2857         * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2858         disassembled as a nop.
2859
2860 Wed Dec 18 17:19:44 1991  Stu Grossman  (grossman at cygnus.com)
2861
2862         * m68k.h, sparc.h:  ANSIfy enums.
2863
2864 Tue Dec 10 00:22:20 1991  K. Richard Pixley  (rich at rtl.cygnus.com)
2865
2866         * sparc.h: fix a typo.
2867
2868 Sat Nov 30 20:40:51 1991  Steve Chamberlain  (sac at rtl.cygnus.com)
2869
2870         * a29k.h, arm.h, h8300.h,  i386.h,  i860.h, i960.h , m68k.h,
2871         m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2872         vax.h: Renamed from ../<foo>-opcode.h.
2873
2874 \f
2875 Local Variables:
2876 version-control: never
2877 End: