mips3264 support
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-08-31 Eric Christopher <echristo@redhat.com>
2
3 * mips.h: Remove CPU_MIPS32_4K.
4
5 2001-08-27 Torbjorn Granlund <tege@swox.com>
6
7 * ppc.h (PPC_OPERAND_DS): Define.
8
9 2001-08-25 Andreas Jaeger <aj@suse.de>
10
11 * d30v.h: Fix declaration of reg_name_cnt.
12
13 * d10v.h: Fix declaration of d10v_reg_name_cnt.
14
15 * arc.h: Add prototypes from opcodes/arc-opc.c.
16
17 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
18
19 * mips.h (INSN_10000): Define.
20 (OPCODE_IS_MEMBER): Check for INSN_10000.
21
22 2001-08-10 Alan Modra <amodra@one.net.au>
23
24 * ppc.h: Revert 2001-08-08.
25
26 2001-08-08 Alan Modra <amodra@one.net.au>
27
28 1999-10-25 Torbjorn Granlund <tege@swox.com>
29 * ppc.h (struct powerpc_operand): New field `reloc'.
30
31 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
32
33 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
34 (cgen_cpu_desc): Ditto.
35
36 2001-07-07 Ben Elliston <bje@redhat.com>
37
38 * m88k.h: Clean up and reformat. Remove unused code.
39
40 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
41
42 * cgen.h (cgen_keyword): Add nonalpha_chars field.
43
44 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
45
46 * mips.h (CPU_R12000): Define.
47
48 2001-05-23 John Healy <jhealy@redhat.com>
49
50 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
51
52 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
53
54 * mips.h (INSN_ISA_MASK): Define.
55
56 2001-05-12 Alan Modra <amodra@one.net.au>
57
58 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
59 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
60 and use InvMem as these insns must have register operands.
61
62 2001-05-04 Alan Modra <amodra@one.net.au>
63
64 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
65 and pextrw to swap reg/rm assignments.
66
67 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
68
69 * cris.h (enum cris_insn_version_usage): Correct comment for
70 cris_ver_v3p.
71
72 2001-03-24 Alan Modra <alan@linuxcare.com.au>
73
74 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
75 Add InvMem to first operand of "maskmovdqu".
76
77 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
78
79 * cris.h (ADD_PC_INCR_OPCODE): New macro.
80
81 2001-03-21 Kazu Hirata <kazu@hxi.com>
82
83 * h8300.h: Fix formatting.
84
85 2001-03-22 Alan Modra <alan@linuxcare.com.au>
86
87 * i386.h (i386_optab): Add paddq, psubq.
88
89 2001-03-19 Alan Modra <alan@linuxcare.com.au>
90
91 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
92
93 2001-02-28 Igor Shevlyakov <igor@windriver.com>
94
95 * m68k.h: new defines for Coldfire V4. Update mcf to know
96 about mcf5407.
97
98 2001-02-18 lars brinkhoff <lars@nocrew.org>
99
100 * pdp11.h: New file.
101
102 2001-02-12 Jan Hubicka <jh@suse.cz>
103
104 * i386.h (i386_optab): SSE integer converison instructions have
105 64bit versions on x86-64.
106
107 2001-02-10 Nick Clifton <nickc@redhat.com>
108
109 * mips.h: Remove extraneous whitespace. Formating change to allow
110 for future contribution.
111
112 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
113
114 * s390.h: New file.
115
116 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
117
118 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
119 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
120 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
121
122 2001-01-24 Karsten Keil <kkeil@suse.de>
123
124 * i386.h (i386_optab): Fix swapgs
125
126 2001-01-14 Alan Modra <alan@linuxcare.com.au>
127
128 * hppa.h: Describe new '<' and '>' operand types, and tidy
129 existing comments.
130 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
131 Remove duplicate "ldw j(s,b),x". Sort some entries.
132
133 2001-01-13 Jan Hubicka <jh@suse.cz>
134
135 * i386.h (i386_optab): Fix pusha and ret templates.
136
137 2001-01-11 Peter Targett <peter.targett@arccores.com>
138
139 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
140 definitions for masking cpu type.
141 (arc_ext_operand_value) New structure for storing extended
142 operands.
143 (ARC_OPERAND_*) Flags for operand values.
144
145 2001-01-10 Jan Hubicka <jh@suse.cz>
146
147 * i386.h (pinsrw): Add.
148 (pshufw): Remove.
149 (cvttpd2dq): Fix operands.
150 (cvttps2dq): Likewise.
151 (movq2q): Rename to movdq2q.
152
153 2001-01-10 Richard Schaal <richard.schaal@intel.com>
154
155 * i386.h: Correct movnti instruction.
156
157 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
158
159 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
160 of operands (unsigned char or unsigned short).
161 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
162 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
163
164 2001-01-05 Jan Hubicka <jh@suse.cz>
165
166 * i386.h (i386_optab): Make [sml]fence template to use immext field.
167
168 2001-01-03 Jan Hubicka <jh@suse.cz>
169
170 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
171 introduced by Pentium4
172
173 2000-12-30 Jan Hubicka <jh@suse.cz>
174
175 * i386.h (i386_optab): Add "rex*" instructions;
176 add swapgs; disable jmp/call far direct instructions for
177 64bit mode; add syscall and sysret; disable registers for 0xc6
178 template. Add 'q' suffixes to extendable instructions, disable
179 obsolete instructions, add new sign/zero extension ones.
180 (i386_regtab): Add extended registers.
181 (*Suf): Add No_qSuf.
182 (q_Suf, wlq_Suf, bwlq_Suf): New.
183
184 2000-12-20 Jan Hubicka <jh@suse.cz>
185
186 * i386.h (i386_optab): Replace "Imm" with "EncImm".
187 (i386_regtab): Add flags field.
188
189 2000-12-12 Nick Clifton <nickc@redhat.com>
190
191 * mips.h: Fix formatting.
192
193 2000-12-01 Chris Demetriou <cgd@sibyte.com>
194
195 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
196 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
197 OP_*_SYSCALL definitions.
198 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
199 19 bit wait codes.
200 (MIPS operand specifier comments): Remove 'm', add 'U' and
201 'J', and update the meaning of 'B' so that it's more general.
202
203 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
204 INSN_ISA5): Renumber, redefine to mean the ISA at which the
205 instruction was added.
206 (INSN_ISA32): New constant.
207 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
208 Renumber to avoid new and/or renumbered INSN_* constants.
209 (INSN_MIPS32): Delete.
210 (ISA_UNKNOWN): New constant to indicate unknown ISA.
211 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
212 ISA_MIPS32): New constants, defined to be the mask of INSN_*
213 constants available at that ISA level.
214 (CPU_UNKNOWN): New constant to indicate unknown CPU.
215 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
216 define it with a unique value.
217 (OPCODE_IS_MEMBER): Update for new ISA membership-related
218 constant meanings.
219
220 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
221 definitions.
222
223 * mips.h (CPU_SB1): New constant.
224
225 2000-10-20 Jakub Jelinek <jakub@redhat.com>
226
227 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
228 Note that '3' is used for siam operand.
229
230 2000-09-22 Jim Wilson <wilson@cygnus.com>
231
232 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
233
234 2000-09-13 Anders Norlander <anorland@acc.umu.se>
235
236 * mips.h: Use defines instead of hard-coded processor numbers.
237 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
238 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
239 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
240 CPU_4KC, CPU_4KM, CPU_4KP): Define..
241 (OPCODE_IS_MEMBER): Use new defines.
242 (OP_MASK_SEL, OP_SH_SEL): Define.
243 (OP_MASK_CODE20, OP_SH_CODE20): Define.
244 Add 'P' to used characters.
245 Use 'H' for coprocessor select field.
246 Use 'm' for 20 bit breakpoint code.
247 Document new arg characters and add to used characters.
248 (INSN_MIPS32): New define for MIPS32 extensions.
249 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
250
251 2000-09-05 Alan Modra <alan@linuxcare.com.au>
252
253 * hppa.h: Mention cz completer.
254
255 2000-08-16 Jim Wilson <wilson@cygnus.com>
256
257 * ia64.h (IA64_OPCODE_POSTINC): New.
258
259 2000-08-15 H.J. Lu <hjl@gnu.org>
260
261 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
262 IgnoreSize change.
263
264 2000-08-08 Jason Eckhardt <jle@cygnus.com>
265
266 * i860.h: Small formatting adjustments.
267
268 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
269
270 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
271 Move related opcodes closer to each other.
272 Minor changes in comments, list undefined opcodes.
273
274 2000-07-26 Dave Brolley <brolley@redhat.com>
275
276 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
277
278 2000-07-22 Jason Eckhardt <jle@cygnus.com>
279
280 * i860.h (btne, bte, bla): Changed these opcodes
281 to use sbroff ('r') instead of split16 ('s').
282 (J, K, L, M): New operand types for 16-bit aligned fields.
283 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
284 use I, J, K, L, M instead of just I.
285 (T, U): New operand types for split 16-bit aligned fields.
286 (st.x): Changed these opcodes to use S, T, U instead of just S.
287 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
288 exist on the i860.
289 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
290 (pfeq.ss, pfeq.dd): New opcodes.
291 (st.s): Fixed incorrect mask bits.
292 (fmlow): Fixed incorrect mask bits.
293 (fzchkl, pfzchkl): Fixed incorrect mask bits.
294 (faddz, pfaddz): Fixed incorrect mask bits.
295 (form, pform): Fixed incorrect mask bits.
296 (pfld.l): Fixed incorrect mask bits.
297 (fst.q): Fixed incorrect mask bits.
298 (all floating point opcodes): Fixed incorrect mask bits for
299 handling of dual bit.
300
301 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
302
303 cris.h: New file.
304
305 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
306
307 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
308 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
309 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
310 (AVR_ISA_M83): Define for ATmega83, ATmega85.
311 (espm): Remove, because ESPM removed in databook update.
312 (eicall, eijmp): Move to the end of opcode table.
313
314 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
315
316 * m68hc11.h: New file for support of Motorola 68hc11.
317
318 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
319
320 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
321
322 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
323
324 * avr.h: New file with AVR opcodes.
325
326 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
327
328 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
329
330 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
331
332 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
333
334 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
335
336 * i386.h: Use sl_FP, not sl_Suf for fild.
337
338 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
339
340 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
341 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
342 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
343 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
344
345 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
346
347 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
348
349 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
350 Alexander Sokolov <robocop@netlink.ru>
351
352 * i386.h (i386_optab): Add cpu_flags for all instructions.
353
354 2000-05-13 Alan Modra <alan@linuxcare.com.au>
355
356 From Gavin Romig-Koch <gavin@cygnus.com>
357 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
358
359 2000-05-04 Timothy Wall <twall@cygnus.com>
360
361 * tic54x.h: New.
362
363 2000-05-03 J.T. Conklin <jtc@redback.com>
364
365 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
366 (PPC_OPERAND_VR): New operand flag for vector registers.
367
368 2000-05-01 Kazu Hirata <kazu@hxi.com>
369
370 * h8300.h (EOP): Add missing initializer.
371
372 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
373
374 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
375 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
376 New operand types l,y,&,fe,fE,fx added to support above forms.
377 (pa_opcodes): Replaced usage of 'x' as source/target for
378 floating point double-word loads/stores with 'fx'.
379
380 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
381 David Mosberger <davidm@hpl.hp.com>
382 Timothy Wall <twall@cygnus.com>
383 Jim Wilson <wilson@cygnus.com>
384
385 * ia64.h: New file.
386
387 2000-03-27 Nick Clifton <nickc@cygnus.com>
388
389 * d30v.h (SHORT_A1): Fix value.
390 (SHORT_AR): Renumber so that it is at the end of the list of short
391 instructions, not the end of the list of long instructions.
392
393 2000-03-26 Alan Modra <alan@linuxcare.com>
394
395 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
396 problem isn't really specific to Unixware.
397 (OLDGCC_COMPAT): Define.
398 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
399 destination %st(0).
400 Fix lots of comments.
401
402 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
403
404 * d30v.h:
405 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
406 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
407 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
408 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
409 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
410 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
411 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
412
413 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
414
415 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
416 fistpd without suffix.
417
418 2000-02-24 Nick Clifton <nickc@cygnus.com>
419
420 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
421 'signed_overflow_ok_p'.
422 Delete prototypes for cgen_set_flags() and cgen_get_flags().
423
424 2000-02-24 Andrew Haley <aph@cygnus.com>
425
426 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
427 (CGEN_CPU_TABLE): flags: new field.
428 Add prototypes for new functions.
429
430 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
431
432 * i386.h: Add some more UNIXWARE_COMPAT comments.
433
434 2000-02-23 Linas Vepstas <linas@linas.org>
435
436 * i370.h: New file.
437
438 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
439
440 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
441 cannot be combined in parallel with ADD/SUBppp.
442
443 2000-02-22 Andrew Haley <aph@cygnus.com>
444
445 * mips.h: (OPCODE_IS_MEMBER): Add comment.
446
447 1999-12-30 Andrew Haley <aph@cygnus.com>
448
449 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
450 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
451 insns.
452
453 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
454
455 * i386.h: Qualify intel mode far call and jmp with x_Suf.
456
457 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
458
459 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
460 indirect jumps and calls. Add FF/3 call for intel mode.
461
462 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
463
464 * mn10300.h: Add new operand types. Add new instruction formats.
465
466 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
467
468 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
469 instruction.
470
471 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
472
473 * mips.h (INSN_ISA5): New.
474
475 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
476
477 * mips.h (OPCODE_IS_MEMBER): New.
478
479 1999-10-29 Nick Clifton <nickc@cygnus.com>
480
481 * d30v.h (SHORT_AR): Define.
482
483 1999-10-18 Michael Meissner <meissner@cygnus.com>
484
485 * alpha.h (alpha_num_opcodes): Convert to unsigned.
486 (alpha_num_operands): Ditto.
487
488 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
489
490 * hppa.h (pa_opcodes): Add load and store cache control to
491 instructions. Add ordered access load and store.
492
493 * hppa.h (pa_opcode): Add new entries for addb and addib.
494
495 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
496
497 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
498
499 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
500
501 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
502
503 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
504
505 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
506 and "be" using completer prefixes.
507
508 * hppa.h (pa_opcodes): Add initializers to silence compiler.
509
510 * hppa.h: Update comments about character usage.
511
512 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
513
514 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
515 up the new fstw & bve instructions.
516
517 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
518
519 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
520 instructions.
521
522 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
523
524 * hppa.h (pa_opcodes): Add long offset double word load/store
525 instructions.
526
527 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
528 stores.
529
530 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
531
532 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
533
534 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
535
536 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
537
538 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
539
540 * hppa.h (pa_opcodes): Add support for "b,l".
541
542 * hppa.h (pa_opcodes): Add support for "b,gate".
543
544 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
545
546 * hppa.h (pa_opcodes): Use 'fX' for first register operand
547 in xmpyu.
548
549 * hppa.h (pa_opcodes): Fix mask for probe and probei.
550
551 * hppa.h (pa_opcodes): Fix mask for depwi.
552
553 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
554
555 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
556 an explicit output argument.
557
558 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
559
560 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
561 Add a few PA2.0 loads and store variants.
562
563 1999-09-04 Steve Chamberlain <sac@pobox.com>
564
565 * pj.h: New file.
566
567 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
568
569 * i386.h (i386_regtab): Move %st to top of table, and split off
570 other fp reg entries.
571 (i386_float_regtab): To here.
572
573 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
574
575 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
576 by 'f'.
577
578 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
579 Add supporting args.
580
581 * hppa.h: Document new completers and args.
582 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
583 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
584 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
585 pmenb and pmdis.
586
587 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
588 hshr, hsub, mixh, mixw, permh.
589
590 * hppa.h (pa_opcodes): Change completers in instructions to
591 use 'c' prefix.
592
593 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
594 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
595
596 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
597 fnegabs to use 'I' instead of 'F'.
598
599 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
600
601 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
602 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
603 Alphabetically sort PIII insns.
604
605 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
606
607 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
608
609 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
610
611 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
612 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
613
614 * hppa.h: Document 64 bit condition completers.
615
616 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
617
618 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
619
620 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
621
622 * i386.h (i386_optab): Add DefaultSize modifier to all insns
623 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
624 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
625
626 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
627 Jeff Law <law@cygnus.com>
628
629 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
630
631 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
632
633 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
634 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
635
636 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
637
638 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
639
640 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
641
642 * hppa.h (struct pa_opcode): Add new field "flags".
643 (FLAGS_STRICT): Define.
644
645 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
646 Jeff Law <law@cygnus.com>
647
648 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
649
650 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
651
652 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
653
654 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
655 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
656 flag to fcomi and friends.
657
658 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
659
660 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
661 integer logical instructions.
662
663 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
664
665 * m68k.h: Document new formats `E', `G', `H' and new places `N',
666 `n', `o'.
667
668 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
669 and new places `m', `M', `h'.
670
671 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
672
673 * hppa.h (pa_opcodes): Add several processor specific system
674 instructions.
675
676 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
677
678 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
679 "addb", and "addib" to be used by the disassembler.
680
681 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
682
683 * i386.h (ReverseModrm): Remove all occurences.
684 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
685 movmskps, pextrw, pmovmskb, maskmovq.
686 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
687 ignore the data size prefix.
688
689 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
690 Mostly stolen from Doug Ledford <dledford@redhat.com>
691
692 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
693
694 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
695
696 1999-04-14 Doug Evans <devans@casey.cygnus.com>
697
698 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
699 (CGEN_ATTR_TYPE): Update.
700 (CGEN_ATTR_MASK): Number booleans starting at 0.
701 (CGEN_ATTR_VALUE): Update.
702 (CGEN_INSN_ATTR): Update.
703
704 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
705
706 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
707 instructions.
708
709 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
710
711 * hppa.h (bb, bvb): Tweak opcode/mask.
712
713
714 1999-03-22 Doug Evans <devans@casey.cygnus.com>
715
716 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
717 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
718 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
719 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
720 Delete member max_insn_size.
721 (enum cgen_cpu_open_arg): New enum.
722 (cpu_open): Update prototype.
723 (cpu_open_1): Declare.
724 (cgen_set_cpu): Delete.
725
726 1999-03-11 Doug Evans <devans@casey.cygnus.com>
727
728 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
729 (CGEN_OPERAND_NIL): New macro.
730 (CGEN_OPERAND): New member `type'.
731 (@arch@_cgen_operand_table): Delete decl.
732 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
733 (CGEN_OPERAND_TABLE): New struct.
734 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
735 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
736 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
737 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
738 {get,set}_{int,vma}_operand.
739 (@arch@_cgen_cpu_open): New arg `isa'.
740 (cgen_set_cpu): Ditto.
741
742 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
743
744 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
745
746 1999-02-25 Doug Evans <devans@casey.cygnus.com>
747
748 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
749 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
750 enum cgen_hw_type.
751 (CGEN_HW_TABLE): New struct.
752 (hw_table): Delete declaration.
753 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
754 to table entry to enum.
755 (CGEN_OPINST): Ditto.
756 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
757
758 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
759
760 * alpha.h (AXP_OPCODE_EV6): New.
761 (AXP_OPCODE_NOPAL): Include it.
762
763 1999-02-09 Doug Evans <devans@casey.cygnus.com>
764
765 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
766 All uses updated. New members int_insn_p, max_insn_size,
767 parse_operand,insert_operand,extract_operand,print_operand,
768 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
769 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
770 extract_handlers,print_handlers.
771 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
772 (CGEN_ATTR_BOOL_OFFSET): New macro.
773 (CGEN_ATTR_MASK): Subtract it to compute bit number.
774 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
775 (cgen_opcode_handler): Renamed from cgen_base.
776 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
777 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
778 all uses updated.
779 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
780 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
781 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
782 (CGEN_OPCODE,CGEN_IBASE): New types.
783 (CGEN_INSN): Rewrite.
784 (CGEN_{ASM,DIS}_HASH*): Delete.
785 (init_opcode_table,init_ibld_table): Declare.
786 (CGEN_INSN_ATTR): New type.
787
788 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
789
790 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
791 (x_FP, d_FP, dls_FP, sldx_FP): Define.
792 Change *Suf definitions to include x and d suffixes.
793 (movsx): Use w_Suf and b_Suf.
794 (movzx): Likewise.
795 (movs): Use bwld_Suf.
796 (fld): Change ordering. Use sld_FP.
797 (fild): Add Intel Syntax equivalent of fildq.
798 (fst): Use sld_FP.
799 (fist): Use sld_FP.
800 (fstp): Use sld_FP. Add x_FP version.
801 (fistp): LLongMem version for Intel Syntax.
802 (fcom, fcomp): Use sld_FP.
803 (fadd, fiadd, fsub): Use sld_FP.
804 (fsubr): Use sld_FP.
805 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
806
807 1999-01-27 Doug Evans <devans@casey.cygnus.com>
808
809 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
810 CGEN_MODE_UINT.
811
812 1999-01-16 Jeffrey A Law (law@cygnus.com)
813
814 * hppa.h (bv): Fix mask.
815
816 1999-01-05 Doug Evans <devans@casey.cygnus.com>
817
818 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
819 (CGEN_ATTR): Use it.
820 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
821 (CGEN_ATTR_TABLE): New member dfault.
822
823 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
824
825 * mips.h (MIPS16_INSN_BRANCH): New.
826
827 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
828
829 The following is part of a change made by Edith Epstein
830 <eepstein@sophia.cygnus.com> as part of a project to merge in
831 changes by HP; HP did not create ChangeLog entries.
832
833 * hppa.h (completer_chars): list of chars to not put a space
834 after.
835
836 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
837
838 * i386.h (i386_optab): Permit w suffix on processor control and
839 status word instructions.
840
841 1998-11-30 Doug Evans <devans@casey.cygnus.com>
842
843 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
844 (struct cgen_keyword_entry): Ditto.
845 (struct cgen_operand): Ditto.
846 (CGEN_IFLD): New typedef, with associated access macros.
847 (CGEN_IFMT): New typedef, with associated access macros.
848 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
849 (CGEN_IVALUE): New typedef.
850 (struct cgen_insn): Delete const on syntax,attrs members.
851 `format' now points to format data. Type of `value' is now
852 CGEN_IVALUE.
853 (struct cgen_opcode_table): New member ifld_table.
854
855 1998-11-18 Doug Evans <devans@casey.cygnus.com>
856
857 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
858 (CGEN_OPERAND_INSTANCE): New member `attrs'.
859 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
860 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
861 (cgen_opcode_table): Update type of dis_hash fn.
862 (extract_operand): Update type of `insn_value' arg.
863
864 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
865
866 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
867
868 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
869
870 * mips.h (INSN_MULT): Added.
871
872 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
873
874 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
875
876 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
877
878 * cgen.h (CGEN_INSN_INT): New typedef.
879 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
880 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
881 (CGEN_INSN_BYTES_PTR): New typedef.
882 (CGEN_EXTRACT_INFO): New typedef.
883 (cgen_insert_fn,cgen_extract_fn): Update.
884 (cgen_opcode_table): New member `insn_endian'.
885 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
886 (insert_operand,extract_operand): Update.
887 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
888
889 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
890
891 * cgen.h (CGEN_ATTR_BOOLS): New macro.
892 (struct CGEN_HW_ENTRY): New member `attrs'.
893 (CGEN_HW_ATTR): New macro.
894 (struct CGEN_OPERAND_INSTANCE): New member `name'.
895 (CGEN_INSN_INVALID_P): New macro.
896
897 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
898
899 * hppa.h: Add "fid".
900
901 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
902
903 From Robert Andrew Dale <rob@nb.net>
904 * i386.h (i386_optab): Add AMD 3DNow! instructions.
905 (AMD_3DNOW_OPCODE): Define.
906
907 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
908
909 * d30v.h (EITHER_BUT_PREFER_MU): Define.
910
911 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
912
913 * cgen.h (cgen_insn): #if 0 out element `cdx'.
914
915 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
916
917 Move all global state data into opcode table struct, and treat
918 opcode table as something that is "opened/closed".
919 * cgen.h (CGEN_OPCODE_DESC): New type.
920 (all fns): New first arg of opcode table descriptor.
921 (cgen_set_parse_operand_fn): Add prototype.
922 (cgen_current_machine,cgen_current_endian): Delete.
923 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
924 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
925 dis_hash_table,dis_hash_table_entries.
926 (opcode_open,opcode_close): Add prototypes.
927
928 * cgen.h (cgen_insn): New element `cdx'.
929
930 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
931
932 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
933
934 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
935
936 * mn10300.h: Add "no_match_operands" field for instructions.
937 (MN10300_MAX_OPERANDS): Define.
938
939 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
940
941 * cgen.h (cgen_macro_insn_count): Declare.
942
943 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
944
945 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
946 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
947 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
948 set_{int,vma}_operand.
949
950 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
951
952 * mn10300.h: Add "machine" field for instructions.
953 (MN103, AM30): Define machine types.
954
955 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
956
957 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
958
959 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
960
961 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
962
963 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
964
965 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
966 and ud2b.
967 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
968 those that happen to be implemented on pentiums.
969
970 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
971
972 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
973 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
974 with Size16|IgnoreSize or Size32|IgnoreSize.
975
976 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
977
978 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
979 (REPE): Rename to REPE_PREFIX_OPCODE.
980 (i386_regtab_end): Remove.
981 (i386_prefixtab, i386_prefixtab_end): Remove.
982 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
983 of md_begin.
984 (MAX_OPCODE_SIZE): Define.
985 (i386_optab_end): Remove.
986 (sl_Suf): Define.
987 (sl_FP): Use sl_Suf.
988
989 * i386.h (i386_optab): Allow 16 bit displacement for `mov
990 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
991 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
992 data32, dword, and adword prefixes.
993 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
994 regs.
995
996 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
997
998 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
999
1000 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1001 register operands, because this is a common idiom. Flag them with
1002 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1003 fdivrp because gcc erroneously generates them. Also flag with a
1004 warning.
1005
1006 * i386.h: Add suffix modifiers to most insns, and tighter operand
1007 checks in some cases. Fix a number of UnixWare compatibility
1008 issues with float insns. Merge some floating point opcodes, using
1009 new FloatMF modifier.
1010 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1011 consistency.
1012
1013 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1014 IgnoreDataSize where appropriate.
1015
1016 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1017
1018 * i386.h: (one_byte_segment_defaults): Remove.
1019 (two_byte_segment_defaults): Remove.
1020 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1021
1022 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1023
1024 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1025 (cgen_hw_lookup_by_num): Declare.
1026
1027 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1028
1029 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1030 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1031
1032 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1033
1034 * cgen.h (cgen_asm_init_parse): Delete.
1035 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1036 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1037
1038 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1039
1040 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1041 (cgen_asm_finish_insn): Update prototype.
1042 (cgen_insn): New members num, data.
1043 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1044 dis_hash, dis_hash_table_size moved to ...
1045 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1046 All uses updated. New members asm_hash_p, dis_hash_p.
1047 (CGEN_MINSN_EXPANSION): New struct.
1048 (cgen_expand_macro_insn): Declare.
1049 (cgen_macro_insn_count): Declare.
1050 (get_insn_operands): Update prototype.
1051 (lookup_get_insn_operands): Declare.
1052
1053 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1054
1055 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1056 regKludge. Add operands types for string instructions.
1057
1058 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1059
1060 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1061 table.
1062
1063 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1064
1065 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1066 for `gettext'.
1067
1068 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1069
1070 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1071 Add IsString flag to string instructions.
1072 (IS_STRING): Don't define.
1073 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1074 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1075 (SS_PREFIX_OPCODE): Define.
1076
1077 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1078
1079 * i386.h: Revert March 24 patch; no more LinearAddress.
1080
1081 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1082
1083 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1084 instructions, and instead add FWait opcode modifier. Add short
1085 form of fldenv and fstenv.
1086 (FWAIT_OPCODE): Define.
1087
1088 * i386.h (i386_optab): Change second operand constraint of `mov
1089 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1090 allow legal instructions such as `movl %gs,%esi'
1091
1092 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1093
1094 * h8300.h: Various changes to fully bracket initializers.
1095
1096 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1097
1098 * i386.h: Set LinearAddress for lidt and lgdt.
1099
1100 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1101
1102 * cgen.h (CGEN_BOOL_ATTR): New macro.
1103
1104 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1105
1106 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1107
1108 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1109
1110 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1111 (cgen_insn): Record syntax and format entries here, rather than
1112 separately.
1113
1114 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1115
1116 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1117
1118 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1119
1120 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1121 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1122 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1123
1124 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1125
1126 * cgen.h (lookup_insn): New argument alias_p.
1127
1128 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1129
1130 Fix rac to accept only a0:
1131 * d10v.h (OPERAND_ACC): Split into:
1132 (OPERAND_ACC0, OPERAND_ACC1) .
1133 (OPERAND_GPR): Define.
1134
1135 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1136
1137 * cgen.h (CGEN_FIELDS): Define here.
1138 (CGEN_HW_ENTRY): New member `type'.
1139 (hw_list): Delete decl.
1140 (enum cgen_mode): Declare.
1141 (CGEN_OPERAND): New member `hw'.
1142 (enum cgen_operand_instance_type): Declare.
1143 (CGEN_OPERAND_INSTANCE): New type.
1144 (CGEN_INSN): New member `operands'.
1145 (CGEN_OPCODE_DATA): Make hw_list const.
1146 (get_insn_operands,lookup_insn): Add prototypes for.
1147
1148 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1149
1150 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1151 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1152 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1153 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1154
1155 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1156
1157 * cgen.h: Correct typo in comment end marker.
1158
1159 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1160
1161 * tic30.h: New file.
1162
1163 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1164
1165 * cgen.h: Add prototypes for cgen_save_fixups(),
1166 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1167 of cgen_asm_finish_insn() to return a char *.
1168
1169 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1170
1171 * cgen.h: Formatting changes to improve readability.
1172
1173 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1174
1175 * cgen.h (*): Clean up pass over `struct foo' usage.
1176 (CGEN_ATTR): Make unsigned char.
1177 (CGEN_ATTR_TYPE): Update.
1178 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1179 (cgen_base): Move member `attrs' to cgen_insn.
1180 (CGEN_KEYWORD): New member `null_entry'.
1181 (CGEN_{SYNTAX,FORMAT}): New types.
1182 (cgen_insn): Format and syntax separated from each other.
1183
1184 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1185
1186 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1187 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1188 flags_{used,set} long.
1189 (d30v_operand): Make flags field long.
1190
1191 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1192
1193 * m68k.h: Fix comment describing operand types.
1194
1195 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1196
1197 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1198 everything else after down.
1199
1200 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1201
1202 * d10v.h (OPERAND_FLAG): Split into:
1203 (OPERAND_FFLAG, OPERAND_CFLAG) .
1204
1205 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1206
1207 * mips.h (struct mips_opcode): Changed comments to reflect new
1208 field usage.
1209
1210 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1211
1212 * mips.h: Added to comments a quick-ref list of all assigned
1213 operand type characters.
1214 (OP_{MASK,SH}_PERFREG): New macros.
1215
1216 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1217
1218 * sparc.h: Add '_' and '/' for v9a asr's.
1219 Patch from David Miller <davem@vger.rutgers.edu>
1220
1221 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1222
1223 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1224 area are not available in the base model (H8/300).
1225
1226 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1227
1228 * m68k.h: Remove documentation of ` operand specifier.
1229
1230 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1231
1232 * m68k.h: Document q and v operand specifiers.
1233
1234 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1235
1236 * v850.h (struct v850_opcode): Add processors field.
1237 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1238 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1239 (PROCESSOR_V850EA): New bit constants.
1240
1241 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1242
1243 Merge changes from Martin Hunt:
1244
1245 * d30v.h: Allow up to 64 control registers. Add
1246 SHORT_A5S format.
1247
1248 * d30v.h (LONG_Db): New form for delayed branches.
1249
1250 * d30v.h: (LONG_Db): New form for repeati.
1251
1252 * d30v.h (SHORT_D2B): New form.
1253
1254 * d30v.h (SHORT_A2): New form.
1255
1256 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1257 registers are used. Needed for VLIW optimization.
1258
1259 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1260
1261 * cgen.h: Move assembler interface section
1262 up so cgen_parse_operand_result is defined for cgen_parse_address.
1263 (cgen_parse_address): Update prototype.
1264
1265 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1266
1267 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1268
1269 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1270
1271 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1272 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1273 <paubert@iram.es>.
1274
1275 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1276 <paubert@iram.es>.
1277
1278 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1279 <paubert@iram.es>.
1280
1281 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1282 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1283
1284 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1285
1286 * v850.h (V850_NOT_R0): New flag.
1287
1288 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1289
1290 * v850.h (struct v850_opcode): Remove flags field.
1291
1292 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1293
1294 * v850.h (struct v850_opcode): Add flags field.
1295 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1296 fields.
1297 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1298 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1299
1300 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1301
1302 * arc.h: New file.
1303
1304 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1305
1306 * sparc.h (sparc_opcodes): Declare as const.
1307
1308 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1309
1310 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1311 uses single or double precision floating point resources.
1312 (INSN_NO_ISA, INSN_ISA1): Define.
1313 (cpu specific INSN macros): Tweak into bitmasks outside the range
1314 of INSN_ISA field.
1315
1316 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1317
1318 * i386.h: Fix pand opcode.
1319
1320 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1321
1322 * mips.h: Widen INSN_ISA and move it to a more convenient
1323 bit position. Add INSN_3900.
1324
1325 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1326
1327 * mips.h (struct mips_opcode): added new field membership.
1328
1329 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1330
1331 * i386.h (movd): only Reg32 is allowed.
1332
1333 * i386.h: add fcomp and ud2. From Wayne Scott
1334 <wscott@ichips.intel.com>.
1335
1336 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1337
1338 * i386.h: Add MMX instructions.
1339
1340 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1341
1342 * i386.h: Remove W modifier from conditional move instructions.
1343
1344 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1345
1346 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1347 with no arguments to match that generated by the UnixWare
1348 assembler.
1349
1350 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1351
1352 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1353 (cgen_parse_operand_fn): Declare.
1354 (cgen_init_parse_operand): Declare.
1355 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1356 new argument `want'.
1357 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1358 (enum cgen_parse_operand_type): New enum.
1359
1360 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1361
1362 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1363
1364 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1365
1366 * cgen.h: New file.
1367
1368 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1369
1370 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1371 fdivrp.
1372
1373 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1374
1375 * v850.h (extract): Make unsigned.
1376
1377 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1378
1379 * i386.h: Add iclr.
1380
1381 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1382
1383 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1384 take a direction bit.
1385
1386 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1387
1388 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1389
1390 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1391
1392 * sparc.h: Include <ansidecl.h>. Update function declarations to
1393 use prototypes, and to use const when appropriate.
1394
1395 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1396
1397 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1398
1399 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1400
1401 * d10v.h: Change pre_defined_registers to
1402 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1403
1404 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1405
1406 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1407 Change mips_opcodes from const array to a pointer,
1408 and change bfd_mips_num_opcodes from const int to int,
1409 so that we can increase the size of the mips opcodes table
1410 dynamically.
1411
1412 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1413
1414 * d30v.h (FLAG_X): Remove unused flag.
1415
1416 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1417
1418 * d30v.h: New file.
1419
1420 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1421
1422 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1423 (PDS_VALUE): Macro to access value field of predefined symbols.
1424 (tic80_next_predefined_symbol): Add prototype.
1425
1426 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1427
1428 * tic80.h (tic80_symbol_to_value): Change prototype to match
1429 change in function, added class parameter.
1430
1431 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1432
1433 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1434 endmask fields, which are somewhat weird in that 0 and 32 are
1435 treated exactly the same.
1436
1437 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1438
1439 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1440 rather than a constant that is 2**X. Reorder them to put bits for
1441 operands that have symbolic names in the upper bits, so they can
1442 be packed into an int where the lower bits contain the value that
1443 corresponds to that symbolic name.
1444 (predefined_symbo): Add struct.
1445 (tic80_predefined_symbols): Declare array of translations.
1446 (tic80_num_predefined_symbols): Declare size of that array.
1447 (tic80_value_to_symbol): Declare function.
1448 (tic80_symbol_to_value): Declare function.
1449
1450 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1451
1452 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1453
1454 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1455
1456 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1457 be the destination register.
1458
1459 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1460
1461 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1462 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1463 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1464 that the opcode can have two vector instructions in a single
1465 32 bit word and we have to encode/decode both.
1466
1467 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1468
1469 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1470 TIC80_OPERAND_RELATIVE for PC relative.
1471 (TIC80_OPERAND_BASEREL): New flag bit for register
1472 base relative.
1473
1474 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1475
1476 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1477
1478 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1479
1480 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1481 ":s" modifier for scaling.
1482
1483 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1484
1485 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1486 (TIC80_OPERAND_M_LI): Ditto
1487
1488 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1489
1490 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1491 (TIC80_OPERAND_CC): New define for condition code operand.
1492 (TIC80_OPERAND_CR): New define for control register operand.
1493
1494 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1495
1496 * tic80.h (struct tic80_opcode): Name changed.
1497 (struct tic80_opcode): Remove format field.
1498 (struct tic80_operand): Add insertion and extraction functions.
1499 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1500 correct ones.
1501 (FMT_*): Ditto.
1502
1503 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1504
1505 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1506 type IV instruction offsets.
1507
1508 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1509
1510 * tic80.h: New file.
1511
1512 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1513
1514 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1515
1516 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1517
1518 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1519 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1520 * v850.h: Fix comment, v850_operand not powerpc_operand.
1521
1522 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1523
1524 * mn10200.h: Flesh out structures and definitions needed by
1525 the mn10200 assembler & disassembler.
1526
1527 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1528
1529 * mips.h: Add mips16 definitions.
1530
1531 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1532
1533 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1534
1535 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1536
1537 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1538 (MN10300_OPERAND_MEMADDR): Define.
1539
1540 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1541
1542 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1543
1544 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1545
1546 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1547
1548 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1549
1550 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1551
1552 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1553
1554 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1555
1556 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1557
1558 * alpha.h: Don't include "bfd.h"; private relocation types are now
1559 negative to minimize problems with shared libraries. Organize
1560 instruction subsets by AMASK extensions and PALcode
1561 implementation.
1562 (struct alpha_operand): Move flags slot for better packing.
1563
1564 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1565
1566 * v850.h (V850_OPERAND_RELAX): New operand flag.
1567
1568 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1569
1570 * mn10300.h (FMT_*): Move operand format definitions
1571 here.
1572
1573 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1574
1575 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1576
1577 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1578
1579 * mn10300.h (mn10300_opcode): Add "format" field.
1580 (MN10300_OPERAND_*): Define.
1581
1582 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1583
1584 * mn10x00.h: Delete.
1585 * mn10200.h, mn10300.h: New files.
1586
1587 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1588
1589 * mn10x00.h: New file.
1590
1591 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1592
1593 * v850.h: Add new flag to indicate this instruction uses a PC
1594 displacement.
1595
1596 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1597
1598 * h8300.h (stmac): Add missing instruction.
1599
1600 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1601
1602 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1603 field.
1604
1605 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1606
1607 * v850.h (V850_OPERAND_EP): Define.
1608
1609 * v850.h (v850_opcode): Add size field.
1610
1611 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1612
1613 * v850.h (v850_operands): Add insert and extract fields, pointers
1614 to functions used to handle unusual operand encoding.
1615 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1616 V850_OPERAND_SIGNED): Defined.
1617
1618 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1619
1620 * v850.h (v850_operands): Add flags field.
1621 (OPERAND_REG, OPERAND_NUM): Defined.
1622
1623 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1624
1625 * v850.h: New file.
1626
1627 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1628
1629 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1630 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1631 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1632 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1633 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1634 Defined.
1635
1636 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1637
1638 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1639 a 3 bit space id instead of a 2 bit space id.
1640
1641 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1642
1643 * d10v.h: Add some additional defines to support the
1644 assembler in determining which operations can be done in parallel.
1645
1646 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1647
1648 * h8300.h (SN): Define.
1649 (eepmov.b): Renamed from "eepmov"
1650 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1651 with them.
1652
1653 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1654
1655 * d10v.h (OPERAND_SHIFT): New operand flag.
1656
1657 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1658
1659 * d10v.h: Changes for divs, parallel-only instructions, and
1660 signed numbers.
1661
1662 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1663
1664 * d10v.h (pd_reg): Define. Putting the definition here allows
1665 the assembler and disassembler to share the same struct.
1666
1667 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1668
1669 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1670 Williams <steve@icarus.com>.
1671
1672 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1673
1674 * d10v.h: New file.
1675
1676 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1677
1678 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1679
1680 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1681
1682 * m68k.h (mcf5200): New macro.
1683 Document names of coldfire control registers.
1684
1685 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1686
1687 * h8300.h (SRC_IN_DST): Define.
1688
1689 * h8300.h (UNOP3): Mark the register operand in this insn
1690 as a source operand, not a destination operand.
1691 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1692 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1693 register operand with SRC_IN_DST.
1694
1695 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1696
1697 * alpha.h: New file.
1698
1699 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1700
1701 * rs6k.h: Remove obsolete file.
1702
1703 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1704
1705 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1706 fdivp, and fdivrp. Add ffreep.
1707
1708 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1709
1710 * h8300.h: Reorder various #defines for readability.
1711 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1712 (BITOP): Accept additional (unused) argument. All callers changed.
1713 (EBITOP): Likewise.
1714 (O_LAST): Bump.
1715 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1716
1717 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1718 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1719 (BITOP, EBITOP): Handle new H8/S addressing modes for
1720 bit insns.
1721 (UNOP3): Handle new shift/rotate insns on the H8/S.
1722 (insns using exr): New instructions.
1723 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1724
1725 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1726
1727 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1728 was incorrect.
1729
1730 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1731
1732 * h8300.h (START): Remove.
1733 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1734 and mov.l insns that can be relaxed.
1735
1736 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1737
1738 * i386.h: Remove Abs32 from lcall.
1739
1740 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1741
1742 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1743 (SLCPOP): New macro.
1744 Mark X,Y opcode letters as in use.
1745
1746 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1747
1748 * sparc.h (F_FLOAT, F_FBR): Define.
1749
1750 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1751
1752 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1753 from all insns.
1754 (ABS8SRC,ABS8DST): Add ABS8MEM.
1755 (add.l): Fix reg+reg variant.
1756 (eepmov.w): Renamed from eepmovw.
1757 (ldc,stc): Fix many cases.
1758
1759 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1760
1761 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1762
1763 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1764
1765 * sparc.h (O): Mark operand letter as in use.
1766
1767 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1768
1769 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1770 Mark operand letters uU as in use.
1771
1772 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1773
1774 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1775 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1776 (SPARC_OPCODE_SUPPORTED): New macro.
1777 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1778 (F_NOTV9): Delete.
1779
1780 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1781
1782 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1783 declaration consistent with return type in definition.
1784
1785 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1786
1787 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1788
1789 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1790
1791 * i386.h (i386_regtab): Add 80486 test registers.
1792
1793 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1794
1795 * i960.h (I_HX): Define.
1796 (i960_opcodes): Add HX instruction.
1797
1798 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1799
1800 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1801 and fclex.
1802
1803 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1804
1805 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1806 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1807 (bfd_* defines): Delete.
1808 (sparc_opcode_archs): Replaces architecture_pname.
1809 (sparc_opcode_lookup_arch): Declare.
1810 (NUMOPCODES): Delete.
1811
1812 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1813
1814 * sparc.h (enum sparc_architecture): Add v9a.
1815 (ARCHITECTURES_CONFLICT_P): Update.
1816
1817 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1818
1819 * i386.h: Added Pentium Pro instructions.
1820
1821 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1822
1823 * m68k.h: Document new 'W' operand place.
1824
1825 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1826
1827 * hppa.h: Add lci and syncdma instructions.
1828
1829 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1830
1831 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1832 instructions.
1833
1834 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1835
1836 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1837 assembler's -mcom and -many switches.
1838
1839 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1840
1841 * i386.h: Fix cmpxchg8b extension opcode description.
1842
1843 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1844
1845 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1846 and register cr4.
1847
1848 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1849
1850 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1851
1852 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1853
1854 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1855
1856 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1857
1858 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1859
1860 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1861
1862 * m68kmri.h: Remove.
1863
1864 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1865 declarations. Remove F_ALIAS and flag field of struct
1866 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1867 int. Make name and args fields of struct m68k_opcode const.
1868
1869 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1870
1871 * sparc.h (F_NOTV9): Define.
1872
1873 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1874
1875 * mips.h (INSN_4010): Define.
1876
1877 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1878
1879 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1880
1881 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1882 * m68k.h: Fix argument descriptions of coprocessor
1883 instructions to allow only alterable operands where appropriate.
1884 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1885 (m68k_opcode_aliases): Add more aliases.
1886
1887 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1888
1889 * m68k.h: Added explcitly short-sized conditional branches, and a
1890 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1891 svr4-based configurations.
1892
1893 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1894
1895 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1896 * i386.h: added missing Data16/Data32 flags to a few instructions.
1897
1898 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1899
1900 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1901 (OP_MASK_BCC, OP_SH_BCC): Define.
1902 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1903 (OP_MASK_CCC, OP_SH_CCC): Define.
1904 (INSN_READ_FPR_R): Define.
1905 (INSN_RFE): Delete.
1906
1907 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1908
1909 * m68k.h (enum m68k_architecture): Deleted.
1910 (struct m68k_opcode_alias): New type.
1911 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1912 matching constraints, values and flags. As a side effect of this,
1913 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1914 as I know were never used, now may need re-examining.
1915 (numopcodes): Now const.
1916 (m68k_opcode_aliases, numaliases): New variables.
1917 (endop): Deleted.
1918 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1919 m68k_opcode_aliases; update declaration of m68k_opcodes.
1920
1921 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1922
1923 * hppa.h (delay_type): Delete unused enumeration.
1924 (pa_opcode): Replace unused delayed field with an architecture
1925 field.
1926 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1927
1928 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1929
1930 * mips.h (INSN_ISA4): Define.
1931
1932 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1933
1934 * mips.h (M_DLA_AB, M_DLI): Define.
1935
1936 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1937
1938 * hppa.h (fstwx): Fix single-bit error.
1939
1940 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1941
1942 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1943
1944 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1945
1946 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1947 debug registers. From Charles Hannum (mycroft@netbsd.org).
1948
1949 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1950
1951 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1952 i386 support:
1953 * i386.h (MOV_AX_DISP32): New macro.
1954 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1955 of several call/return instructions.
1956 (ADDR_PREFIX_OPCODE): New macro.
1957
1958 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1959
1960 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1961
1962 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1963 char.
1964 (struct vot, field `name'): ditto.
1965
1966 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1967
1968 * vax.h: Supply and properly group all values in end sentinel.
1969
1970 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1971
1972 * mips.h (INSN_ISA, INSN_4650): Define.
1973
1974 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1975
1976 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1977 systems with a separate instruction and data cache, such as the
1978 29040, these instructions take an optional argument.
1979
1980 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1981
1982 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1983 INSN_TRAP.
1984
1985 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1986
1987 * mips.h (INSN_STORE_MEMORY): Define.
1988
1989 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1990
1991 * sparc.h: Document new operand type 'x'.
1992
1993 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1994
1995 * i960.h (I_CX2): New instruction category. It includes
1996 instructions available on Cx and Jx processors.
1997 (I_JX): New instruction category, for JX-only instructions.
1998 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1999 Jx-only instructions, in I_JX category.
2000
2001 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2002
2003 * ns32k.h (endop): Made pointer const too.
2004
2005 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2006
2007 * ns32k.h: Drop Q operand type as there is no correct use
2008 for it. Add I and Z operand types which allow better checking.
2009
2010 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2011
2012 * h8300.h (xor.l) :fix bit pattern.
2013 (L_2): New size of operand.
2014 (trapa): Use it.
2015
2016 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2017
2018 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2019
2020 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2021
2022 * sparc.h: Include v9 definitions.
2023
2024 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2025
2026 * m68k.h (m68060): Defined.
2027 (m68040up, mfloat, mmmu): Include it.
2028 (struct m68k_opcode): Widen `arch' field.
2029 (m68k_opcodes): Updated for M68060. Removed comments that were
2030 instructions commented out by "JF" years ago.
2031
2032 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2033
2034 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2035 add a one-bit `flags' field.
2036 (F_ALIAS): New macro.
2037
2038 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2039
2040 * h8300.h (dec, inc): Get encoding right.
2041
2042 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2043
2044 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2045 a flag instead.
2046 (PPC_OPERAND_SIGNED): Define.
2047 (PPC_OPERAND_SIGNOPT): Define.
2048
2049 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2050
2051 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2052 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2053
2054 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2055
2056 * i386.h: Reverse last change. It'll be handled in gas instead.
2057
2058 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2059
2060 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2061 slower on the 486 and used the implicit shift count despite the
2062 explicit operand. The one-operand form is still available to get
2063 the shorter form with the implicit shift count.
2064
2065 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2066
2067 * hppa.h: Fix typo in fstws arg string.
2068
2069 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2070
2071 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2072
2073 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2074
2075 * ppc.h (PPC_OPCODE_601): Define.
2076
2077 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2078
2079 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2080 (so we can determine valid completers for both addb and addb[tf].)
2081
2082 * hppa.h (xmpyu): No floating point format specifier for the
2083 xmpyu instruction.
2084
2085 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2086
2087 * ppc.h (PPC_OPERAND_NEXT): Define.
2088 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2089 (struct powerpc_macro): Define.
2090 (powerpc_macros, powerpc_num_macros): Declare.
2091
2092 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2093
2094 * ppc.h: New file. Header file for PowerPC opcode table.
2095
2096 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2097
2098 * hppa.h: More minor template fixes for sfu and copr (to allow
2099 for easier disassembly).
2100
2101 * hppa.h: Fix templates for all the sfu and copr instructions.
2102
2103 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2104
2105 * i386.h (push): Permit Imm16 operand too.
2106
2107 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2108
2109 * h8300.h (andc): Exists in base arch.
2110
2111 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2112
2113 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2114 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2115
2116 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2117
2118 * hppa.h: Add FP quadword store instructions.
2119
2120 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2121
2122 * mips.h: (M_J_A): Added.
2123 (M_LA): Removed.
2124
2125 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2126
2127 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2128 <mellon@pepper.ncd.com>.
2129
2130 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2131
2132 * hppa.h: Immediate field in probei instructions is unsigned,
2133 not low-sign extended.
2134
2135 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2136
2137 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2138
2139 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2140
2141 * i386.h: Add "fxch" without operand.
2142
2143 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2144
2145 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2146
2147 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2148
2149 * hppa.h: Add gfw and gfr to the opcode table.
2150
2151 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2152
2153 * m88k.h: extended to handle m88110.
2154
2155 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2156
2157 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2158 addresses.
2159
2160 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2161
2162 * i960.h (i960_opcodes): Properly bracket initializers.
2163
2164 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2165
2166 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2167
2168 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2169
2170 * m68k.h (two): Protect second argument with parentheses.
2171
2172 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2173
2174 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2175 Deleted old in/out instructions in "#if 0" section.
2176
2177 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2178
2179 * i386.h (i386_optab): Properly bracket initializers.
2180
2181 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2182
2183 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2184 Jeff Law, law@cs.utah.edu).
2185
2186 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2187
2188 * i386.h (lcall): Accept Imm32 operand also.
2189
2190 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2191
2192 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2193 (M_DABS): Added.
2194
2195 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2196
2197 * mips.h (INSN_*): Changed values. Removed unused definitions.
2198 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2199 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2200 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2201 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2202 (M_*): Added new values for r6000 and r4000 macros.
2203 (ANY_DELAY): Removed.
2204
2205 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2206
2207 * mips.h: Added M_LI_S and M_LI_SS.
2208
2209 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2210
2211 * h8300.h: Get some rare mov.bs correct.
2212
2213 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2214
2215 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2216 been included.
2217
2218 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2219
2220 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2221 jump instructions, for use in disassemblers.
2222
2223 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2224
2225 * m88k.h: Make bitfields just unsigned, not unsigned long or
2226 unsigned short.
2227
2228 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2229
2230 * hppa.h: New argument type 'y'. Use in various float instructions.
2231
2232 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2233
2234 * hppa.h (break): First immediate field is unsigned.
2235
2236 * hppa.h: Add rfir instruction.
2237
2238 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2239
2240 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2241
2242 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2243
2244 * mips.h: Reworked the hazard information somewhat, and fixed some
2245 bugs in the instruction hazard descriptions.
2246
2247 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2248
2249 * m88k.h: Corrected a couple of opcodes.
2250
2251 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2252
2253 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2254 new version includes instruction hazard information, but is
2255 otherwise reasonably similar.
2256
2257 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2258
2259 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2260
2261 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2262
2263 Patches from Jeff Law, law@cs.utah.edu:
2264 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2265 Make the tables be the same for the following instructions:
2266 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2267 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2268 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2269 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2270 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2271 "fcmp", and "ftest".
2272
2273 * hppa.h: Make new and old tables the same for "break", "mtctl",
2274 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2275 Fix typo in last patch. Collapse several #ifdefs into a
2276 single #ifdef.
2277
2278 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2279 of the comments up-to-date.
2280
2281 * hppa.h: Update "free list" of letters and update
2282 comments describing each letter's function.
2283
2284 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2285
2286 * h8300.h: Lots of little fixes for the h8/300h.
2287
2288 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2289
2290 Support for H8/300-H
2291 * h8300.h: Lots of new opcodes.
2292
2293 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2294
2295 * h8300.h: checkpoint, includes H8/300-H opcodes.
2296
2297 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2298
2299 * Patches from Jeffrey Law <law@cs.utah.edu>.
2300 * hppa.h: Rework single precision FP
2301 instructions so that they correctly disassemble code
2302 PA1.1 code.
2303
2304 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2305
2306 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2307 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2308
2309 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2310
2311 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2312 gdb will define it for now.
2313
2314 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2315
2316 * sparc.h: Don't end enumerator list with comma.
2317
2318 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2319
2320 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2321 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2322 ("bc2t"): Correct typo.
2323 ("[ls]wc[023]"): Use T rather than t.
2324 ("c[0123]"): Define general coprocessor instructions.
2325
2326 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2327
2328 * m68k.h: Move split point for gcc compilation more towards
2329 middle.
2330
2331 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2332
2333 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2334 simply wrong, ics, rfi, & rfsvc were missing).
2335 Add "a" to opr_ext for "bb". Doc fix.
2336
2337 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2338
2339 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2340 * mips.h: Add casts, to suppress warnings about shifting too much.
2341 * m68k.h: Document the placement code '9'.
2342
2343 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2344
2345 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2346 allows callers to break up the large initialized struct full of
2347 opcodes into two half-sized ones. This permits GCC to compile
2348 this module, since it takes exponential space for initializers.
2349 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2350
2351 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2352
2353 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2354 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2355 initialized structs in it.
2356
2357 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2358
2359 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2360 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2361 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2362
2363 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2364
2365 * mips.h: document "i" and "j" operands correctly.
2366
2367 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2368
2369 * mips.h: Removed endianness dependency.
2370
2371 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2372
2373 * h8300.h: include info on number of cycles per instruction.
2374
2375 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2376
2377 * hppa.h: Move handy aliases to the front. Fix masks for extract
2378 and deposit instructions.
2379
2380 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2381
2382 * i386.h: accept shld and shrd both with and without the shift
2383 count argument, which is always %cl.
2384
2385 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2386
2387 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2388 (one_byte_segment_defaults, two_byte_segment_defaults,
2389 i386_prefixtab_end): Ditto.
2390
2391 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2392
2393 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2394 for operand 2; from John Carr, jfc@dsg.dec.com.
2395
2396 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2397
2398 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2399 always use 16-bit offsets. Makes calculated-size jump tables
2400 feasible.
2401
2402 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2403
2404 * i386.h: Fix one-operand forms of in* and out* patterns.
2405
2406 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2407
2408 * m68k.h: Added CPU32 support.
2409
2410 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2411
2412 * mips.h (break): Disassemble the argument. Patch from
2413 jonathan@cs.stanford.edu (Jonathan Stone).
2414
2415 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2416
2417 * m68k.h: merged Motorola and MIT syntax.
2418
2419 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2420
2421 * m68k.h (pmove): make the tests less strict, the 68k book is
2422 wrong.
2423
2424 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2425
2426 * m68k.h (m68ec030): Defined as alias for 68030.
2427 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2428 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2429 them. Tightened description of "fmovex" to distinguish it from
2430 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2431 up descriptions that claimed versions were available for chips not
2432 supporting them. Added "pmovefd".
2433
2434 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2435
2436 * m68k.h: fix where the . goes in divull
2437
2438 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2439
2440 * m68k.h: the cas2 instruction is supposed to be written with
2441 indirection on the last two operands, which can be either data or
2442 address registers. Added a new operand type 'r' which accepts
2443 either register type. Added new cases for cas2l and cas2w which
2444 use them. Corrected masks for cas2 which failed to recognize use
2445 of address register.
2446
2447 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2448
2449 * m68k.h: Merged in patches (mostly m68040-specific) from
2450 Colin Smith <colin@wrs.com>.
2451
2452 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2453 base). Also cleaned up duplicates, re-ordered instructions for
2454 the sake of dis-assembling (so aliases come after standard names).
2455 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2456
2457 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2458
2459 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2460 all missing .s
2461
2462 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2463
2464 * sparc.h: Moved tables to BFD library.
2465
2466 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2467
2468 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2469
2470 * h8300.h: Finish filling in all the holes in the opcode table,
2471 so that the Lucid C compiler can digest this as well...
2472
2473 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2474
2475 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2476 Fix opcodes on various sizes of fild/fist instructions
2477 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2478 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2479
2480 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2481
2482 * h8300.h: Fill in all the holes in the opcode table so that the
2483 losing HPUX C compiler can digest this...
2484
2485 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2486
2487 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2488 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2489
2490 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2491
2492 * sparc.h: Add new architecture variant sparclite; add its scan
2493 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2494
2495 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2496
2497 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2498 fy@lucid.com).
2499
2500 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2501
2502 * rs6k.h: New version from IBM (Metin).
2503
2504 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2505
2506 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2507 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2508
2509 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2510
2511 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2512
2513 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2514
2515 * m68k.h (one, two): Cast macro args to unsigned to suppress
2516 complaints from compiler and lint about integer overflow during
2517 shift.
2518
2519 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2520
2521 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2522
2523 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2524
2525 * mips.h: Make bitfield layout depend on the HOST compiler,
2526 not on the TARGET system.
2527
2528 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2529
2530 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2531 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2532 <TRANLE@INTELLICORP.COM>.
2533
2534 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2535
2536 * h8300.h: turned op_type enum into #define list
2537
2538 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2539
2540 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2541 similar instructions -- they've been renamed to "fitoq", etc.
2542 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2543 number of arguments.
2544 * h8300.h: Remove extra ; which produces compiler warning.
2545
2546 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2547
2548 * sparc.h: fix opcode for tsubcctv.
2549
2550 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2551
2552 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2553
2554 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2555
2556 * sparc.h (nop): Made the 'lose' field be even tighter,
2557 so only a standard 'nop' is disassembled as a nop.
2558
2559 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2560
2561 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2562 disassembled as a nop.
2563
2564 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2565
2566 * m68k.h, sparc.h: ANSIfy enums.
2567
2568 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2569
2570 * sparc.h: fix a typo.
2571
2572 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2573
2574 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2575 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2576 vax.h: Renamed from ../<foo>-opcode.h.
2577
2578 \f
2579 Local Variables:
2580 version-control: never
2581 End:
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