1 2000-03-27 Nick Clifton <nickc@cygnus.com>
3 * d30v.h (SHORT_A1): Fix value.
4 (SHORT_AR): Renumber so that it is at the end of the list of short
5 instructions, not the end of the list of long instructions.
7 2000-03-26 Alan Modra <alan@linuxcare.com>
9 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
10 problem isn't really specific to Unixware.
11 (OLDGCC_COMPAT): Define.
12 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
16 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
19 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
20 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
21 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
22 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
23 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
24 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
25 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
27 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
29 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
30 fistpd without suffix.
32 2000-02-24 Nick Clifton <nickc@cygnus.com>
34 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
35 'signed_overflow_ok_p'.
36 Delete prototypes for cgen_set_flags() and cgen_get_flags().
38 2000-02-24 Andrew Haley <aph@cygnus.com>
40 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
41 (CGEN_CPU_TABLE): flags: new field.
42 Add prototypes for new functions.
44 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
46 * i386.h: Add some more UNIXWARE_COMPAT comments.
48 2000-02-23 Linas Vepstas <linas@linas.org>
52 2000-02-22 Andrew Haley <aph@cygnus.com>
54 * mips.h: (OPCODE_IS_MEMBER): Add comment.
56 1999-12-30 Andrew Haley <aph@cygnus.com>
58 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
59 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
62 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
64 * i386.h: Qualify intel mode far call and jmp with x_Suf.
66 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
68 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
69 indirect jumps and calls. Add FF/3 call for intel mode.
71 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
73 * mn10300.h: Add new operand types. Add new instruction formats.
75 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
77 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
80 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
82 * mips.h (INSN_ISA5): New.
84 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
86 * mips.h (OPCODE_IS_MEMBER): New.
88 1999-10-29 Nick Clifton <nickc@cygnus.com>
90 * d30v.h (SHORT_AR): Define.
92 1999-10-18 Michael Meissner <meissner@cygnus.com>
94 * alpha.h (alpha_num_opcodes): Convert to unsigned.
95 (alpha_num_operands): Ditto.
97 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
99 * hppa.h (pa_opcodes): Add load and store cache control to
100 instructions. Add ordered access load and store.
102 * hppa.h (pa_opcode): Add new entries for addb and addib.
104 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
106 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
108 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
110 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
112 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
114 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
115 and "be" using completer prefixes.
117 * hppa.h (pa_opcodes): Add initializers to silence compiler.
119 * hppa.h: Update comments about character usage.
121 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
123 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
124 up the new fstw & bve instructions.
126 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
128 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
131 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
133 * hppa.h (pa_opcodes): Add long offset double word load/store
136 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
139 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
141 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
143 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
145 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
147 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
149 * hppa.h (pa_opcodes): Add support for "b,l".
151 * hppa.h (pa_opcodes): Add support for "b,gate".
153 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
155 * hppa.h (pa_opcodes): Use 'fX' for first register operand
158 * hppa.h (pa_opcodes): Fix mask for probe and probei.
160 * hppa.h (pa_opcodes): Fix mask for depwi.
162 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
164 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
165 an explicit output argument.
167 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
169 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
170 Add a few PA2.0 loads and store variants.
172 1999-09-04 Steve Chamberlain <sac@pobox.com>
176 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
178 * i386.h (i386_regtab): Move %st to top of table, and split off
179 other fp reg entries.
180 (i386_float_regtab): To here.
182 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
184 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
187 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
190 * hppa.h: Document new completers and args.
191 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
192 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
193 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
196 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
197 hshr, hsub, mixh, mixw, permh.
199 * hppa.h (pa_opcodes): Change completers in instructions to
202 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
203 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
205 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
206 fnegabs to use 'I' instead of 'F'.
208 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
210 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
211 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
212 Alphabetically sort PIII insns.
214 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
216 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
218 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
220 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
221 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
223 * hppa.h: Document 64 bit condition completers.
225 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
227 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
229 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
231 * i386.h (i386_optab): Add DefaultSize modifier to all insns
232 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
233 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
235 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
236 Jeff Law <law@cygnus.com>
238 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
240 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
242 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
243 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
245 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
247 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
249 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
251 * hppa.h (struct pa_opcode): Add new field "flags".
252 (FLAGS_STRICT): Define.
254 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
255 Jeff Law <law@cygnus.com>
257 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
259 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
261 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
263 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
264 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
265 flag to fcomi and friends.
267 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
269 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
270 integer logical instructions.
272 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
274 * m68k.h: Document new formats `E', `G', `H' and new places `N',
277 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
278 and new places `m', `M', `h'.
280 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
282 * hppa.h (pa_opcodes): Add several processor specific system
285 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
287 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
288 "addb", and "addib" to be used by the disassembler.
290 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
292 * i386.h (ReverseModrm): Remove all occurences.
293 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
294 movmskps, pextrw, pmovmskb, maskmovq.
295 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
296 ignore the data size prefix.
298 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
299 Mostly stolen from Doug Ledford <dledford@redhat.com>
301 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
303 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
305 1999-04-14 Doug Evans <devans@casey.cygnus.com>
307 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
308 (CGEN_ATTR_TYPE): Update.
309 (CGEN_ATTR_MASK): Number booleans starting at 0.
310 (CGEN_ATTR_VALUE): Update.
311 (CGEN_INSN_ATTR): Update.
313 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
315 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
318 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
320 * hppa.h (bb, bvb): Tweak opcode/mask.
323 1999-03-22 Doug Evans <devans@casey.cygnus.com>
325 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
326 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
327 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
328 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
329 Delete member max_insn_size.
330 (enum cgen_cpu_open_arg): New enum.
331 (cpu_open): Update prototype.
332 (cpu_open_1): Declare.
333 (cgen_set_cpu): Delete.
335 1999-03-11 Doug Evans <devans@casey.cygnus.com>
337 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
338 (CGEN_OPERAND_NIL): New macro.
339 (CGEN_OPERAND): New member `type'.
340 (@arch@_cgen_operand_table): Delete decl.
341 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
342 (CGEN_OPERAND_TABLE): New struct.
343 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
344 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
345 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
346 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
347 {get,set}_{int,vma}_operand.
348 (@arch@_cgen_cpu_open): New arg `isa'.
349 (cgen_set_cpu): Ditto.
351 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
353 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
355 1999-02-25 Doug Evans <devans@casey.cygnus.com>
357 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
358 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
360 (CGEN_HW_TABLE): New struct.
361 (hw_table): Delete declaration.
362 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
363 to table entry to enum.
364 (CGEN_OPINST): Ditto.
365 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
367 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
369 * alpha.h (AXP_OPCODE_EV6): New.
370 (AXP_OPCODE_NOPAL): Include it.
372 1999-02-09 Doug Evans <devans@casey.cygnus.com>
374 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
375 All uses updated. New members int_insn_p, max_insn_size,
376 parse_operand,insert_operand,extract_operand,print_operand,
377 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
378 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
379 extract_handlers,print_handlers.
380 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
381 (CGEN_ATTR_BOOL_OFFSET): New macro.
382 (CGEN_ATTR_MASK): Subtract it to compute bit number.
383 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
384 (cgen_opcode_handler): Renamed from cgen_base.
385 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
386 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
388 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
389 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
390 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
391 (CGEN_OPCODE,CGEN_IBASE): New types.
392 (CGEN_INSN): Rewrite.
393 (CGEN_{ASM,DIS}_HASH*): Delete.
394 (init_opcode_table,init_ibld_table): Declare.
395 (CGEN_INSN_ATTR): New type.
397 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
399 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
400 (x_FP, d_FP, dls_FP, sldx_FP): Define.
401 Change *Suf definitions to include x and d suffixes.
402 (movsx): Use w_Suf and b_Suf.
404 (movs): Use bwld_Suf.
405 (fld): Change ordering. Use sld_FP.
406 (fild): Add Intel Syntax equivalent of fildq.
409 (fstp): Use sld_FP. Add x_FP version.
410 (fistp): LLongMem version for Intel Syntax.
411 (fcom, fcomp): Use sld_FP.
412 (fadd, fiadd, fsub): Use sld_FP.
414 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
416 1999-01-27 Doug Evans <devans@casey.cygnus.com>
418 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
421 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
423 * hppa.h (bv): Fix mask.
425 1999-01-05 Doug Evans <devans@casey.cygnus.com>
427 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
429 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
430 (CGEN_ATTR_TABLE): New member dfault.
432 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
434 * mips.h (MIPS16_INSN_BRANCH): New.
436 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
438 The following is part of a change made by Edith Epstein
439 <eepstein@sophia.cygnus.com> as part of a project to merge in
440 changes by HP; HP did not create ChangeLog entries.
442 * hppa.h (completer_chars): list of chars to not put a space
445 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
447 * i386.h (i386_optab): Permit w suffix on processor control and
448 status word instructions.
450 1998-11-30 Doug Evans <devans@casey.cygnus.com>
452 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
453 (struct cgen_keyword_entry): Ditto.
454 (struct cgen_operand): Ditto.
455 (CGEN_IFLD): New typedef, with associated access macros.
456 (CGEN_IFMT): New typedef, with associated access macros.
457 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
458 (CGEN_IVALUE): New typedef.
459 (struct cgen_insn): Delete const on syntax,attrs members.
460 `format' now points to format data. Type of `value' is now
462 (struct cgen_opcode_table): New member ifld_table.
464 1998-11-18 Doug Evans <devans@casey.cygnus.com>
466 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
467 (CGEN_OPERAND_INSTANCE): New member `attrs'.
468 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
469 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
470 (cgen_opcode_table): Update type of dis_hash fn.
471 (extract_operand): Update type of `insn_value' arg.
473 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
475 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
477 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
479 * mips.h (INSN_MULT): Added.
481 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
483 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
485 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
487 * cgen.h (CGEN_INSN_INT): New typedef.
488 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
489 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
490 (CGEN_INSN_BYTES_PTR): New typedef.
491 (CGEN_EXTRACT_INFO): New typedef.
492 (cgen_insert_fn,cgen_extract_fn): Update.
493 (cgen_opcode_table): New member `insn_endian'.
494 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
495 (insert_operand,extract_operand): Update.
496 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
498 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
500 * cgen.h (CGEN_ATTR_BOOLS): New macro.
501 (struct CGEN_HW_ENTRY): New member `attrs'.
502 (CGEN_HW_ATTR): New macro.
503 (struct CGEN_OPERAND_INSTANCE): New member `name'.
504 (CGEN_INSN_INVALID_P): New macro.
506 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
510 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
512 From Robert Andrew Dale <rob@nb.net>
513 * i386.h (i386_optab): Add AMD 3DNow! instructions.
514 (AMD_3DNOW_OPCODE): Define.
516 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
518 * d30v.h (EITHER_BUT_PREFER_MU): Define.
520 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
522 * cgen.h (cgen_insn): #if 0 out element `cdx'.
524 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
526 Move all global state data into opcode table struct, and treat
527 opcode table as something that is "opened/closed".
528 * cgen.h (CGEN_OPCODE_DESC): New type.
529 (all fns): New first arg of opcode table descriptor.
530 (cgen_set_parse_operand_fn): Add prototype.
531 (cgen_current_machine,cgen_current_endian): Delete.
532 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
533 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
534 dis_hash_table,dis_hash_table_entries.
535 (opcode_open,opcode_close): Add prototypes.
537 * cgen.h (cgen_insn): New element `cdx'.
539 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
541 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
543 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
545 * mn10300.h: Add "no_match_operands" field for instructions.
546 (MN10300_MAX_OPERANDS): Define.
548 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
550 * cgen.h (cgen_macro_insn_count): Declare.
552 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
554 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
555 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
556 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
557 set_{int,vma}_operand.
559 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
561 * mn10300.h: Add "machine" field for instructions.
562 (MN103, AM30): Define machine types.
564 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
566 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
568 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
570 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
572 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
574 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
576 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
577 those that happen to be implemented on pentiums.
579 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
581 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
582 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
583 with Size16|IgnoreSize or Size32|IgnoreSize.
585 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
587 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
588 (REPE): Rename to REPE_PREFIX_OPCODE.
589 (i386_regtab_end): Remove.
590 (i386_prefixtab, i386_prefixtab_end): Remove.
591 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
593 (MAX_OPCODE_SIZE): Define.
594 (i386_optab_end): Remove.
598 * i386.h (i386_optab): Allow 16 bit displacement for `mov
599 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
600 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
601 data32, dword, and adword prefixes.
602 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
605 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
607 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
609 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
610 register operands, because this is a common idiom. Flag them with
611 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
612 fdivrp because gcc erroneously generates them. Also flag with a
615 * i386.h: Add suffix modifiers to most insns, and tighter operand
616 checks in some cases. Fix a number of UnixWare compatibility
617 issues with float insns. Merge some floating point opcodes, using
618 new FloatMF modifier.
619 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
622 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
623 IgnoreDataSize where appropriate.
625 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
627 * i386.h: (one_byte_segment_defaults): Remove.
628 (two_byte_segment_defaults): Remove.
629 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
631 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
633 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
634 (cgen_hw_lookup_by_num): Declare.
636 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
638 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
639 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
641 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
643 * cgen.h (cgen_asm_init_parse): Delete.
644 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
645 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
647 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
649 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
650 (cgen_asm_finish_insn): Update prototype.
651 (cgen_insn): New members num, data.
652 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
653 dis_hash, dis_hash_table_size moved to ...
654 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
655 All uses updated. New members asm_hash_p, dis_hash_p.
656 (CGEN_MINSN_EXPANSION): New struct.
657 (cgen_expand_macro_insn): Declare.
658 (cgen_macro_insn_count): Declare.
659 (get_insn_operands): Update prototype.
660 (lookup_get_insn_operands): Declare.
662 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
664 * i386.h (i386_optab): Change iclrKludge and imulKludge to
665 regKludge. Add operands types for string instructions.
667 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
669 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
672 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
674 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
677 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
679 * i386.h: Remove NoModrm flag from all insns: it's never checked.
680 Add IsString flag to string instructions.
681 (IS_STRING): Don't define.
682 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
683 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
684 (SS_PREFIX_OPCODE): Define.
686 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
688 * i386.h: Revert March 24 patch; no more LinearAddress.
690 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
692 * i386.h (i386_optab): Remove fwait (9b) from all floating point
693 instructions, and instead add FWait opcode modifier. Add short
694 form of fldenv and fstenv.
695 (FWAIT_OPCODE): Define.
697 * i386.h (i386_optab): Change second operand constraint of `mov
698 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
699 allow legal instructions such as `movl %gs,%esi'
701 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
703 * h8300.h: Various changes to fully bracket initializers.
705 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
707 * i386.h: Set LinearAddress for lidt and lgdt.
709 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
711 * cgen.h (CGEN_BOOL_ATTR): New macro.
713 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
715 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
717 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
719 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
720 (cgen_insn): Record syntax and format entries here, rather than
723 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
725 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
727 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
729 * cgen.h (cgen_insert_fn): Change type of result to const char *.
730 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
731 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
733 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
735 * cgen.h (lookup_insn): New argument alias_p.
737 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
739 Fix rac to accept only a0:
740 * d10v.h (OPERAND_ACC): Split into:
741 (OPERAND_ACC0, OPERAND_ACC1) .
742 (OPERAND_GPR): Define.
744 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
746 * cgen.h (CGEN_FIELDS): Define here.
747 (CGEN_HW_ENTRY): New member `type'.
748 (hw_list): Delete decl.
749 (enum cgen_mode): Declare.
750 (CGEN_OPERAND): New member `hw'.
751 (enum cgen_operand_instance_type): Declare.
752 (CGEN_OPERAND_INSTANCE): New type.
753 (CGEN_INSN): New member `operands'.
754 (CGEN_OPCODE_DATA): Make hw_list const.
755 (get_insn_operands,lookup_insn): Add prototypes for.
757 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
759 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
760 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
761 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
762 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
764 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
766 * cgen.h: Correct typo in comment end marker.
768 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
772 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
774 * cgen.h: Add prototypes for cgen_save_fixups(),
775 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
776 of cgen_asm_finish_insn() to return a char *.
778 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
780 * cgen.h: Formatting changes to improve readability.
782 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
784 * cgen.h (*): Clean up pass over `struct foo' usage.
785 (CGEN_ATTR): Make unsigned char.
786 (CGEN_ATTR_TYPE): Update.
787 (CGEN_ATTR_{ENTRY,TABLE}): New types.
788 (cgen_base): Move member `attrs' to cgen_insn.
789 (CGEN_KEYWORD): New member `null_entry'.
790 (CGEN_{SYNTAX,FORMAT}): New types.
791 (cgen_insn): Format and syntax separated from each other.
793 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
795 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
796 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
797 flags_{used,set} long.
798 (d30v_operand): Make flags field long.
800 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
802 * m68k.h: Fix comment describing operand types.
804 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
806 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
807 everything else after down.
809 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
811 * d10v.h (OPERAND_FLAG): Split into:
812 (OPERAND_FFLAG, OPERAND_CFLAG) .
814 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
816 * mips.h (struct mips_opcode): Changed comments to reflect new
819 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
821 * mips.h: Added to comments a quick-ref list of all assigned
822 operand type characters.
823 (OP_{MASK,SH}_PERFREG): New macros.
825 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
827 * sparc.h: Add '_' and '/' for v9a asr's.
828 Patch from David Miller <davem@vger.rutgers.edu>
830 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
832 * h8300.h: Bit ops with absolute addresses not in the 8 bit
833 area are not available in the base model (H8/300).
835 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
837 * m68k.h: Remove documentation of ` operand specifier.
839 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
841 * m68k.h: Document q and v operand specifiers.
843 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
845 * v850.h (struct v850_opcode): Add processors field.
846 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
847 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
848 (PROCESSOR_V850EA): New bit constants.
850 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
852 Merge changes from Martin Hunt:
854 * d30v.h: Allow up to 64 control registers. Add
857 * d30v.h (LONG_Db): New form for delayed branches.
859 * d30v.h: (LONG_Db): New form for repeati.
861 * d30v.h (SHORT_D2B): New form.
863 * d30v.h (SHORT_A2): New form.
865 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
866 registers are used. Needed for VLIW optimization.
868 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
870 * cgen.h: Move assembler interface section
871 up so cgen_parse_operand_result is defined for cgen_parse_address.
872 (cgen_parse_address): Update prototype.
874 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
876 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
878 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
880 * i386.h (two_byte_segment_defaults): Correct base register 5 in
881 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
884 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
887 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
890 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
891 (JUMP_ON_ECX_ZERO): Remove commented out macro.
893 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
895 * v850.h (V850_NOT_R0): New flag.
897 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
899 * v850.h (struct v850_opcode): Remove flags field.
901 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
903 * v850.h (struct v850_opcode): Add flags field.
904 (struct v850_operand): Extend meaning of 'bits' and 'shift'
906 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
907 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
909 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
913 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
915 * sparc.h (sparc_opcodes): Declare as const.
917 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
919 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
920 uses single or double precision floating point resources.
921 (INSN_NO_ISA, INSN_ISA1): Define.
922 (cpu specific INSN macros): Tweak into bitmasks outside the range
925 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
927 * i386.h: Fix pand opcode.
929 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
931 * mips.h: Widen INSN_ISA and move it to a more convenient
932 bit position. Add INSN_3900.
934 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
936 * mips.h (struct mips_opcode): added new field membership.
938 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
940 * i386.h (movd): only Reg32 is allowed.
942 * i386.h: add fcomp and ud2. From Wayne Scott
943 <wscott@ichips.intel.com>.
945 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
947 * i386.h: Add MMX instructions.
949 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
951 * i386.h: Remove W modifier from conditional move instructions.
953 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
955 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
956 with no arguments to match that generated by the UnixWare
959 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
961 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
962 (cgen_parse_operand_fn): Declare.
963 (cgen_init_parse_operand): Declare.
964 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
966 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
967 (enum cgen_parse_operand_type): New enum.
969 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
971 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
973 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
977 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
979 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
982 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
984 * v850.h (extract): Make unsigned.
986 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
990 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
992 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
993 take a direction bit.
995 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
997 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
999 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1001 * sparc.h: Include <ansidecl.h>. Update function declarations to
1002 use prototypes, and to use const when appropriate.
1004 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1006 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1008 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1010 * d10v.h: Change pre_defined_registers to
1011 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1013 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1015 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1016 Change mips_opcodes from const array to a pointer,
1017 and change bfd_mips_num_opcodes from const int to int,
1018 so that we can increase the size of the mips opcodes table
1021 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1023 * d30v.h (FLAG_X): Remove unused flag.
1025 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1029 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1031 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1032 (PDS_VALUE): Macro to access value field of predefined symbols.
1033 (tic80_next_predefined_symbol): Add prototype.
1035 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1037 * tic80.h (tic80_symbol_to_value): Change prototype to match
1038 change in function, added class parameter.
1040 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1042 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1043 endmask fields, which are somewhat weird in that 0 and 32 are
1044 treated exactly the same.
1046 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1048 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1049 rather than a constant that is 2**X. Reorder them to put bits for
1050 operands that have symbolic names in the upper bits, so they can
1051 be packed into an int where the lower bits contain the value that
1052 corresponds to that symbolic name.
1053 (predefined_symbo): Add struct.
1054 (tic80_predefined_symbols): Declare array of translations.
1055 (tic80_num_predefined_symbols): Declare size of that array.
1056 (tic80_value_to_symbol): Declare function.
1057 (tic80_symbol_to_value): Declare function.
1059 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1061 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1063 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1065 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1066 be the destination register.
1068 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1070 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1071 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1072 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1073 that the opcode can have two vector instructions in a single
1074 32 bit word and we have to encode/decode both.
1076 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1078 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1079 TIC80_OPERAND_RELATIVE for PC relative.
1080 (TIC80_OPERAND_BASEREL): New flag bit for register
1083 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1085 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1087 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1089 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1090 ":s" modifier for scaling.
1092 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1094 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1095 (TIC80_OPERAND_M_LI): Ditto
1097 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1099 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1100 (TIC80_OPERAND_CC): New define for condition code operand.
1101 (TIC80_OPERAND_CR): New define for control register operand.
1103 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1105 * tic80.h (struct tic80_opcode): Name changed.
1106 (struct tic80_opcode): Remove format field.
1107 (struct tic80_operand): Add insertion and extraction functions.
1108 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1112 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1114 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1115 type IV instruction offsets.
1117 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1119 * tic80.h: New file.
1121 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1123 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1125 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1127 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1128 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1129 * v850.h: Fix comment, v850_operand not powerpc_operand.
1131 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1133 * mn10200.h: Flesh out structures and definitions needed by
1134 the mn10200 assembler & disassembler.
1136 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1138 * mips.h: Add mips16 definitions.
1140 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1142 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1144 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1146 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1147 (MN10300_OPERAND_MEMADDR): Define.
1149 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1151 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1153 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1155 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1157 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1159 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1161 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1163 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1165 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1167 * alpha.h: Don't include "bfd.h"; private relocation types are now
1168 negative to minimize problems with shared libraries. Organize
1169 instruction subsets by AMASK extensions and PALcode
1171 (struct alpha_operand): Move flags slot for better packing.
1173 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1175 * v850.h (V850_OPERAND_RELAX): New operand flag.
1177 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1179 * mn10300.h (FMT_*): Move operand format definitions
1182 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1184 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1186 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1188 * mn10300.h (mn10300_opcode): Add "format" field.
1189 (MN10300_OPERAND_*): Define.
1191 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1193 * mn10x00.h: Delete.
1194 * mn10200.h, mn10300.h: New files.
1196 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1198 * mn10x00.h: New file.
1200 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1202 * v850.h: Add new flag to indicate this instruction uses a PC
1205 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1207 * h8300.h (stmac): Add missing instruction.
1209 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1211 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1214 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1216 * v850.h (V850_OPERAND_EP): Define.
1218 * v850.h (v850_opcode): Add size field.
1220 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1222 * v850.h (v850_operands): Add insert and extract fields, pointers
1223 to functions used to handle unusual operand encoding.
1224 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1225 V850_OPERAND_SIGNED): Defined.
1227 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1229 * v850.h (v850_operands): Add flags field.
1230 (OPERAND_REG, OPERAND_NUM): Defined.
1232 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1236 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1238 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1239 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1240 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1241 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1242 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1245 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1247 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1248 a 3 bit space id instead of a 2 bit space id.
1250 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1252 * d10v.h: Add some additional defines to support the
1253 assembler in determining which operations can be done in parallel.
1255 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1257 * h8300.h (SN): Define.
1258 (eepmov.b): Renamed from "eepmov"
1259 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1262 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1264 * d10v.h (OPERAND_SHIFT): New operand flag.
1266 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1268 * d10v.h: Changes for divs, parallel-only instructions, and
1271 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1273 * d10v.h (pd_reg): Define. Putting the definition here allows
1274 the assembler and disassembler to share the same struct.
1276 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1278 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1279 Williams <steve@icarus.com>.
1281 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1285 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1287 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1289 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1291 * m68k.h (mcf5200): New macro.
1292 Document names of coldfire control registers.
1294 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1296 * h8300.h (SRC_IN_DST): Define.
1298 * h8300.h (UNOP3): Mark the register operand in this insn
1299 as a source operand, not a destination operand.
1300 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1301 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1302 register operand with SRC_IN_DST.
1304 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1306 * alpha.h: New file.
1308 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1310 * rs6k.h: Remove obsolete file.
1312 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1314 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1315 fdivp, and fdivrp. Add ffreep.
1317 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1319 * h8300.h: Reorder various #defines for readability.
1320 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1321 (BITOP): Accept additional (unused) argument. All callers changed.
1324 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1326 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1327 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1328 (BITOP, EBITOP): Handle new H8/S addressing modes for
1330 (UNOP3): Handle new shift/rotate insns on the H8/S.
1331 (insns using exr): New instructions.
1332 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1334 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1336 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1339 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1341 * h8300.h (START): Remove.
1342 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1343 and mov.l insns that can be relaxed.
1345 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1347 * i386.h: Remove Abs32 from lcall.
1349 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1351 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1352 (SLCPOP): New macro.
1353 Mark X,Y opcode letters as in use.
1355 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1357 * sparc.h (F_FLOAT, F_FBR): Define.
1359 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1361 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1363 (ABS8SRC,ABS8DST): Add ABS8MEM.
1364 (add.l): Fix reg+reg variant.
1365 (eepmov.w): Renamed from eepmovw.
1366 (ldc,stc): Fix many cases.
1368 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1370 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1372 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1374 * sparc.h (O): Mark operand letter as in use.
1376 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1378 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1379 Mark operand letters uU as in use.
1381 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1383 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1384 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1385 (SPARC_OPCODE_SUPPORTED): New macro.
1386 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1389 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1391 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1392 declaration consistent with return type in definition.
1394 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1396 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1398 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1400 * i386.h (i386_regtab): Add 80486 test registers.
1402 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1404 * i960.h (I_HX): Define.
1405 (i960_opcodes): Add HX instruction.
1407 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1409 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1412 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1414 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1415 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1416 (bfd_* defines): Delete.
1417 (sparc_opcode_archs): Replaces architecture_pname.
1418 (sparc_opcode_lookup_arch): Declare.
1419 (NUMOPCODES): Delete.
1421 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1423 * sparc.h (enum sparc_architecture): Add v9a.
1424 (ARCHITECTURES_CONFLICT_P): Update.
1426 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1428 * i386.h: Added Pentium Pro instructions.
1430 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1432 * m68k.h: Document new 'W' operand place.
1434 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1436 * hppa.h: Add lci and syncdma instructions.
1438 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1440 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1443 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1445 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1446 assembler's -mcom and -many switches.
1448 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1450 * i386.h: Fix cmpxchg8b extension opcode description.
1452 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1454 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1457 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1459 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1461 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1463 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1465 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1467 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1469 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1471 * m68kmri.h: Remove.
1473 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1474 declarations. Remove F_ALIAS and flag field of struct
1475 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1476 int. Make name and args fields of struct m68k_opcode const.
1478 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1480 * sparc.h (F_NOTV9): Define.
1482 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1484 * mips.h (INSN_4010): Define.
1486 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1488 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1490 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1491 * m68k.h: Fix argument descriptions of coprocessor
1492 instructions to allow only alterable operands where appropriate.
1493 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1494 (m68k_opcode_aliases): Add more aliases.
1496 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1498 * m68k.h: Added explcitly short-sized conditional branches, and a
1499 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1500 svr4-based configurations.
1502 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1504 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1505 * i386.h: added missing Data16/Data32 flags to a few instructions.
1507 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1509 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1510 (OP_MASK_BCC, OP_SH_BCC): Define.
1511 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1512 (OP_MASK_CCC, OP_SH_CCC): Define.
1513 (INSN_READ_FPR_R): Define.
1516 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1518 * m68k.h (enum m68k_architecture): Deleted.
1519 (struct m68k_opcode_alias): New type.
1520 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1521 matching constraints, values and flags. As a side effect of this,
1522 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1523 as I know were never used, now may need re-examining.
1524 (numopcodes): Now const.
1525 (m68k_opcode_aliases, numaliases): New variables.
1527 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1528 m68k_opcode_aliases; update declaration of m68k_opcodes.
1530 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1532 * hppa.h (delay_type): Delete unused enumeration.
1533 (pa_opcode): Replace unused delayed field with an architecture
1535 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1537 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1539 * mips.h (INSN_ISA4): Define.
1541 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1543 * mips.h (M_DLA_AB, M_DLI): Define.
1545 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1547 * hppa.h (fstwx): Fix single-bit error.
1549 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1551 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1553 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1555 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1556 debug registers. From Charles Hannum (mycroft@netbsd.org).
1558 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1560 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1562 * i386.h (MOV_AX_DISP32): New macro.
1563 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1564 of several call/return instructions.
1565 (ADDR_PREFIX_OPCODE): New macro.
1567 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1569 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1571 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1572 it pointer to const char;
1573 (struct vot, field `name'): ditto.
1575 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1577 * vax.h: Supply and properly group all values in end sentinel.
1579 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1581 * mips.h (INSN_ISA, INSN_4650): Define.
1583 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1585 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1586 systems with a separate instruction and data cache, such as the
1587 29040, these instructions take an optional argument.
1589 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1591 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1594 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1596 * mips.h (INSN_STORE_MEMORY): Define.
1598 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1600 * sparc.h: Document new operand type 'x'.
1602 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1604 * i960.h (I_CX2): New instruction category. It includes
1605 instructions available on Cx and Jx processors.
1606 (I_JX): New instruction category, for JX-only instructions.
1607 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1608 Jx-only instructions, in I_JX category.
1610 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1612 * ns32k.h (endop): Made pointer const too.
1614 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1616 * ns32k.h: Drop Q operand type as there is no correct use
1617 for it. Add I and Z operand types which allow better checking.
1619 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1621 * h8300.h (xor.l) :fix bit pattern.
1622 (L_2): New size of operand.
1625 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1627 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1629 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1631 * sparc.h: Include v9 definitions.
1633 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1635 * m68k.h (m68060): Defined.
1636 (m68040up, mfloat, mmmu): Include it.
1637 (struct m68k_opcode): Widen `arch' field.
1638 (m68k_opcodes): Updated for M68060. Removed comments that were
1639 instructions commented out by "JF" years ago.
1641 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1643 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1644 add a one-bit `flags' field.
1645 (F_ALIAS): New macro.
1647 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1649 * h8300.h (dec, inc): Get encoding right.
1651 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1653 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1655 (PPC_OPERAND_SIGNED): Define.
1656 (PPC_OPERAND_SIGNOPT): Define.
1658 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1660 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1661 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1663 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1665 * i386.h: Reverse last change. It'll be handled in gas instead.
1667 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1669 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1670 slower on the 486 and used the implicit shift count despite the
1671 explicit operand. The one-operand form is still available to get
1672 the shorter form with the implicit shift count.
1674 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1676 * hppa.h: Fix typo in fstws arg string.
1678 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1680 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1682 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1684 * ppc.h (PPC_OPCODE_601): Define.
1686 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1688 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1689 (so we can determine valid completers for both addb and addb[tf].)
1691 * hppa.h (xmpyu): No floating point format specifier for the
1694 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1696 * ppc.h (PPC_OPERAND_NEXT): Define.
1697 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1698 (struct powerpc_macro): Define.
1699 (powerpc_macros, powerpc_num_macros): Declare.
1701 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1703 * ppc.h: New file. Header file for PowerPC opcode table.
1705 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1707 * hppa.h: More minor template fixes for sfu and copr (to allow
1708 for easier disassembly).
1710 * hppa.h: Fix templates for all the sfu and copr instructions.
1712 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1714 * i386.h (push): Permit Imm16 operand too.
1716 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1718 * h8300.h (andc): Exists in base arch.
1720 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1722 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1723 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1725 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1727 * hppa.h: Add FP quadword store instructions.
1729 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1731 * mips.h: (M_J_A): Added.
1734 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1736 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1737 <mellon@pepper.ncd.com>.
1739 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1741 * hppa.h: Immediate field in probei instructions is unsigned,
1742 not low-sign extended.
1744 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1746 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1748 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1750 * i386.h: Add "fxch" without operand.
1752 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1754 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1756 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1758 * hppa.h: Add gfw and gfr to the opcode table.
1760 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1762 * m88k.h: extended to handle m88110.
1764 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1766 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1769 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1771 * i960.h (i960_opcodes): Properly bracket initializers.
1773 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1775 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1777 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1779 * m68k.h (two): Protect second argument with parentheses.
1781 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1783 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1784 Deleted old in/out instructions in "#if 0" section.
1786 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1788 * i386.h (i386_optab): Properly bracket initializers.
1790 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1792 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1793 Jeff Law, law@cs.utah.edu).
1795 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1797 * i386.h (lcall): Accept Imm32 operand also.
1799 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1801 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1804 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1806 * mips.h (INSN_*): Changed values. Removed unused definitions.
1807 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1808 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1809 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1810 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1811 (M_*): Added new values for r6000 and r4000 macros.
1812 (ANY_DELAY): Removed.
1814 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1816 * mips.h: Added M_LI_S and M_LI_SS.
1818 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1820 * h8300.h: Get some rare mov.bs correct.
1822 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1824 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1827 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1829 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1830 jump instructions, for use in disassemblers.
1832 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1834 * m88k.h: Make bitfields just unsigned, not unsigned long or
1837 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1839 * hppa.h: New argument type 'y'. Use in various float instructions.
1841 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1843 * hppa.h (break): First immediate field is unsigned.
1845 * hppa.h: Add rfir instruction.
1847 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1849 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1851 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1853 * mips.h: Reworked the hazard information somewhat, and fixed some
1854 bugs in the instruction hazard descriptions.
1856 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1858 * m88k.h: Corrected a couple of opcodes.
1860 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1862 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1863 new version includes instruction hazard information, but is
1864 otherwise reasonably similar.
1866 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1868 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1870 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1872 Patches from Jeff Law, law@cs.utah.edu:
1873 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1874 Make the tables be the same for the following instructions:
1875 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1876 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1877 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1878 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1879 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1880 "fcmp", and "ftest".
1882 * hppa.h: Make new and old tables the same for "break", "mtctl",
1883 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1884 Fix typo in last patch. Collapse several #ifdefs into a
1887 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1888 of the comments up-to-date.
1890 * hppa.h: Update "free list" of letters and update
1891 comments describing each letter's function.
1893 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1895 * h8300.h: checkpoint, includes H8/300-H opcodes.
1897 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1899 * Patches from Jeffrey Law <law@cs.utah.edu>.
1900 * hppa.h: Rework single precision FP
1901 instructions so that they correctly disassemble code
1904 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1906 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1907 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1909 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1911 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1912 gdb will define it for now.
1914 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1916 * sparc.h: Don't end enumerator list with comma.
1918 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1920 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1921 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1922 ("bc2t"): Correct typo.
1923 ("[ls]wc[023]"): Use T rather than t.
1924 ("c[0123]"): Define general coprocessor instructions.
1926 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1928 * m68k.h: Move split point for gcc compilation more towards
1931 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1933 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1934 simply wrong, ics, rfi, & rfsvc were missing).
1935 Add "a" to opr_ext for "bb". Doc fix.
1937 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1939 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1940 * mips.h: Add casts, to suppress warnings about shifting too much.
1941 * m68k.h: Document the placement code '9'.
1943 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1945 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1946 allows callers to break up the large initialized struct full of
1947 opcodes into two half-sized ones. This permits GCC to compile
1948 this module, since it takes exponential space for initializers.
1949 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1951 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1953 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1954 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1955 initialized structs in it.
1957 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1959 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1960 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1961 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1963 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1965 * mips.h: document "i" and "j" operands correctly.
1967 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1969 * mips.h: Removed endianness dependency.
1971 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1973 * h8300.h: include info on number of cycles per instruction.
1975 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1977 * hppa.h: Move handy aliases to the front. Fix masks for extract
1978 and deposit instructions.
1980 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1982 * i386.h: accept shld and shrd both with and without the shift
1983 count argument, which is always %cl.
1985 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1987 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1988 (one_byte_segment_defaults, two_byte_segment_defaults,
1989 i386_prefixtab_end): Ditto.
1991 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1993 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1994 for operand 2; from John Carr, jfc@dsg.dec.com.
1996 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1998 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1999 always use 16-bit offsets. Makes calculated-size jump tables
2002 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2004 * i386.h: Fix one-operand forms of in* and out* patterns.
2006 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2008 * m68k.h: Added CPU32 support.
2010 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2012 * mips.h (break): Disassemble the argument. Patch from
2013 jonathan@cs.stanford.edu (Jonathan Stone).
2015 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2017 * m68k.h: merged Motorola and MIT syntax.
2019 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2021 * m68k.h (pmove): make the tests less strict, the 68k book is
2024 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2026 * m68k.h (m68ec030): Defined as alias for 68030.
2027 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2028 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2029 them. Tightened description of "fmovex" to distinguish it from
2030 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2031 up descriptions that claimed versions were available for chips not
2032 supporting them. Added "pmovefd".
2034 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2036 * m68k.h: fix where the . goes in divull
2038 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2040 * m68k.h: the cas2 instruction is supposed to be written with
2041 indirection on the last two operands, which can be either data or
2042 address registers. Added a new operand type 'r' which accepts
2043 either register type. Added new cases for cas2l and cas2w which
2044 use them. Corrected masks for cas2 which failed to recognize use
2045 of address register.
2047 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2049 * m68k.h: Merged in patches (mostly m68040-specific) from
2050 Colin Smith <colin@wrs.com>.
2052 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2053 base). Also cleaned up duplicates, re-ordered instructions for
2054 the sake of dis-assembling (so aliases come after standard names).
2055 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2057 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2059 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2062 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2064 * sparc.h: Moved tables to BFD library.
2066 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2068 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2070 * h8300.h: Finish filling in all the holes in the opcode table,
2071 so that the Lucid C compiler can digest this as well...
2073 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2075 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2076 Fix opcodes on various sizes of fild/fist instructions
2077 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2078 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2080 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2082 * h8300.h: Fill in all the holes in the opcode table so that the
2083 losing HPUX C compiler can digest this...
2085 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2087 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2088 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2090 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2092 * sparc.h: Add new architecture variant sparclite; add its scan
2093 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2095 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2097 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2100 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2102 * rs6k.h: New version from IBM (Metin).
2104 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2106 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2107 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2109 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2111 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2113 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2115 * m68k.h (one, two): Cast macro args to unsigned to suppress
2116 complaints from compiler and lint about integer overflow during
2119 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2121 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2123 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2125 * mips.h: Make bitfield layout depend on the HOST compiler,
2126 not on the TARGET system.
2128 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2130 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2131 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2132 <TRANLE@INTELLICORP.COM>.
2134 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2136 * h8300.h: turned op_type enum into #define list
2138 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2140 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2141 similar instructions -- they've been renamed to "fitoq", etc.
2142 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2143 number of arguments.
2144 * h8300.h: Remove extra ; which produces compiler warning.
2146 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2148 * sparc.h: fix opcode for tsubcctv.
2150 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2152 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2154 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2156 * sparc.h (nop): Made the 'lose' field be even tighter,
2157 so only a standard 'nop' is disassembled as a nop.
2159 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2161 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2162 disassembled as a nop.
2164 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2166 * sparc.h: fix a typo.
2168 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2170 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2171 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2172 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2176 version-control: never