* h8300.h (EOP): Add missing initializer.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2000-05-01 Kazu Hirata <kazu@hxi.com>
2
3 * h8300.h (EOP): Add missing initializer.
4
5 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
6
7 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
8 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
9 New operand types l,y,&,fe,fE,fx added to support above forms.
10 (pa_opcodes): Replaced usage of 'x' as source/target for
11 floating point double-word loads/stores with 'fx'.
12
13 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
14 David Mosberger <davidm@hpl.hp.com>
15 Timothy Wall <twall@cygnus.com>
16 Jim Wilson <wilson@cygnus.com>
17
18 * ia64.h: New file.
19
20 2000-03-27 Nick Clifton <nickc@cygnus.com>
21
22 * d30v.h (SHORT_A1): Fix value.
23 (SHORT_AR): Renumber so that it is at the end of the list of short
24 instructions, not the end of the list of long instructions.
25
26 2000-03-26 Alan Modra <alan@linuxcare.com>
27
28 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
29 problem isn't really specific to Unixware.
30 (OLDGCC_COMPAT): Define.
31 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
32 destination %st(0).
33 Fix lots of comments.
34
35 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
36
37 * d30v.h:
38 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
39 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
40 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
41 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
42 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
43 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
44 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
45
46 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
47
48 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
49 fistpd without suffix.
50
51 2000-02-24 Nick Clifton <nickc@cygnus.com>
52
53 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
54 'signed_overflow_ok_p'.
55 Delete prototypes for cgen_set_flags() and cgen_get_flags().
56
57 2000-02-24 Andrew Haley <aph@cygnus.com>
58
59 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
60 (CGEN_CPU_TABLE): flags: new field.
61 Add prototypes for new functions.
62
63 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
64
65 * i386.h: Add some more UNIXWARE_COMPAT comments.
66
67 2000-02-23 Linas Vepstas <linas@linas.org>
68
69 * i370.h: New file.
70
71 2000-02-22 Andrew Haley <aph@cygnus.com>
72
73 * mips.h: (OPCODE_IS_MEMBER): Add comment.
74
75 1999-12-30 Andrew Haley <aph@cygnus.com>
76
77 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
78 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
79 insns.
80
81 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
82
83 * i386.h: Qualify intel mode far call and jmp with x_Suf.
84
85 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
86
87 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
88 indirect jumps and calls. Add FF/3 call for intel mode.
89
90 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
91
92 * mn10300.h: Add new operand types. Add new instruction formats.
93
94 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
95
96 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
97 instruction.
98
99 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
100
101 * mips.h (INSN_ISA5): New.
102
103 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
104
105 * mips.h (OPCODE_IS_MEMBER): New.
106
107 1999-10-29 Nick Clifton <nickc@cygnus.com>
108
109 * d30v.h (SHORT_AR): Define.
110
111 1999-10-18 Michael Meissner <meissner@cygnus.com>
112
113 * alpha.h (alpha_num_opcodes): Convert to unsigned.
114 (alpha_num_operands): Ditto.
115
116 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
117
118 * hppa.h (pa_opcodes): Add load and store cache control to
119 instructions. Add ordered access load and store.
120
121 * hppa.h (pa_opcode): Add new entries for addb and addib.
122
123 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
124
125 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
126
127 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
128
129 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
130
131 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
132
133 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
134 and "be" using completer prefixes.
135
136 * hppa.h (pa_opcodes): Add initializers to silence compiler.
137
138 * hppa.h: Update comments about character usage.
139
140 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
141
142 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
143 up the new fstw & bve instructions.
144
145 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
146
147 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
148 instructions.
149
150 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
151
152 * hppa.h (pa_opcodes): Add long offset double word load/store
153 instructions.
154
155 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
156 stores.
157
158 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
159
160 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
161
162 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
163
164 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
165
166 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
167
168 * hppa.h (pa_opcodes): Add support for "b,l".
169
170 * hppa.h (pa_opcodes): Add support for "b,gate".
171
172 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
173
174 * hppa.h (pa_opcodes): Use 'fX' for first register operand
175 in xmpyu.
176
177 * hppa.h (pa_opcodes): Fix mask for probe and probei.
178
179 * hppa.h (pa_opcodes): Fix mask for depwi.
180
181 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
182
183 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
184 an explicit output argument.
185
186 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
187
188 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
189 Add a few PA2.0 loads and store variants.
190
191 1999-09-04 Steve Chamberlain <sac@pobox.com>
192
193 * pj.h: New file.
194
195 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
196
197 * i386.h (i386_regtab): Move %st to top of table, and split off
198 other fp reg entries.
199 (i386_float_regtab): To here.
200
201 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
202
203 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
204 by 'f'.
205
206 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
207 Add supporting args.
208
209 * hppa.h: Document new completers and args.
210 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
211 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
212 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
213 pmenb and pmdis.
214
215 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
216 hshr, hsub, mixh, mixw, permh.
217
218 * hppa.h (pa_opcodes): Change completers in instructions to
219 use 'c' prefix.
220
221 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
222 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
223
224 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
225 fnegabs to use 'I' instead of 'F'.
226
227 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
228
229 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
230 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
231 Alphabetically sort PIII insns.
232
233 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
234
235 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
236
237 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
238
239 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
240 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
241
242 * hppa.h: Document 64 bit condition completers.
243
244 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
245
246 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
247
248 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
249
250 * i386.h (i386_optab): Add DefaultSize modifier to all insns
251 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
252 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
253
254 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
255 Jeff Law <law@cygnus.com>
256
257 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
258
259 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
260
261 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
262 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
263
264 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
265
266 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
267
268 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
269
270 * hppa.h (struct pa_opcode): Add new field "flags".
271 (FLAGS_STRICT): Define.
272
273 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
274 Jeff Law <law@cygnus.com>
275
276 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
277
278 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
279
280 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
281
282 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
283 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
284 flag to fcomi and friends.
285
286 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
287
288 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
289 integer logical instructions.
290
291 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
292
293 * m68k.h: Document new formats `E', `G', `H' and new places `N',
294 `n', `o'.
295
296 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
297 and new places `m', `M', `h'.
298
299 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
300
301 * hppa.h (pa_opcodes): Add several processor specific system
302 instructions.
303
304 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
305
306 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
307 "addb", and "addib" to be used by the disassembler.
308
309 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
310
311 * i386.h (ReverseModrm): Remove all occurences.
312 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
313 movmskps, pextrw, pmovmskb, maskmovq.
314 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
315 ignore the data size prefix.
316
317 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
318 Mostly stolen from Doug Ledford <dledford@redhat.com>
319
320 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
321
322 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
323
324 1999-04-14 Doug Evans <devans@casey.cygnus.com>
325
326 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
327 (CGEN_ATTR_TYPE): Update.
328 (CGEN_ATTR_MASK): Number booleans starting at 0.
329 (CGEN_ATTR_VALUE): Update.
330 (CGEN_INSN_ATTR): Update.
331
332 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
333
334 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
335 instructions.
336
337 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
338
339 * hppa.h (bb, bvb): Tweak opcode/mask.
340
341
342 1999-03-22 Doug Evans <devans@casey.cygnus.com>
343
344 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
345 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
346 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
347 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
348 Delete member max_insn_size.
349 (enum cgen_cpu_open_arg): New enum.
350 (cpu_open): Update prototype.
351 (cpu_open_1): Declare.
352 (cgen_set_cpu): Delete.
353
354 1999-03-11 Doug Evans <devans@casey.cygnus.com>
355
356 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
357 (CGEN_OPERAND_NIL): New macro.
358 (CGEN_OPERAND): New member `type'.
359 (@arch@_cgen_operand_table): Delete decl.
360 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
361 (CGEN_OPERAND_TABLE): New struct.
362 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
363 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
364 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
365 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
366 {get,set}_{int,vma}_operand.
367 (@arch@_cgen_cpu_open): New arg `isa'.
368 (cgen_set_cpu): Ditto.
369
370 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
371
372 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
373
374 1999-02-25 Doug Evans <devans@casey.cygnus.com>
375
376 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
377 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
378 enum cgen_hw_type.
379 (CGEN_HW_TABLE): New struct.
380 (hw_table): Delete declaration.
381 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
382 to table entry to enum.
383 (CGEN_OPINST): Ditto.
384 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
385
386 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
387
388 * alpha.h (AXP_OPCODE_EV6): New.
389 (AXP_OPCODE_NOPAL): Include it.
390
391 1999-02-09 Doug Evans <devans@casey.cygnus.com>
392
393 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
394 All uses updated. New members int_insn_p, max_insn_size,
395 parse_operand,insert_operand,extract_operand,print_operand,
396 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
397 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
398 extract_handlers,print_handlers.
399 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
400 (CGEN_ATTR_BOOL_OFFSET): New macro.
401 (CGEN_ATTR_MASK): Subtract it to compute bit number.
402 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
403 (cgen_opcode_handler): Renamed from cgen_base.
404 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
405 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
406 all uses updated.
407 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
408 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
409 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
410 (CGEN_OPCODE,CGEN_IBASE): New types.
411 (CGEN_INSN): Rewrite.
412 (CGEN_{ASM,DIS}_HASH*): Delete.
413 (init_opcode_table,init_ibld_table): Declare.
414 (CGEN_INSN_ATTR): New type.
415
416 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
417
418 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
419 (x_FP, d_FP, dls_FP, sldx_FP): Define.
420 Change *Suf definitions to include x and d suffixes.
421 (movsx): Use w_Suf and b_Suf.
422 (movzx): Likewise.
423 (movs): Use bwld_Suf.
424 (fld): Change ordering. Use sld_FP.
425 (fild): Add Intel Syntax equivalent of fildq.
426 (fst): Use sld_FP.
427 (fist): Use sld_FP.
428 (fstp): Use sld_FP. Add x_FP version.
429 (fistp): LLongMem version for Intel Syntax.
430 (fcom, fcomp): Use sld_FP.
431 (fadd, fiadd, fsub): Use sld_FP.
432 (fsubr): Use sld_FP.
433 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
434
435 1999-01-27 Doug Evans <devans@casey.cygnus.com>
436
437 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
438 CGEN_MODE_UINT.
439
440 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
441
442 * hppa.h (bv): Fix mask.
443
444 1999-01-05 Doug Evans <devans@casey.cygnus.com>
445
446 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
447 (CGEN_ATTR): Use it.
448 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
449 (CGEN_ATTR_TABLE): New member dfault.
450
451 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
452
453 * mips.h (MIPS16_INSN_BRANCH): New.
454
455 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
456
457 The following is part of a change made by Edith Epstein
458 <eepstein@sophia.cygnus.com> as part of a project to merge in
459 changes by HP; HP did not create ChangeLog entries.
460
461 * hppa.h (completer_chars): list of chars to not put a space
462 after.
463
464 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
465
466 * i386.h (i386_optab): Permit w suffix on processor control and
467 status word instructions.
468
469 1998-11-30 Doug Evans <devans@casey.cygnus.com>
470
471 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
472 (struct cgen_keyword_entry): Ditto.
473 (struct cgen_operand): Ditto.
474 (CGEN_IFLD): New typedef, with associated access macros.
475 (CGEN_IFMT): New typedef, with associated access macros.
476 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
477 (CGEN_IVALUE): New typedef.
478 (struct cgen_insn): Delete const on syntax,attrs members.
479 `format' now points to format data. Type of `value' is now
480 CGEN_IVALUE.
481 (struct cgen_opcode_table): New member ifld_table.
482
483 1998-11-18 Doug Evans <devans@casey.cygnus.com>
484
485 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
486 (CGEN_OPERAND_INSTANCE): New member `attrs'.
487 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
488 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
489 (cgen_opcode_table): Update type of dis_hash fn.
490 (extract_operand): Update type of `insn_value' arg.
491
492 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
493
494 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
495
496 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
497
498 * mips.h (INSN_MULT): Added.
499
500 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
501
502 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
503
504 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
505
506 * cgen.h (CGEN_INSN_INT): New typedef.
507 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
508 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
509 (CGEN_INSN_BYTES_PTR): New typedef.
510 (CGEN_EXTRACT_INFO): New typedef.
511 (cgen_insert_fn,cgen_extract_fn): Update.
512 (cgen_opcode_table): New member `insn_endian'.
513 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
514 (insert_operand,extract_operand): Update.
515 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
516
517 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
518
519 * cgen.h (CGEN_ATTR_BOOLS): New macro.
520 (struct CGEN_HW_ENTRY): New member `attrs'.
521 (CGEN_HW_ATTR): New macro.
522 (struct CGEN_OPERAND_INSTANCE): New member `name'.
523 (CGEN_INSN_INVALID_P): New macro.
524
525 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
526
527 * hppa.h: Add "fid".
528
529 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
530
531 From Robert Andrew Dale <rob@nb.net>
532 * i386.h (i386_optab): Add AMD 3DNow! instructions.
533 (AMD_3DNOW_OPCODE): Define.
534
535 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
536
537 * d30v.h (EITHER_BUT_PREFER_MU): Define.
538
539 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
540
541 * cgen.h (cgen_insn): #if 0 out element `cdx'.
542
543 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
544
545 Move all global state data into opcode table struct, and treat
546 opcode table as something that is "opened/closed".
547 * cgen.h (CGEN_OPCODE_DESC): New type.
548 (all fns): New first arg of opcode table descriptor.
549 (cgen_set_parse_operand_fn): Add prototype.
550 (cgen_current_machine,cgen_current_endian): Delete.
551 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
552 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
553 dis_hash_table,dis_hash_table_entries.
554 (opcode_open,opcode_close): Add prototypes.
555
556 * cgen.h (cgen_insn): New element `cdx'.
557
558 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
559
560 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
561
562 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
563
564 * mn10300.h: Add "no_match_operands" field for instructions.
565 (MN10300_MAX_OPERANDS): Define.
566
567 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
568
569 * cgen.h (cgen_macro_insn_count): Declare.
570
571 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
572
573 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
574 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
575 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
576 set_{int,vma}_operand.
577
578 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
579
580 * mn10300.h: Add "machine" field for instructions.
581 (MN103, AM30): Define machine types.
582
583 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
584
585 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
586
587 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
588
589 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
590
591 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
592
593 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
594 and ud2b.
595 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
596 those that happen to be implemented on pentiums.
597
598 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
599
600 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
601 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
602 with Size16|IgnoreSize or Size32|IgnoreSize.
603
604 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
605
606 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
607 (REPE): Rename to REPE_PREFIX_OPCODE.
608 (i386_regtab_end): Remove.
609 (i386_prefixtab, i386_prefixtab_end): Remove.
610 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
611 of md_begin.
612 (MAX_OPCODE_SIZE): Define.
613 (i386_optab_end): Remove.
614 (sl_Suf): Define.
615 (sl_FP): Use sl_Suf.
616
617 * i386.h (i386_optab): Allow 16 bit displacement for `mov
618 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
619 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
620 data32, dword, and adword prefixes.
621 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
622 regs.
623
624 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
625
626 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
627
628 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
629 register operands, because this is a common idiom. Flag them with
630 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
631 fdivrp because gcc erroneously generates them. Also flag with a
632 warning.
633
634 * i386.h: Add suffix modifiers to most insns, and tighter operand
635 checks in some cases. Fix a number of UnixWare compatibility
636 issues with float insns. Merge some floating point opcodes, using
637 new FloatMF modifier.
638 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
639 consistency.
640
641 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
642 IgnoreDataSize where appropriate.
643
644 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
645
646 * i386.h: (one_byte_segment_defaults): Remove.
647 (two_byte_segment_defaults): Remove.
648 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
649
650 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
651
652 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
653 (cgen_hw_lookup_by_num): Declare.
654
655 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
656
657 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
658 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
659
660 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
661
662 * cgen.h (cgen_asm_init_parse): Delete.
663 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
664 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
665
666 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
667
668 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
669 (cgen_asm_finish_insn): Update prototype.
670 (cgen_insn): New members num, data.
671 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
672 dis_hash, dis_hash_table_size moved to ...
673 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
674 All uses updated. New members asm_hash_p, dis_hash_p.
675 (CGEN_MINSN_EXPANSION): New struct.
676 (cgen_expand_macro_insn): Declare.
677 (cgen_macro_insn_count): Declare.
678 (get_insn_operands): Update prototype.
679 (lookup_get_insn_operands): Declare.
680
681 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
682
683 * i386.h (i386_optab): Change iclrKludge and imulKludge to
684 regKludge. Add operands types for string instructions.
685
686 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
687
688 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
689 table.
690
691 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
692
693 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
694 for `gettext'.
695
696 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
697
698 * i386.h: Remove NoModrm flag from all insns: it's never checked.
699 Add IsString flag to string instructions.
700 (IS_STRING): Don't define.
701 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
702 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
703 (SS_PREFIX_OPCODE): Define.
704
705 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
706
707 * i386.h: Revert March 24 patch; no more LinearAddress.
708
709 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
710
711 * i386.h (i386_optab): Remove fwait (9b) from all floating point
712 instructions, and instead add FWait opcode modifier. Add short
713 form of fldenv and fstenv.
714 (FWAIT_OPCODE): Define.
715
716 * i386.h (i386_optab): Change second operand constraint of `mov
717 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
718 allow legal instructions such as `movl %gs,%esi'
719
720 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
721
722 * h8300.h: Various changes to fully bracket initializers.
723
724 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
725
726 * i386.h: Set LinearAddress for lidt and lgdt.
727
728 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
729
730 * cgen.h (CGEN_BOOL_ATTR): New macro.
731
732 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
733
734 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
735
736 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
737
738 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
739 (cgen_insn): Record syntax and format entries here, rather than
740 separately.
741
742 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
743
744 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
745
746 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
747
748 * cgen.h (cgen_insert_fn): Change type of result to const char *.
749 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
750 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
751
752 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
753
754 * cgen.h (lookup_insn): New argument alias_p.
755
756 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
757
758 Fix rac to accept only a0:
759 * d10v.h (OPERAND_ACC): Split into:
760 (OPERAND_ACC0, OPERAND_ACC1) .
761 (OPERAND_GPR): Define.
762
763 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
764
765 * cgen.h (CGEN_FIELDS): Define here.
766 (CGEN_HW_ENTRY): New member `type'.
767 (hw_list): Delete decl.
768 (enum cgen_mode): Declare.
769 (CGEN_OPERAND): New member `hw'.
770 (enum cgen_operand_instance_type): Declare.
771 (CGEN_OPERAND_INSTANCE): New type.
772 (CGEN_INSN): New member `operands'.
773 (CGEN_OPCODE_DATA): Make hw_list const.
774 (get_insn_operands,lookup_insn): Add prototypes for.
775
776 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
777
778 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
779 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
780 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
781 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
782
783 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
784
785 * cgen.h: Correct typo in comment end marker.
786
787 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
788
789 * tic30.h: New file.
790
791 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
792
793 * cgen.h: Add prototypes for cgen_save_fixups(),
794 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
795 of cgen_asm_finish_insn() to return a char *.
796
797 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
798
799 * cgen.h: Formatting changes to improve readability.
800
801 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
802
803 * cgen.h (*): Clean up pass over `struct foo' usage.
804 (CGEN_ATTR): Make unsigned char.
805 (CGEN_ATTR_TYPE): Update.
806 (CGEN_ATTR_{ENTRY,TABLE}): New types.
807 (cgen_base): Move member `attrs' to cgen_insn.
808 (CGEN_KEYWORD): New member `null_entry'.
809 (CGEN_{SYNTAX,FORMAT}): New types.
810 (cgen_insn): Format and syntax separated from each other.
811
812 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
813
814 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
815 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
816 flags_{used,set} long.
817 (d30v_operand): Make flags field long.
818
819 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
820
821 * m68k.h: Fix comment describing operand types.
822
823 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
824
825 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
826 everything else after down.
827
828 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
829
830 * d10v.h (OPERAND_FLAG): Split into:
831 (OPERAND_FFLAG, OPERAND_CFLAG) .
832
833 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
834
835 * mips.h (struct mips_opcode): Changed comments to reflect new
836 field usage.
837
838 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
839
840 * mips.h: Added to comments a quick-ref list of all assigned
841 operand type characters.
842 (OP_{MASK,SH}_PERFREG): New macros.
843
844 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
845
846 * sparc.h: Add '_' and '/' for v9a asr's.
847 Patch from David Miller <davem@vger.rutgers.edu>
848
849 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
850
851 * h8300.h: Bit ops with absolute addresses not in the 8 bit
852 area are not available in the base model (H8/300).
853
854 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
855
856 * m68k.h: Remove documentation of ` operand specifier.
857
858 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
859
860 * m68k.h: Document q and v operand specifiers.
861
862 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
863
864 * v850.h (struct v850_opcode): Add processors field.
865 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
866 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
867 (PROCESSOR_V850EA): New bit constants.
868
869 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
870
871 Merge changes from Martin Hunt:
872
873 * d30v.h: Allow up to 64 control registers. Add
874 SHORT_A5S format.
875
876 * d30v.h (LONG_Db): New form for delayed branches.
877
878 * d30v.h: (LONG_Db): New form for repeati.
879
880 * d30v.h (SHORT_D2B): New form.
881
882 * d30v.h (SHORT_A2): New form.
883
884 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
885 registers are used. Needed for VLIW optimization.
886
887 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
888
889 * cgen.h: Move assembler interface section
890 up so cgen_parse_operand_result is defined for cgen_parse_address.
891 (cgen_parse_address): Update prototype.
892
893 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
894
895 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
896
897 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
898
899 * i386.h (two_byte_segment_defaults): Correct base register 5 in
900 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
901 <paubert@iram.es>.
902
903 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
904 <paubert@iram.es>.
905
906 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
907 <paubert@iram.es>.
908
909 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
910 (JUMP_ON_ECX_ZERO): Remove commented out macro.
911
912 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
913
914 * v850.h (V850_NOT_R0): New flag.
915
916 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
917
918 * v850.h (struct v850_opcode): Remove flags field.
919
920 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
921
922 * v850.h (struct v850_opcode): Add flags field.
923 (struct v850_operand): Extend meaning of 'bits' and 'shift'
924 fields.
925 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
926 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
927
928 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
929
930 * arc.h: New file.
931
932 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
933
934 * sparc.h (sparc_opcodes): Declare as const.
935
936 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
937
938 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
939 uses single or double precision floating point resources.
940 (INSN_NO_ISA, INSN_ISA1): Define.
941 (cpu specific INSN macros): Tweak into bitmasks outside the range
942 of INSN_ISA field.
943
944 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
945
946 * i386.h: Fix pand opcode.
947
948 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
949
950 * mips.h: Widen INSN_ISA and move it to a more convenient
951 bit position. Add INSN_3900.
952
953 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
954
955 * mips.h (struct mips_opcode): added new field membership.
956
957 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
958
959 * i386.h (movd): only Reg32 is allowed.
960
961 * i386.h: add fcomp and ud2. From Wayne Scott
962 <wscott@ichips.intel.com>.
963
964 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
965
966 * i386.h: Add MMX instructions.
967
968 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
969
970 * i386.h: Remove W modifier from conditional move instructions.
971
972 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
973
974 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
975 with no arguments to match that generated by the UnixWare
976 assembler.
977
978 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
979
980 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
981 (cgen_parse_operand_fn): Declare.
982 (cgen_init_parse_operand): Declare.
983 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
984 new argument `want'.
985 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
986 (enum cgen_parse_operand_type): New enum.
987
988 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
989
990 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
991
992 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
993
994 * cgen.h: New file.
995
996 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
997
998 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
999 fdivrp.
1000
1001 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1002
1003 * v850.h (extract): Make unsigned.
1004
1005 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1006
1007 * i386.h: Add iclr.
1008
1009 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1010
1011 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1012 take a direction bit.
1013
1014 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1015
1016 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1017
1018 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1019
1020 * sparc.h: Include <ansidecl.h>. Update function declarations to
1021 use prototypes, and to use const when appropriate.
1022
1023 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1024
1025 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1026
1027 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1028
1029 * d10v.h: Change pre_defined_registers to
1030 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1031
1032 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1033
1034 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1035 Change mips_opcodes from const array to a pointer,
1036 and change bfd_mips_num_opcodes from const int to int,
1037 so that we can increase the size of the mips opcodes table
1038 dynamically.
1039
1040 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1041
1042 * d30v.h (FLAG_X): Remove unused flag.
1043
1044 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1045
1046 * d30v.h: New file.
1047
1048 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1049
1050 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1051 (PDS_VALUE): Macro to access value field of predefined symbols.
1052 (tic80_next_predefined_symbol): Add prototype.
1053
1054 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1055
1056 * tic80.h (tic80_symbol_to_value): Change prototype to match
1057 change in function, added class parameter.
1058
1059 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1060
1061 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1062 endmask fields, which are somewhat weird in that 0 and 32 are
1063 treated exactly the same.
1064
1065 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1066
1067 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1068 rather than a constant that is 2**X. Reorder them to put bits for
1069 operands that have symbolic names in the upper bits, so they can
1070 be packed into an int where the lower bits contain the value that
1071 corresponds to that symbolic name.
1072 (predefined_symbo): Add struct.
1073 (tic80_predefined_symbols): Declare array of translations.
1074 (tic80_num_predefined_symbols): Declare size of that array.
1075 (tic80_value_to_symbol): Declare function.
1076 (tic80_symbol_to_value): Declare function.
1077
1078 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1079
1080 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1081
1082 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1083
1084 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1085 be the destination register.
1086
1087 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1088
1089 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1090 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1091 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1092 that the opcode can have two vector instructions in a single
1093 32 bit word and we have to encode/decode both.
1094
1095 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1096
1097 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1098 TIC80_OPERAND_RELATIVE for PC relative.
1099 (TIC80_OPERAND_BASEREL): New flag bit for register
1100 base relative.
1101
1102 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1103
1104 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1105
1106 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1107
1108 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1109 ":s" modifier for scaling.
1110
1111 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1112
1113 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1114 (TIC80_OPERAND_M_LI): Ditto
1115
1116 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1117
1118 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1119 (TIC80_OPERAND_CC): New define for condition code operand.
1120 (TIC80_OPERAND_CR): New define for control register operand.
1121
1122 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1123
1124 * tic80.h (struct tic80_opcode): Name changed.
1125 (struct tic80_opcode): Remove format field.
1126 (struct tic80_operand): Add insertion and extraction functions.
1127 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1128 correct ones.
1129 (FMT_*): Ditto.
1130
1131 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1132
1133 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1134 type IV instruction offsets.
1135
1136 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1137
1138 * tic80.h: New file.
1139
1140 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1141
1142 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1143
1144 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1145
1146 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1147 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1148 * v850.h: Fix comment, v850_operand not powerpc_operand.
1149
1150 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1151
1152 * mn10200.h: Flesh out structures and definitions needed by
1153 the mn10200 assembler & disassembler.
1154
1155 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1156
1157 * mips.h: Add mips16 definitions.
1158
1159 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1160
1161 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1162
1163 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1164
1165 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1166 (MN10300_OPERAND_MEMADDR): Define.
1167
1168 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1169
1170 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1171
1172 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1173
1174 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1175
1176 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1177
1178 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1179
1180 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1181
1182 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1183
1184 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1185
1186 * alpha.h: Don't include "bfd.h"; private relocation types are now
1187 negative to minimize problems with shared libraries. Organize
1188 instruction subsets by AMASK extensions and PALcode
1189 implementation.
1190 (struct alpha_operand): Move flags slot for better packing.
1191
1192 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1193
1194 * v850.h (V850_OPERAND_RELAX): New operand flag.
1195
1196 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1197
1198 * mn10300.h (FMT_*): Move operand format definitions
1199 here.
1200
1201 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1202
1203 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1204
1205 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1206
1207 * mn10300.h (mn10300_opcode): Add "format" field.
1208 (MN10300_OPERAND_*): Define.
1209
1210 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1211
1212 * mn10x00.h: Delete.
1213 * mn10200.h, mn10300.h: New files.
1214
1215 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1216
1217 * mn10x00.h: New file.
1218
1219 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1220
1221 * v850.h: Add new flag to indicate this instruction uses a PC
1222 displacement.
1223
1224 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1225
1226 * h8300.h (stmac): Add missing instruction.
1227
1228 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1229
1230 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1231 field.
1232
1233 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1234
1235 * v850.h (V850_OPERAND_EP): Define.
1236
1237 * v850.h (v850_opcode): Add size field.
1238
1239 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1240
1241 * v850.h (v850_operands): Add insert and extract fields, pointers
1242 to functions used to handle unusual operand encoding.
1243 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1244 V850_OPERAND_SIGNED): Defined.
1245
1246 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1247
1248 * v850.h (v850_operands): Add flags field.
1249 (OPERAND_REG, OPERAND_NUM): Defined.
1250
1251 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1252
1253 * v850.h: New file.
1254
1255 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1256
1257 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1258 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1259 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1260 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1261 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1262 Defined.
1263
1264 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1265
1266 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1267 a 3 bit space id instead of a 2 bit space id.
1268
1269 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1270
1271 * d10v.h: Add some additional defines to support the
1272 assembler in determining which operations can be done in parallel.
1273
1274 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1275
1276 * h8300.h (SN): Define.
1277 (eepmov.b): Renamed from "eepmov"
1278 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1279 with them.
1280
1281 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1282
1283 * d10v.h (OPERAND_SHIFT): New operand flag.
1284
1285 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1286
1287 * d10v.h: Changes for divs, parallel-only instructions, and
1288 signed numbers.
1289
1290 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1291
1292 * d10v.h (pd_reg): Define. Putting the definition here allows
1293 the assembler and disassembler to share the same struct.
1294
1295 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1296
1297 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1298 Williams <steve@icarus.com>.
1299
1300 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1301
1302 * d10v.h: New file.
1303
1304 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1305
1306 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1307
1308 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1309
1310 * m68k.h (mcf5200): New macro.
1311 Document names of coldfire control registers.
1312
1313 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1314
1315 * h8300.h (SRC_IN_DST): Define.
1316
1317 * h8300.h (UNOP3): Mark the register operand in this insn
1318 as a source operand, not a destination operand.
1319 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1320 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1321 register operand with SRC_IN_DST.
1322
1323 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1324
1325 * alpha.h: New file.
1326
1327 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1328
1329 * rs6k.h: Remove obsolete file.
1330
1331 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1332
1333 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1334 fdivp, and fdivrp. Add ffreep.
1335
1336 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1337
1338 * h8300.h: Reorder various #defines for readability.
1339 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1340 (BITOP): Accept additional (unused) argument. All callers changed.
1341 (EBITOP): Likewise.
1342 (O_LAST): Bump.
1343 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1344
1345 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1346 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1347 (BITOP, EBITOP): Handle new H8/S addressing modes for
1348 bit insns.
1349 (UNOP3): Handle new shift/rotate insns on the H8/S.
1350 (insns using exr): New instructions.
1351 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1352
1353 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1354
1355 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1356 was incorrect.
1357
1358 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1359
1360 * h8300.h (START): Remove.
1361 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1362 and mov.l insns that can be relaxed.
1363
1364 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1365
1366 * i386.h: Remove Abs32 from lcall.
1367
1368 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1369
1370 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1371 (SLCPOP): New macro.
1372 Mark X,Y opcode letters as in use.
1373
1374 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1375
1376 * sparc.h (F_FLOAT, F_FBR): Define.
1377
1378 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1379
1380 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1381 from all insns.
1382 (ABS8SRC,ABS8DST): Add ABS8MEM.
1383 (add.l): Fix reg+reg variant.
1384 (eepmov.w): Renamed from eepmovw.
1385 (ldc,stc): Fix many cases.
1386
1387 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1388
1389 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1390
1391 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1392
1393 * sparc.h (O): Mark operand letter as in use.
1394
1395 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1396
1397 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1398 Mark operand letters uU as in use.
1399
1400 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1401
1402 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1403 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1404 (SPARC_OPCODE_SUPPORTED): New macro.
1405 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1406 (F_NOTV9): Delete.
1407
1408 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1409
1410 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1411 declaration consistent with return type in definition.
1412
1413 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1414
1415 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1416
1417 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1418
1419 * i386.h (i386_regtab): Add 80486 test registers.
1420
1421 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1422
1423 * i960.h (I_HX): Define.
1424 (i960_opcodes): Add HX instruction.
1425
1426 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1427
1428 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1429 and fclex.
1430
1431 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1432
1433 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1434 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1435 (bfd_* defines): Delete.
1436 (sparc_opcode_archs): Replaces architecture_pname.
1437 (sparc_opcode_lookup_arch): Declare.
1438 (NUMOPCODES): Delete.
1439
1440 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1441
1442 * sparc.h (enum sparc_architecture): Add v9a.
1443 (ARCHITECTURES_CONFLICT_P): Update.
1444
1445 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1446
1447 * i386.h: Added Pentium Pro instructions.
1448
1449 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1450
1451 * m68k.h: Document new 'W' operand place.
1452
1453 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1454
1455 * hppa.h: Add lci and syncdma instructions.
1456
1457 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1458
1459 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1460 instructions.
1461
1462 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1463
1464 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1465 assembler's -mcom and -many switches.
1466
1467 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1468
1469 * i386.h: Fix cmpxchg8b extension opcode description.
1470
1471 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1472
1473 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1474 and register cr4.
1475
1476 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1477
1478 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1479
1480 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1481
1482 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1483
1484 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1485
1486 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1487
1488 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1489
1490 * m68kmri.h: Remove.
1491
1492 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1493 declarations. Remove F_ALIAS and flag field of struct
1494 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1495 int. Make name and args fields of struct m68k_opcode const.
1496
1497 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1498
1499 * sparc.h (F_NOTV9): Define.
1500
1501 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1502
1503 * mips.h (INSN_4010): Define.
1504
1505 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1506
1507 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1508
1509 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1510 * m68k.h: Fix argument descriptions of coprocessor
1511 instructions to allow only alterable operands where appropriate.
1512 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1513 (m68k_opcode_aliases): Add more aliases.
1514
1515 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1516
1517 * m68k.h: Added explcitly short-sized conditional branches, and a
1518 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1519 svr4-based configurations.
1520
1521 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1522
1523 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1524 * i386.h: added missing Data16/Data32 flags to a few instructions.
1525
1526 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1527
1528 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1529 (OP_MASK_BCC, OP_SH_BCC): Define.
1530 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1531 (OP_MASK_CCC, OP_SH_CCC): Define.
1532 (INSN_READ_FPR_R): Define.
1533 (INSN_RFE): Delete.
1534
1535 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1536
1537 * m68k.h (enum m68k_architecture): Deleted.
1538 (struct m68k_opcode_alias): New type.
1539 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1540 matching constraints, values and flags. As a side effect of this,
1541 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1542 as I know were never used, now may need re-examining.
1543 (numopcodes): Now const.
1544 (m68k_opcode_aliases, numaliases): New variables.
1545 (endop): Deleted.
1546 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1547 m68k_opcode_aliases; update declaration of m68k_opcodes.
1548
1549 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1550
1551 * hppa.h (delay_type): Delete unused enumeration.
1552 (pa_opcode): Replace unused delayed field with an architecture
1553 field.
1554 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1555
1556 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1557
1558 * mips.h (INSN_ISA4): Define.
1559
1560 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1561
1562 * mips.h (M_DLA_AB, M_DLI): Define.
1563
1564 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1565
1566 * hppa.h (fstwx): Fix single-bit error.
1567
1568 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1569
1570 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1571
1572 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1573
1574 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1575 debug registers. From Charles Hannum (mycroft@netbsd.org).
1576
1577 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1578
1579 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1580 i386 support:
1581 * i386.h (MOV_AX_DISP32): New macro.
1582 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1583 of several call/return instructions.
1584 (ADDR_PREFIX_OPCODE): New macro.
1585
1586 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1587
1588 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1589
1590 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1591 it pointer to const char;
1592 (struct vot, field `name'): ditto.
1593
1594 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1595
1596 * vax.h: Supply and properly group all values in end sentinel.
1597
1598 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1599
1600 * mips.h (INSN_ISA, INSN_4650): Define.
1601
1602 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1603
1604 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1605 systems with a separate instruction and data cache, such as the
1606 29040, these instructions take an optional argument.
1607
1608 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1609
1610 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1611 INSN_TRAP.
1612
1613 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1614
1615 * mips.h (INSN_STORE_MEMORY): Define.
1616
1617 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1618
1619 * sparc.h: Document new operand type 'x'.
1620
1621 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1622
1623 * i960.h (I_CX2): New instruction category. It includes
1624 instructions available on Cx and Jx processors.
1625 (I_JX): New instruction category, for JX-only instructions.
1626 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1627 Jx-only instructions, in I_JX category.
1628
1629 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1630
1631 * ns32k.h (endop): Made pointer const too.
1632
1633 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1634
1635 * ns32k.h: Drop Q operand type as there is no correct use
1636 for it. Add I and Z operand types which allow better checking.
1637
1638 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1639
1640 * h8300.h (xor.l) :fix bit pattern.
1641 (L_2): New size of operand.
1642 (trapa): Use it.
1643
1644 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1645
1646 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1647
1648 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1649
1650 * sparc.h: Include v9 definitions.
1651
1652 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1653
1654 * m68k.h (m68060): Defined.
1655 (m68040up, mfloat, mmmu): Include it.
1656 (struct m68k_opcode): Widen `arch' field.
1657 (m68k_opcodes): Updated for M68060. Removed comments that were
1658 instructions commented out by "JF" years ago.
1659
1660 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1661
1662 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1663 add a one-bit `flags' field.
1664 (F_ALIAS): New macro.
1665
1666 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1667
1668 * h8300.h (dec, inc): Get encoding right.
1669
1670 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1671
1672 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1673 a flag instead.
1674 (PPC_OPERAND_SIGNED): Define.
1675 (PPC_OPERAND_SIGNOPT): Define.
1676
1677 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1678
1679 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1680 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1681
1682 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1683
1684 * i386.h: Reverse last change. It'll be handled in gas instead.
1685
1686 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1687
1688 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1689 slower on the 486 and used the implicit shift count despite the
1690 explicit operand. The one-operand form is still available to get
1691 the shorter form with the implicit shift count.
1692
1693 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1694
1695 * hppa.h: Fix typo in fstws arg string.
1696
1697 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1698
1699 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1700
1701 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1702
1703 * ppc.h (PPC_OPCODE_601): Define.
1704
1705 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1706
1707 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1708 (so we can determine valid completers for both addb and addb[tf].)
1709
1710 * hppa.h (xmpyu): No floating point format specifier for the
1711 xmpyu instruction.
1712
1713 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1714
1715 * ppc.h (PPC_OPERAND_NEXT): Define.
1716 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1717 (struct powerpc_macro): Define.
1718 (powerpc_macros, powerpc_num_macros): Declare.
1719
1720 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1721
1722 * ppc.h: New file. Header file for PowerPC opcode table.
1723
1724 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1725
1726 * hppa.h: More minor template fixes for sfu and copr (to allow
1727 for easier disassembly).
1728
1729 * hppa.h: Fix templates for all the sfu and copr instructions.
1730
1731 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1732
1733 * i386.h (push): Permit Imm16 operand too.
1734
1735 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1736
1737 * h8300.h (andc): Exists in base arch.
1738
1739 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1740
1741 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1742 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1743
1744 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1745
1746 * hppa.h: Add FP quadword store instructions.
1747
1748 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1749
1750 * mips.h: (M_J_A): Added.
1751 (M_LA): Removed.
1752
1753 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1754
1755 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1756 <mellon@pepper.ncd.com>.
1757
1758 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1759
1760 * hppa.h: Immediate field in probei instructions is unsigned,
1761 not low-sign extended.
1762
1763 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1764
1765 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1766
1767 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1768
1769 * i386.h: Add "fxch" without operand.
1770
1771 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1772
1773 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1774
1775 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1776
1777 * hppa.h: Add gfw and gfr to the opcode table.
1778
1779 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1780
1781 * m88k.h: extended to handle m88110.
1782
1783 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1784
1785 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1786 addresses.
1787
1788 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1789
1790 * i960.h (i960_opcodes): Properly bracket initializers.
1791
1792 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1793
1794 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1795
1796 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1797
1798 * m68k.h (two): Protect second argument with parentheses.
1799
1800 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1801
1802 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1803 Deleted old in/out instructions in "#if 0" section.
1804
1805 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1806
1807 * i386.h (i386_optab): Properly bracket initializers.
1808
1809 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1810
1811 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1812 Jeff Law, law@cs.utah.edu).
1813
1814 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1815
1816 * i386.h (lcall): Accept Imm32 operand also.
1817
1818 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1819
1820 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1821 (M_DABS): Added.
1822
1823 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1824
1825 * mips.h (INSN_*): Changed values. Removed unused definitions.
1826 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1827 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1828 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1829 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1830 (M_*): Added new values for r6000 and r4000 macros.
1831 (ANY_DELAY): Removed.
1832
1833 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1834
1835 * mips.h: Added M_LI_S and M_LI_SS.
1836
1837 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1838
1839 * h8300.h: Get some rare mov.bs correct.
1840
1841 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1842
1843 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1844 been included.
1845
1846 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1847
1848 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1849 jump instructions, for use in disassemblers.
1850
1851 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1852
1853 * m88k.h: Make bitfields just unsigned, not unsigned long or
1854 unsigned short.
1855
1856 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1857
1858 * hppa.h: New argument type 'y'. Use in various float instructions.
1859
1860 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1861
1862 * hppa.h (break): First immediate field is unsigned.
1863
1864 * hppa.h: Add rfir instruction.
1865
1866 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1867
1868 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1869
1870 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1871
1872 * mips.h: Reworked the hazard information somewhat, and fixed some
1873 bugs in the instruction hazard descriptions.
1874
1875 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1876
1877 * m88k.h: Corrected a couple of opcodes.
1878
1879 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1880
1881 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1882 new version includes instruction hazard information, but is
1883 otherwise reasonably similar.
1884
1885 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1886
1887 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1888
1889 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1890
1891 Patches from Jeff Law, law@cs.utah.edu:
1892 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1893 Make the tables be the same for the following instructions:
1894 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1895 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1896 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1897 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1898 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1899 "fcmp", and "ftest".
1900
1901 * hppa.h: Make new and old tables the same for "break", "mtctl",
1902 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1903 Fix typo in last patch. Collapse several #ifdefs into a
1904 single #ifdef.
1905
1906 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1907 of the comments up-to-date.
1908
1909 * hppa.h: Update "free list" of letters and update
1910 comments describing each letter's function.
1911
1912 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1913
1914 * h8300.h: checkpoint, includes H8/300-H opcodes.
1915
1916 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1917
1918 * Patches from Jeffrey Law <law@cs.utah.edu>.
1919 * hppa.h: Rework single precision FP
1920 instructions so that they correctly disassemble code
1921 PA1.1 code.
1922
1923 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1924
1925 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1926 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1927
1928 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1929
1930 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1931 gdb will define it for now.
1932
1933 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1934
1935 * sparc.h: Don't end enumerator list with comma.
1936
1937 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1938
1939 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1940 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1941 ("bc2t"): Correct typo.
1942 ("[ls]wc[023]"): Use T rather than t.
1943 ("c[0123]"): Define general coprocessor instructions.
1944
1945 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1946
1947 * m68k.h: Move split point for gcc compilation more towards
1948 middle.
1949
1950 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1951
1952 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1953 simply wrong, ics, rfi, & rfsvc were missing).
1954 Add "a" to opr_ext for "bb". Doc fix.
1955
1956 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1957
1958 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1959 * mips.h: Add casts, to suppress warnings about shifting too much.
1960 * m68k.h: Document the placement code '9'.
1961
1962 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1963
1964 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1965 allows callers to break up the large initialized struct full of
1966 opcodes into two half-sized ones. This permits GCC to compile
1967 this module, since it takes exponential space for initializers.
1968 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1969
1970 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1971
1972 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1973 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1974 initialized structs in it.
1975
1976 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1977
1978 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1979 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1980 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1981
1982 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1983
1984 * mips.h: document "i" and "j" operands correctly.
1985
1986 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1987
1988 * mips.h: Removed endianness dependency.
1989
1990 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1991
1992 * h8300.h: include info on number of cycles per instruction.
1993
1994 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1995
1996 * hppa.h: Move handy aliases to the front. Fix masks for extract
1997 and deposit instructions.
1998
1999 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2000
2001 * i386.h: accept shld and shrd both with and without the shift
2002 count argument, which is always %cl.
2003
2004 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2005
2006 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2007 (one_byte_segment_defaults, two_byte_segment_defaults,
2008 i386_prefixtab_end): Ditto.
2009
2010 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2011
2012 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2013 for operand 2; from John Carr, jfc@dsg.dec.com.
2014
2015 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2016
2017 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2018 always use 16-bit offsets. Makes calculated-size jump tables
2019 feasible.
2020
2021 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2022
2023 * i386.h: Fix one-operand forms of in* and out* patterns.
2024
2025 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2026
2027 * m68k.h: Added CPU32 support.
2028
2029 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2030
2031 * mips.h (break): Disassemble the argument. Patch from
2032 jonathan@cs.stanford.edu (Jonathan Stone).
2033
2034 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2035
2036 * m68k.h: merged Motorola and MIT syntax.
2037
2038 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2039
2040 * m68k.h (pmove): make the tests less strict, the 68k book is
2041 wrong.
2042
2043 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2044
2045 * m68k.h (m68ec030): Defined as alias for 68030.
2046 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2047 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2048 them. Tightened description of "fmovex" to distinguish it from
2049 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2050 up descriptions that claimed versions were available for chips not
2051 supporting them. Added "pmovefd".
2052
2053 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2054
2055 * m68k.h: fix where the . goes in divull
2056
2057 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2058
2059 * m68k.h: the cas2 instruction is supposed to be written with
2060 indirection on the last two operands, which can be either data or
2061 address registers. Added a new operand type 'r' which accepts
2062 either register type. Added new cases for cas2l and cas2w which
2063 use them. Corrected masks for cas2 which failed to recognize use
2064 of address register.
2065
2066 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2067
2068 * m68k.h: Merged in patches (mostly m68040-specific) from
2069 Colin Smith <colin@wrs.com>.
2070
2071 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2072 base). Also cleaned up duplicates, re-ordered instructions for
2073 the sake of dis-assembling (so aliases come after standard names).
2074 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2075
2076 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2077
2078 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2079 all missing .s
2080
2081 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2082
2083 * sparc.h: Moved tables to BFD library.
2084
2085 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2086
2087 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2088
2089 * h8300.h: Finish filling in all the holes in the opcode table,
2090 so that the Lucid C compiler can digest this as well...
2091
2092 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2093
2094 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2095 Fix opcodes on various sizes of fild/fist instructions
2096 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2097 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2098
2099 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2100
2101 * h8300.h: Fill in all the holes in the opcode table so that the
2102 losing HPUX C compiler can digest this...
2103
2104 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2105
2106 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2107 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2108
2109 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2110
2111 * sparc.h: Add new architecture variant sparclite; add its scan
2112 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2113
2114 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2115
2116 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2117 fy@lucid.com).
2118
2119 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2120
2121 * rs6k.h: New version from IBM (Metin).
2122
2123 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2124
2125 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2126 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2127
2128 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2129
2130 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2131
2132 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2133
2134 * m68k.h (one, two): Cast macro args to unsigned to suppress
2135 complaints from compiler and lint about integer overflow during
2136 shift.
2137
2138 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2139
2140 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2141
2142 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2143
2144 * mips.h: Make bitfield layout depend on the HOST compiler,
2145 not on the TARGET system.
2146
2147 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2148
2149 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2150 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2151 <TRANLE@INTELLICORP.COM>.
2152
2153 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2154
2155 * h8300.h: turned op_type enum into #define list
2156
2157 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2158
2159 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2160 similar instructions -- they've been renamed to "fitoq", etc.
2161 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2162 number of arguments.
2163 * h8300.h: Remove extra ; which produces compiler warning.
2164
2165 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2166
2167 * sparc.h: fix opcode for tsubcctv.
2168
2169 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2170
2171 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2172
2173 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2174
2175 * sparc.h (nop): Made the 'lose' field be even tighter,
2176 so only a standard 'nop' is disassembled as a nop.
2177
2178 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2179
2180 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2181 disassembled as a nop.
2182
2183 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2184
2185 * sparc.h: fix a typo.
2186
2187 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2188
2189 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2190 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2191 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2192
2193 \f
2194 Local Variables:
2195 version-control: never
2196 End:
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