(O_SYS_CMDLINE): New pseudo opcode for command line processing.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2003-03-17 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
2
3 * h8300.h (O_SYS_CMDLINE): New pseudo opcode for command line
4 processing.
5
6 2003-02-21 Noida D.Venkatasubramanian <dvenkat@noida.hcltech.com>
7
8 * h8300.h (ldmac, stmac): Replace MACREG with MS32 and MD32.
9
10 2003-01-23 Alan Modra <amodra@bigpond.net.au>
11
12 * m68hc11.h (cpu6812s): Define.
13
14 2003-01-07 Chris Demetriou <cgd@broadcom.com>
15
16 * mips.h: Fix missing space in comment.
17 (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
18 (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
19 by four bits.
20
21 2003-01-02 Chris Demetriou <cgd@broadcom.com>
22
23 * mips.h: Update copyright years to include 2002 (which had
24 been missed previously) and 2003. Make comments about "+A",
25 "+B", and "+C" operand types more descriptive.
26
27 2002-12-31 Chris Demetriou <cgd@broadcom.com>
28
29 * mips.h: Note that the "+D" operand type name is now used.
30
31 2002-12-30 Chris Demetriou <cgd@broadcom.com>
32
33 * mips.h: Document "+" as the start of two-character operand
34 type names, and add new "K", "+A", "+B", and "+C" operand types.
35 (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
36 (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
37 defines.
38
39 2002-12-24 Dmitry Diky <diwil@mail.ru>
40
41 * msp430.h: New file. Defines msp430 opcodes.
42
43 2002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
44
45 * h8300.h: Added some more pseudo opcodes for system call
46 processing.
47
48 2002-12-19 Chris Demetriou <cgd@broadcom.com>
49
50 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
51 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
52 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
53 (OP_OP_SDC2, OP_OP_SDC3): Define.
54
55 2002-12-16 Alan Modra <amodra@bigpond.net.au>
56
57 * hppa.h (completer_chars): #if 0 out.
58
59 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
60 "default_args".
61 (struct not_wot): Constify "args".
62 (struct not): Constify "name".
63 (numopcodes): Delete.
64 (endop): Delete.
65
66 2002-12-13 Alan Modra <amodra@bigpond.net.au>
67
68 * pj.h (pj_opc_info_t): Add union.
69
70 2002-12-04 David Mosberger <davidm@hpl.hp.com>
71
72 * ia64.h: Fix copyright message.
73 (IA64_OPND_AR_CSD): New operand kind.
74
75 2002-12-03 Richard Henderson <rth@redhat.com>
76
77 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
78
79 2002-12-03 Alan Modra <amodra@bigpond.net.au>
80
81 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
82 Constify "leaf" and "multi".
83
84 2002-11-19 Klee Dienes <kdienes@apple.com>
85
86 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
87 fields.
88 (h8_opcodes). Modify initializer and initializer macros to no
89 longer initialize the removed fields.
90
91 2002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
92
93 * tic4x.h (c4x_insts): Fixed LDHI constraint
94
95 2002-11-18 Klee Dienes <kdienes@apple.com>
96
97 * h8300.h (h8_opcode): Remove 'length' field.
98 (h8_opcodes): Mark as 'const' (both the declaration and
99 definition). Modify initializer and initializer macros to no
100 longer initialize the length field.
101
102 2002-11-18 Klee Dienes <kdienes@apple.com>
103
104 * arc.h (arc_ext_opcodes): Declare as extern.
105 (arc_ext_operands): Declare as extern.
106 * i860.h (i860_opcodes): Declare as const.
107
108 2002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
109
110 * tic4x.h: File reordering. Added enhanced opcodes.
111
112 2002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
113
114 * tic4x.h: Major rewrite of entire file. Define instruction
115 classes, and put each instruction into a class.
116
117 2002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
118
119 * tic4x.h: Added new opcodes and corrected some bugs. Add support
120 for new DSP types.
121
122 2002-10-14 Alan Modra <amodra@bigpond.net.au>
123
124 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
125
126 2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
127 Ken Raeburn <raeburn@cygnus.com>
128 Aldy Hernandez <aldyh@redhat.com>
129 Eric Christopher <echristo@redhat.com>
130 Richard Sandiford <rsandifo@redhat.com>
131
132 * mips.h: Update comment for new opcodes.
133 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
134 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
135 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
136 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
137 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
138 Don't match CPU_R4111 with INSN_4100.
139
140 2002-08-19 Elena Zannoni <ezannoni@redhat.com>
141
142 From matthew green <mrg@redhat.com>
143
144 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
145 instructions.
146 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
147 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
148 e500x2 Integer select, branch locking, performance monitor,
149 cache locking and machine check APUs, respectively.
150 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
151 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
152
153 2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
154
155 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
156 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
157 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
158 memory banks.
159 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
160
161 2002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
162
163 * mips.h (INSN_MIPS16): New define.
164
165 2002-07-08 Alan Modra <amodra@bigpond.net.au>
166
167 * i386.h: Remove IgnoreSize from movsx and movzx.
168
169 2002-06-08 Alan Modra <amodra@bigpond.net.au>
170
171 * a29k.h: Replace CONST with const.
172 (CONST): Don't define.
173 * convex.h: Replace CONST with const.
174 (CONST): Don't define.
175 * dlx.h: Replace CONST with const.
176 * or32.h (CONST): Don't define.
177
178 2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
179
180 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
181 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
182 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
183 (INSN_MDMX): New constants, for MDMX support.
184 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
185
186 2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
187
188 * dlx.h: New file.
189
190 2002-05-25 Alan Modra <amodra@bigpond.net.au>
191
192 * ia64.h: Use #include "" instead of <> for local header files.
193 * sparc.h: Likewise.
194
195 2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
196
197 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
198
199 2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
200
201 * h8300.h: Corrected defs of all control regs
202 and eepmov instr.
203
204 2002-04-11 Alan Modra <amodra@bigpond.net.au>
205
206 * i386.h: Add intel mode cmpsd and movsd.
207 Put them before SSE2 insns, so that rep prefix works.
208
209 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
210
211 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
212 instructions.
213 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
214 may be passed along with the ISA bitmask.
215
216 2002-03-05 Paul Koning <pkoning@equallogic.com>
217
218 * pdp11.h: Add format codes for float instruction formats.
219
220 2002-02-25 Alan Modra <amodra@bigpond.net.au>
221
222 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
223
224 Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
225
226 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
227
228 Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
229
230 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
231 (xchg): Fix.
232 (in, out): Disable 64bit operands.
233 (call, jmp): Avoid REX prefixes.
234 (jcxz): Prohibit in 64bit mode
235 (jrcxz, loop): Add 64bit variants.
236 (movq): Fix patterns.
237 (movmskps, pextrw, pinstrw): Add 64bit variants.
238
239 2002-01-31 Ivan Guzvinec <ivang@opencores.org>
240
241 * or32.h: New file.
242
243 2002-01-22 Graydon Hoare <graydon@redhat.com>
244
245 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
246 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
247
248 2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
249
250 * h8300.h: Comment typo fix.
251
252 2002-01-03 matthew green <mrg@redhat.com>
253
254 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
255 (PPC_OPCODE_BOOKE64): Likewise.
256
257 Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
258
259 * hppa.h (call, ret): Move to end of table.
260 (addb, addib): PA2.0 variants should have been PA2.0W.
261 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
262 happy.
263 (fldw, fldd, fstw, fstd, bb): Likewise.
264 (short loads/stores): Tweak format specifier slightly to keep
265 disassembler happy.
266 (indexed loads/stores): Likewise.
267 (absolute loads/stores): Likewise.
268
269 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
270
271 * d10v.h (OPERAND_NOSP): New macro.
272
273 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
274
275 * d10v.h (OPERAND_SP): New macro.
276
277 2001-11-15 Alan Modra <amodra@bigpond.net.au>
278
279 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
280
281 2001-11-11 Timothy Wall <twall@alum.mit.edu>
282
283 * tic54x.h: Revise opcode layout; don't really need a separate
284 structure for parallel opcodes.
285
286 2001-11-13 Zack Weinberg <zack@codesourcery.com>
287 Alan Modra <amodra@bigpond.net.au>
288
289 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
290 accept WordReg.
291
292 2001-11-04 Chris Demetriou <cgd@broadcom.com>
293
294 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
295
296 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
297
298 * mmix.h: New file.
299
300 2001-10-18 Chris Demetriou <cgd@broadcom.com>
301
302 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
303 of the expression, to make source code merging easier.
304
305 2001-10-17 Chris Demetriou <cgd@broadcom.com>
306
307 * mips.h: Sort coprocessor instruction argument characters
308 in comment, add a few more words of description for "H".
309
310 2001-10-17 Chris Demetriou <cgd@broadcom.com>
311
312 * mips.h (INSN_SB1): New cpu-specific instruction bit.
313 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
314 if cpu is CPU_SB1.
315
316 2001-10-17 matthew green <mrg@redhat.com>
317
318 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
319
320 2001-10-12 matthew green <mrg@redhat.com>
321
322 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
323 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
324 instructions, respectively.
325
326 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
327
328 * v850.h: Remove spurious comment.
329
330 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
331
332 * h8300.h: Fix compile time warning messages
333
334 2001-09-04 Richard Henderson <rth@redhat.com>
335
336 * alpha.h (struct alpha_operand): Pack elements into bitfields.
337
338 2001-08-31 Eric Christopher <echristo@redhat.com>
339
340 * mips.h: Remove CPU_MIPS32_4K.
341
342 2001-08-27 Torbjorn Granlund <tege@swox.com>
343
344 * ppc.h (PPC_OPERAND_DS): Define.
345
346 2001-08-25 Andreas Jaeger <aj@suse.de>
347
348 * d30v.h: Fix declaration of reg_name_cnt.
349
350 * d10v.h: Fix declaration of d10v_reg_name_cnt.
351
352 * arc.h: Add prototypes from opcodes/arc-opc.c.
353
354 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
355
356 * mips.h (INSN_10000): Define.
357 (OPCODE_IS_MEMBER): Check for INSN_10000.
358
359 2001-08-10 Alan Modra <amodra@one.net.au>
360
361 * ppc.h: Revert 2001-08-08.
362
363 2001-08-10 Richard Sandiford <rsandifo@redhat.com>
364
365 * mips.h (INSN_GP32): Remove.
366 (OPCODE_IS_MEMBER): Remove gp32 parameter.
367 (M_MOVE): New macro identifier.
368
369 2001-08-08 Alan Modra <amodra@one.net.au>
370
371 1999-10-25 Torbjorn Granlund <tege@swox.com>
372 * ppc.h (struct powerpc_operand): New field `reloc'.
373
374 2001-08-01 Aldy Hernandez <aldyh@redhat.com>
375
376 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
377
378 2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
379
380 * cgen.h (CGEN_INSN): Add regex support.
381 (build_insn_regex): Declare.
382
383 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
384
385 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
386 (cgen_cpu_desc): Ditto.
387
388 2001-07-07 Ben Elliston <bje@redhat.com>
389
390 * m88k.h: Clean up and reformat. Remove unused code.
391
392 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
393
394 * cgen.h (cgen_keyword): Add nonalpha_chars field.
395
396 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
397
398 * mips.h (CPU_R12000): Define.
399
400 2001-05-23 John Healy <jhealy@redhat.com>
401
402 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
403
404 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
405
406 * mips.h (INSN_ISA_MASK): Define.
407
408 2001-05-12 Alan Modra <amodra@one.net.au>
409
410 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
411 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
412 and use InvMem as these insns must have register operands.
413
414 2001-05-04 Alan Modra <amodra@one.net.au>
415
416 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
417 and pextrw to swap reg/rm assignments.
418
419 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
420
421 * cris.h (enum cris_insn_version_usage): Correct comment for
422 cris_ver_v3p.
423
424 2001-03-24 Alan Modra <alan@linuxcare.com.au>
425
426 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
427 Add InvMem to first operand of "maskmovdqu".
428
429 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
430
431 * cris.h (ADD_PC_INCR_OPCODE): New macro.
432
433 2001-03-21 Kazu Hirata <kazu@hxi.com>
434
435 * h8300.h: Fix formatting.
436
437 2001-03-22 Alan Modra <alan@linuxcare.com.au>
438
439 * i386.h (i386_optab): Add paddq, psubq.
440
441 2001-03-19 Alan Modra <alan@linuxcare.com.au>
442
443 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
444
445 2001-02-28 Igor Shevlyakov <igor@windriver.com>
446
447 * m68k.h: new defines for Coldfire V4. Update mcf to know
448 about mcf5407.
449
450 2001-02-18 lars brinkhoff <lars@nocrew.org>
451
452 * pdp11.h: New file.
453
454 2001-02-12 Jan Hubicka <jh@suse.cz>
455
456 * i386.h (i386_optab): SSE integer converison instructions have
457 64bit versions on x86-64.
458
459 2001-02-10 Nick Clifton <nickc@redhat.com>
460
461 * mips.h: Remove extraneous whitespace. Formating change to allow
462 for future contribution.
463
464 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
465
466 * s390.h: New file.
467
468 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
469
470 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
471 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
472 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
473
474 2001-01-24 Karsten Keil <kkeil@suse.de>
475
476 * i386.h (i386_optab): Fix swapgs
477
478 2001-01-14 Alan Modra <alan@linuxcare.com.au>
479
480 * hppa.h: Describe new '<' and '>' operand types, and tidy
481 existing comments.
482 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
483 Remove duplicate "ldw j(s,b),x". Sort some entries.
484
485 2001-01-13 Jan Hubicka <jh@suse.cz>
486
487 * i386.h (i386_optab): Fix pusha and ret templates.
488
489 2001-01-11 Peter Targett <peter.targett@arccores.com>
490
491 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
492 definitions for masking cpu type.
493 (arc_ext_operand_value) New structure for storing extended
494 operands.
495 (ARC_OPERAND_*) Flags for operand values.
496
497 2001-01-10 Jan Hubicka <jh@suse.cz>
498
499 * i386.h (pinsrw): Add.
500 (pshufw): Remove.
501 (cvttpd2dq): Fix operands.
502 (cvttps2dq): Likewise.
503 (movq2q): Rename to movdq2q.
504
505 2001-01-10 Richard Schaal <richard.schaal@intel.com>
506
507 * i386.h: Correct movnti instruction.
508
509 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
510
511 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
512 of operands (unsigned char or unsigned short).
513 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
514 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
515
516 2001-01-05 Jan Hubicka <jh@suse.cz>
517
518 * i386.h (i386_optab): Make [sml]fence template to use immext field.
519
520 2001-01-03 Jan Hubicka <jh@suse.cz>
521
522 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
523 introduced by Pentium4
524
525 2000-12-30 Jan Hubicka <jh@suse.cz>
526
527 * i386.h (i386_optab): Add "rex*" instructions;
528 add swapgs; disable jmp/call far direct instructions for
529 64bit mode; add syscall and sysret; disable registers for 0xc6
530 template. Add 'q' suffixes to extendable instructions, disable
531 obsolete instructions, add new sign/zero extension ones.
532 (i386_regtab): Add extended registers.
533 (*Suf): Add No_qSuf.
534 (q_Suf, wlq_Suf, bwlq_Suf): New.
535
536 2000-12-20 Jan Hubicka <jh@suse.cz>
537
538 * i386.h (i386_optab): Replace "Imm" with "EncImm".
539 (i386_regtab): Add flags field.
540
541 2000-12-12 Nick Clifton <nickc@redhat.com>
542
543 * mips.h: Fix formatting.
544
545 2000-12-01 Chris Demetriou <cgd@sibyte.com>
546
547 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
548 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
549 OP_*_SYSCALL definitions.
550 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
551 19 bit wait codes.
552 (MIPS operand specifier comments): Remove 'm', add 'U' and
553 'J', and update the meaning of 'B' so that it's more general.
554
555 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
556 INSN_ISA5): Renumber, redefine to mean the ISA at which the
557 instruction was added.
558 (INSN_ISA32): New constant.
559 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
560 Renumber to avoid new and/or renumbered INSN_* constants.
561 (INSN_MIPS32): Delete.
562 (ISA_UNKNOWN): New constant to indicate unknown ISA.
563 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
564 ISA_MIPS32): New constants, defined to be the mask of INSN_*
565 constants available at that ISA level.
566 (CPU_UNKNOWN): New constant to indicate unknown CPU.
567 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
568 define it with a unique value.
569 (OPCODE_IS_MEMBER): Update for new ISA membership-related
570 constant meanings.
571
572 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
573 definitions.
574
575 * mips.h (CPU_SB1): New constant.
576
577 2000-10-20 Jakub Jelinek <jakub@redhat.com>
578
579 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
580 Note that '3' is used for siam operand.
581
582 2000-09-22 Jim Wilson <wilson@cygnus.com>
583
584 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
585
586 2000-09-13 Anders Norlander <anorland@acc.umu.se>
587
588 * mips.h: Use defines instead of hard-coded processor numbers.
589 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
590 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
591 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
592 CPU_4KC, CPU_4KM, CPU_4KP): Define..
593 (OPCODE_IS_MEMBER): Use new defines.
594 (OP_MASK_SEL, OP_SH_SEL): Define.
595 (OP_MASK_CODE20, OP_SH_CODE20): Define.
596 Add 'P' to used characters.
597 Use 'H' for coprocessor select field.
598 Use 'm' for 20 bit breakpoint code.
599 Document new arg characters and add to used characters.
600 (INSN_MIPS32): New define for MIPS32 extensions.
601 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
602
603 2000-09-05 Alan Modra <alan@linuxcare.com.au>
604
605 * hppa.h: Mention cz completer.
606
607 2000-08-16 Jim Wilson <wilson@cygnus.com>
608
609 * ia64.h (IA64_OPCODE_POSTINC): New.
610
611 2000-08-15 H.J. Lu <hjl@gnu.org>
612
613 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
614 IgnoreSize change.
615
616 2000-08-08 Jason Eckhardt <jle@cygnus.com>
617
618 * i860.h: Small formatting adjustments.
619
620 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
621
622 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
623 Move related opcodes closer to each other.
624 Minor changes in comments, list undefined opcodes.
625
626 2000-07-26 Dave Brolley <brolley@redhat.com>
627
628 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
629
630 2000-07-22 Jason Eckhardt <jle@cygnus.com>
631
632 * i860.h (btne, bte, bla): Changed these opcodes
633 to use sbroff ('r') instead of split16 ('s').
634 (J, K, L, M): New operand types for 16-bit aligned fields.
635 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
636 use I, J, K, L, M instead of just I.
637 (T, U): New operand types for split 16-bit aligned fields.
638 (st.x): Changed these opcodes to use S, T, U instead of just S.
639 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
640 exist on the i860.
641 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
642 (pfeq.ss, pfeq.dd): New opcodes.
643 (st.s): Fixed incorrect mask bits.
644 (fmlow): Fixed incorrect mask bits.
645 (fzchkl, pfzchkl): Fixed incorrect mask bits.
646 (faddz, pfaddz): Fixed incorrect mask bits.
647 (form, pform): Fixed incorrect mask bits.
648 (pfld.l): Fixed incorrect mask bits.
649 (fst.q): Fixed incorrect mask bits.
650 (all floating point opcodes): Fixed incorrect mask bits for
651 handling of dual bit.
652
653 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
654
655 cris.h: New file.
656
657 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
658
659 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
660 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
661 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
662 (AVR_ISA_M83): Define for ATmega83, ATmega85.
663 (espm): Remove, because ESPM removed in databook update.
664 (eicall, eijmp): Move to the end of opcode table.
665
666 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
667
668 * m68hc11.h: New file for support of Motorola 68hc11.
669
670 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
671
672 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
673
674 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
675
676 * avr.h: New file with AVR opcodes.
677
678 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
679
680 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
681
682 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
683
684 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
685
686 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
687
688 * i386.h: Use sl_FP, not sl_Suf for fild.
689
690 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
691
692 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
693 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
694 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
695 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
696
697 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
698
699 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
700
701 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
702 Alexander Sokolov <robocop@netlink.ru>
703
704 * i386.h (i386_optab): Add cpu_flags for all instructions.
705
706 2000-05-13 Alan Modra <alan@linuxcare.com.au>
707
708 From Gavin Romig-Koch <gavin@cygnus.com>
709 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
710
711 2000-05-04 Timothy Wall <twall@cygnus.com>
712
713 * tic54x.h: New.
714
715 2000-05-03 J.T. Conklin <jtc@redback.com>
716
717 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
718 (PPC_OPERAND_VR): New operand flag for vector registers.
719
720 2000-05-01 Kazu Hirata <kazu@hxi.com>
721
722 * h8300.h (EOP): Add missing initializer.
723
724 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
725
726 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
727 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
728 New operand types l,y,&,fe,fE,fx added to support above forms.
729 (pa_opcodes): Replaced usage of 'x' as source/target for
730 floating point double-word loads/stores with 'fx'.
731
732 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
733 David Mosberger <davidm@hpl.hp.com>
734 Timothy Wall <twall@cygnus.com>
735 Jim Wilson <wilson@cygnus.com>
736
737 * ia64.h: New file.
738
739 2000-03-27 Nick Clifton <nickc@cygnus.com>
740
741 * d30v.h (SHORT_A1): Fix value.
742 (SHORT_AR): Renumber so that it is at the end of the list of short
743 instructions, not the end of the list of long instructions.
744
745 2000-03-26 Alan Modra <alan@linuxcare.com>
746
747 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
748 problem isn't really specific to Unixware.
749 (OLDGCC_COMPAT): Define.
750 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
751 destination %st(0).
752 Fix lots of comments.
753
754 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
755
756 * d30v.h:
757 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
758 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
759 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
760 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
761 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
762 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
763 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
764
765 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
766
767 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
768 fistpd without suffix.
769
770 2000-02-24 Nick Clifton <nickc@cygnus.com>
771
772 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
773 'signed_overflow_ok_p'.
774 Delete prototypes for cgen_set_flags() and cgen_get_flags().
775
776 2000-02-24 Andrew Haley <aph@cygnus.com>
777
778 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
779 (CGEN_CPU_TABLE): flags: new field.
780 Add prototypes for new functions.
781
782 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
783
784 * i386.h: Add some more UNIXWARE_COMPAT comments.
785
786 2000-02-23 Linas Vepstas <linas@linas.org>
787
788 * i370.h: New file.
789
790 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
791
792 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
793 cannot be combined in parallel with ADD/SUBppp.
794
795 2000-02-22 Andrew Haley <aph@cygnus.com>
796
797 * mips.h: (OPCODE_IS_MEMBER): Add comment.
798
799 1999-12-30 Andrew Haley <aph@cygnus.com>
800
801 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
802 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
803 insns.
804
805 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
806
807 * i386.h: Qualify intel mode far call and jmp with x_Suf.
808
809 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
810
811 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
812 indirect jumps and calls. Add FF/3 call for intel mode.
813
814 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
815
816 * mn10300.h: Add new operand types. Add new instruction formats.
817
818 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
819
820 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
821 instruction.
822
823 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
824
825 * mips.h (INSN_ISA5): New.
826
827 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
828
829 * mips.h (OPCODE_IS_MEMBER): New.
830
831 1999-10-29 Nick Clifton <nickc@cygnus.com>
832
833 * d30v.h (SHORT_AR): Define.
834
835 1999-10-18 Michael Meissner <meissner@cygnus.com>
836
837 * alpha.h (alpha_num_opcodes): Convert to unsigned.
838 (alpha_num_operands): Ditto.
839
840 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
841
842 * hppa.h (pa_opcodes): Add load and store cache control to
843 instructions. Add ordered access load and store.
844
845 * hppa.h (pa_opcode): Add new entries for addb and addib.
846
847 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
848
849 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
850
851 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
852
853 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
854
855 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
856
857 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
858 and "be" using completer prefixes.
859
860 * hppa.h (pa_opcodes): Add initializers to silence compiler.
861
862 * hppa.h: Update comments about character usage.
863
864 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
865
866 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
867 up the new fstw & bve instructions.
868
869 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
870
871 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
872 instructions.
873
874 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
875
876 * hppa.h (pa_opcodes): Add long offset double word load/store
877 instructions.
878
879 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
880 stores.
881
882 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
883
884 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
885
886 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
887
888 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
889
890 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
891
892 * hppa.h (pa_opcodes): Add support for "b,l".
893
894 * hppa.h (pa_opcodes): Add support for "b,gate".
895
896 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
897
898 * hppa.h (pa_opcodes): Use 'fX' for first register operand
899 in xmpyu.
900
901 * hppa.h (pa_opcodes): Fix mask for probe and probei.
902
903 * hppa.h (pa_opcodes): Fix mask for depwi.
904
905 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
906
907 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
908 an explicit output argument.
909
910 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
911
912 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
913 Add a few PA2.0 loads and store variants.
914
915 1999-09-04 Steve Chamberlain <sac@pobox.com>
916
917 * pj.h: New file.
918
919 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
920
921 * i386.h (i386_regtab): Move %st to top of table, and split off
922 other fp reg entries.
923 (i386_float_regtab): To here.
924
925 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
926
927 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
928 by 'f'.
929
930 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
931 Add supporting args.
932
933 * hppa.h: Document new completers and args.
934 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
935 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
936 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
937 pmenb and pmdis.
938
939 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
940 hshr, hsub, mixh, mixw, permh.
941
942 * hppa.h (pa_opcodes): Change completers in instructions to
943 use 'c' prefix.
944
945 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
946 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
947
948 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
949 fnegabs to use 'I' instead of 'F'.
950
951 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
952
953 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
954 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
955 Alphabetically sort PIII insns.
956
957 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
958
959 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
960
961 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
962
963 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
964 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
965
966 * hppa.h: Document 64 bit condition completers.
967
968 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
969
970 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
971
972 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
973
974 * i386.h (i386_optab): Add DefaultSize modifier to all insns
975 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
976 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
977
978 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
979 Jeff Law <law@cygnus.com>
980
981 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
982
983 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
984
985 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
986 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
987
988 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
989
990 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
991
992 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
993
994 * hppa.h (struct pa_opcode): Add new field "flags".
995 (FLAGS_STRICT): Define.
996
997 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
998 Jeff Law <law@cygnus.com>
999
1000 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
1001
1002 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
1003
1004 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
1005
1006 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
1007 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
1008 flag to fcomi and friends.
1009
1010 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
1011
1012 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
1013 integer logical instructions.
1014
1015 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
1016
1017 * m68k.h: Document new formats `E', `G', `H' and new places `N',
1018 `n', `o'.
1019
1020 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
1021 and new places `m', `M', `h'.
1022
1023 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
1024
1025 * hppa.h (pa_opcodes): Add several processor specific system
1026 instructions.
1027
1028 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
1029
1030 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
1031 "addb", and "addib" to be used by the disassembler.
1032
1033 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1034
1035 * i386.h (ReverseModrm): Remove all occurences.
1036 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1037 movmskps, pextrw, pmovmskb, maskmovq.
1038 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1039 ignore the data size prefix.
1040
1041 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1042 Mostly stolen from Doug Ledford <dledford@redhat.com>
1043
1044 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1045
1046 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1047
1048 1999-04-14 Doug Evans <devans@casey.cygnus.com>
1049
1050 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1051 (CGEN_ATTR_TYPE): Update.
1052 (CGEN_ATTR_MASK): Number booleans starting at 0.
1053 (CGEN_ATTR_VALUE): Update.
1054 (CGEN_INSN_ATTR): Update.
1055
1056 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1057
1058 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1059 instructions.
1060
1061 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1062
1063 * hppa.h (bb, bvb): Tweak opcode/mask.
1064
1065
1066 1999-03-22 Doug Evans <devans@casey.cygnus.com>
1067
1068 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1069 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1070 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1071 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1072 Delete member max_insn_size.
1073 (enum cgen_cpu_open_arg): New enum.
1074 (cpu_open): Update prototype.
1075 (cpu_open_1): Declare.
1076 (cgen_set_cpu): Delete.
1077
1078 1999-03-11 Doug Evans <devans@casey.cygnus.com>
1079
1080 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1081 (CGEN_OPERAND_NIL): New macro.
1082 (CGEN_OPERAND): New member `type'.
1083 (@arch@_cgen_operand_table): Delete decl.
1084 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1085 (CGEN_OPERAND_TABLE): New struct.
1086 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1087 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1088 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1089 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1090 {get,set}_{int,vma}_operand.
1091 (@arch@_cgen_cpu_open): New arg `isa'.
1092 (cgen_set_cpu): Ditto.
1093
1094 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1095
1096 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1097
1098 1999-02-25 Doug Evans <devans@casey.cygnus.com>
1099
1100 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1101 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1102 enum cgen_hw_type.
1103 (CGEN_HW_TABLE): New struct.
1104 (hw_table): Delete declaration.
1105 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1106 to table entry to enum.
1107 (CGEN_OPINST): Ditto.
1108 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1109
1110 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1111
1112 * alpha.h (AXP_OPCODE_EV6): New.
1113 (AXP_OPCODE_NOPAL): Include it.
1114
1115 1999-02-09 Doug Evans <devans@casey.cygnus.com>
1116
1117 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1118 All uses updated. New members int_insn_p, max_insn_size,
1119 parse_operand,insert_operand,extract_operand,print_operand,
1120 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1121 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1122 extract_handlers,print_handlers.
1123 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1124 (CGEN_ATTR_BOOL_OFFSET): New macro.
1125 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1126 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1127 (cgen_opcode_handler): Renamed from cgen_base.
1128 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1129 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1130 all uses updated.
1131 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1132 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1133 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1134 (CGEN_OPCODE,CGEN_IBASE): New types.
1135 (CGEN_INSN): Rewrite.
1136 (CGEN_{ASM,DIS}_HASH*): Delete.
1137 (init_opcode_table,init_ibld_table): Declare.
1138 (CGEN_INSN_ATTR): New type.
1139
1140 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
1141
1142 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1143 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1144 Change *Suf definitions to include x and d suffixes.
1145 (movsx): Use w_Suf and b_Suf.
1146 (movzx): Likewise.
1147 (movs): Use bwld_Suf.
1148 (fld): Change ordering. Use sld_FP.
1149 (fild): Add Intel Syntax equivalent of fildq.
1150 (fst): Use sld_FP.
1151 (fist): Use sld_FP.
1152 (fstp): Use sld_FP. Add x_FP version.
1153 (fistp): LLongMem version for Intel Syntax.
1154 (fcom, fcomp): Use sld_FP.
1155 (fadd, fiadd, fsub): Use sld_FP.
1156 (fsubr): Use sld_FP.
1157 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1158
1159 1999-01-27 Doug Evans <devans@casey.cygnus.com>
1160
1161 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1162 CGEN_MODE_UINT.
1163
1164 1999-01-16 Jeffrey A Law (law@cygnus.com)
1165
1166 * hppa.h (bv): Fix mask.
1167
1168 1999-01-05 Doug Evans <devans@casey.cygnus.com>
1169
1170 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1171 (CGEN_ATTR): Use it.
1172 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1173 (CGEN_ATTR_TABLE): New member dfault.
1174
1175 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1176
1177 * mips.h (MIPS16_INSN_BRANCH): New.
1178
1179 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1180
1181 The following is part of a change made by Edith Epstein
1182 <eepstein@sophia.cygnus.com> as part of a project to merge in
1183 changes by HP; HP did not create ChangeLog entries.
1184
1185 * hppa.h (completer_chars): list of chars to not put a space
1186 after.
1187
1188 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1189
1190 * i386.h (i386_optab): Permit w suffix on processor control and
1191 status word instructions.
1192
1193 1998-11-30 Doug Evans <devans@casey.cygnus.com>
1194
1195 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1196 (struct cgen_keyword_entry): Ditto.
1197 (struct cgen_operand): Ditto.
1198 (CGEN_IFLD): New typedef, with associated access macros.
1199 (CGEN_IFMT): New typedef, with associated access macros.
1200 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1201 (CGEN_IVALUE): New typedef.
1202 (struct cgen_insn): Delete const on syntax,attrs members.
1203 `format' now points to format data. Type of `value' is now
1204 CGEN_IVALUE.
1205 (struct cgen_opcode_table): New member ifld_table.
1206
1207 1998-11-18 Doug Evans <devans@casey.cygnus.com>
1208
1209 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1210 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1211 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1212 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1213 (cgen_opcode_table): Update type of dis_hash fn.
1214 (extract_operand): Update type of `insn_value' arg.
1215
1216 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1217
1218 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1219
1220 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1221
1222 * mips.h (INSN_MULT): Added.
1223
1224 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1225
1226 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1227
1228 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1229
1230 * cgen.h (CGEN_INSN_INT): New typedef.
1231 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1232 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1233 (CGEN_INSN_BYTES_PTR): New typedef.
1234 (CGEN_EXTRACT_INFO): New typedef.
1235 (cgen_insert_fn,cgen_extract_fn): Update.
1236 (cgen_opcode_table): New member `insn_endian'.
1237 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1238 (insert_operand,extract_operand): Update.
1239 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1240
1241 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1242
1243 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1244 (struct CGEN_HW_ENTRY): New member `attrs'.
1245 (CGEN_HW_ATTR): New macro.
1246 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1247 (CGEN_INSN_INVALID_P): New macro.
1248
1249 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1250
1251 * hppa.h: Add "fid".
1252
1253 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1254
1255 From Robert Andrew Dale <rob@nb.net>
1256 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1257 (AMD_3DNOW_OPCODE): Define.
1258
1259 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1260
1261 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1262
1263 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1264
1265 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1266
1267 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1268
1269 Move all global state data into opcode table struct, and treat
1270 opcode table as something that is "opened/closed".
1271 * cgen.h (CGEN_OPCODE_DESC): New type.
1272 (all fns): New first arg of opcode table descriptor.
1273 (cgen_set_parse_operand_fn): Add prototype.
1274 (cgen_current_machine,cgen_current_endian): Delete.
1275 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1276 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1277 dis_hash_table,dis_hash_table_entries.
1278 (opcode_open,opcode_close): Add prototypes.
1279
1280 * cgen.h (cgen_insn): New element `cdx'.
1281
1282 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1283
1284 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1285
1286 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1287
1288 * mn10300.h: Add "no_match_operands" field for instructions.
1289 (MN10300_MAX_OPERANDS): Define.
1290
1291 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1292
1293 * cgen.h (cgen_macro_insn_count): Declare.
1294
1295 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1296
1297 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1298 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1299 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1300 set_{int,vma}_operand.
1301
1302 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1303
1304 * mn10300.h: Add "machine" field for instructions.
1305 (MN103, AM30): Define machine types.
1306
1307 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1308
1309 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1310
1311 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1312
1313 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1314
1315 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1316
1317 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1318 and ud2b.
1319 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1320 those that happen to be implemented on pentiums.
1321
1322 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1323
1324 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1325 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1326 with Size16|IgnoreSize or Size32|IgnoreSize.
1327
1328 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1329
1330 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1331 (REPE): Rename to REPE_PREFIX_OPCODE.
1332 (i386_regtab_end): Remove.
1333 (i386_prefixtab, i386_prefixtab_end): Remove.
1334 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1335 of md_begin.
1336 (MAX_OPCODE_SIZE): Define.
1337 (i386_optab_end): Remove.
1338 (sl_Suf): Define.
1339 (sl_FP): Use sl_Suf.
1340
1341 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1342 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1343 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1344 data32, dword, and adword prefixes.
1345 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1346 regs.
1347
1348 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1349
1350 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1351
1352 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1353 register operands, because this is a common idiom. Flag them with
1354 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1355 fdivrp because gcc erroneously generates them. Also flag with a
1356 warning.
1357
1358 * i386.h: Add suffix modifiers to most insns, and tighter operand
1359 checks in some cases. Fix a number of UnixWare compatibility
1360 issues with float insns. Merge some floating point opcodes, using
1361 new FloatMF modifier.
1362 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1363 consistency.
1364
1365 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1366 IgnoreDataSize where appropriate.
1367
1368 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1369
1370 * i386.h: (one_byte_segment_defaults): Remove.
1371 (two_byte_segment_defaults): Remove.
1372 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1373
1374 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1375
1376 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1377 (cgen_hw_lookup_by_num): Declare.
1378
1379 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1380
1381 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1382 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1383
1384 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1385
1386 * cgen.h (cgen_asm_init_parse): Delete.
1387 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1388 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1389
1390 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1391
1392 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1393 (cgen_asm_finish_insn): Update prototype.
1394 (cgen_insn): New members num, data.
1395 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1396 dis_hash, dis_hash_table_size moved to ...
1397 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1398 All uses updated. New members asm_hash_p, dis_hash_p.
1399 (CGEN_MINSN_EXPANSION): New struct.
1400 (cgen_expand_macro_insn): Declare.
1401 (cgen_macro_insn_count): Declare.
1402 (get_insn_operands): Update prototype.
1403 (lookup_get_insn_operands): Declare.
1404
1405 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1406
1407 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1408 regKludge. Add operands types for string instructions.
1409
1410 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1411
1412 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1413 table.
1414
1415 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1416
1417 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1418 for `gettext'.
1419
1420 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1421
1422 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1423 Add IsString flag to string instructions.
1424 (IS_STRING): Don't define.
1425 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1426 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1427 (SS_PREFIX_OPCODE): Define.
1428
1429 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1430
1431 * i386.h: Revert March 24 patch; no more LinearAddress.
1432
1433 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1434
1435 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1436 instructions, and instead add FWait opcode modifier. Add short
1437 form of fldenv and fstenv.
1438 (FWAIT_OPCODE): Define.
1439
1440 * i386.h (i386_optab): Change second operand constraint of `mov
1441 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1442 allow legal instructions such as `movl %gs,%esi'
1443
1444 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1445
1446 * h8300.h: Various changes to fully bracket initializers.
1447
1448 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1449
1450 * i386.h: Set LinearAddress for lidt and lgdt.
1451
1452 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1453
1454 * cgen.h (CGEN_BOOL_ATTR): New macro.
1455
1456 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1457
1458 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1459
1460 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1461
1462 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1463 (cgen_insn): Record syntax and format entries here, rather than
1464 separately.
1465
1466 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1467
1468 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1469
1470 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1471
1472 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1473 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1474 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1475
1476 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1477
1478 * cgen.h (lookup_insn): New argument alias_p.
1479
1480 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1481
1482 Fix rac to accept only a0:
1483 * d10v.h (OPERAND_ACC): Split into:
1484 (OPERAND_ACC0, OPERAND_ACC1) .
1485 (OPERAND_GPR): Define.
1486
1487 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1488
1489 * cgen.h (CGEN_FIELDS): Define here.
1490 (CGEN_HW_ENTRY): New member `type'.
1491 (hw_list): Delete decl.
1492 (enum cgen_mode): Declare.
1493 (CGEN_OPERAND): New member `hw'.
1494 (enum cgen_operand_instance_type): Declare.
1495 (CGEN_OPERAND_INSTANCE): New type.
1496 (CGEN_INSN): New member `operands'.
1497 (CGEN_OPCODE_DATA): Make hw_list const.
1498 (get_insn_operands,lookup_insn): Add prototypes for.
1499
1500 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1501
1502 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1503 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1504 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1505 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1506
1507 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1508
1509 * cgen.h: Correct typo in comment end marker.
1510
1511 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1512
1513 * tic30.h: New file.
1514
1515 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1516
1517 * cgen.h: Add prototypes for cgen_save_fixups(),
1518 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1519 of cgen_asm_finish_insn() to return a char *.
1520
1521 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1522
1523 * cgen.h: Formatting changes to improve readability.
1524
1525 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1526
1527 * cgen.h (*): Clean up pass over `struct foo' usage.
1528 (CGEN_ATTR): Make unsigned char.
1529 (CGEN_ATTR_TYPE): Update.
1530 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1531 (cgen_base): Move member `attrs' to cgen_insn.
1532 (CGEN_KEYWORD): New member `null_entry'.
1533 (CGEN_{SYNTAX,FORMAT}): New types.
1534 (cgen_insn): Format and syntax separated from each other.
1535
1536 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1537
1538 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1539 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1540 flags_{used,set} long.
1541 (d30v_operand): Make flags field long.
1542
1543 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1544
1545 * m68k.h: Fix comment describing operand types.
1546
1547 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1548
1549 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1550 everything else after down.
1551
1552 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1553
1554 * d10v.h (OPERAND_FLAG): Split into:
1555 (OPERAND_FFLAG, OPERAND_CFLAG) .
1556
1557 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1558
1559 * mips.h (struct mips_opcode): Changed comments to reflect new
1560 field usage.
1561
1562 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1563
1564 * mips.h: Added to comments a quick-ref list of all assigned
1565 operand type characters.
1566 (OP_{MASK,SH}_PERFREG): New macros.
1567
1568 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1569
1570 * sparc.h: Add '_' and '/' for v9a asr's.
1571 Patch from David Miller <davem@vger.rutgers.edu>
1572
1573 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1574
1575 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1576 area are not available in the base model (H8/300).
1577
1578 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1579
1580 * m68k.h: Remove documentation of ` operand specifier.
1581
1582 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1583
1584 * m68k.h: Document q and v operand specifiers.
1585
1586 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1587
1588 * v850.h (struct v850_opcode): Add processors field.
1589 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1590 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1591 (PROCESSOR_V850EA): New bit constants.
1592
1593 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1594
1595 Merge changes from Martin Hunt:
1596
1597 * d30v.h: Allow up to 64 control registers. Add
1598 SHORT_A5S format.
1599
1600 * d30v.h (LONG_Db): New form for delayed branches.
1601
1602 * d30v.h: (LONG_Db): New form for repeati.
1603
1604 * d30v.h (SHORT_D2B): New form.
1605
1606 * d30v.h (SHORT_A2): New form.
1607
1608 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1609 registers are used. Needed for VLIW optimization.
1610
1611 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1612
1613 * cgen.h: Move assembler interface section
1614 up so cgen_parse_operand_result is defined for cgen_parse_address.
1615 (cgen_parse_address): Update prototype.
1616
1617 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1618
1619 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1620
1621 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1622
1623 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1624 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1625 <paubert@iram.es>.
1626
1627 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1628 <paubert@iram.es>.
1629
1630 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1631 <paubert@iram.es>.
1632
1633 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1634 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1635
1636 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1637
1638 * v850.h (V850_NOT_R0): New flag.
1639
1640 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1641
1642 * v850.h (struct v850_opcode): Remove flags field.
1643
1644 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1645
1646 * v850.h (struct v850_opcode): Add flags field.
1647 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1648 fields.
1649 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1650 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1651
1652 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1653
1654 * arc.h: New file.
1655
1656 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1657
1658 * sparc.h (sparc_opcodes): Declare as const.
1659
1660 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1661
1662 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1663 uses single or double precision floating point resources.
1664 (INSN_NO_ISA, INSN_ISA1): Define.
1665 (cpu specific INSN macros): Tweak into bitmasks outside the range
1666 of INSN_ISA field.
1667
1668 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1669
1670 * i386.h: Fix pand opcode.
1671
1672 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1673
1674 * mips.h: Widen INSN_ISA and move it to a more convenient
1675 bit position. Add INSN_3900.
1676
1677 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1678
1679 * mips.h (struct mips_opcode): added new field membership.
1680
1681 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1682
1683 * i386.h (movd): only Reg32 is allowed.
1684
1685 * i386.h: add fcomp and ud2. From Wayne Scott
1686 <wscott@ichips.intel.com>.
1687
1688 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1689
1690 * i386.h: Add MMX instructions.
1691
1692 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1693
1694 * i386.h: Remove W modifier from conditional move instructions.
1695
1696 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1697
1698 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1699 with no arguments to match that generated by the UnixWare
1700 assembler.
1701
1702 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1703
1704 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1705 (cgen_parse_operand_fn): Declare.
1706 (cgen_init_parse_operand): Declare.
1707 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1708 new argument `want'.
1709 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1710 (enum cgen_parse_operand_type): New enum.
1711
1712 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1713
1714 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1715
1716 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1717
1718 * cgen.h: New file.
1719
1720 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1721
1722 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1723 fdivrp.
1724
1725 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1726
1727 * v850.h (extract): Make unsigned.
1728
1729 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1730
1731 * i386.h: Add iclr.
1732
1733 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1734
1735 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1736 take a direction bit.
1737
1738 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1739
1740 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1741
1742 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1743
1744 * sparc.h: Include <ansidecl.h>. Update function declarations to
1745 use prototypes, and to use const when appropriate.
1746
1747 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1748
1749 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1750
1751 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1752
1753 * d10v.h: Change pre_defined_registers to
1754 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1755
1756 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1757
1758 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1759 Change mips_opcodes from const array to a pointer,
1760 and change bfd_mips_num_opcodes from const int to int,
1761 so that we can increase the size of the mips opcodes table
1762 dynamically.
1763
1764 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1765
1766 * d30v.h (FLAG_X): Remove unused flag.
1767
1768 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1769
1770 * d30v.h: New file.
1771
1772 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1773
1774 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1775 (PDS_VALUE): Macro to access value field of predefined symbols.
1776 (tic80_next_predefined_symbol): Add prototype.
1777
1778 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1779
1780 * tic80.h (tic80_symbol_to_value): Change prototype to match
1781 change in function, added class parameter.
1782
1783 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1784
1785 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1786 endmask fields, which are somewhat weird in that 0 and 32 are
1787 treated exactly the same.
1788
1789 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1790
1791 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1792 rather than a constant that is 2**X. Reorder them to put bits for
1793 operands that have symbolic names in the upper bits, so they can
1794 be packed into an int where the lower bits contain the value that
1795 corresponds to that symbolic name.
1796 (predefined_symbo): Add struct.
1797 (tic80_predefined_symbols): Declare array of translations.
1798 (tic80_num_predefined_symbols): Declare size of that array.
1799 (tic80_value_to_symbol): Declare function.
1800 (tic80_symbol_to_value): Declare function.
1801
1802 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1803
1804 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1805
1806 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1807
1808 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1809 be the destination register.
1810
1811 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1812
1813 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1814 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1815 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1816 that the opcode can have two vector instructions in a single
1817 32 bit word and we have to encode/decode both.
1818
1819 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1820
1821 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1822 TIC80_OPERAND_RELATIVE for PC relative.
1823 (TIC80_OPERAND_BASEREL): New flag bit for register
1824 base relative.
1825
1826 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1827
1828 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1829
1830 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1831
1832 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1833 ":s" modifier for scaling.
1834
1835 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1836
1837 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1838 (TIC80_OPERAND_M_LI): Ditto
1839
1840 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1841
1842 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1843 (TIC80_OPERAND_CC): New define for condition code operand.
1844 (TIC80_OPERAND_CR): New define for control register operand.
1845
1846 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1847
1848 * tic80.h (struct tic80_opcode): Name changed.
1849 (struct tic80_opcode): Remove format field.
1850 (struct tic80_operand): Add insertion and extraction functions.
1851 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1852 correct ones.
1853 (FMT_*): Ditto.
1854
1855 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1856
1857 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1858 type IV instruction offsets.
1859
1860 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1861
1862 * tic80.h: New file.
1863
1864 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1865
1866 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1867
1868 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1869
1870 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1871 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1872 * v850.h: Fix comment, v850_operand not powerpc_operand.
1873
1874 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1875
1876 * mn10200.h: Flesh out structures and definitions needed by
1877 the mn10200 assembler & disassembler.
1878
1879 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1880
1881 * mips.h: Add mips16 definitions.
1882
1883 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1884
1885 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1886
1887 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1888
1889 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1890 (MN10300_OPERAND_MEMADDR): Define.
1891
1892 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1893
1894 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1895
1896 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1897
1898 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1899
1900 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1901
1902 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1903
1904 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1905
1906 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1907
1908 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1909
1910 * alpha.h: Don't include "bfd.h"; private relocation types are now
1911 negative to minimize problems with shared libraries. Organize
1912 instruction subsets by AMASK extensions and PALcode
1913 implementation.
1914 (struct alpha_operand): Move flags slot for better packing.
1915
1916 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1917
1918 * v850.h (V850_OPERAND_RELAX): New operand flag.
1919
1920 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1921
1922 * mn10300.h (FMT_*): Move operand format definitions
1923 here.
1924
1925 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1926
1927 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1928
1929 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1930
1931 * mn10300.h (mn10300_opcode): Add "format" field.
1932 (MN10300_OPERAND_*): Define.
1933
1934 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1935
1936 * mn10x00.h: Delete.
1937 * mn10200.h, mn10300.h: New files.
1938
1939 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1940
1941 * mn10x00.h: New file.
1942
1943 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1944
1945 * v850.h: Add new flag to indicate this instruction uses a PC
1946 displacement.
1947
1948 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1949
1950 * h8300.h (stmac): Add missing instruction.
1951
1952 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1953
1954 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1955 field.
1956
1957 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1958
1959 * v850.h (V850_OPERAND_EP): Define.
1960
1961 * v850.h (v850_opcode): Add size field.
1962
1963 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1964
1965 * v850.h (v850_operands): Add insert and extract fields, pointers
1966 to functions used to handle unusual operand encoding.
1967 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1968 V850_OPERAND_SIGNED): Defined.
1969
1970 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1971
1972 * v850.h (v850_operands): Add flags field.
1973 (OPERAND_REG, OPERAND_NUM): Defined.
1974
1975 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1976
1977 * v850.h: New file.
1978
1979 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1980
1981 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1982 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1983 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1984 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1985 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1986 Defined.
1987
1988 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1989
1990 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1991 a 3 bit space id instead of a 2 bit space id.
1992
1993 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1994
1995 * d10v.h: Add some additional defines to support the
1996 assembler in determining which operations can be done in parallel.
1997
1998 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1999
2000 * h8300.h (SN): Define.
2001 (eepmov.b): Renamed from "eepmov"
2002 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
2003 with them.
2004
2005 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2006
2007 * d10v.h (OPERAND_SHIFT): New operand flag.
2008
2009 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2010
2011 * d10v.h: Changes for divs, parallel-only instructions, and
2012 signed numbers.
2013
2014 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2015
2016 * d10v.h (pd_reg): Define. Putting the definition here allows
2017 the assembler and disassembler to share the same struct.
2018
2019 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
2020
2021 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
2022 Williams <steve@icarus.com>.
2023
2024 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2025
2026 * d10v.h: New file.
2027
2028 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
2029
2030 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2031
2032 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2033
2034 * m68k.h (mcf5200): New macro.
2035 Document names of coldfire control registers.
2036
2037 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2038
2039 * h8300.h (SRC_IN_DST): Define.
2040
2041 * h8300.h (UNOP3): Mark the register operand in this insn
2042 as a source operand, not a destination operand.
2043 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2044 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2045 register operand with SRC_IN_DST.
2046
2047 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2048
2049 * alpha.h: New file.
2050
2051 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2052
2053 * rs6k.h: Remove obsolete file.
2054
2055 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2056
2057 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2058 fdivp, and fdivrp. Add ffreep.
2059
2060 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2061
2062 * h8300.h: Reorder various #defines for readability.
2063 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2064 (BITOP): Accept additional (unused) argument. All callers changed.
2065 (EBITOP): Likewise.
2066 (O_LAST): Bump.
2067 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2068
2069 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2070 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2071 (BITOP, EBITOP): Handle new H8/S addressing modes for
2072 bit insns.
2073 (UNOP3): Handle new shift/rotate insns on the H8/S.
2074 (insns using exr): New instructions.
2075 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2076
2077 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2078
2079 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2080 was incorrect.
2081
2082 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2083
2084 * h8300.h (START): Remove.
2085 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2086 and mov.l insns that can be relaxed.
2087
2088 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2089
2090 * i386.h: Remove Abs32 from lcall.
2091
2092 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2093
2094 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2095 (SLCPOP): New macro.
2096 Mark X,Y opcode letters as in use.
2097
2098 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2099
2100 * sparc.h (F_FLOAT, F_FBR): Define.
2101
2102 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2103
2104 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2105 from all insns.
2106 (ABS8SRC,ABS8DST): Add ABS8MEM.
2107 (add.l): Fix reg+reg variant.
2108 (eepmov.w): Renamed from eepmovw.
2109 (ldc,stc): Fix many cases.
2110
2111 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2112
2113 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2114
2115 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2116
2117 * sparc.h (O): Mark operand letter as in use.
2118
2119 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2120
2121 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2122 Mark operand letters uU as in use.
2123
2124 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2125
2126 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2127 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2128 (SPARC_OPCODE_SUPPORTED): New macro.
2129 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2130 (F_NOTV9): Delete.
2131
2132 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2133
2134 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2135 declaration consistent with return type in definition.
2136
2137 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2138
2139 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2140
2141 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2142
2143 * i386.h (i386_regtab): Add 80486 test registers.
2144
2145 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2146
2147 * i960.h (I_HX): Define.
2148 (i960_opcodes): Add HX instruction.
2149
2150 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2151
2152 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2153 and fclex.
2154
2155 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2156
2157 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2158 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2159 (bfd_* defines): Delete.
2160 (sparc_opcode_archs): Replaces architecture_pname.
2161 (sparc_opcode_lookup_arch): Declare.
2162 (NUMOPCODES): Delete.
2163
2164 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2165
2166 * sparc.h (enum sparc_architecture): Add v9a.
2167 (ARCHITECTURES_CONFLICT_P): Update.
2168
2169 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2170
2171 * i386.h: Added Pentium Pro instructions.
2172
2173 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2174
2175 * m68k.h: Document new 'W' operand place.
2176
2177 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2178
2179 * hppa.h: Add lci and syncdma instructions.
2180
2181 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2182
2183 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
2184 instructions.
2185
2186 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2187
2188 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2189 assembler's -mcom and -many switches.
2190
2191 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2192
2193 * i386.h: Fix cmpxchg8b extension opcode description.
2194
2195 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2196
2197 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2198 and register cr4.
2199
2200 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2201
2202 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2203
2204 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2205
2206 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2207
2208 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2209
2210 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2211
2212 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2213
2214 * m68kmri.h: Remove.
2215
2216 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2217 declarations. Remove F_ALIAS and flag field of struct
2218 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2219 int. Make name and args fields of struct m68k_opcode const.
2220
2221 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2222
2223 * sparc.h (F_NOTV9): Define.
2224
2225 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2226
2227 * mips.h (INSN_4010): Define.
2228
2229 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2230
2231 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2232
2233 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2234 * m68k.h: Fix argument descriptions of coprocessor
2235 instructions to allow only alterable operands where appropriate.
2236 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2237 (m68k_opcode_aliases): Add more aliases.
2238
2239 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2240
2241 * m68k.h: Added explcitly short-sized conditional branches, and a
2242 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2243 svr4-based configurations.
2244
2245 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2246
2247 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2248 * i386.h: added missing Data16/Data32 flags to a few instructions.
2249
2250 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2251
2252 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2253 (OP_MASK_BCC, OP_SH_BCC): Define.
2254 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2255 (OP_MASK_CCC, OP_SH_CCC): Define.
2256 (INSN_READ_FPR_R): Define.
2257 (INSN_RFE): Delete.
2258
2259 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2260
2261 * m68k.h (enum m68k_architecture): Deleted.
2262 (struct m68k_opcode_alias): New type.
2263 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2264 matching constraints, values and flags. As a side effect of this,
2265 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2266 as I know were never used, now may need re-examining.
2267 (numopcodes): Now const.
2268 (m68k_opcode_aliases, numaliases): New variables.
2269 (endop): Deleted.
2270 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2271 m68k_opcode_aliases; update declaration of m68k_opcodes.
2272
2273 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2274
2275 * hppa.h (delay_type): Delete unused enumeration.
2276 (pa_opcode): Replace unused delayed field with an architecture
2277 field.
2278 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2279
2280 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2281
2282 * mips.h (INSN_ISA4): Define.
2283
2284 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2285
2286 * mips.h (M_DLA_AB, M_DLI): Define.
2287
2288 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2289
2290 * hppa.h (fstwx): Fix single-bit error.
2291
2292 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2293
2294 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2295
2296 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2297
2298 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2299 debug registers. From Charles Hannum (mycroft@netbsd.org).
2300
2301 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2302
2303 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2304 i386 support:
2305 * i386.h (MOV_AX_DISP32): New macro.
2306 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2307 of several call/return instructions.
2308 (ADDR_PREFIX_OPCODE): New macro.
2309
2310 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2311
2312 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2313
2314 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2315 char.
2316 (struct vot, field `name'): ditto.
2317
2318 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2319
2320 * vax.h: Supply and properly group all values in end sentinel.
2321
2322 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2323
2324 * mips.h (INSN_ISA, INSN_4650): Define.
2325
2326 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2327
2328 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2329 systems with a separate instruction and data cache, such as the
2330 29040, these instructions take an optional argument.
2331
2332 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2333
2334 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2335 INSN_TRAP.
2336
2337 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2338
2339 * mips.h (INSN_STORE_MEMORY): Define.
2340
2341 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2342
2343 * sparc.h: Document new operand type 'x'.
2344
2345 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2346
2347 * i960.h (I_CX2): New instruction category. It includes
2348 instructions available on Cx and Jx processors.
2349 (I_JX): New instruction category, for JX-only instructions.
2350 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2351 Jx-only instructions, in I_JX category.
2352
2353 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2354
2355 * ns32k.h (endop): Made pointer const too.
2356
2357 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2358
2359 * ns32k.h: Drop Q operand type as there is no correct use
2360 for it. Add I and Z operand types which allow better checking.
2361
2362 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2363
2364 * h8300.h (xor.l) :fix bit pattern.
2365 (L_2): New size of operand.
2366 (trapa): Use it.
2367
2368 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2369
2370 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2371
2372 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2373
2374 * sparc.h: Include v9 definitions.
2375
2376 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2377
2378 * m68k.h (m68060): Defined.
2379 (m68040up, mfloat, mmmu): Include it.
2380 (struct m68k_opcode): Widen `arch' field.
2381 (m68k_opcodes): Updated for M68060. Removed comments that were
2382 instructions commented out by "JF" years ago.
2383
2384 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2385
2386 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2387 add a one-bit `flags' field.
2388 (F_ALIAS): New macro.
2389
2390 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2391
2392 * h8300.h (dec, inc): Get encoding right.
2393
2394 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2395
2396 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2397 a flag instead.
2398 (PPC_OPERAND_SIGNED): Define.
2399 (PPC_OPERAND_SIGNOPT): Define.
2400
2401 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2402
2403 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2404 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2405
2406 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2407
2408 * i386.h: Reverse last change. It'll be handled in gas instead.
2409
2410 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2411
2412 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2413 slower on the 486 and used the implicit shift count despite the
2414 explicit operand. The one-operand form is still available to get
2415 the shorter form with the implicit shift count.
2416
2417 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2418
2419 * hppa.h: Fix typo in fstws arg string.
2420
2421 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2422
2423 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2424
2425 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2426
2427 * ppc.h (PPC_OPCODE_601): Define.
2428
2429 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2430
2431 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2432 (so we can determine valid completers for both addb and addb[tf].)
2433
2434 * hppa.h (xmpyu): No floating point format specifier for the
2435 xmpyu instruction.
2436
2437 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2438
2439 * ppc.h (PPC_OPERAND_NEXT): Define.
2440 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2441 (struct powerpc_macro): Define.
2442 (powerpc_macros, powerpc_num_macros): Declare.
2443
2444 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2445
2446 * ppc.h: New file. Header file for PowerPC opcode table.
2447
2448 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2449
2450 * hppa.h: More minor template fixes for sfu and copr (to allow
2451 for easier disassembly).
2452
2453 * hppa.h: Fix templates for all the sfu and copr instructions.
2454
2455 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2456
2457 * i386.h (push): Permit Imm16 operand too.
2458
2459 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2460
2461 * h8300.h (andc): Exists in base arch.
2462
2463 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2464
2465 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2466 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2467
2468 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2469
2470 * hppa.h: Add FP quadword store instructions.
2471
2472 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2473
2474 * mips.h: (M_J_A): Added.
2475 (M_LA): Removed.
2476
2477 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2478
2479 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2480 <mellon@pepper.ncd.com>.
2481
2482 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2483
2484 * hppa.h: Immediate field in probei instructions is unsigned,
2485 not low-sign extended.
2486
2487 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2488
2489 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2490
2491 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2492
2493 * i386.h: Add "fxch" without operand.
2494
2495 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2496
2497 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2498
2499 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2500
2501 * hppa.h: Add gfw and gfr to the opcode table.
2502
2503 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2504
2505 * m88k.h: extended to handle m88110.
2506
2507 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2508
2509 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2510 addresses.
2511
2512 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2513
2514 * i960.h (i960_opcodes): Properly bracket initializers.
2515
2516 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2517
2518 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2519
2520 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2521
2522 * m68k.h (two): Protect second argument with parentheses.
2523
2524 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2525
2526 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2527 Deleted old in/out instructions in "#if 0" section.
2528
2529 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2530
2531 * i386.h (i386_optab): Properly bracket initializers.
2532
2533 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2534
2535 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2536 Jeff Law, law@cs.utah.edu).
2537
2538 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2539
2540 * i386.h (lcall): Accept Imm32 operand also.
2541
2542 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2543
2544 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2545 (M_DABS): Added.
2546
2547 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2548
2549 * mips.h (INSN_*): Changed values. Removed unused definitions.
2550 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2551 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2552 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2553 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2554 (M_*): Added new values for r6000 and r4000 macros.
2555 (ANY_DELAY): Removed.
2556
2557 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2558
2559 * mips.h: Added M_LI_S and M_LI_SS.
2560
2561 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2562
2563 * h8300.h: Get some rare mov.bs correct.
2564
2565 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2566
2567 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2568 been included.
2569
2570 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2571
2572 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2573 jump instructions, for use in disassemblers.
2574
2575 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2576
2577 * m88k.h: Make bitfields just unsigned, not unsigned long or
2578 unsigned short.
2579
2580 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2581
2582 * hppa.h: New argument type 'y'. Use in various float instructions.
2583
2584 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2585
2586 * hppa.h (break): First immediate field is unsigned.
2587
2588 * hppa.h: Add rfir instruction.
2589
2590 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2591
2592 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2593
2594 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2595
2596 * mips.h: Reworked the hazard information somewhat, and fixed some
2597 bugs in the instruction hazard descriptions.
2598
2599 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2600
2601 * m88k.h: Corrected a couple of opcodes.
2602
2603 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2604
2605 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2606 new version includes instruction hazard information, but is
2607 otherwise reasonably similar.
2608
2609 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2610
2611 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2612
2613 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2614
2615 Patches from Jeff Law, law@cs.utah.edu:
2616 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2617 Make the tables be the same for the following instructions:
2618 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2619 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2620 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2621 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2622 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2623 "fcmp", and "ftest".
2624
2625 * hppa.h: Make new and old tables the same for "break", "mtctl",
2626 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2627 Fix typo in last patch. Collapse several #ifdefs into a
2628 single #ifdef.
2629
2630 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2631 of the comments up-to-date.
2632
2633 * hppa.h: Update "free list" of letters and update
2634 comments describing each letter's function.
2635
2636 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2637
2638 * h8300.h: Lots of little fixes for the h8/300h.
2639
2640 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2641
2642 Support for H8/300-H
2643 * h8300.h: Lots of new opcodes.
2644
2645 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2646
2647 * h8300.h: checkpoint, includes H8/300-H opcodes.
2648
2649 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2650
2651 * Patches from Jeffrey Law <law@cs.utah.edu>.
2652 * hppa.h: Rework single precision FP
2653 instructions so that they correctly disassemble code
2654 PA1.1 code.
2655
2656 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2657
2658 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2659 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2660
2661 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2662
2663 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2664 gdb will define it for now.
2665
2666 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2667
2668 * sparc.h: Don't end enumerator list with comma.
2669
2670 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2671
2672 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2673 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2674 ("bc2t"): Correct typo.
2675 ("[ls]wc[023]"): Use T rather than t.
2676 ("c[0123]"): Define general coprocessor instructions.
2677
2678 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2679
2680 * m68k.h: Move split point for gcc compilation more towards
2681 middle.
2682
2683 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2684
2685 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2686 simply wrong, ics, rfi, & rfsvc were missing).
2687 Add "a" to opr_ext for "bb". Doc fix.
2688
2689 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2690
2691 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2692 * mips.h: Add casts, to suppress warnings about shifting too much.
2693 * m68k.h: Document the placement code '9'.
2694
2695 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2696
2697 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2698 allows callers to break up the large initialized struct full of
2699 opcodes into two half-sized ones. This permits GCC to compile
2700 this module, since it takes exponential space for initializers.
2701 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2702
2703 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2704
2705 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2706 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2707 initialized structs in it.
2708
2709 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2710
2711 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2712 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2713 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2714
2715 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2716
2717 * mips.h: document "i" and "j" operands correctly.
2718
2719 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2720
2721 * mips.h: Removed endianness dependency.
2722
2723 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2724
2725 * h8300.h: include info on number of cycles per instruction.
2726
2727 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2728
2729 * hppa.h: Move handy aliases to the front. Fix masks for extract
2730 and deposit instructions.
2731
2732 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2733
2734 * i386.h: accept shld and shrd both with and without the shift
2735 count argument, which is always %cl.
2736
2737 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2738
2739 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2740 (one_byte_segment_defaults, two_byte_segment_defaults,
2741 i386_prefixtab_end): Ditto.
2742
2743 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2744
2745 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2746 for operand 2; from John Carr, jfc@dsg.dec.com.
2747
2748 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2749
2750 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2751 always use 16-bit offsets. Makes calculated-size jump tables
2752 feasible.
2753
2754 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2755
2756 * i386.h: Fix one-operand forms of in* and out* patterns.
2757
2758 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2759
2760 * m68k.h: Added CPU32 support.
2761
2762 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2763
2764 * mips.h (break): Disassemble the argument. Patch from
2765 jonathan@cs.stanford.edu (Jonathan Stone).
2766
2767 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2768
2769 * m68k.h: merged Motorola and MIT syntax.
2770
2771 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2772
2773 * m68k.h (pmove): make the tests less strict, the 68k book is
2774 wrong.
2775
2776 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2777
2778 * m68k.h (m68ec030): Defined as alias for 68030.
2779 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2780 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2781 them. Tightened description of "fmovex" to distinguish it from
2782 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2783 up descriptions that claimed versions were available for chips not
2784 supporting them. Added "pmovefd".
2785
2786 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2787
2788 * m68k.h: fix where the . goes in divull
2789
2790 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2791
2792 * m68k.h: the cas2 instruction is supposed to be written with
2793 indirection on the last two operands, which can be either data or
2794 address registers. Added a new operand type 'r' which accepts
2795 either register type. Added new cases for cas2l and cas2w which
2796 use them. Corrected masks for cas2 which failed to recognize use
2797 of address register.
2798
2799 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2800
2801 * m68k.h: Merged in patches (mostly m68040-specific) from
2802 Colin Smith <colin@wrs.com>.
2803
2804 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2805 base). Also cleaned up duplicates, re-ordered instructions for
2806 the sake of dis-assembling (so aliases come after standard names).
2807 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2808
2809 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2810
2811 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2812 all missing .s
2813
2814 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2815
2816 * sparc.h: Moved tables to BFD library.
2817
2818 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2819
2820 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2821
2822 * h8300.h: Finish filling in all the holes in the opcode table,
2823 so that the Lucid C compiler can digest this as well...
2824
2825 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2826
2827 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2828 Fix opcodes on various sizes of fild/fist instructions
2829 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2830 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2831
2832 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2833
2834 * h8300.h: Fill in all the holes in the opcode table so that the
2835 losing HPUX C compiler can digest this...
2836
2837 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2838
2839 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2840 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2841
2842 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2843
2844 * sparc.h: Add new architecture variant sparclite; add its scan
2845 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2846
2847 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2848
2849 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2850 fy@lucid.com).
2851
2852 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2853
2854 * rs6k.h: New version from IBM (Metin).
2855
2856 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2857
2858 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2859 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2860
2861 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2862
2863 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2864
2865 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2866
2867 * m68k.h (one, two): Cast macro args to unsigned to suppress
2868 complaints from compiler and lint about integer overflow during
2869 shift.
2870
2871 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2872
2873 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2874
2875 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2876
2877 * mips.h: Make bitfield layout depend on the HOST compiler,
2878 not on the TARGET system.
2879
2880 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2881
2882 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2883 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2884 <TRANLE@INTELLICORP.COM>.
2885
2886 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2887
2888 * h8300.h: turned op_type enum into #define list
2889
2890 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2891
2892 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2893 similar instructions -- they've been renamed to "fitoq", etc.
2894 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2895 number of arguments.
2896 * h8300.h: Remove extra ; which produces compiler warning.
2897
2898 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2899
2900 * sparc.h: fix opcode for tsubcctv.
2901
2902 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2903
2904 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2905
2906 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2907
2908 * sparc.h (nop): Made the 'lose' field be even tighter,
2909 so only a standard 'nop' is disassembled as a nop.
2910
2911 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2912
2913 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2914 disassembled as a nop.
2915
2916 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2917
2918 * m68k.h, sparc.h: ANSIfy enums.
2919
2920 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2921
2922 * sparc.h: fix a typo.
2923
2924 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2925
2926 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2927 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2928 vax.h: Renamed from ../<foo>-opcode.h.
2929
2930 \f
2931 Local Variables:
2932 version-control: never
2933 End:
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