* pdp11.h: Add format codes for float instruction formats.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2002-03-05 Paul Koning <pkoning@equallogic.com>
2
3 * pdp11.h: Add format codes for float instruction formats.
4
5 2002-02-25 Alan Modra <amodra@bigpond.net.au>
6
7 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
8
9 Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
10
11 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
12
13 Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
14
15 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
16 (xchg): Fix.
17 (in, out): Disable 64bit operands.
18 (call, jmp): Avoid REX prefixes.
19 (jcxz): Prohibit in 64bit mode
20 (jrcxz, loop): Add 64bit variants.
21 (movq): Fix patterns.
22 (movmskps, pextrw, pinstrw): Add 64bit variants.
23
24 2002-01-31 Ivan Guzvinec <ivang@opencores.org>
25
26 * or32.h: New file.
27
28 2002-01-22 Graydon Hoare <graydon@redhat.com>
29
30 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
31 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
32
33 2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
34
35 * h8300.h: Comment typo fix.
36
37 2002-01-03 matthew green <mrg@redhat.com>
38
39 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
40 (PPC_OPCODE_BOOKE64): Likewise.
41
42 Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
43
44 * hppa.h (call, ret): Move to end of table.
45 (addb, addib): PA2.0 variants should have been PA2.0W.
46 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
47 happy.
48 (fldw, fldd, fstw, fstd, bb): Likewise.
49 (short loads/stores): Tweak format specifier slightly to keep
50 disassembler happy.
51 (indexed loads/stores): Likewise.
52 (absolute loads/stores): Likewise.
53
54 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
55
56 * d10v.h (OPERAND_NOSP): New macro.
57
58 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
59
60 * d10v.h (OPERAND_SP): New macro.
61
62 2001-11-15 Alan Modra <amodra@bigpond.net.au>
63
64 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
65
66 2001-11-11 Timothy Wall <twall@alum.mit.edu>
67
68 * tic54x.h: Revise opcode layout; don't really need a separate
69 structure for parallel opcodes.
70
71 2001-11-13 Zack Weinberg <zack@codesourcery.com>
72 Alan Modra <amodra@bigpond.net.au>
73
74 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
75 accept WordReg.
76
77 2001-11-04 Chris Demetriou <cgd@broadcom.com>
78
79 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
80
81 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
82
83 * mmix.h: New file.
84
85 2001-10-18 Chris Demetriou <cgd@broadcom.com>
86
87 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
88 of the expression, to make source code merging easier.
89
90 2001-10-17 Chris Demetriou <cgd@broadcom.com>
91
92 * mips.h: Sort coprocessor instruction argument characters
93 in comment, add a few more words of description for "H".
94
95 2001-10-17 Chris Demetriou <cgd@broadcom.com>
96
97 * mips.h (INSN_SB1): New cpu-specific instruction bit.
98 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
99 if cpu is CPU_SB1.
100
101 2001-10-17 matthew green <mrg@redhat.com>
102
103 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
104
105 2001-10-12 matthew green <mrg@redhat.com>
106
107 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
108 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
109 instructions, respectively.
110
111 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
112
113 * v850.h: Remove spurious comment.
114
115 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
116
117 * h8300.h: Fix compile time warning messages
118
119 2001-09-04 Richard Henderson <rth@redhat.com>
120
121 * alpha.h (struct alpha_operand): Pack elements into bitfields.
122
123 2001-08-31 Eric Christopher <echristo@redhat.com>
124
125 * mips.h: Remove CPU_MIPS32_4K.
126
127 2001-08-27 Torbjorn Granlund <tege@swox.com>
128
129 * ppc.h (PPC_OPERAND_DS): Define.
130
131 2001-08-25 Andreas Jaeger <aj@suse.de>
132
133 * d30v.h: Fix declaration of reg_name_cnt.
134
135 * d10v.h: Fix declaration of d10v_reg_name_cnt.
136
137 * arc.h: Add prototypes from opcodes/arc-opc.c.
138
139 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
140
141 * mips.h (INSN_10000): Define.
142 (OPCODE_IS_MEMBER): Check for INSN_10000.
143
144 2001-08-10 Alan Modra <amodra@one.net.au>
145
146 * ppc.h: Revert 2001-08-08.
147
148 2001-08-10 Richard Sandiford <rsandifo@redhat.com>
149
150 * mips.h (INSN_GP32): Remove.
151 (OPCODE_IS_MEMBER): Remove gp32 parameter.
152 (M_MOVE): New macro identifier.
153
154 2001-08-08 Alan Modra <amodra@one.net.au>
155
156 1999-10-25 Torbjorn Granlund <tege@swox.com>
157 * ppc.h (struct powerpc_operand): New field `reloc'.
158
159 2001-08-01 Aldy Hernandez <aldyh@redhat.com>
160
161 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
162
163 2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
164
165 * cgen.h (CGEN_INSN): Add regex support.
166 (build_insn_regex): Declare.
167
168 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
169
170 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
171 (cgen_cpu_desc): Ditto.
172
173 2001-07-07 Ben Elliston <bje@redhat.com>
174
175 * m88k.h: Clean up and reformat. Remove unused code.
176
177 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
178
179 * cgen.h (cgen_keyword): Add nonalpha_chars field.
180
181 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
182
183 * mips.h (CPU_R12000): Define.
184
185 2001-05-23 John Healy <jhealy@redhat.com>
186
187 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
188
189 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
190
191 * mips.h (INSN_ISA_MASK): Define.
192
193 2001-05-12 Alan Modra <amodra@one.net.au>
194
195 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
196 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
197 and use InvMem as these insns must have register operands.
198
199 2001-05-04 Alan Modra <amodra@one.net.au>
200
201 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
202 and pextrw to swap reg/rm assignments.
203
204 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
205
206 * cris.h (enum cris_insn_version_usage): Correct comment for
207 cris_ver_v3p.
208
209 2001-03-24 Alan Modra <alan@linuxcare.com.au>
210
211 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
212 Add InvMem to first operand of "maskmovdqu".
213
214 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
215
216 * cris.h (ADD_PC_INCR_OPCODE): New macro.
217
218 2001-03-21 Kazu Hirata <kazu@hxi.com>
219
220 * h8300.h: Fix formatting.
221
222 2001-03-22 Alan Modra <alan@linuxcare.com.au>
223
224 * i386.h (i386_optab): Add paddq, psubq.
225
226 2001-03-19 Alan Modra <alan@linuxcare.com.au>
227
228 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
229
230 2001-02-28 Igor Shevlyakov <igor@windriver.com>
231
232 * m68k.h: new defines for Coldfire V4. Update mcf to know
233 about mcf5407.
234
235 2001-02-18 lars brinkhoff <lars@nocrew.org>
236
237 * pdp11.h: New file.
238
239 2001-02-12 Jan Hubicka <jh@suse.cz>
240
241 * i386.h (i386_optab): SSE integer converison instructions have
242 64bit versions on x86-64.
243
244 2001-02-10 Nick Clifton <nickc@redhat.com>
245
246 * mips.h: Remove extraneous whitespace. Formating change to allow
247 for future contribution.
248
249 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
250
251 * s390.h: New file.
252
253 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
254
255 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
256 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
257 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
258
259 2001-01-24 Karsten Keil <kkeil@suse.de>
260
261 * i386.h (i386_optab): Fix swapgs
262
263 2001-01-14 Alan Modra <alan@linuxcare.com.au>
264
265 * hppa.h: Describe new '<' and '>' operand types, and tidy
266 existing comments.
267 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
268 Remove duplicate "ldw j(s,b),x". Sort some entries.
269
270 2001-01-13 Jan Hubicka <jh@suse.cz>
271
272 * i386.h (i386_optab): Fix pusha and ret templates.
273
274 2001-01-11 Peter Targett <peter.targett@arccores.com>
275
276 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
277 definitions for masking cpu type.
278 (arc_ext_operand_value) New structure for storing extended
279 operands.
280 (ARC_OPERAND_*) Flags for operand values.
281
282 2001-01-10 Jan Hubicka <jh@suse.cz>
283
284 * i386.h (pinsrw): Add.
285 (pshufw): Remove.
286 (cvttpd2dq): Fix operands.
287 (cvttps2dq): Likewise.
288 (movq2q): Rename to movdq2q.
289
290 2001-01-10 Richard Schaal <richard.schaal@intel.com>
291
292 * i386.h: Correct movnti instruction.
293
294 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
295
296 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
297 of operands (unsigned char or unsigned short).
298 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
299 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
300
301 2001-01-05 Jan Hubicka <jh@suse.cz>
302
303 * i386.h (i386_optab): Make [sml]fence template to use immext field.
304
305 2001-01-03 Jan Hubicka <jh@suse.cz>
306
307 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
308 introduced by Pentium4
309
310 2000-12-30 Jan Hubicka <jh@suse.cz>
311
312 * i386.h (i386_optab): Add "rex*" instructions;
313 add swapgs; disable jmp/call far direct instructions for
314 64bit mode; add syscall and sysret; disable registers for 0xc6
315 template. Add 'q' suffixes to extendable instructions, disable
316 obsolete instructions, add new sign/zero extension ones.
317 (i386_regtab): Add extended registers.
318 (*Suf): Add No_qSuf.
319 (q_Suf, wlq_Suf, bwlq_Suf): New.
320
321 2000-12-20 Jan Hubicka <jh@suse.cz>
322
323 * i386.h (i386_optab): Replace "Imm" with "EncImm".
324 (i386_regtab): Add flags field.
325
326 2000-12-12 Nick Clifton <nickc@redhat.com>
327
328 * mips.h: Fix formatting.
329
330 2000-12-01 Chris Demetriou <cgd@sibyte.com>
331
332 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
333 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
334 OP_*_SYSCALL definitions.
335 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
336 19 bit wait codes.
337 (MIPS operand specifier comments): Remove 'm', add 'U' and
338 'J', and update the meaning of 'B' so that it's more general.
339
340 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
341 INSN_ISA5): Renumber, redefine to mean the ISA at which the
342 instruction was added.
343 (INSN_ISA32): New constant.
344 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
345 Renumber to avoid new and/or renumbered INSN_* constants.
346 (INSN_MIPS32): Delete.
347 (ISA_UNKNOWN): New constant to indicate unknown ISA.
348 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
349 ISA_MIPS32): New constants, defined to be the mask of INSN_*
350 constants available at that ISA level.
351 (CPU_UNKNOWN): New constant to indicate unknown CPU.
352 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
353 define it with a unique value.
354 (OPCODE_IS_MEMBER): Update for new ISA membership-related
355 constant meanings.
356
357 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
358 definitions.
359
360 * mips.h (CPU_SB1): New constant.
361
362 2000-10-20 Jakub Jelinek <jakub@redhat.com>
363
364 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
365 Note that '3' is used for siam operand.
366
367 2000-09-22 Jim Wilson <wilson@cygnus.com>
368
369 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
370
371 2000-09-13 Anders Norlander <anorland@acc.umu.se>
372
373 * mips.h: Use defines instead of hard-coded processor numbers.
374 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
375 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
376 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
377 CPU_4KC, CPU_4KM, CPU_4KP): Define..
378 (OPCODE_IS_MEMBER): Use new defines.
379 (OP_MASK_SEL, OP_SH_SEL): Define.
380 (OP_MASK_CODE20, OP_SH_CODE20): Define.
381 Add 'P' to used characters.
382 Use 'H' for coprocessor select field.
383 Use 'm' for 20 bit breakpoint code.
384 Document new arg characters and add to used characters.
385 (INSN_MIPS32): New define for MIPS32 extensions.
386 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
387
388 2000-09-05 Alan Modra <alan@linuxcare.com.au>
389
390 * hppa.h: Mention cz completer.
391
392 2000-08-16 Jim Wilson <wilson@cygnus.com>
393
394 * ia64.h (IA64_OPCODE_POSTINC): New.
395
396 2000-08-15 H.J. Lu <hjl@gnu.org>
397
398 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
399 IgnoreSize change.
400
401 2000-08-08 Jason Eckhardt <jle@cygnus.com>
402
403 * i860.h: Small formatting adjustments.
404
405 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
406
407 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
408 Move related opcodes closer to each other.
409 Minor changes in comments, list undefined opcodes.
410
411 2000-07-26 Dave Brolley <brolley@redhat.com>
412
413 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
414
415 2000-07-22 Jason Eckhardt <jle@cygnus.com>
416
417 * i860.h (btne, bte, bla): Changed these opcodes
418 to use sbroff ('r') instead of split16 ('s').
419 (J, K, L, M): New operand types for 16-bit aligned fields.
420 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
421 use I, J, K, L, M instead of just I.
422 (T, U): New operand types for split 16-bit aligned fields.
423 (st.x): Changed these opcodes to use S, T, U instead of just S.
424 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
425 exist on the i860.
426 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
427 (pfeq.ss, pfeq.dd): New opcodes.
428 (st.s): Fixed incorrect mask bits.
429 (fmlow): Fixed incorrect mask bits.
430 (fzchkl, pfzchkl): Fixed incorrect mask bits.
431 (faddz, pfaddz): Fixed incorrect mask bits.
432 (form, pform): Fixed incorrect mask bits.
433 (pfld.l): Fixed incorrect mask bits.
434 (fst.q): Fixed incorrect mask bits.
435 (all floating point opcodes): Fixed incorrect mask bits for
436 handling of dual bit.
437
438 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
439
440 cris.h: New file.
441
442 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
443
444 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
445 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
446 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
447 (AVR_ISA_M83): Define for ATmega83, ATmega85.
448 (espm): Remove, because ESPM removed in databook update.
449 (eicall, eijmp): Move to the end of opcode table.
450
451 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
452
453 * m68hc11.h: New file for support of Motorola 68hc11.
454
455 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
456
457 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
458
459 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
460
461 * avr.h: New file with AVR opcodes.
462
463 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
464
465 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
466
467 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
468
469 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
470
471 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
472
473 * i386.h: Use sl_FP, not sl_Suf for fild.
474
475 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
476
477 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
478 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
479 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
480 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
481
482 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
483
484 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
485
486 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
487 Alexander Sokolov <robocop@netlink.ru>
488
489 * i386.h (i386_optab): Add cpu_flags for all instructions.
490
491 2000-05-13 Alan Modra <alan@linuxcare.com.au>
492
493 From Gavin Romig-Koch <gavin@cygnus.com>
494 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
495
496 2000-05-04 Timothy Wall <twall@cygnus.com>
497
498 * tic54x.h: New.
499
500 2000-05-03 J.T. Conklin <jtc@redback.com>
501
502 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
503 (PPC_OPERAND_VR): New operand flag for vector registers.
504
505 2000-05-01 Kazu Hirata <kazu@hxi.com>
506
507 * h8300.h (EOP): Add missing initializer.
508
509 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
510
511 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
512 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
513 New operand types l,y,&,fe,fE,fx added to support above forms.
514 (pa_opcodes): Replaced usage of 'x' as source/target for
515 floating point double-word loads/stores with 'fx'.
516
517 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
518 David Mosberger <davidm@hpl.hp.com>
519 Timothy Wall <twall@cygnus.com>
520 Jim Wilson <wilson@cygnus.com>
521
522 * ia64.h: New file.
523
524 2000-03-27 Nick Clifton <nickc@cygnus.com>
525
526 * d30v.h (SHORT_A1): Fix value.
527 (SHORT_AR): Renumber so that it is at the end of the list of short
528 instructions, not the end of the list of long instructions.
529
530 2000-03-26 Alan Modra <alan@linuxcare.com>
531
532 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
533 problem isn't really specific to Unixware.
534 (OLDGCC_COMPAT): Define.
535 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
536 destination %st(0).
537 Fix lots of comments.
538
539 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
540
541 * d30v.h:
542 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
543 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
544 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
545 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
546 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
547 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
548 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
549
550 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
551
552 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
553 fistpd without suffix.
554
555 2000-02-24 Nick Clifton <nickc@cygnus.com>
556
557 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
558 'signed_overflow_ok_p'.
559 Delete prototypes for cgen_set_flags() and cgen_get_flags().
560
561 2000-02-24 Andrew Haley <aph@cygnus.com>
562
563 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
564 (CGEN_CPU_TABLE): flags: new field.
565 Add prototypes for new functions.
566
567 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
568
569 * i386.h: Add some more UNIXWARE_COMPAT comments.
570
571 2000-02-23 Linas Vepstas <linas@linas.org>
572
573 * i370.h: New file.
574
575 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
576
577 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
578 cannot be combined in parallel with ADD/SUBppp.
579
580 2000-02-22 Andrew Haley <aph@cygnus.com>
581
582 * mips.h: (OPCODE_IS_MEMBER): Add comment.
583
584 1999-12-30 Andrew Haley <aph@cygnus.com>
585
586 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
587 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
588 insns.
589
590 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
591
592 * i386.h: Qualify intel mode far call and jmp with x_Suf.
593
594 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
595
596 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
597 indirect jumps and calls. Add FF/3 call for intel mode.
598
599 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
600
601 * mn10300.h: Add new operand types. Add new instruction formats.
602
603 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
604
605 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
606 instruction.
607
608 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
609
610 * mips.h (INSN_ISA5): New.
611
612 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
613
614 * mips.h (OPCODE_IS_MEMBER): New.
615
616 1999-10-29 Nick Clifton <nickc@cygnus.com>
617
618 * d30v.h (SHORT_AR): Define.
619
620 1999-10-18 Michael Meissner <meissner@cygnus.com>
621
622 * alpha.h (alpha_num_opcodes): Convert to unsigned.
623 (alpha_num_operands): Ditto.
624
625 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
626
627 * hppa.h (pa_opcodes): Add load and store cache control to
628 instructions. Add ordered access load and store.
629
630 * hppa.h (pa_opcode): Add new entries for addb and addib.
631
632 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
633
634 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
635
636 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
637
638 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
639
640 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
641
642 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
643 and "be" using completer prefixes.
644
645 * hppa.h (pa_opcodes): Add initializers to silence compiler.
646
647 * hppa.h: Update comments about character usage.
648
649 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
650
651 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
652 up the new fstw & bve instructions.
653
654 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
655
656 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
657 instructions.
658
659 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
660
661 * hppa.h (pa_opcodes): Add long offset double word load/store
662 instructions.
663
664 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
665 stores.
666
667 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
668
669 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
670
671 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
672
673 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
674
675 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
676
677 * hppa.h (pa_opcodes): Add support for "b,l".
678
679 * hppa.h (pa_opcodes): Add support for "b,gate".
680
681 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
682
683 * hppa.h (pa_opcodes): Use 'fX' for first register operand
684 in xmpyu.
685
686 * hppa.h (pa_opcodes): Fix mask for probe and probei.
687
688 * hppa.h (pa_opcodes): Fix mask for depwi.
689
690 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
691
692 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
693 an explicit output argument.
694
695 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
696
697 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
698 Add a few PA2.0 loads and store variants.
699
700 1999-09-04 Steve Chamberlain <sac@pobox.com>
701
702 * pj.h: New file.
703
704 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
705
706 * i386.h (i386_regtab): Move %st to top of table, and split off
707 other fp reg entries.
708 (i386_float_regtab): To here.
709
710 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
711
712 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
713 by 'f'.
714
715 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
716 Add supporting args.
717
718 * hppa.h: Document new completers and args.
719 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
720 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
721 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
722 pmenb and pmdis.
723
724 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
725 hshr, hsub, mixh, mixw, permh.
726
727 * hppa.h (pa_opcodes): Change completers in instructions to
728 use 'c' prefix.
729
730 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
731 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
732
733 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
734 fnegabs to use 'I' instead of 'F'.
735
736 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
737
738 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
739 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
740 Alphabetically sort PIII insns.
741
742 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
743
744 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
745
746 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
747
748 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
749 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
750
751 * hppa.h: Document 64 bit condition completers.
752
753 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
754
755 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
756
757 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
758
759 * i386.h (i386_optab): Add DefaultSize modifier to all insns
760 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
761 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
762
763 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
764 Jeff Law <law@cygnus.com>
765
766 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
767
768 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
769
770 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
771 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
772
773 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
774
775 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
776
777 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
778
779 * hppa.h (struct pa_opcode): Add new field "flags".
780 (FLAGS_STRICT): Define.
781
782 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
783 Jeff Law <law@cygnus.com>
784
785 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
786
787 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
788
789 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
790
791 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
792 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
793 flag to fcomi and friends.
794
795 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
796
797 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
798 integer logical instructions.
799
800 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
801
802 * m68k.h: Document new formats `E', `G', `H' and new places `N',
803 `n', `o'.
804
805 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
806 and new places `m', `M', `h'.
807
808 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
809
810 * hppa.h (pa_opcodes): Add several processor specific system
811 instructions.
812
813 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
814
815 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
816 "addb", and "addib" to be used by the disassembler.
817
818 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
819
820 * i386.h (ReverseModrm): Remove all occurences.
821 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
822 movmskps, pextrw, pmovmskb, maskmovq.
823 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
824 ignore the data size prefix.
825
826 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
827 Mostly stolen from Doug Ledford <dledford@redhat.com>
828
829 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
830
831 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
832
833 1999-04-14 Doug Evans <devans@casey.cygnus.com>
834
835 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
836 (CGEN_ATTR_TYPE): Update.
837 (CGEN_ATTR_MASK): Number booleans starting at 0.
838 (CGEN_ATTR_VALUE): Update.
839 (CGEN_INSN_ATTR): Update.
840
841 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
842
843 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
844 instructions.
845
846 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
847
848 * hppa.h (bb, bvb): Tweak opcode/mask.
849
850
851 1999-03-22 Doug Evans <devans@casey.cygnus.com>
852
853 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
854 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
855 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
856 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
857 Delete member max_insn_size.
858 (enum cgen_cpu_open_arg): New enum.
859 (cpu_open): Update prototype.
860 (cpu_open_1): Declare.
861 (cgen_set_cpu): Delete.
862
863 1999-03-11 Doug Evans <devans@casey.cygnus.com>
864
865 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
866 (CGEN_OPERAND_NIL): New macro.
867 (CGEN_OPERAND): New member `type'.
868 (@arch@_cgen_operand_table): Delete decl.
869 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
870 (CGEN_OPERAND_TABLE): New struct.
871 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
872 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
873 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
874 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
875 {get,set}_{int,vma}_operand.
876 (@arch@_cgen_cpu_open): New arg `isa'.
877 (cgen_set_cpu): Ditto.
878
879 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
880
881 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
882
883 1999-02-25 Doug Evans <devans@casey.cygnus.com>
884
885 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
886 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
887 enum cgen_hw_type.
888 (CGEN_HW_TABLE): New struct.
889 (hw_table): Delete declaration.
890 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
891 to table entry to enum.
892 (CGEN_OPINST): Ditto.
893 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
894
895 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
896
897 * alpha.h (AXP_OPCODE_EV6): New.
898 (AXP_OPCODE_NOPAL): Include it.
899
900 1999-02-09 Doug Evans <devans@casey.cygnus.com>
901
902 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
903 All uses updated. New members int_insn_p, max_insn_size,
904 parse_operand,insert_operand,extract_operand,print_operand,
905 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
906 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
907 extract_handlers,print_handlers.
908 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
909 (CGEN_ATTR_BOOL_OFFSET): New macro.
910 (CGEN_ATTR_MASK): Subtract it to compute bit number.
911 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
912 (cgen_opcode_handler): Renamed from cgen_base.
913 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
914 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
915 all uses updated.
916 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
917 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
918 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
919 (CGEN_OPCODE,CGEN_IBASE): New types.
920 (CGEN_INSN): Rewrite.
921 (CGEN_{ASM,DIS}_HASH*): Delete.
922 (init_opcode_table,init_ibld_table): Declare.
923 (CGEN_INSN_ATTR): New type.
924
925 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
926
927 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
928 (x_FP, d_FP, dls_FP, sldx_FP): Define.
929 Change *Suf definitions to include x and d suffixes.
930 (movsx): Use w_Suf and b_Suf.
931 (movzx): Likewise.
932 (movs): Use bwld_Suf.
933 (fld): Change ordering. Use sld_FP.
934 (fild): Add Intel Syntax equivalent of fildq.
935 (fst): Use sld_FP.
936 (fist): Use sld_FP.
937 (fstp): Use sld_FP. Add x_FP version.
938 (fistp): LLongMem version for Intel Syntax.
939 (fcom, fcomp): Use sld_FP.
940 (fadd, fiadd, fsub): Use sld_FP.
941 (fsubr): Use sld_FP.
942 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
943
944 1999-01-27 Doug Evans <devans@casey.cygnus.com>
945
946 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
947 CGEN_MODE_UINT.
948
949 1999-01-16 Jeffrey A Law (law@cygnus.com)
950
951 * hppa.h (bv): Fix mask.
952
953 1999-01-05 Doug Evans <devans@casey.cygnus.com>
954
955 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
956 (CGEN_ATTR): Use it.
957 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
958 (CGEN_ATTR_TABLE): New member dfault.
959
960 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
961
962 * mips.h (MIPS16_INSN_BRANCH): New.
963
964 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
965
966 The following is part of a change made by Edith Epstein
967 <eepstein@sophia.cygnus.com> as part of a project to merge in
968 changes by HP; HP did not create ChangeLog entries.
969
970 * hppa.h (completer_chars): list of chars to not put a space
971 after.
972
973 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
974
975 * i386.h (i386_optab): Permit w suffix on processor control and
976 status word instructions.
977
978 1998-11-30 Doug Evans <devans@casey.cygnus.com>
979
980 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
981 (struct cgen_keyword_entry): Ditto.
982 (struct cgen_operand): Ditto.
983 (CGEN_IFLD): New typedef, with associated access macros.
984 (CGEN_IFMT): New typedef, with associated access macros.
985 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
986 (CGEN_IVALUE): New typedef.
987 (struct cgen_insn): Delete const on syntax,attrs members.
988 `format' now points to format data. Type of `value' is now
989 CGEN_IVALUE.
990 (struct cgen_opcode_table): New member ifld_table.
991
992 1998-11-18 Doug Evans <devans@casey.cygnus.com>
993
994 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
995 (CGEN_OPERAND_INSTANCE): New member `attrs'.
996 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
997 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
998 (cgen_opcode_table): Update type of dis_hash fn.
999 (extract_operand): Update type of `insn_value' arg.
1000
1001 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1002
1003 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1004
1005 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1006
1007 * mips.h (INSN_MULT): Added.
1008
1009 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1010
1011 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1012
1013 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1014
1015 * cgen.h (CGEN_INSN_INT): New typedef.
1016 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1017 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1018 (CGEN_INSN_BYTES_PTR): New typedef.
1019 (CGEN_EXTRACT_INFO): New typedef.
1020 (cgen_insert_fn,cgen_extract_fn): Update.
1021 (cgen_opcode_table): New member `insn_endian'.
1022 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1023 (insert_operand,extract_operand): Update.
1024 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1025
1026 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1027
1028 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1029 (struct CGEN_HW_ENTRY): New member `attrs'.
1030 (CGEN_HW_ATTR): New macro.
1031 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1032 (CGEN_INSN_INVALID_P): New macro.
1033
1034 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1035
1036 * hppa.h: Add "fid".
1037
1038 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1039
1040 From Robert Andrew Dale <rob@nb.net>
1041 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1042 (AMD_3DNOW_OPCODE): Define.
1043
1044 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1045
1046 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1047
1048 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1049
1050 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1051
1052 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1053
1054 Move all global state data into opcode table struct, and treat
1055 opcode table as something that is "opened/closed".
1056 * cgen.h (CGEN_OPCODE_DESC): New type.
1057 (all fns): New first arg of opcode table descriptor.
1058 (cgen_set_parse_operand_fn): Add prototype.
1059 (cgen_current_machine,cgen_current_endian): Delete.
1060 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1061 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1062 dis_hash_table,dis_hash_table_entries.
1063 (opcode_open,opcode_close): Add prototypes.
1064
1065 * cgen.h (cgen_insn): New element `cdx'.
1066
1067 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1068
1069 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1070
1071 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1072
1073 * mn10300.h: Add "no_match_operands" field for instructions.
1074 (MN10300_MAX_OPERANDS): Define.
1075
1076 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1077
1078 * cgen.h (cgen_macro_insn_count): Declare.
1079
1080 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1081
1082 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1083 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1084 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1085 set_{int,vma}_operand.
1086
1087 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1088
1089 * mn10300.h: Add "machine" field for instructions.
1090 (MN103, AM30): Define machine types.
1091
1092 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1093
1094 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1095
1096 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1097
1098 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1099
1100 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1101
1102 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1103 and ud2b.
1104 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1105 those that happen to be implemented on pentiums.
1106
1107 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1108
1109 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1110 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1111 with Size16|IgnoreSize or Size32|IgnoreSize.
1112
1113 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1114
1115 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1116 (REPE): Rename to REPE_PREFIX_OPCODE.
1117 (i386_regtab_end): Remove.
1118 (i386_prefixtab, i386_prefixtab_end): Remove.
1119 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1120 of md_begin.
1121 (MAX_OPCODE_SIZE): Define.
1122 (i386_optab_end): Remove.
1123 (sl_Suf): Define.
1124 (sl_FP): Use sl_Suf.
1125
1126 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1127 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1128 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1129 data32, dword, and adword prefixes.
1130 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1131 regs.
1132
1133 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1134
1135 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1136
1137 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1138 register operands, because this is a common idiom. Flag them with
1139 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1140 fdivrp because gcc erroneously generates them. Also flag with a
1141 warning.
1142
1143 * i386.h: Add suffix modifiers to most insns, and tighter operand
1144 checks in some cases. Fix a number of UnixWare compatibility
1145 issues with float insns. Merge some floating point opcodes, using
1146 new FloatMF modifier.
1147 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1148 consistency.
1149
1150 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1151 IgnoreDataSize where appropriate.
1152
1153 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1154
1155 * i386.h: (one_byte_segment_defaults): Remove.
1156 (two_byte_segment_defaults): Remove.
1157 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1158
1159 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1160
1161 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1162 (cgen_hw_lookup_by_num): Declare.
1163
1164 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1165
1166 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1167 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1168
1169 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1170
1171 * cgen.h (cgen_asm_init_parse): Delete.
1172 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1173 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1174
1175 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1176
1177 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1178 (cgen_asm_finish_insn): Update prototype.
1179 (cgen_insn): New members num, data.
1180 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1181 dis_hash, dis_hash_table_size moved to ...
1182 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1183 All uses updated. New members asm_hash_p, dis_hash_p.
1184 (CGEN_MINSN_EXPANSION): New struct.
1185 (cgen_expand_macro_insn): Declare.
1186 (cgen_macro_insn_count): Declare.
1187 (get_insn_operands): Update prototype.
1188 (lookup_get_insn_operands): Declare.
1189
1190 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1191
1192 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1193 regKludge. Add operands types for string instructions.
1194
1195 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1196
1197 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1198 table.
1199
1200 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1201
1202 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1203 for `gettext'.
1204
1205 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1206
1207 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1208 Add IsString flag to string instructions.
1209 (IS_STRING): Don't define.
1210 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1211 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1212 (SS_PREFIX_OPCODE): Define.
1213
1214 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1215
1216 * i386.h: Revert March 24 patch; no more LinearAddress.
1217
1218 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1219
1220 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1221 instructions, and instead add FWait opcode modifier. Add short
1222 form of fldenv and fstenv.
1223 (FWAIT_OPCODE): Define.
1224
1225 * i386.h (i386_optab): Change second operand constraint of `mov
1226 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1227 allow legal instructions such as `movl %gs,%esi'
1228
1229 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1230
1231 * h8300.h: Various changes to fully bracket initializers.
1232
1233 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1234
1235 * i386.h: Set LinearAddress for lidt and lgdt.
1236
1237 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1238
1239 * cgen.h (CGEN_BOOL_ATTR): New macro.
1240
1241 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1242
1243 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1244
1245 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1246
1247 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1248 (cgen_insn): Record syntax and format entries here, rather than
1249 separately.
1250
1251 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1252
1253 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1254
1255 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1256
1257 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1258 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1259 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1260
1261 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1262
1263 * cgen.h (lookup_insn): New argument alias_p.
1264
1265 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1266
1267 Fix rac to accept only a0:
1268 * d10v.h (OPERAND_ACC): Split into:
1269 (OPERAND_ACC0, OPERAND_ACC1) .
1270 (OPERAND_GPR): Define.
1271
1272 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1273
1274 * cgen.h (CGEN_FIELDS): Define here.
1275 (CGEN_HW_ENTRY): New member `type'.
1276 (hw_list): Delete decl.
1277 (enum cgen_mode): Declare.
1278 (CGEN_OPERAND): New member `hw'.
1279 (enum cgen_operand_instance_type): Declare.
1280 (CGEN_OPERAND_INSTANCE): New type.
1281 (CGEN_INSN): New member `operands'.
1282 (CGEN_OPCODE_DATA): Make hw_list const.
1283 (get_insn_operands,lookup_insn): Add prototypes for.
1284
1285 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1286
1287 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1288 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1289 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1290 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1291
1292 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1293
1294 * cgen.h: Correct typo in comment end marker.
1295
1296 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1297
1298 * tic30.h: New file.
1299
1300 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1301
1302 * cgen.h: Add prototypes for cgen_save_fixups(),
1303 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1304 of cgen_asm_finish_insn() to return a char *.
1305
1306 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1307
1308 * cgen.h: Formatting changes to improve readability.
1309
1310 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1311
1312 * cgen.h (*): Clean up pass over `struct foo' usage.
1313 (CGEN_ATTR): Make unsigned char.
1314 (CGEN_ATTR_TYPE): Update.
1315 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1316 (cgen_base): Move member `attrs' to cgen_insn.
1317 (CGEN_KEYWORD): New member `null_entry'.
1318 (CGEN_{SYNTAX,FORMAT}): New types.
1319 (cgen_insn): Format and syntax separated from each other.
1320
1321 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1322
1323 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1324 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1325 flags_{used,set} long.
1326 (d30v_operand): Make flags field long.
1327
1328 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1329
1330 * m68k.h: Fix comment describing operand types.
1331
1332 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1333
1334 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1335 everything else after down.
1336
1337 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1338
1339 * d10v.h (OPERAND_FLAG): Split into:
1340 (OPERAND_FFLAG, OPERAND_CFLAG) .
1341
1342 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1343
1344 * mips.h (struct mips_opcode): Changed comments to reflect new
1345 field usage.
1346
1347 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1348
1349 * mips.h: Added to comments a quick-ref list of all assigned
1350 operand type characters.
1351 (OP_{MASK,SH}_PERFREG): New macros.
1352
1353 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1354
1355 * sparc.h: Add '_' and '/' for v9a asr's.
1356 Patch from David Miller <davem@vger.rutgers.edu>
1357
1358 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1359
1360 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1361 area are not available in the base model (H8/300).
1362
1363 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1364
1365 * m68k.h: Remove documentation of ` operand specifier.
1366
1367 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1368
1369 * m68k.h: Document q and v operand specifiers.
1370
1371 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1372
1373 * v850.h (struct v850_opcode): Add processors field.
1374 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1375 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1376 (PROCESSOR_V850EA): New bit constants.
1377
1378 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1379
1380 Merge changes from Martin Hunt:
1381
1382 * d30v.h: Allow up to 64 control registers. Add
1383 SHORT_A5S format.
1384
1385 * d30v.h (LONG_Db): New form for delayed branches.
1386
1387 * d30v.h: (LONG_Db): New form for repeati.
1388
1389 * d30v.h (SHORT_D2B): New form.
1390
1391 * d30v.h (SHORT_A2): New form.
1392
1393 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1394 registers are used. Needed for VLIW optimization.
1395
1396 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1397
1398 * cgen.h: Move assembler interface section
1399 up so cgen_parse_operand_result is defined for cgen_parse_address.
1400 (cgen_parse_address): Update prototype.
1401
1402 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1403
1404 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1405
1406 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1407
1408 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1409 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1410 <paubert@iram.es>.
1411
1412 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1413 <paubert@iram.es>.
1414
1415 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1416 <paubert@iram.es>.
1417
1418 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1419 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1420
1421 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1422
1423 * v850.h (V850_NOT_R0): New flag.
1424
1425 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1426
1427 * v850.h (struct v850_opcode): Remove flags field.
1428
1429 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1430
1431 * v850.h (struct v850_opcode): Add flags field.
1432 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1433 fields.
1434 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1435 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1436
1437 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1438
1439 * arc.h: New file.
1440
1441 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1442
1443 * sparc.h (sparc_opcodes): Declare as const.
1444
1445 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1446
1447 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1448 uses single or double precision floating point resources.
1449 (INSN_NO_ISA, INSN_ISA1): Define.
1450 (cpu specific INSN macros): Tweak into bitmasks outside the range
1451 of INSN_ISA field.
1452
1453 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1454
1455 * i386.h: Fix pand opcode.
1456
1457 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1458
1459 * mips.h: Widen INSN_ISA and move it to a more convenient
1460 bit position. Add INSN_3900.
1461
1462 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1463
1464 * mips.h (struct mips_opcode): added new field membership.
1465
1466 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1467
1468 * i386.h (movd): only Reg32 is allowed.
1469
1470 * i386.h: add fcomp and ud2. From Wayne Scott
1471 <wscott@ichips.intel.com>.
1472
1473 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1474
1475 * i386.h: Add MMX instructions.
1476
1477 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1478
1479 * i386.h: Remove W modifier from conditional move instructions.
1480
1481 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1482
1483 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1484 with no arguments to match that generated by the UnixWare
1485 assembler.
1486
1487 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1488
1489 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1490 (cgen_parse_operand_fn): Declare.
1491 (cgen_init_parse_operand): Declare.
1492 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1493 new argument `want'.
1494 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1495 (enum cgen_parse_operand_type): New enum.
1496
1497 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1498
1499 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1500
1501 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1502
1503 * cgen.h: New file.
1504
1505 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1506
1507 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1508 fdivrp.
1509
1510 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1511
1512 * v850.h (extract): Make unsigned.
1513
1514 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1515
1516 * i386.h: Add iclr.
1517
1518 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1519
1520 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1521 take a direction bit.
1522
1523 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1524
1525 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1526
1527 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1528
1529 * sparc.h: Include <ansidecl.h>. Update function declarations to
1530 use prototypes, and to use const when appropriate.
1531
1532 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1533
1534 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1535
1536 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1537
1538 * d10v.h: Change pre_defined_registers to
1539 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1540
1541 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1542
1543 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1544 Change mips_opcodes from const array to a pointer,
1545 and change bfd_mips_num_opcodes from const int to int,
1546 so that we can increase the size of the mips opcodes table
1547 dynamically.
1548
1549 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1550
1551 * d30v.h (FLAG_X): Remove unused flag.
1552
1553 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1554
1555 * d30v.h: New file.
1556
1557 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1558
1559 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1560 (PDS_VALUE): Macro to access value field of predefined symbols.
1561 (tic80_next_predefined_symbol): Add prototype.
1562
1563 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1564
1565 * tic80.h (tic80_symbol_to_value): Change prototype to match
1566 change in function, added class parameter.
1567
1568 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1569
1570 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1571 endmask fields, which are somewhat weird in that 0 and 32 are
1572 treated exactly the same.
1573
1574 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1575
1576 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1577 rather than a constant that is 2**X. Reorder them to put bits for
1578 operands that have symbolic names in the upper bits, so they can
1579 be packed into an int where the lower bits contain the value that
1580 corresponds to that symbolic name.
1581 (predefined_symbo): Add struct.
1582 (tic80_predefined_symbols): Declare array of translations.
1583 (tic80_num_predefined_symbols): Declare size of that array.
1584 (tic80_value_to_symbol): Declare function.
1585 (tic80_symbol_to_value): Declare function.
1586
1587 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1588
1589 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1590
1591 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1592
1593 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1594 be the destination register.
1595
1596 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1597
1598 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1599 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1600 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1601 that the opcode can have two vector instructions in a single
1602 32 bit word and we have to encode/decode both.
1603
1604 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1605
1606 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1607 TIC80_OPERAND_RELATIVE for PC relative.
1608 (TIC80_OPERAND_BASEREL): New flag bit for register
1609 base relative.
1610
1611 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1612
1613 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1614
1615 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1616
1617 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1618 ":s" modifier for scaling.
1619
1620 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1621
1622 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1623 (TIC80_OPERAND_M_LI): Ditto
1624
1625 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1626
1627 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1628 (TIC80_OPERAND_CC): New define for condition code operand.
1629 (TIC80_OPERAND_CR): New define for control register operand.
1630
1631 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1632
1633 * tic80.h (struct tic80_opcode): Name changed.
1634 (struct tic80_opcode): Remove format field.
1635 (struct tic80_operand): Add insertion and extraction functions.
1636 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1637 correct ones.
1638 (FMT_*): Ditto.
1639
1640 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1641
1642 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1643 type IV instruction offsets.
1644
1645 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1646
1647 * tic80.h: New file.
1648
1649 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1650
1651 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1652
1653 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1654
1655 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1656 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1657 * v850.h: Fix comment, v850_operand not powerpc_operand.
1658
1659 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1660
1661 * mn10200.h: Flesh out structures and definitions needed by
1662 the mn10200 assembler & disassembler.
1663
1664 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1665
1666 * mips.h: Add mips16 definitions.
1667
1668 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1669
1670 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1671
1672 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1673
1674 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1675 (MN10300_OPERAND_MEMADDR): Define.
1676
1677 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1678
1679 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1680
1681 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1682
1683 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1684
1685 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1686
1687 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1688
1689 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1690
1691 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1692
1693 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1694
1695 * alpha.h: Don't include "bfd.h"; private relocation types are now
1696 negative to minimize problems with shared libraries. Organize
1697 instruction subsets by AMASK extensions and PALcode
1698 implementation.
1699 (struct alpha_operand): Move flags slot for better packing.
1700
1701 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1702
1703 * v850.h (V850_OPERAND_RELAX): New operand flag.
1704
1705 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1706
1707 * mn10300.h (FMT_*): Move operand format definitions
1708 here.
1709
1710 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1711
1712 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1713
1714 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1715
1716 * mn10300.h (mn10300_opcode): Add "format" field.
1717 (MN10300_OPERAND_*): Define.
1718
1719 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1720
1721 * mn10x00.h: Delete.
1722 * mn10200.h, mn10300.h: New files.
1723
1724 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1725
1726 * mn10x00.h: New file.
1727
1728 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1729
1730 * v850.h: Add new flag to indicate this instruction uses a PC
1731 displacement.
1732
1733 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1734
1735 * h8300.h (stmac): Add missing instruction.
1736
1737 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1738
1739 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1740 field.
1741
1742 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1743
1744 * v850.h (V850_OPERAND_EP): Define.
1745
1746 * v850.h (v850_opcode): Add size field.
1747
1748 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1749
1750 * v850.h (v850_operands): Add insert and extract fields, pointers
1751 to functions used to handle unusual operand encoding.
1752 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1753 V850_OPERAND_SIGNED): Defined.
1754
1755 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1756
1757 * v850.h (v850_operands): Add flags field.
1758 (OPERAND_REG, OPERAND_NUM): Defined.
1759
1760 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1761
1762 * v850.h: New file.
1763
1764 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1765
1766 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1767 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1768 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1769 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1770 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1771 Defined.
1772
1773 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1774
1775 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1776 a 3 bit space id instead of a 2 bit space id.
1777
1778 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1779
1780 * d10v.h: Add some additional defines to support the
1781 assembler in determining which operations can be done in parallel.
1782
1783 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1784
1785 * h8300.h (SN): Define.
1786 (eepmov.b): Renamed from "eepmov"
1787 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1788 with them.
1789
1790 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1791
1792 * d10v.h (OPERAND_SHIFT): New operand flag.
1793
1794 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1795
1796 * d10v.h: Changes for divs, parallel-only instructions, and
1797 signed numbers.
1798
1799 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1800
1801 * d10v.h (pd_reg): Define. Putting the definition here allows
1802 the assembler and disassembler to share the same struct.
1803
1804 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1805
1806 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1807 Williams <steve@icarus.com>.
1808
1809 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1810
1811 * d10v.h: New file.
1812
1813 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1814
1815 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1816
1817 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1818
1819 * m68k.h (mcf5200): New macro.
1820 Document names of coldfire control registers.
1821
1822 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1823
1824 * h8300.h (SRC_IN_DST): Define.
1825
1826 * h8300.h (UNOP3): Mark the register operand in this insn
1827 as a source operand, not a destination operand.
1828 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1829 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1830 register operand with SRC_IN_DST.
1831
1832 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1833
1834 * alpha.h: New file.
1835
1836 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1837
1838 * rs6k.h: Remove obsolete file.
1839
1840 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1841
1842 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1843 fdivp, and fdivrp. Add ffreep.
1844
1845 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1846
1847 * h8300.h: Reorder various #defines for readability.
1848 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1849 (BITOP): Accept additional (unused) argument. All callers changed.
1850 (EBITOP): Likewise.
1851 (O_LAST): Bump.
1852 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1853
1854 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1855 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1856 (BITOP, EBITOP): Handle new H8/S addressing modes for
1857 bit insns.
1858 (UNOP3): Handle new shift/rotate insns on the H8/S.
1859 (insns using exr): New instructions.
1860 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1861
1862 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1863
1864 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1865 was incorrect.
1866
1867 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1868
1869 * h8300.h (START): Remove.
1870 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1871 and mov.l insns that can be relaxed.
1872
1873 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1874
1875 * i386.h: Remove Abs32 from lcall.
1876
1877 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1878
1879 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1880 (SLCPOP): New macro.
1881 Mark X,Y opcode letters as in use.
1882
1883 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1884
1885 * sparc.h (F_FLOAT, F_FBR): Define.
1886
1887 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1888
1889 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1890 from all insns.
1891 (ABS8SRC,ABS8DST): Add ABS8MEM.
1892 (add.l): Fix reg+reg variant.
1893 (eepmov.w): Renamed from eepmovw.
1894 (ldc,stc): Fix many cases.
1895
1896 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1897
1898 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1899
1900 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1901
1902 * sparc.h (O): Mark operand letter as in use.
1903
1904 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1905
1906 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1907 Mark operand letters uU as in use.
1908
1909 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1910
1911 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1912 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1913 (SPARC_OPCODE_SUPPORTED): New macro.
1914 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1915 (F_NOTV9): Delete.
1916
1917 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1918
1919 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1920 declaration consistent with return type in definition.
1921
1922 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1923
1924 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1925
1926 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1927
1928 * i386.h (i386_regtab): Add 80486 test registers.
1929
1930 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1931
1932 * i960.h (I_HX): Define.
1933 (i960_opcodes): Add HX instruction.
1934
1935 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1936
1937 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1938 and fclex.
1939
1940 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1941
1942 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1943 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1944 (bfd_* defines): Delete.
1945 (sparc_opcode_archs): Replaces architecture_pname.
1946 (sparc_opcode_lookup_arch): Declare.
1947 (NUMOPCODES): Delete.
1948
1949 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1950
1951 * sparc.h (enum sparc_architecture): Add v9a.
1952 (ARCHITECTURES_CONFLICT_P): Update.
1953
1954 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1955
1956 * i386.h: Added Pentium Pro instructions.
1957
1958 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1959
1960 * m68k.h: Document new 'W' operand place.
1961
1962 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1963
1964 * hppa.h: Add lci and syncdma instructions.
1965
1966 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1967
1968 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1969 instructions.
1970
1971 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1972
1973 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1974 assembler's -mcom and -many switches.
1975
1976 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1977
1978 * i386.h: Fix cmpxchg8b extension opcode description.
1979
1980 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1981
1982 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1983 and register cr4.
1984
1985 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1986
1987 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1988
1989 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1990
1991 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1992
1993 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1994
1995 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1996
1997 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1998
1999 * m68kmri.h: Remove.
2000
2001 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2002 declarations. Remove F_ALIAS and flag field of struct
2003 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2004 int. Make name and args fields of struct m68k_opcode const.
2005
2006 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2007
2008 * sparc.h (F_NOTV9): Define.
2009
2010 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2011
2012 * mips.h (INSN_4010): Define.
2013
2014 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2015
2016 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2017
2018 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2019 * m68k.h: Fix argument descriptions of coprocessor
2020 instructions to allow only alterable operands where appropriate.
2021 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2022 (m68k_opcode_aliases): Add more aliases.
2023
2024 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2025
2026 * m68k.h: Added explcitly short-sized conditional branches, and a
2027 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2028 svr4-based configurations.
2029
2030 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2031
2032 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2033 * i386.h: added missing Data16/Data32 flags to a few instructions.
2034
2035 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2036
2037 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2038 (OP_MASK_BCC, OP_SH_BCC): Define.
2039 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2040 (OP_MASK_CCC, OP_SH_CCC): Define.
2041 (INSN_READ_FPR_R): Define.
2042 (INSN_RFE): Delete.
2043
2044 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2045
2046 * m68k.h (enum m68k_architecture): Deleted.
2047 (struct m68k_opcode_alias): New type.
2048 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2049 matching constraints, values and flags. As a side effect of this,
2050 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2051 as I know were never used, now may need re-examining.
2052 (numopcodes): Now const.
2053 (m68k_opcode_aliases, numaliases): New variables.
2054 (endop): Deleted.
2055 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2056 m68k_opcode_aliases; update declaration of m68k_opcodes.
2057
2058 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2059
2060 * hppa.h (delay_type): Delete unused enumeration.
2061 (pa_opcode): Replace unused delayed field with an architecture
2062 field.
2063 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2064
2065 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2066
2067 * mips.h (INSN_ISA4): Define.
2068
2069 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2070
2071 * mips.h (M_DLA_AB, M_DLI): Define.
2072
2073 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2074
2075 * hppa.h (fstwx): Fix single-bit error.
2076
2077 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2078
2079 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2080
2081 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2082
2083 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2084 debug registers. From Charles Hannum (mycroft@netbsd.org).
2085
2086 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2087
2088 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2089 i386 support:
2090 * i386.h (MOV_AX_DISP32): New macro.
2091 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2092 of several call/return instructions.
2093 (ADDR_PREFIX_OPCODE): New macro.
2094
2095 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2096
2097 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2098
2099 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2100 char.
2101 (struct vot, field `name'): ditto.
2102
2103 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2104
2105 * vax.h: Supply and properly group all values in end sentinel.
2106
2107 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2108
2109 * mips.h (INSN_ISA, INSN_4650): Define.
2110
2111 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2112
2113 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2114 systems with a separate instruction and data cache, such as the
2115 29040, these instructions take an optional argument.
2116
2117 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2118
2119 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2120 INSN_TRAP.
2121
2122 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2123
2124 * mips.h (INSN_STORE_MEMORY): Define.
2125
2126 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2127
2128 * sparc.h: Document new operand type 'x'.
2129
2130 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2131
2132 * i960.h (I_CX2): New instruction category. It includes
2133 instructions available on Cx and Jx processors.
2134 (I_JX): New instruction category, for JX-only instructions.
2135 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2136 Jx-only instructions, in I_JX category.
2137
2138 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2139
2140 * ns32k.h (endop): Made pointer const too.
2141
2142 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2143
2144 * ns32k.h: Drop Q operand type as there is no correct use
2145 for it. Add I and Z operand types which allow better checking.
2146
2147 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2148
2149 * h8300.h (xor.l) :fix bit pattern.
2150 (L_2): New size of operand.
2151 (trapa): Use it.
2152
2153 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2154
2155 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2156
2157 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2158
2159 * sparc.h: Include v9 definitions.
2160
2161 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2162
2163 * m68k.h (m68060): Defined.
2164 (m68040up, mfloat, mmmu): Include it.
2165 (struct m68k_opcode): Widen `arch' field.
2166 (m68k_opcodes): Updated for M68060. Removed comments that were
2167 instructions commented out by "JF" years ago.
2168
2169 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2170
2171 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2172 add a one-bit `flags' field.
2173 (F_ALIAS): New macro.
2174
2175 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2176
2177 * h8300.h (dec, inc): Get encoding right.
2178
2179 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2180
2181 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2182 a flag instead.
2183 (PPC_OPERAND_SIGNED): Define.
2184 (PPC_OPERAND_SIGNOPT): Define.
2185
2186 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2187
2188 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2189 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2190
2191 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2192
2193 * i386.h: Reverse last change. It'll be handled in gas instead.
2194
2195 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2196
2197 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2198 slower on the 486 and used the implicit shift count despite the
2199 explicit operand. The one-operand form is still available to get
2200 the shorter form with the implicit shift count.
2201
2202 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2203
2204 * hppa.h: Fix typo in fstws arg string.
2205
2206 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2207
2208 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2209
2210 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2211
2212 * ppc.h (PPC_OPCODE_601): Define.
2213
2214 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2215
2216 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2217 (so we can determine valid completers for both addb and addb[tf].)
2218
2219 * hppa.h (xmpyu): No floating point format specifier for the
2220 xmpyu instruction.
2221
2222 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2223
2224 * ppc.h (PPC_OPERAND_NEXT): Define.
2225 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2226 (struct powerpc_macro): Define.
2227 (powerpc_macros, powerpc_num_macros): Declare.
2228
2229 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2230
2231 * ppc.h: New file. Header file for PowerPC opcode table.
2232
2233 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2234
2235 * hppa.h: More minor template fixes for sfu and copr (to allow
2236 for easier disassembly).
2237
2238 * hppa.h: Fix templates for all the sfu and copr instructions.
2239
2240 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2241
2242 * i386.h (push): Permit Imm16 operand too.
2243
2244 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2245
2246 * h8300.h (andc): Exists in base arch.
2247
2248 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2249
2250 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2251 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2252
2253 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2254
2255 * hppa.h: Add FP quadword store instructions.
2256
2257 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2258
2259 * mips.h: (M_J_A): Added.
2260 (M_LA): Removed.
2261
2262 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2263
2264 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2265 <mellon@pepper.ncd.com>.
2266
2267 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2268
2269 * hppa.h: Immediate field in probei instructions is unsigned,
2270 not low-sign extended.
2271
2272 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2273
2274 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2275
2276 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2277
2278 * i386.h: Add "fxch" without operand.
2279
2280 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2281
2282 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2283
2284 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2285
2286 * hppa.h: Add gfw and gfr to the opcode table.
2287
2288 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2289
2290 * m88k.h: extended to handle m88110.
2291
2292 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2293
2294 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2295 addresses.
2296
2297 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2298
2299 * i960.h (i960_opcodes): Properly bracket initializers.
2300
2301 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2302
2303 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2304
2305 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2306
2307 * m68k.h (two): Protect second argument with parentheses.
2308
2309 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2310
2311 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2312 Deleted old in/out instructions in "#if 0" section.
2313
2314 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2315
2316 * i386.h (i386_optab): Properly bracket initializers.
2317
2318 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2319
2320 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2321 Jeff Law, law@cs.utah.edu).
2322
2323 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2324
2325 * i386.h (lcall): Accept Imm32 operand also.
2326
2327 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2328
2329 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2330 (M_DABS): Added.
2331
2332 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2333
2334 * mips.h (INSN_*): Changed values. Removed unused definitions.
2335 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2336 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2337 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2338 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2339 (M_*): Added new values for r6000 and r4000 macros.
2340 (ANY_DELAY): Removed.
2341
2342 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2343
2344 * mips.h: Added M_LI_S and M_LI_SS.
2345
2346 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2347
2348 * h8300.h: Get some rare mov.bs correct.
2349
2350 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2351
2352 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2353 been included.
2354
2355 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2356
2357 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2358 jump instructions, for use in disassemblers.
2359
2360 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2361
2362 * m88k.h: Make bitfields just unsigned, not unsigned long or
2363 unsigned short.
2364
2365 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2366
2367 * hppa.h: New argument type 'y'. Use in various float instructions.
2368
2369 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2370
2371 * hppa.h (break): First immediate field is unsigned.
2372
2373 * hppa.h: Add rfir instruction.
2374
2375 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2376
2377 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2378
2379 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2380
2381 * mips.h: Reworked the hazard information somewhat, and fixed some
2382 bugs in the instruction hazard descriptions.
2383
2384 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2385
2386 * m88k.h: Corrected a couple of opcodes.
2387
2388 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2389
2390 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2391 new version includes instruction hazard information, but is
2392 otherwise reasonably similar.
2393
2394 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2395
2396 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2397
2398 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2399
2400 Patches from Jeff Law, law@cs.utah.edu:
2401 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2402 Make the tables be the same for the following instructions:
2403 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2404 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2405 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2406 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2407 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2408 "fcmp", and "ftest".
2409
2410 * hppa.h: Make new and old tables the same for "break", "mtctl",
2411 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2412 Fix typo in last patch. Collapse several #ifdefs into a
2413 single #ifdef.
2414
2415 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2416 of the comments up-to-date.
2417
2418 * hppa.h: Update "free list" of letters and update
2419 comments describing each letter's function.
2420
2421 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2422
2423 * h8300.h: Lots of little fixes for the h8/300h.
2424
2425 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2426
2427 Support for H8/300-H
2428 * h8300.h: Lots of new opcodes.
2429
2430 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2431
2432 * h8300.h: checkpoint, includes H8/300-H opcodes.
2433
2434 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2435
2436 * Patches from Jeffrey Law <law@cs.utah.edu>.
2437 * hppa.h: Rework single precision FP
2438 instructions so that they correctly disassemble code
2439 PA1.1 code.
2440
2441 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2442
2443 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2444 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2445
2446 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2447
2448 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2449 gdb will define it for now.
2450
2451 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2452
2453 * sparc.h: Don't end enumerator list with comma.
2454
2455 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2456
2457 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2458 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2459 ("bc2t"): Correct typo.
2460 ("[ls]wc[023]"): Use T rather than t.
2461 ("c[0123]"): Define general coprocessor instructions.
2462
2463 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2464
2465 * m68k.h: Move split point for gcc compilation more towards
2466 middle.
2467
2468 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2469
2470 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2471 simply wrong, ics, rfi, & rfsvc were missing).
2472 Add "a" to opr_ext for "bb". Doc fix.
2473
2474 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2475
2476 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2477 * mips.h: Add casts, to suppress warnings about shifting too much.
2478 * m68k.h: Document the placement code '9'.
2479
2480 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2481
2482 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2483 allows callers to break up the large initialized struct full of
2484 opcodes into two half-sized ones. This permits GCC to compile
2485 this module, since it takes exponential space for initializers.
2486 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2487
2488 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2489
2490 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2491 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2492 initialized structs in it.
2493
2494 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2495
2496 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2497 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2498 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2499
2500 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2501
2502 * mips.h: document "i" and "j" operands correctly.
2503
2504 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2505
2506 * mips.h: Removed endianness dependency.
2507
2508 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2509
2510 * h8300.h: include info on number of cycles per instruction.
2511
2512 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2513
2514 * hppa.h: Move handy aliases to the front. Fix masks for extract
2515 and deposit instructions.
2516
2517 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2518
2519 * i386.h: accept shld and shrd both with and without the shift
2520 count argument, which is always %cl.
2521
2522 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2523
2524 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2525 (one_byte_segment_defaults, two_byte_segment_defaults,
2526 i386_prefixtab_end): Ditto.
2527
2528 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2529
2530 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2531 for operand 2; from John Carr, jfc@dsg.dec.com.
2532
2533 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2534
2535 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2536 always use 16-bit offsets. Makes calculated-size jump tables
2537 feasible.
2538
2539 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2540
2541 * i386.h: Fix one-operand forms of in* and out* patterns.
2542
2543 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2544
2545 * m68k.h: Added CPU32 support.
2546
2547 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2548
2549 * mips.h (break): Disassemble the argument. Patch from
2550 jonathan@cs.stanford.edu (Jonathan Stone).
2551
2552 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2553
2554 * m68k.h: merged Motorola and MIT syntax.
2555
2556 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2557
2558 * m68k.h (pmove): make the tests less strict, the 68k book is
2559 wrong.
2560
2561 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2562
2563 * m68k.h (m68ec030): Defined as alias for 68030.
2564 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2565 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2566 them. Tightened description of "fmovex" to distinguish it from
2567 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2568 up descriptions that claimed versions were available for chips not
2569 supporting them. Added "pmovefd".
2570
2571 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2572
2573 * m68k.h: fix where the . goes in divull
2574
2575 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2576
2577 * m68k.h: the cas2 instruction is supposed to be written with
2578 indirection on the last two operands, which can be either data or
2579 address registers. Added a new operand type 'r' which accepts
2580 either register type. Added new cases for cas2l and cas2w which
2581 use them. Corrected masks for cas2 which failed to recognize use
2582 of address register.
2583
2584 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2585
2586 * m68k.h: Merged in patches (mostly m68040-specific) from
2587 Colin Smith <colin@wrs.com>.
2588
2589 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2590 base). Also cleaned up duplicates, re-ordered instructions for
2591 the sake of dis-assembling (so aliases come after standard names).
2592 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2593
2594 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2595
2596 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2597 all missing .s
2598
2599 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2600
2601 * sparc.h: Moved tables to BFD library.
2602
2603 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2604
2605 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2606
2607 * h8300.h: Finish filling in all the holes in the opcode table,
2608 so that the Lucid C compiler can digest this as well...
2609
2610 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2611
2612 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2613 Fix opcodes on various sizes of fild/fist instructions
2614 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2615 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2616
2617 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2618
2619 * h8300.h: Fill in all the holes in the opcode table so that the
2620 losing HPUX C compiler can digest this...
2621
2622 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2623
2624 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2625 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2626
2627 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2628
2629 * sparc.h: Add new architecture variant sparclite; add its scan
2630 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2631
2632 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2633
2634 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2635 fy@lucid.com).
2636
2637 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2638
2639 * rs6k.h: New version from IBM (Metin).
2640
2641 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2642
2643 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2644 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2645
2646 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2647
2648 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2649
2650 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2651
2652 * m68k.h (one, two): Cast macro args to unsigned to suppress
2653 complaints from compiler and lint about integer overflow during
2654 shift.
2655
2656 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2657
2658 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2659
2660 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2661
2662 * mips.h: Make bitfield layout depend on the HOST compiler,
2663 not on the TARGET system.
2664
2665 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2666
2667 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2668 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2669 <TRANLE@INTELLICORP.COM>.
2670
2671 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2672
2673 * h8300.h: turned op_type enum into #define list
2674
2675 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2676
2677 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2678 similar instructions -- they've been renamed to "fitoq", etc.
2679 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2680 number of arguments.
2681 * h8300.h: Remove extra ; which produces compiler warning.
2682
2683 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2684
2685 * sparc.h: fix opcode for tsubcctv.
2686
2687 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2688
2689 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2690
2691 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2692
2693 * sparc.h (nop): Made the 'lose' field be even tighter,
2694 so only a standard 'nop' is disassembled as a nop.
2695
2696 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2697
2698 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2699 disassembled as a nop.
2700
2701 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2702
2703 * m68k.h, sparc.h: ANSIfy enums.
2704
2705 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2706
2707 * sparc.h: fix a typo.
2708
2709 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2710
2711 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2712 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2713 vax.h: Renamed from ../<foo>-opcode.h.
2714
2715 \f
2716 Local Variables:
2717 version-control: never
2718 End:
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