include/elf/ChangeLog
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2003-01-23 Alan Modra <amodra@bigpond.net.au>
2
3 * m68hc11.h (cpu6812s): Define.
4
5 2003-01-07 Chris Demetriou <cgd@broadcom.com>
6
7 * mips.h: Fix missing space in comment.
8 (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
9 (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
10 by four bits.
11
12 2003-01-02 Chris Demetriou <cgd@broadcom.com>
13
14 * mips.h: Update copyright years to include 2002 (which had
15 been missed previously) and 2003. Make comments about "+A",
16 "+B", and "+C" operand types more descriptive.
17
18 2002-12-31 Chris Demetriou <cgd@broadcom.com>
19
20 * mips.h: Note that the "+D" operand type name is now used.
21
22 2002-12-30 Chris Demetriou <cgd@broadcom.com>
23
24 * mips.h: Document "+" as the start of two-character operand
25 type names, and add new "K", "+A", "+B", and "+C" operand types.
26 (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
27 (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
28 defines.
29
30 2002-12-24 Dmitry Diky <diwil@mail.ru>
31
32 * msp430.h: New file. Defines msp430 opcodes.
33
34 2002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
35
36 * h8300.h: Added some more pseudo opcodes for system call
37 processing.
38
39 2002-12-19 Chris Demetriou <cgd@broadcom.com>
40
41 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
42 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
43 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
44 (OP_OP_SDC2, OP_OP_SDC3): Define.
45
46 2002-12-16 Alan Modra <amodra@bigpond.net.au>
47
48 * hppa.h (completer_chars): #if 0 out.
49
50 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
51 "default_args".
52 (struct not_wot): Constify "args".
53 (struct not): Constify "name".
54 (numopcodes): Delete.
55 (endop): Delete.
56
57 2002-12-13 Alan Modra <amodra@bigpond.net.au>
58
59 * pj.h (pj_opc_info_t): Add union.
60
61 2002-12-04 David Mosberger <davidm@hpl.hp.com>
62
63 * ia64.h: Fix copyright message.
64 (IA64_OPND_AR_CSD): New operand kind.
65
66 2002-12-03 Richard Henderson <rth@redhat.com>
67
68 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
69
70 2002-12-03 Alan Modra <amodra@bigpond.net.au>
71
72 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
73 Constify "leaf" and "multi".
74
75 2002-11-19 Klee Dienes <kdienes@apple.com>
76
77 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
78 fields.
79 (h8_opcodes). Modify initializer and initializer macros to no
80 longer initialize the removed fields.
81
82 2002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
83
84 * tic4x.h (c4x_insts): Fixed LDHI constraint
85
86 2002-11-18 Klee Dienes <kdienes@apple.com>
87
88 * h8300.h (h8_opcode): Remove 'length' field.
89 (h8_opcodes): Mark as 'const' (both the declaration and
90 definition). Modify initializer and initializer macros to no
91 longer initialize the length field.
92
93 2002-11-18 Klee Dienes <kdienes@apple.com>
94
95 * arc.h (arc_ext_opcodes): Declare as extern.
96 (arc_ext_operands): Declare as extern.
97 * i860.h (i860_opcodes): Declare as const.
98
99 2002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
100
101 * tic4x.h: File reordering. Added enhanced opcodes.
102
103 2002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
104
105 * tic4x.h: Major rewrite of entire file. Define instruction
106 classes, and put each instruction into a class.
107
108 2002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
109
110 * tic4x.h: Added new opcodes and corrected some bugs. Add support
111 for new DSP types.
112
113 2002-10-14 Alan Modra <amodra@bigpond.net.au>
114
115 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
116
117 2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
118 Ken Raeburn <raeburn@cygnus.com>
119 Aldy Hernandez <aldyh@redhat.com>
120 Eric Christopher <echristo@redhat.com>
121 Richard Sandiford <rsandifo@redhat.com>
122
123 * mips.h: Update comment for new opcodes.
124 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
125 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
126 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
127 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
128 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
129 Don't match CPU_R4111 with INSN_4100.
130
131 2002-08-19 Elena Zannoni <ezannoni@redhat.com>
132
133 From matthew green <mrg@redhat.com>
134
135 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
136 instructions.
137 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
138 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
139 e500x2 Integer select, branch locking, performance monitor,
140 cache locking and machine check APUs, respectively.
141 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
142 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
143
144 2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
145
146 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
147 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
148 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
149 memory banks.
150 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
151
152 2002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
153
154 * mips.h (INSN_MIPS16): New define.
155
156 2002-07-08 Alan Modra <amodra@bigpond.net.au>
157
158 * i386.h: Remove IgnoreSize from movsx and movzx.
159
160 2002-06-08 Alan Modra <amodra@bigpond.net.au>
161
162 * a29k.h: Replace CONST with const.
163 (CONST): Don't define.
164 * convex.h: Replace CONST with const.
165 (CONST): Don't define.
166 * dlx.h: Replace CONST with const.
167 * or32.h (CONST): Don't define.
168
169 2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
170
171 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
172 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
173 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
174 (INSN_MDMX): New constants, for MDMX support.
175 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
176
177 2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
178
179 * dlx.h: New file.
180
181 2002-05-25 Alan Modra <amodra@bigpond.net.au>
182
183 * ia64.h: Use #include "" instead of <> for local header files.
184 * sparc.h: Likewise.
185
186 2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
187
188 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
189
190 2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
191
192 * h8300.h: Corrected defs of all control regs
193 and eepmov instr.
194
195 2002-04-11 Alan Modra <amodra@bigpond.net.au>
196
197 * i386.h: Add intel mode cmpsd and movsd.
198 Put them before SSE2 insns, so that rep prefix works.
199
200 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
201
202 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
203 instructions.
204 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
205 may be passed along with the ISA bitmask.
206
207 2002-03-05 Paul Koning <pkoning@equallogic.com>
208
209 * pdp11.h: Add format codes for float instruction formats.
210
211 2002-02-25 Alan Modra <amodra@bigpond.net.au>
212
213 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
214
215 Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
216
217 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
218
219 Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
220
221 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
222 (xchg): Fix.
223 (in, out): Disable 64bit operands.
224 (call, jmp): Avoid REX prefixes.
225 (jcxz): Prohibit in 64bit mode
226 (jrcxz, loop): Add 64bit variants.
227 (movq): Fix patterns.
228 (movmskps, pextrw, pinstrw): Add 64bit variants.
229
230 2002-01-31 Ivan Guzvinec <ivang@opencores.org>
231
232 * or32.h: New file.
233
234 2002-01-22 Graydon Hoare <graydon@redhat.com>
235
236 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
237 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
238
239 2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
240
241 * h8300.h: Comment typo fix.
242
243 2002-01-03 matthew green <mrg@redhat.com>
244
245 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
246 (PPC_OPCODE_BOOKE64): Likewise.
247
248 Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
249
250 * hppa.h (call, ret): Move to end of table.
251 (addb, addib): PA2.0 variants should have been PA2.0W.
252 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
253 happy.
254 (fldw, fldd, fstw, fstd, bb): Likewise.
255 (short loads/stores): Tweak format specifier slightly to keep
256 disassembler happy.
257 (indexed loads/stores): Likewise.
258 (absolute loads/stores): Likewise.
259
260 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
261
262 * d10v.h (OPERAND_NOSP): New macro.
263
264 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
265
266 * d10v.h (OPERAND_SP): New macro.
267
268 2001-11-15 Alan Modra <amodra@bigpond.net.au>
269
270 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
271
272 2001-11-11 Timothy Wall <twall@alum.mit.edu>
273
274 * tic54x.h: Revise opcode layout; don't really need a separate
275 structure for parallel opcodes.
276
277 2001-11-13 Zack Weinberg <zack@codesourcery.com>
278 Alan Modra <amodra@bigpond.net.au>
279
280 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
281 accept WordReg.
282
283 2001-11-04 Chris Demetriou <cgd@broadcom.com>
284
285 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
286
287 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
288
289 * mmix.h: New file.
290
291 2001-10-18 Chris Demetriou <cgd@broadcom.com>
292
293 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
294 of the expression, to make source code merging easier.
295
296 2001-10-17 Chris Demetriou <cgd@broadcom.com>
297
298 * mips.h: Sort coprocessor instruction argument characters
299 in comment, add a few more words of description for "H".
300
301 2001-10-17 Chris Demetriou <cgd@broadcom.com>
302
303 * mips.h (INSN_SB1): New cpu-specific instruction bit.
304 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
305 if cpu is CPU_SB1.
306
307 2001-10-17 matthew green <mrg@redhat.com>
308
309 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
310
311 2001-10-12 matthew green <mrg@redhat.com>
312
313 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
314 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
315 instructions, respectively.
316
317 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
318
319 * v850.h: Remove spurious comment.
320
321 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
322
323 * h8300.h: Fix compile time warning messages
324
325 2001-09-04 Richard Henderson <rth@redhat.com>
326
327 * alpha.h (struct alpha_operand): Pack elements into bitfields.
328
329 2001-08-31 Eric Christopher <echristo@redhat.com>
330
331 * mips.h: Remove CPU_MIPS32_4K.
332
333 2001-08-27 Torbjorn Granlund <tege@swox.com>
334
335 * ppc.h (PPC_OPERAND_DS): Define.
336
337 2001-08-25 Andreas Jaeger <aj@suse.de>
338
339 * d30v.h: Fix declaration of reg_name_cnt.
340
341 * d10v.h: Fix declaration of d10v_reg_name_cnt.
342
343 * arc.h: Add prototypes from opcodes/arc-opc.c.
344
345 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
346
347 * mips.h (INSN_10000): Define.
348 (OPCODE_IS_MEMBER): Check for INSN_10000.
349
350 2001-08-10 Alan Modra <amodra@one.net.au>
351
352 * ppc.h: Revert 2001-08-08.
353
354 2001-08-10 Richard Sandiford <rsandifo@redhat.com>
355
356 * mips.h (INSN_GP32): Remove.
357 (OPCODE_IS_MEMBER): Remove gp32 parameter.
358 (M_MOVE): New macro identifier.
359
360 2001-08-08 Alan Modra <amodra@one.net.au>
361
362 1999-10-25 Torbjorn Granlund <tege@swox.com>
363 * ppc.h (struct powerpc_operand): New field `reloc'.
364
365 2001-08-01 Aldy Hernandez <aldyh@redhat.com>
366
367 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
368
369 2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
370
371 * cgen.h (CGEN_INSN): Add regex support.
372 (build_insn_regex): Declare.
373
374 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
375
376 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
377 (cgen_cpu_desc): Ditto.
378
379 2001-07-07 Ben Elliston <bje@redhat.com>
380
381 * m88k.h: Clean up and reformat. Remove unused code.
382
383 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
384
385 * cgen.h (cgen_keyword): Add nonalpha_chars field.
386
387 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
388
389 * mips.h (CPU_R12000): Define.
390
391 2001-05-23 John Healy <jhealy@redhat.com>
392
393 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
394
395 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
396
397 * mips.h (INSN_ISA_MASK): Define.
398
399 2001-05-12 Alan Modra <amodra@one.net.au>
400
401 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
402 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
403 and use InvMem as these insns must have register operands.
404
405 2001-05-04 Alan Modra <amodra@one.net.au>
406
407 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
408 and pextrw to swap reg/rm assignments.
409
410 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
411
412 * cris.h (enum cris_insn_version_usage): Correct comment for
413 cris_ver_v3p.
414
415 2001-03-24 Alan Modra <alan@linuxcare.com.au>
416
417 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
418 Add InvMem to first operand of "maskmovdqu".
419
420 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
421
422 * cris.h (ADD_PC_INCR_OPCODE): New macro.
423
424 2001-03-21 Kazu Hirata <kazu@hxi.com>
425
426 * h8300.h: Fix formatting.
427
428 2001-03-22 Alan Modra <alan@linuxcare.com.au>
429
430 * i386.h (i386_optab): Add paddq, psubq.
431
432 2001-03-19 Alan Modra <alan@linuxcare.com.au>
433
434 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
435
436 2001-02-28 Igor Shevlyakov <igor@windriver.com>
437
438 * m68k.h: new defines for Coldfire V4. Update mcf to know
439 about mcf5407.
440
441 2001-02-18 lars brinkhoff <lars@nocrew.org>
442
443 * pdp11.h: New file.
444
445 2001-02-12 Jan Hubicka <jh@suse.cz>
446
447 * i386.h (i386_optab): SSE integer converison instructions have
448 64bit versions on x86-64.
449
450 2001-02-10 Nick Clifton <nickc@redhat.com>
451
452 * mips.h: Remove extraneous whitespace. Formating change to allow
453 for future contribution.
454
455 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
456
457 * s390.h: New file.
458
459 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
460
461 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
462 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
463 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
464
465 2001-01-24 Karsten Keil <kkeil@suse.de>
466
467 * i386.h (i386_optab): Fix swapgs
468
469 2001-01-14 Alan Modra <alan@linuxcare.com.au>
470
471 * hppa.h: Describe new '<' and '>' operand types, and tidy
472 existing comments.
473 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
474 Remove duplicate "ldw j(s,b),x". Sort some entries.
475
476 2001-01-13 Jan Hubicka <jh@suse.cz>
477
478 * i386.h (i386_optab): Fix pusha and ret templates.
479
480 2001-01-11 Peter Targett <peter.targett@arccores.com>
481
482 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
483 definitions for masking cpu type.
484 (arc_ext_operand_value) New structure for storing extended
485 operands.
486 (ARC_OPERAND_*) Flags for operand values.
487
488 2001-01-10 Jan Hubicka <jh@suse.cz>
489
490 * i386.h (pinsrw): Add.
491 (pshufw): Remove.
492 (cvttpd2dq): Fix operands.
493 (cvttps2dq): Likewise.
494 (movq2q): Rename to movdq2q.
495
496 2001-01-10 Richard Schaal <richard.schaal@intel.com>
497
498 * i386.h: Correct movnti instruction.
499
500 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
501
502 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
503 of operands (unsigned char or unsigned short).
504 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
505 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
506
507 2001-01-05 Jan Hubicka <jh@suse.cz>
508
509 * i386.h (i386_optab): Make [sml]fence template to use immext field.
510
511 2001-01-03 Jan Hubicka <jh@suse.cz>
512
513 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
514 introduced by Pentium4
515
516 2000-12-30 Jan Hubicka <jh@suse.cz>
517
518 * i386.h (i386_optab): Add "rex*" instructions;
519 add swapgs; disable jmp/call far direct instructions for
520 64bit mode; add syscall and sysret; disable registers for 0xc6
521 template. Add 'q' suffixes to extendable instructions, disable
522 obsolete instructions, add new sign/zero extension ones.
523 (i386_regtab): Add extended registers.
524 (*Suf): Add No_qSuf.
525 (q_Suf, wlq_Suf, bwlq_Suf): New.
526
527 2000-12-20 Jan Hubicka <jh@suse.cz>
528
529 * i386.h (i386_optab): Replace "Imm" with "EncImm".
530 (i386_regtab): Add flags field.
531
532 2000-12-12 Nick Clifton <nickc@redhat.com>
533
534 * mips.h: Fix formatting.
535
536 2000-12-01 Chris Demetriou <cgd@sibyte.com>
537
538 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
539 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
540 OP_*_SYSCALL definitions.
541 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
542 19 bit wait codes.
543 (MIPS operand specifier comments): Remove 'm', add 'U' and
544 'J', and update the meaning of 'B' so that it's more general.
545
546 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
547 INSN_ISA5): Renumber, redefine to mean the ISA at which the
548 instruction was added.
549 (INSN_ISA32): New constant.
550 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
551 Renumber to avoid new and/or renumbered INSN_* constants.
552 (INSN_MIPS32): Delete.
553 (ISA_UNKNOWN): New constant to indicate unknown ISA.
554 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
555 ISA_MIPS32): New constants, defined to be the mask of INSN_*
556 constants available at that ISA level.
557 (CPU_UNKNOWN): New constant to indicate unknown CPU.
558 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
559 define it with a unique value.
560 (OPCODE_IS_MEMBER): Update for new ISA membership-related
561 constant meanings.
562
563 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
564 definitions.
565
566 * mips.h (CPU_SB1): New constant.
567
568 2000-10-20 Jakub Jelinek <jakub@redhat.com>
569
570 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
571 Note that '3' is used for siam operand.
572
573 2000-09-22 Jim Wilson <wilson@cygnus.com>
574
575 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
576
577 2000-09-13 Anders Norlander <anorland@acc.umu.se>
578
579 * mips.h: Use defines instead of hard-coded processor numbers.
580 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
581 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
582 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
583 CPU_4KC, CPU_4KM, CPU_4KP): Define..
584 (OPCODE_IS_MEMBER): Use new defines.
585 (OP_MASK_SEL, OP_SH_SEL): Define.
586 (OP_MASK_CODE20, OP_SH_CODE20): Define.
587 Add 'P' to used characters.
588 Use 'H' for coprocessor select field.
589 Use 'm' for 20 bit breakpoint code.
590 Document new arg characters and add to used characters.
591 (INSN_MIPS32): New define for MIPS32 extensions.
592 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
593
594 2000-09-05 Alan Modra <alan@linuxcare.com.au>
595
596 * hppa.h: Mention cz completer.
597
598 2000-08-16 Jim Wilson <wilson@cygnus.com>
599
600 * ia64.h (IA64_OPCODE_POSTINC): New.
601
602 2000-08-15 H.J. Lu <hjl@gnu.org>
603
604 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
605 IgnoreSize change.
606
607 2000-08-08 Jason Eckhardt <jle@cygnus.com>
608
609 * i860.h: Small formatting adjustments.
610
611 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
612
613 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
614 Move related opcodes closer to each other.
615 Minor changes in comments, list undefined opcodes.
616
617 2000-07-26 Dave Brolley <brolley@redhat.com>
618
619 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
620
621 2000-07-22 Jason Eckhardt <jle@cygnus.com>
622
623 * i860.h (btne, bte, bla): Changed these opcodes
624 to use sbroff ('r') instead of split16 ('s').
625 (J, K, L, M): New operand types for 16-bit aligned fields.
626 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
627 use I, J, K, L, M instead of just I.
628 (T, U): New operand types for split 16-bit aligned fields.
629 (st.x): Changed these opcodes to use S, T, U instead of just S.
630 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
631 exist on the i860.
632 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
633 (pfeq.ss, pfeq.dd): New opcodes.
634 (st.s): Fixed incorrect mask bits.
635 (fmlow): Fixed incorrect mask bits.
636 (fzchkl, pfzchkl): Fixed incorrect mask bits.
637 (faddz, pfaddz): Fixed incorrect mask bits.
638 (form, pform): Fixed incorrect mask bits.
639 (pfld.l): Fixed incorrect mask bits.
640 (fst.q): Fixed incorrect mask bits.
641 (all floating point opcodes): Fixed incorrect mask bits for
642 handling of dual bit.
643
644 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
645
646 cris.h: New file.
647
648 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
649
650 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
651 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
652 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
653 (AVR_ISA_M83): Define for ATmega83, ATmega85.
654 (espm): Remove, because ESPM removed in databook update.
655 (eicall, eijmp): Move to the end of opcode table.
656
657 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
658
659 * m68hc11.h: New file for support of Motorola 68hc11.
660
661 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
662
663 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
664
665 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
666
667 * avr.h: New file with AVR opcodes.
668
669 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
670
671 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
672
673 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
674
675 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
676
677 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
678
679 * i386.h: Use sl_FP, not sl_Suf for fild.
680
681 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
682
683 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
684 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
685 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
686 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
687
688 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
689
690 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
691
692 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
693 Alexander Sokolov <robocop@netlink.ru>
694
695 * i386.h (i386_optab): Add cpu_flags for all instructions.
696
697 2000-05-13 Alan Modra <alan@linuxcare.com.au>
698
699 From Gavin Romig-Koch <gavin@cygnus.com>
700 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
701
702 2000-05-04 Timothy Wall <twall@cygnus.com>
703
704 * tic54x.h: New.
705
706 2000-05-03 J.T. Conklin <jtc@redback.com>
707
708 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
709 (PPC_OPERAND_VR): New operand flag for vector registers.
710
711 2000-05-01 Kazu Hirata <kazu@hxi.com>
712
713 * h8300.h (EOP): Add missing initializer.
714
715 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
716
717 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
718 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
719 New operand types l,y,&,fe,fE,fx added to support above forms.
720 (pa_opcodes): Replaced usage of 'x' as source/target for
721 floating point double-word loads/stores with 'fx'.
722
723 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
724 David Mosberger <davidm@hpl.hp.com>
725 Timothy Wall <twall@cygnus.com>
726 Jim Wilson <wilson@cygnus.com>
727
728 * ia64.h: New file.
729
730 2000-03-27 Nick Clifton <nickc@cygnus.com>
731
732 * d30v.h (SHORT_A1): Fix value.
733 (SHORT_AR): Renumber so that it is at the end of the list of short
734 instructions, not the end of the list of long instructions.
735
736 2000-03-26 Alan Modra <alan@linuxcare.com>
737
738 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
739 problem isn't really specific to Unixware.
740 (OLDGCC_COMPAT): Define.
741 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
742 destination %st(0).
743 Fix lots of comments.
744
745 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
746
747 * d30v.h:
748 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
749 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
750 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
751 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
752 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
753 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
754 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
755
756 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
757
758 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
759 fistpd without suffix.
760
761 2000-02-24 Nick Clifton <nickc@cygnus.com>
762
763 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
764 'signed_overflow_ok_p'.
765 Delete prototypes for cgen_set_flags() and cgen_get_flags().
766
767 2000-02-24 Andrew Haley <aph@cygnus.com>
768
769 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
770 (CGEN_CPU_TABLE): flags: new field.
771 Add prototypes for new functions.
772
773 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
774
775 * i386.h: Add some more UNIXWARE_COMPAT comments.
776
777 2000-02-23 Linas Vepstas <linas@linas.org>
778
779 * i370.h: New file.
780
781 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
782
783 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
784 cannot be combined in parallel with ADD/SUBppp.
785
786 2000-02-22 Andrew Haley <aph@cygnus.com>
787
788 * mips.h: (OPCODE_IS_MEMBER): Add comment.
789
790 1999-12-30 Andrew Haley <aph@cygnus.com>
791
792 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
793 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
794 insns.
795
796 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
797
798 * i386.h: Qualify intel mode far call and jmp with x_Suf.
799
800 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
801
802 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
803 indirect jumps and calls. Add FF/3 call for intel mode.
804
805 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
806
807 * mn10300.h: Add new operand types. Add new instruction formats.
808
809 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
810
811 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
812 instruction.
813
814 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
815
816 * mips.h (INSN_ISA5): New.
817
818 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
819
820 * mips.h (OPCODE_IS_MEMBER): New.
821
822 1999-10-29 Nick Clifton <nickc@cygnus.com>
823
824 * d30v.h (SHORT_AR): Define.
825
826 1999-10-18 Michael Meissner <meissner@cygnus.com>
827
828 * alpha.h (alpha_num_opcodes): Convert to unsigned.
829 (alpha_num_operands): Ditto.
830
831 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
832
833 * hppa.h (pa_opcodes): Add load and store cache control to
834 instructions. Add ordered access load and store.
835
836 * hppa.h (pa_opcode): Add new entries for addb and addib.
837
838 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
839
840 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
841
842 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
843
844 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
845
846 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
847
848 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
849 and "be" using completer prefixes.
850
851 * hppa.h (pa_opcodes): Add initializers to silence compiler.
852
853 * hppa.h: Update comments about character usage.
854
855 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
856
857 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
858 up the new fstw & bve instructions.
859
860 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
861
862 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
863 instructions.
864
865 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
866
867 * hppa.h (pa_opcodes): Add long offset double word load/store
868 instructions.
869
870 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
871 stores.
872
873 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
874
875 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
876
877 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
878
879 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
880
881 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
882
883 * hppa.h (pa_opcodes): Add support for "b,l".
884
885 * hppa.h (pa_opcodes): Add support for "b,gate".
886
887 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
888
889 * hppa.h (pa_opcodes): Use 'fX' for first register operand
890 in xmpyu.
891
892 * hppa.h (pa_opcodes): Fix mask for probe and probei.
893
894 * hppa.h (pa_opcodes): Fix mask for depwi.
895
896 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
897
898 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
899 an explicit output argument.
900
901 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
902
903 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
904 Add a few PA2.0 loads and store variants.
905
906 1999-09-04 Steve Chamberlain <sac@pobox.com>
907
908 * pj.h: New file.
909
910 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
911
912 * i386.h (i386_regtab): Move %st to top of table, and split off
913 other fp reg entries.
914 (i386_float_regtab): To here.
915
916 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
917
918 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
919 by 'f'.
920
921 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
922 Add supporting args.
923
924 * hppa.h: Document new completers and args.
925 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
926 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
927 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
928 pmenb and pmdis.
929
930 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
931 hshr, hsub, mixh, mixw, permh.
932
933 * hppa.h (pa_opcodes): Change completers in instructions to
934 use 'c' prefix.
935
936 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
937 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
938
939 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
940 fnegabs to use 'I' instead of 'F'.
941
942 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
943
944 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
945 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
946 Alphabetically sort PIII insns.
947
948 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
949
950 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
951
952 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
953
954 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
955 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
956
957 * hppa.h: Document 64 bit condition completers.
958
959 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
960
961 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
962
963 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
964
965 * i386.h (i386_optab): Add DefaultSize modifier to all insns
966 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
967 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
968
969 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
970 Jeff Law <law@cygnus.com>
971
972 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
973
974 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
975
976 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
977 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
978
979 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
980
981 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
982
983 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
984
985 * hppa.h (struct pa_opcode): Add new field "flags".
986 (FLAGS_STRICT): Define.
987
988 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
989 Jeff Law <law@cygnus.com>
990
991 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
992
993 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
994
995 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
996
997 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
998 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
999 flag to fcomi and friends.
1000
1001 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
1002
1003 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
1004 integer logical instructions.
1005
1006 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
1007
1008 * m68k.h: Document new formats `E', `G', `H' and new places `N',
1009 `n', `o'.
1010
1011 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
1012 and new places `m', `M', `h'.
1013
1014 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
1015
1016 * hppa.h (pa_opcodes): Add several processor specific system
1017 instructions.
1018
1019 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
1020
1021 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
1022 "addb", and "addib" to be used by the disassembler.
1023
1024 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1025
1026 * i386.h (ReverseModrm): Remove all occurences.
1027 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1028 movmskps, pextrw, pmovmskb, maskmovq.
1029 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1030 ignore the data size prefix.
1031
1032 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1033 Mostly stolen from Doug Ledford <dledford@redhat.com>
1034
1035 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1036
1037 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1038
1039 1999-04-14 Doug Evans <devans@casey.cygnus.com>
1040
1041 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1042 (CGEN_ATTR_TYPE): Update.
1043 (CGEN_ATTR_MASK): Number booleans starting at 0.
1044 (CGEN_ATTR_VALUE): Update.
1045 (CGEN_INSN_ATTR): Update.
1046
1047 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1048
1049 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1050 instructions.
1051
1052 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1053
1054 * hppa.h (bb, bvb): Tweak opcode/mask.
1055
1056
1057 1999-03-22 Doug Evans <devans@casey.cygnus.com>
1058
1059 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1060 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1061 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1062 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1063 Delete member max_insn_size.
1064 (enum cgen_cpu_open_arg): New enum.
1065 (cpu_open): Update prototype.
1066 (cpu_open_1): Declare.
1067 (cgen_set_cpu): Delete.
1068
1069 1999-03-11 Doug Evans <devans@casey.cygnus.com>
1070
1071 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1072 (CGEN_OPERAND_NIL): New macro.
1073 (CGEN_OPERAND): New member `type'.
1074 (@arch@_cgen_operand_table): Delete decl.
1075 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1076 (CGEN_OPERAND_TABLE): New struct.
1077 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1078 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1079 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1080 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1081 {get,set}_{int,vma}_operand.
1082 (@arch@_cgen_cpu_open): New arg `isa'.
1083 (cgen_set_cpu): Ditto.
1084
1085 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1086
1087 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1088
1089 1999-02-25 Doug Evans <devans@casey.cygnus.com>
1090
1091 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1092 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1093 enum cgen_hw_type.
1094 (CGEN_HW_TABLE): New struct.
1095 (hw_table): Delete declaration.
1096 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1097 to table entry to enum.
1098 (CGEN_OPINST): Ditto.
1099 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1100
1101 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1102
1103 * alpha.h (AXP_OPCODE_EV6): New.
1104 (AXP_OPCODE_NOPAL): Include it.
1105
1106 1999-02-09 Doug Evans <devans@casey.cygnus.com>
1107
1108 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1109 All uses updated. New members int_insn_p, max_insn_size,
1110 parse_operand,insert_operand,extract_operand,print_operand,
1111 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1112 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1113 extract_handlers,print_handlers.
1114 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1115 (CGEN_ATTR_BOOL_OFFSET): New macro.
1116 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1117 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1118 (cgen_opcode_handler): Renamed from cgen_base.
1119 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1120 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1121 all uses updated.
1122 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1123 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1124 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1125 (CGEN_OPCODE,CGEN_IBASE): New types.
1126 (CGEN_INSN): Rewrite.
1127 (CGEN_{ASM,DIS}_HASH*): Delete.
1128 (init_opcode_table,init_ibld_table): Declare.
1129 (CGEN_INSN_ATTR): New type.
1130
1131 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
1132
1133 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1134 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1135 Change *Suf definitions to include x and d suffixes.
1136 (movsx): Use w_Suf and b_Suf.
1137 (movzx): Likewise.
1138 (movs): Use bwld_Suf.
1139 (fld): Change ordering. Use sld_FP.
1140 (fild): Add Intel Syntax equivalent of fildq.
1141 (fst): Use sld_FP.
1142 (fist): Use sld_FP.
1143 (fstp): Use sld_FP. Add x_FP version.
1144 (fistp): LLongMem version for Intel Syntax.
1145 (fcom, fcomp): Use sld_FP.
1146 (fadd, fiadd, fsub): Use sld_FP.
1147 (fsubr): Use sld_FP.
1148 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1149
1150 1999-01-27 Doug Evans <devans@casey.cygnus.com>
1151
1152 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1153 CGEN_MODE_UINT.
1154
1155 1999-01-16 Jeffrey A Law (law@cygnus.com)
1156
1157 * hppa.h (bv): Fix mask.
1158
1159 1999-01-05 Doug Evans <devans@casey.cygnus.com>
1160
1161 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1162 (CGEN_ATTR): Use it.
1163 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1164 (CGEN_ATTR_TABLE): New member dfault.
1165
1166 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1167
1168 * mips.h (MIPS16_INSN_BRANCH): New.
1169
1170 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1171
1172 The following is part of a change made by Edith Epstein
1173 <eepstein@sophia.cygnus.com> as part of a project to merge in
1174 changes by HP; HP did not create ChangeLog entries.
1175
1176 * hppa.h (completer_chars): list of chars to not put a space
1177 after.
1178
1179 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1180
1181 * i386.h (i386_optab): Permit w suffix on processor control and
1182 status word instructions.
1183
1184 1998-11-30 Doug Evans <devans@casey.cygnus.com>
1185
1186 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1187 (struct cgen_keyword_entry): Ditto.
1188 (struct cgen_operand): Ditto.
1189 (CGEN_IFLD): New typedef, with associated access macros.
1190 (CGEN_IFMT): New typedef, with associated access macros.
1191 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1192 (CGEN_IVALUE): New typedef.
1193 (struct cgen_insn): Delete const on syntax,attrs members.
1194 `format' now points to format data. Type of `value' is now
1195 CGEN_IVALUE.
1196 (struct cgen_opcode_table): New member ifld_table.
1197
1198 1998-11-18 Doug Evans <devans@casey.cygnus.com>
1199
1200 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1201 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1202 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1203 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1204 (cgen_opcode_table): Update type of dis_hash fn.
1205 (extract_operand): Update type of `insn_value' arg.
1206
1207 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1208
1209 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1210
1211 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1212
1213 * mips.h (INSN_MULT): Added.
1214
1215 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1216
1217 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1218
1219 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1220
1221 * cgen.h (CGEN_INSN_INT): New typedef.
1222 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1223 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1224 (CGEN_INSN_BYTES_PTR): New typedef.
1225 (CGEN_EXTRACT_INFO): New typedef.
1226 (cgen_insert_fn,cgen_extract_fn): Update.
1227 (cgen_opcode_table): New member `insn_endian'.
1228 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1229 (insert_operand,extract_operand): Update.
1230 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1231
1232 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1233
1234 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1235 (struct CGEN_HW_ENTRY): New member `attrs'.
1236 (CGEN_HW_ATTR): New macro.
1237 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1238 (CGEN_INSN_INVALID_P): New macro.
1239
1240 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1241
1242 * hppa.h: Add "fid".
1243
1244 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1245
1246 From Robert Andrew Dale <rob@nb.net>
1247 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1248 (AMD_3DNOW_OPCODE): Define.
1249
1250 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1251
1252 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1253
1254 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1255
1256 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1257
1258 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1259
1260 Move all global state data into opcode table struct, and treat
1261 opcode table as something that is "opened/closed".
1262 * cgen.h (CGEN_OPCODE_DESC): New type.
1263 (all fns): New first arg of opcode table descriptor.
1264 (cgen_set_parse_operand_fn): Add prototype.
1265 (cgen_current_machine,cgen_current_endian): Delete.
1266 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1267 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1268 dis_hash_table,dis_hash_table_entries.
1269 (opcode_open,opcode_close): Add prototypes.
1270
1271 * cgen.h (cgen_insn): New element `cdx'.
1272
1273 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1274
1275 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1276
1277 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1278
1279 * mn10300.h: Add "no_match_operands" field for instructions.
1280 (MN10300_MAX_OPERANDS): Define.
1281
1282 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1283
1284 * cgen.h (cgen_macro_insn_count): Declare.
1285
1286 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1287
1288 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1289 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1290 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1291 set_{int,vma}_operand.
1292
1293 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1294
1295 * mn10300.h: Add "machine" field for instructions.
1296 (MN103, AM30): Define machine types.
1297
1298 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1299
1300 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1301
1302 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1303
1304 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1305
1306 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1307
1308 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1309 and ud2b.
1310 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1311 those that happen to be implemented on pentiums.
1312
1313 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1314
1315 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1316 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1317 with Size16|IgnoreSize or Size32|IgnoreSize.
1318
1319 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1320
1321 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1322 (REPE): Rename to REPE_PREFIX_OPCODE.
1323 (i386_regtab_end): Remove.
1324 (i386_prefixtab, i386_prefixtab_end): Remove.
1325 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1326 of md_begin.
1327 (MAX_OPCODE_SIZE): Define.
1328 (i386_optab_end): Remove.
1329 (sl_Suf): Define.
1330 (sl_FP): Use sl_Suf.
1331
1332 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1333 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1334 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1335 data32, dword, and adword prefixes.
1336 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1337 regs.
1338
1339 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1340
1341 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1342
1343 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1344 register operands, because this is a common idiom. Flag them with
1345 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1346 fdivrp because gcc erroneously generates them. Also flag with a
1347 warning.
1348
1349 * i386.h: Add suffix modifiers to most insns, and tighter operand
1350 checks in some cases. Fix a number of UnixWare compatibility
1351 issues with float insns. Merge some floating point opcodes, using
1352 new FloatMF modifier.
1353 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1354 consistency.
1355
1356 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1357 IgnoreDataSize where appropriate.
1358
1359 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1360
1361 * i386.h: (one_byte_segment_defaults): Remove.
1362 (two_byte_segment_defaults): Remove.
1363 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1364
1365 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1366
1367 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1368 (cgen_hw_lookup_by_num): Declare.
1369
1370 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1371
1372 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1373 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1374
1375 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1376
1377 * cgen.h (cgen_asm_init_parse): Delete.
1378 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1379 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1380
1381 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1382
1383 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1384 (cgen_asm_finish_insn): Update prototype.
1385 (cgen_insn): New members num, data.
1386 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1387 dis_hash, dis_hash_table_size moved to ...
1388 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1389 All uses updated. New members asm_hash_p, dis_hash_p.
1390 (CGEN_MINSN_EXPANSION): New struct.
1391 (cgen_expand_macro_insn): Declare.
1392 (cgen_macro_insn_count): Declare.
1393 (get_insn_operands): Update prototype.
1394 (lookup_get_insn_operands): Declare.
1395
1396 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1397
1398 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1399 regKludge. Add operands types for string instructions.
1400
1401 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1402
1403 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1404 table.
1405
1406 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1407
1408 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1409 for `gettext'.
1410
1411 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1412
1413 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1414 Add IsString flag to string instructions.
1415 (IS_STRING): Don't define.
1416 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1417 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1418 (SS_PREFIX_OPCODE): Define.
1419
1420 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1421
1422 * i386.h: Revert March 24 patch; no more LinearAddress.
1423
1424 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1425
1426 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1427 instructions, and instead add FWait opcode modifier. Add short
1428 form of fldenv and fstenv.
1429 (FWAIT_OPCODE): Define.
1430
1431 * i386.h (i386_optab): Change second operand constraint of `mov
1432 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1433 allow legal instructions such as `movl %gs,%esi'
1434
1435 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1436
1437 * h8300.h: Various changes to fully bracket initializers.
1438
1439 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1440
1441 * i386.h: Set LinearAddress for lidt and lgdt.
1442
1443 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1444
1445 * cgen.h (CGEN_BOOL_ATTR): New macro.
1446
1447 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1448
1449 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1450
1451 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1452
1453 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1454 (cgen_insn): Record syntax and format entries here, rather than
1455 separately.
1456
1457 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1458
1459 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1460
1461 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1462
1463 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1464 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1465 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1466
1467 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1468
1469 * cgen.h (lookup_insn): New argument alias_p.
1470
1471 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1472
1473 Fix rac to accept only a0:
1474 * d10v.h (OPERAND_ACC): Split into:
1475 (OPERAND_ACC0, OPERAND_ACC1) .
1476 (OPERAND_GPR): Define.
1477
1478 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1479
1480 * cgen.h (CGEN_FIELDS): Define here.
1481 (CGEN_HW_ENTRY): New member `type'.
1482 (hw_list): Delete decl.
1483 (enum cgen_mode): Declare.
1484 (CGEN_OPERAND): New member `hw'.
1485 (enum cgen_operand_instance_type): Declare.
1486 (CGEN_OPERAND_INSTANCE): New type.
1487 (CGEN_INSN): New member `operands'.
1488 (CGEN_OPCODE_DATA): Make hw_list const.
1489 (get_insn_operands,lookup_insn): Add prototypes for.
1490
1491 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1492
1493 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1494 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1495 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1496 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1497
1498 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1499
1500 * cgen.h: Correct typo in comment end marker.
1501
1502 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1503
1504 * tic30.h: New file.
1505
1506 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1507
1508 * cgen.h: Add prototypes for cgen_save_fixups(),
1509 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1510 of cgen_asm_finish_insn() to return a char *.
1511
1512 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1513
1514 * cgen.h: Formatting changes to improve readability.
1515
1516 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1517
1518 * cgen.h (*): Clean up pass over `struct foo' usage.
1519 (CGEN_ATTR): Make unsigned char.
1520 (CGEN_ATTR_TYPE): Update.
1521 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1522 (cgen_base): Move member `attrs' to cgen_insn.
1523 (CGEN_KEYWORD): New member `null_entry'.
1524 (CGEN_{SYNTAX,FORMAT}): New types.
1525 (cgen_insn): Format and syntax separated from each other.
1526
1527 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1528
1529 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1530 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1531 flags_{used,set} long.
1532 (d30v_operand): Make flags field long.
1533
1534 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1535
1536 * m68k.h: Fix comment describing operand types.
1537
1538 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1539
1540 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1541 everything else after down.
1542
1543 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1544
1545 * d10v.h (OPERAND_FLAG): Split into:
1546 (OPERAND_FFLAG, OPERAND_CFLAG) .
1547
1548 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1549
1550 * mips.h (struct mips_opcode): Changed comments to reflect new
1551 field usage.
1552
1553 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1554
1555 * mips.h: Added to comments a quick-ref list of all assigned
1556 operand type characters.
1557 (OP_{MASK,SH}_PERFREG): New macros.
1558
1559 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1560
1561 * sparc.h: Add '_' and '/' for v9a asr's.
1562 Patch from David Miller <davem@vger.rutgers.edu>
1563
1564 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1565
1566 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1567 area are not available in the base model (H8/300).
1568
1569 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1570
1571 * m68k.h: Remove documentation of ` operand specifier.
1572
1573 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1574
1575 * m68k.h: Document q and v operand specifiers.
1576
1577 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1578
1579 * v850.h (struct v850_opcode): Add processors field.
1580 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1581 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1582 (PROCESSOR_V850EA): New bit constants.
1583
1584 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1585
1586 Merge changes from Martin Hunt:
1587
1588 * d30v.h: Allow up to 64 control registers. Add
1589 SHORT_A5S format.
1590
1591 * d30v.h (LONG_Db): New form for delayed branches.
1592
1593 * d30v.h: (LONG_Db): New form for repeati.
1594
1595 * d30v.h (SHORT_D2B): New form.
1596
1597 * d30v.h (SHORT_A2): New form.
1598
1599 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1600 registers are used. Needed for VLIW optimization.
1601
1602 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1603
1604 * cgen.h: Move assembler interface section
1605 up so cgen_parse_operand_result is defined for cgen_parse_address.
1606 (cgen_parse_address): Update prototype.
1607
1608 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1609
1610 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1611
1612 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1613
1614 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1615 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1616 <paubert@iram.es>.
1617
1618 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1619 <paubert@iram.es>.
1620
1621 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1622 <paubert@iram.es>.
1623
1624 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1625 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1626
1627 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1628
1629 * v850.h (V850_NOT_R0): New flag.
1630
1631 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1632
1633 * v850.h (struct v850_opcode): Remove flags field.
1634
1635 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1636
1637 * v850.h (struct v850_opcode): Add flags field.
1638 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1639 fields.
1640 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1641 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1642
1643 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1644
1645 * arc.h: New file.
1646
1647 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1648
1649 * sparc.h (sparc_opcodes): Declare as const.
1650
1651 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1652
1653 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1654 uses single or double precision floating point resources.
1655 (INSN_NO_ISA, INSN_ISA1): Define.
1656 (cpu specific INSN macros): Tweak into bitmasks outside the range
1657 of INSN_ISA field.
1658
1659 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1660
1661 * i386.h: Fix pand opcode.
1662
1663 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1664
1665 * mips.h: Widen INSN_ISA and move it to a more convenient
1666 bit position. Add INSN_3900.
1667
1668 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1669
1670 * mips.h (struct mips_opcode): added new field membership.
1671
1672 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1673
1674 * i386.h (movd): only Reg32 is allowed.
1675
1676 * i386.h: add fcomp and ud2. From Wayne Scott
1677 <wscott@ichips.intel.com>.
1678
1679 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1680
1681 * i386.h: Add MMX instructions.
1682
1683 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1684
1685 * i386.h: Remove W modifier from conditional move instructions.
1686
1687 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1688
1689 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1690 with no arguments to match that generated by the UnixWare
1691 assembler.
1692
1693 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1694
1695 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1696 (cgen_parse_operand_fn): Declare.
1697 (cgen_init_parse_operand): Declare.
1698 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1699 new argument `want'.
1700 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1701 (enum cgen_parse_operand_type): New enum.
1702
1703 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1704
1705 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1706
1707 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1708
1709 * cgen.h: New file.
1710
1711 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1712
1713 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1714 fdivrp.
1715
1716 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1717
1718 * v850.h (extract): Make unsigned.
1719
1720 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1721
1722 * i386.h: Add iclr.
1723
1724 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1725
1726 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1727 take a direction bit.
1728
1729 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1730
1731 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1732
1733 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1734
1735 * sparc.h: Include <ansidecl.h>. Update function declarations to
1736 use prototypes, and to use const when appropriate.
1737
1738 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1739
1740 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1741
1742 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1743
1744 * d10v.h: Change pre_defined_registers to
1745 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1746
1747 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1748
1749 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1750 Change mips_opcodes from const array to a pointer,
1751 and change bfd_mips_num_opcodes from const int to int,
1752 so that we can increase the size of the mips opcodes table
1753 dynamically.
1754
1755 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1756
1757 * d30v.h (FLAG_X): Remove unused flag.
1758
1759 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1760
1761 * d30v.h: New file.
1762
1763 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1764
1765 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1766 (PDS_VALUE): Macro to access value field of predefined symbols.
1767 (tic80_next_predefined_symbol): Add prototype.
1768
1769 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1770
1771 * tic80.h (tic80_symbol_to_value): Change prototype to match
1772 change in function, added class parameter.
1773
1774 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1775
1776 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1777 endmask fields, which are somewhat weird in that 0 and 32 are
1778 treated exactly the same.
1779
1780 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1781
1782 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1783 rather than a constant that is 2**X. Reorder them to put bits for
1784 operands that have symbolic names in the upper bits, so they can
1785 be packed into an int where the lower bits contain the value that
1786 corresponds to that symbolic name.
1787 (predefined_symbo): Add struct.
1788 (tic80_predefined_symbols): Declare array of translations.
1789 (tic80_num_predefined_symbols): Declare size of that array.
1790 (tic80_value_to_symbol): Declare function.
1791 (tic80_symbol_to_value): Declare function.
1792
1793 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1794
1795 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1796
1797 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1798
1799 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1800 be the destination register.
1801
1802 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1803
1804 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1805 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1806 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1807 that the opcode can have two vector instructions in a single
1808 32 bit word and we have to encode/decode both.
1809
1810 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1811
1812 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1813 TIC80_OPERAND_RELATIVE for PC relative.
1814 (TIC80_OPERAND_BASEREL): New flag bit for register
1815 base relative.
1816
1817 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1818
1819 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1820
1821 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1822
1823 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1824 ":s" modifier for scaling.
1825
1826 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1827
1828 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1829 (TIC80_OPERAND_M_LI): Ditto
1830
1831 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1832
1833 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1834 (TIC80_OPERAND_CC): New define for condition code operand.
1835 (TIC80_OPERAND_CR): New define for control register operand.
1836
1837 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1838
1839 * tic80.h (struct tic80_opcode): Name changed.
1840 (struct tic80_opcode): Remove format field.
1841 (struct tic80_operand): Add insertion and extraction functions.
1842 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1843 correct ones.
1844 (FMT_*): Ditto.
1845
1846 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1847
1848 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1849 type IV instruction offsets.
1850
1851 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1852
1853 * tic80.h: New file.
1854
1855 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1856
1857 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1858
1859 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1860
1861 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1862 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1863 * v850.h: Fix comment, v850_operand not powerpc_operand.
1864
1865 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1866
1867 * mn10200.h: Flesh out structures and definitions needed by
1868 the mn10200 assembler & disassembler.
1869
1870 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1871
1872 * mips.h: Add mips16 definitions.
1873
1874 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1875
1876 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1877
1878 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1879
1880 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1881 (MN10300_OPERAND_MEMADDR): Define.
1882
1883 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1884
1885 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1886
1887 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1888
1889 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1890
1891 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1892
1893 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1894
1895 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1896
1897 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1898
1899 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1900
1901 * alpha.h: Don't include "bfd.h"; private relocation types are now
1902 negative to minimize problems with shared libraries. Organize
1903 instruction subsets by AMASK extensions and PALcode
1904 implementation.
1905 (struct alpha_operand): Move flags slot for better packing.
1906
1907 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1908
1909 * v850.h (V850_OPERAND_RELAX): New operand flag.
1910
1911 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1912
1913 * mn10300.h (FMT_*): Move operand format definitions
1914 here.
1915
1916 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1917
1918 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1919
1920 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1921
1922 * mn10300.h (mn10300_opcode): Add "format" field.
1923 (MN10300_OPERAND_*): Define.
1924
1925 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1926
1927 * mn10x00.h: Delete.
1928 * mn10200.h, mn10300.h: New files.
1929
1930 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1931
1932 * mn10x00.h: New file.
1933
1934 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1935
1936 * v850.h: Add new flag to indicate this instruction uses a PC
1937 displacement.
1938
1939 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1940
1941 * h8300.h (stmac): Add missing instruction.
1942
1943 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1944
1945 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1946 field.
1947
1948 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1949
1950 * v850.h (V850_OPERAND_EP): Define.
1951
1952 * v850.h (v850_opcode): Add size field.
1953
1954 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1955
1956 * v850.h (v850_operands): Add insert and extract fields, pointers
1957 to functions used to handle unusual operand encoding.
1958 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1959 V850_OPERAND_SIGNED): Defined.
1960
1961 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1962
1963 * v850.h (v850_operands): Add flags field.
1964 (OPERAND_REG, OPERAND_NUM): Defined.
1965
1966 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1967
1968 * v850.h: New file.
1969
1970 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1971
1972 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1973 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1974 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1975 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1976 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1977 Defined.
1978
1979 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1980
1981 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1982 a 3 bit space id instead of a 2 bit space id.
1983
1984 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1985
1986 * d10v.h: Add some additional defines to support the
1987 assembler in determining which operations can be done in parallel.
1988
1989 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1990
1991 * h8300.h (SN): Define.
1992 (eepmov.b): Renamed from "eepmov"
1993 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1994 with them.
1995
1996 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1997
1998 * d10v.h (OPERAND_SHIFT): New operand flag.
1999
2000 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2001
2002 * d10v.h: Changes for divs, parallel-only instructions, and
2003 signed numbers.
2004
2005 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2006
2007 * d10v.h (pd_reg): Define. Putting the definition here allows
2008 the assembler and disassembler to share the same struct.
2009
2010 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
2011
2012 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
2013 Williams <steve@icarus.com>.
2014
2015 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2016
2017 * d10v.h: New file.
2018
2019 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
2020
2021 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2022
2023 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2024
2025 * m68k.h (mcf5200): New macro.
2026 Document names of coldfire control registers.
2027
2028 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2029
2030 * h8300.h (SRC_IN_DST): Define.
2031
2032 * h8300.h (UNOP3): Mark the register operand in this insn
2033 as a source operand, not a destination operand.
2034 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2035 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2036 register operand with SRC_IN_DST.
2037
2038 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2039
2040 * alpha.h: New file.
2041
2042 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2043
2044 * rs6k.h: Remove obsolete file.
2045
2046 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2047
2048 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2049 fdivp, and fdivrp. Add ffreep.
2050
2051 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2052
2053 * h8300.h: Reorder various #defines for readability.
2054 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2055 (BITOP): Accept additional (unused) argument. All callers changed.
2056 (EBITOP): Likewise.
2057 (O_LAST): Bump.
2058 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2059
2060 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2061 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2062 (BITOP, EBITOP): Handle new H8/S addressing modes for
2063 bit insns.
2064 (UNOP3): Handle new shift/rotate insns on the H8/S.
2065 (insns using exr): New instructions.
2066 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2067
2068 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2069
2070 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2071 was incorrect.
2072
2073 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2074
2075 * h8300.h (START): Remove.
2076 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2077 and mov.l insns that can be relaxed.
2078
2079 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2080
2081 * i386.h: Remove Abs32 from lcall.
2082
2083 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2084
2085 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2086 (SLCPOP): New macro.
2087 Mark X,Y opcode letters as in use.
2088
2089 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2090
2091 * sparc.h (F_FLOAT, F_FBR): Define.
2092
2093 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2094
2095 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2096 from all insns.
2097 (ABS8SRC,ABS8DST): Add ABS8MEM.
2098 (add.l): Fix reg+reg variant.
2099 (eepmov.w): Renamed from eepmovw.
2100 (ldc,stc): Fix many cases.
2101
2102 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2103
2104 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2105
2106 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2107
2108 * sparc.h (O): Mark operand letter as in use.
2109
2110 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2111
2112 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2113 Mark operand letters uU as in use.
2114
2115 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2116
2117 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2118 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2119 (SPARC_OPCODE_SUPPORTED): New macro.
2120 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2121 (F_NOTV9): Delete.
2122
2123 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2124
2125 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2126 declaration consistent with return type in definition.
2127
2128 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2129
2130 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2131
2132 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2133
2134 * i386.h (i386_regtab): Add 80486 test registers.
2135
2136 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2137
2138 * i960.h (I_HX): Define.
2139 (i960_opcodes): Add HX instruction.
2140
2141 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2142
2143 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2144 and fclex.
2145
2146 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2147
2148 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2149 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2150 (bfd_* defines): Delete.
2151 (sparc_opcode_archs): Replaces architecture_pname.
2152 (sparc_opcode_lookup_arch): Declare.
2153 (NUMOPCODES): Delete.
2154
2155 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2156
2157 * sparc.h (enum sparc_architecture): Add v9a.
2158 (ARCHITECTURES_CONFLICT_P): Update.
2159
2160 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2161
2162 * i386.h: Added Pentium Pro instructions.
2163
2164 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2165
2166 * m68k.h: Document new 'W' operand place.
2167
2168 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2169
2170 * hppa.h: Add lci and syncdma instructions.
2171
2172 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2173
2174 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
2175 instructions.
2176
2177 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2178
2179 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2180 assembler's -mcom and -many switches.
2181
2182 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2183
2184 * i386.h: Fix cmpxchg8b extension opcode description.
2185
2186 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2187
2188 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2189 and register cr4.
2190
2191 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2192
2193 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2194
2195 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2196
2197 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2198
2199 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2200
2201 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2202
2203 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2204
2205 * m68kmri.h: Remove.
2206
2207 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2208 declarations. Remove F_ALIAS and flag field of struct
2209 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2210 int. Make name and args fields of struct m68k_opcode const.
2211
2212 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2213
2214 * sparc.h (F_NOTV9): Define.
2215
2216 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2217
2218 * mips.h (INSN_4010): Define.
2219
2220 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2221
2222 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2223
2224 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2225 * m68k.h: Fix argument descriptions of coprocessor
2226 instructions to allow only alterable operands where appropriate.
2227 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2228 (m68k_opcode_aliases): Add more aliases.
2229
2230 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2231
2232 * m68k.h: Added explcitly short-sized conditional branches, and a
2233 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2234 svr4-based configurations.
2235
2236 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2237
2238 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2239 * i386.h: added missing Data16/Data32 flags to a few instructions.
2240
2241 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2242
2243 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2244 (OP_MASK_BCC, OP_SH_BCC): Define.
2245 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2246 (OP_MASK_CCC, OP_SH_CCC): Define.
2247 (INSN_READ_FPR_R): Define.
2248 (INSN_RFE): Delete.
2249
2250 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2251
2252 * m68k.h (enum m68k_architecture): Deleted.
2253 (struct m68k_opcode_alias): New type.
2254 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2255 matching constraints, values and flags. As a side effect of this,
2256 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2257 as I know were never used, now may need re-examining.
2258 (numopcodes): Now const.
2259 (m68k_opcode_aliases, numaliases): New variables.
2260 (endop): Deleted.
2261 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2262 m68k_opcode_aliases; update declaration of m68k_opcodes.
2263
2264 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2265
2266 * hppa.h (delay_type): Delete unused enumeration.
2267 (pa_opcode): Replace unused delayed field with an architecture
2268 field.
2269 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2270
2271 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2272
2273 * mips.h (INSN_ISA4): Define.
2274
2275 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2276
2277 * mips.h (M_DLA_AB, M_DLI): Define.
2278
2279 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2280
2281 * hppa.h (fstwx): Fix single-bit error.
2282
2283 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2284
2285 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2286
2287 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2288
2289 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2290 debug registers. From Charles Hannum (mycroft@netbsd.org).
2291
2292 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2293
2294 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2295 i386 support:
2296 * i386.h (MOV_AX_DISP32): New macro.
2297 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2298 of several call/return instructions.
2299 (ADDR_PREFIX_OPCODE): New macro.
2300
2301 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2302
2303 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2304
2305 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2306 char.
2307 (struct vot, field `name'): ditto.
2308
2309 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2310
2311 * vax.h: Supply and properly group all values in end sentinel.
2312
2313 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2314
2315 * mips.h (INSN_ISA, INSN_4650): Define.
2316
2317 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2318
2319 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2320 systems with a separate instruction and data cache, such as the
2321 29040, these instructions take an optional argument.
2322
2323 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2324
2325 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2326 INSN_TRAP.
2327
2328 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2329
2330 * mips.h (INSN_STORE_MEMORY): Define.
2331
2332 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2333
2334 * sparc.h: Document new operand type 'x'.
2335
2336 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2337
2338 * i960.h (I_CX2): New instruction category. It includes
2339 instructions available on Cx and Jx processors.
2340 (I_JX): New instruction category, for JX-only instructions.
2341 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2342 Jx-only instructions, in I_JX category.
2343
2344 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2345
2346 * ns32k.h (endop): Made pointer const too.
2347
2348 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2349
2350 * ns32k.h: Drop Q operand type as there is no correct use
2351 for it. Add I and Z operand types which allow better checking.
2352
2353 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2354
2355 * h8300.h (xor.l) :fix bit pattern.
2356 (L_2): New size of operand.
2357 (trapa): Use it.
2358
2359 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2360
2361 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2362
2363 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2364
2365 * sparc.h: Include v9 definitions.
2366
2367 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2368
2369 * m68k.h (m68060): Defined.
2370 (m68040up, mfloat, mmmu): Include it.
2371 (struct m68k_opcode): Widen `arch' field.
2372 (m68k_opcodes): Updated for M68060. Removed comments that were
2373 instructions commented out by "JF" years ago.
2374
2375 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2376
2377 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2378 add a one-bit `flags' field.
2379 (F_ALIAS): New macro.
2380
2381 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2382
2383 * h8300.h (dec, inc): Get encoding right.
2384
2385 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2386
2387 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2388 a flag instead.
2389 (PPC_OPERAND_SIGNED): Define.
2390 (PPC_OPERAND_SIGNOPT): Define.
2391
2392 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2393
2394 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2395 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2396
2397 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2398
2399 * i386.h: Reverse last change. It'll be handled in gas instead.
2400
2401 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2402
2403 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2404 slower on the 486 and used the implicit shift count despite the
2405 explicit operand. The one-operand form is still available to get
2406 the shorter form with the implicit shift count.
2407
2408 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2409
2410 * hppa.h: Fix typo in fstws arg string.
2411
2412 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2413
2414 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2415
2416 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2417
2418 * ppc.h (PPC_OPCODE_601): Define.
2419
2420 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2421
2422 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2423 (so we can determine valid completers for both addb and addb[tf].)
2424
2425 * hppa.h (xmpyu): No floating point format specifier for the
2426 xmpyu instruction.
2427
2428 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2429
2430 * ppc.h (PPC_OPERAND_NEXT): Define.
2431 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2432 (struct powerpc_macro): Define.
2433 (powerpc_macros, powerpc_num_macros): Declare.
2434
2435 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2436
2437 * ppc.h: New file. Header file for PowerPC opcode table.
2438
2439 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2440
2441 * hppa.h: More minor template fixes for sfu and copr (to allow
2442 for easier disassembly).
2443
2444 * hppa.h: Fix templates for all the sfu and copr instructions.
2445
2446 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2447
2448 * i386.h (push): Permit Imm16 operand too.
2449
2450 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2451
2452 * h8300.h (andc): Exists in base arch.
2453
2454 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2455
2456 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2457 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2458
2459 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2460
2461 * hppa.h: Add FP quadword store instructions.
2462
2463 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2464
2465 * mips.h: (M_J_A): Added.
2466 (M_LA): Removed.
2467
2468 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2469
2470 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2471 <mellon@pepper.ncd.com>.
2472
2473 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2474
2475 * hppa.h: Immediate field in probei instructions is unsigned,
2476 not low-sign extended.
2477
2478 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2479
2480 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2481
2482 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2483
2484 * i386.h: Add "fxch" without operand.
2485
2486 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2487
2488 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2489
2490 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2491
2492 * hppa.h: Add gfw and gfr to the opcode table.
2493
2494 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2495
2496 * m88k.h: extended to handle m88110.
2497
2498 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2499
2500 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2501 addresses.
2502
2503 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2504
2505 * i960.h (i960_opcodes): Properly bracket initializers.
2506
2507 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2508
2509 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2510
2511 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2512
2513 * m68k.h (two): Protect second argument with parentheses.
2514
2515 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2516
2517 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2518 Deleted old in/out instructions in "#if 0" section.
2519
2520 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2521
2522 * i386.h (i386_optab): Properly bracket initializers.
2523
2524 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2525
2526 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2527 Jeff Law, law@cs.utah.edu).
2528
2529 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2530
2531 * i386.h (lcall): Accept Imm32 operand also.
2532
2533 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2534
2535 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2536 (M_DABS): Added.
2537
2538 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2539
2540 * mips.h (INSN_*): Changed values. Removed unused definitions.
2541 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2542 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2543 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2544 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2545 (M_*): Added new values for r6000 and r4000 macros.
2546 (ANY_DELAY): Removed.
2547
2548 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2549
2550 * mips.h: Added M_LI_S and M_LI_SS.
2551
2552 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2553
2554 * h8300.h: Get some rare mov.bs correct.
2555
2556 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2557
2558 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2559 been included.
2560
2561 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2562
2563 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2564 jump instructions, for use in disassemblers.
2565
2566 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2567
2568 * m88k.h: Make bitfields just unsigned, not unsigned long or
2569 unsigned short.
2570
2571 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2572
2573 * hppa.h: New argument type 'y'. Use in various float instructions.
2574
2575 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2576
2577 * hppa.h (break): First immediate field is unsigned.
2578
2579 * hppa.h: Add rfir instruction.
2580
2581 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2582
2583 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2584
2585 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2586
2587 * mips.h: Reworked the hazard information somewhat, and fixed some
2588 bugs in the instruction hazard descriptions.
2589
2590 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2591
2592 * m88k.h: Corrected a couple of opcodes.
2593
2594 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2595
2596 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2597 new version includes instruction hazard information, but is
2598 otherwise reasonably similar.
2599
2600 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2601
2602 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2603
2604 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2605
2606 Patches from Jeff Law, law@cs.utah.edu:
2607 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2608 Make the tables be the same for the following instructions:
2609 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2610 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2611 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2612 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2613 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2614 "fcmp", and "ftest".
2615
2616 * hppa.h: Make new and old tables the same for "break", "mtctl",
2617 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2618 Fix typo in last patch. Collapse several #ifdefs into a
2619 single #ifdef.
2620
2621 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2622 of the comments up-to-date.
2623
2624 * hppa.h: Update "free list" of letters and update
2625 comments describing each letter's function.
2626
2627 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2628
2629 * h8300.h: Lots of little fixes for the h8/300h.
2630
2631 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2632
2633 Support for H8/300-H
2634 * h8300.h: Lots of new opcodes.
2635
2636 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2637
2638 * h8300.h: checkpoint, includes H8/300-H opcodes.
2639
2640 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2641
2642 * Patches from Jeffrey Law <law@cs.utah.edu>.
2643 * hppa.h: Rework single precision FP
2644 instructions so that they correctly disassemble code
2645 PA1.1 code.
2646
2647 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2648
2649 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2650 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2651
2652 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2653
2654 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2655 gdb will define it for now.
2656
2657 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2658
2659 * sparc.h: Don't end enumerator list with comma.
2660
2661 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2662
2663 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2664 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2665 ("bc2t"): Correct typo.
2666 ("[ls]wc[023]"): Use T rather than t.
2667 ("c[0123]"): Define general coprocessor instructions.
2668
2669 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2670
2671 * m68k.h: Move split point for gcc compilation more towards
2672 middle.
2673
2674 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2675
2676 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2677 simply wrong, ics, rfi, & rfsvc were missing).
2678 Add "a" to opr_ext for "bb". Doc fix.
2679
2680 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2681
2682 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2683 * mips.h: Add casts, to suppress warnings about shifting too much.
2684 * m68k.h: Document the placement code '9'.
2685
2686 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2687
2688 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2689 allows callers to break up the large initialized struct full of
2690 opcodes into two half-sized ones. This permits GCC to compile
2691 this module, since it takes exponential space for initializers.
2692 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2693
2694 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2695
2696 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2697 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2698 initialized structs in it.
2699
2700 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2701
2702 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2703 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2704 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2705
2706 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2707
2708 * mips.h: document "i" and "j" operands correctly.
2709
2710 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2711
2712 * mips.h: Removed endianness dependency.
2713
2714 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2715
2716 * h8300.h: include info on number of cycles per instruction.
2717
2718 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2719
2720 * hppa.h: Move handy aliases to the front. Fix masks for extract
2721 and deposit instructions.
2722
2723 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2724
2725 * i386.h: accept shld and shrd both with and without the shift
2726 count argument, which is always %cl.
2727
2728 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2729
2730 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2731 (one_byte_segment_defaults, two_byte_segment_defaults,
2732 i386_prefixtab_end): Ditto.
2733
2734 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2735
2736 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2737 for operand 2; from John Carr, jfc@dsg.dec.com.
2738
2739 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2740
2741 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2742 always use 16-bit offsets. Makes calculated-size jump tables
2743 feasible.
2744
2745 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2746
2747 * i386.h: Fix one-operand forms of in* and out* patterns.
2748
2749 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2750
2751 * m68k.h: Added CPU32 support.
2752
2753 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2754
2755 * mips.h (break): Disassemble the argument. Patch from
2756 jonathan@cs.stanford.edu (Jonathan Stone).
2757
2758 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2759
2760 * m68k.h: merged Motorola and MIT syntax.
2761
2762 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2763
2764 * m68k.h (pmove): make the tests less strict, the 68k book is
2765 wrong.
2766
2767 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2768
2769 * m68k.h (m68ec030): Defined as alias for 68030.
2770 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2771 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2772 them. Tightened description of "fmovex" to distinguish it from
2773 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2774 up descriptions that claimed versions were available for chips not
2775 supporting them. Added "pmovefd".
2776
2777 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2778
2779 * m68k.h: fix where the . goes in divull
2780
2781 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2782
2783 * m68k.h: the cas2 instruction is supposed to be written with
2784 indirection on the last two operands, which can be either data or
2785 address registers. Added a new operand type 'r' which accepts
2786 either register type. Added new cases for cas2l and cas2w which
2787 use them. Corrected masks for cas2 which failed to recognize use
2788 of address register.
2789
2790 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2791
2792 * m68k.h: Merged in patches (mostly m68040-specific) from
2793 Colin Smith <colin@wrs.com>.
2794
2795 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2796 base). Also cleaned up duplicates, re-ordered instructions for
2797 the sake of dis-assembling (so aliases come after standard names).
2798 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2799
2800 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2801
2802 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2803 all missing .s
2804
2805 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2806
2807 * sparc.h: Moved tables to BFD library.
2808
2809 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2810
2811 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2812
2813 * h8300.h: Finish filling in all the holes in the opcode table,
2814 so that the Lucid C compiler can digest this as well...
2815
2816 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2817
2818 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2819 Fix opcodes on various sizes of fild/fist instructions
2820 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2821 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2822
2823 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2824
2825 * h8300.h: Fill in all the holes in the opcode table so that the
2826 losing HPUX C compiler can digest this...
2827
2828 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2829
2830 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2831 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2832
2833 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2834
2835 * sparc.h: Add new architecture variant sparclite; add its scan
2836 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2837
2838 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2839
2840 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2841 fy@lucid.com).
2842
2843 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2844
2845 * rs6k.h: New version from IBM (Metin).
2846
2847 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2848
2849 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2850 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2851
2852 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2853
2854 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2855
2856 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2857
2858 * m68k.h (one, two): Cast macro args to unsigned to suppress
2859 complaints from compiler and lint about integer overflow during
2860 shift.
2861
2862 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2863
2864 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2865
2866 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2867
2868 * mips.h: Make bitfield layout depend on the HOST compiler,
2869 not on the TARGET system.
2870
2871 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2872
2873 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2874 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2875 <TRANLE@INTELLICORP.COM>.
2876
2877 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2878
2879 * h8300.h: turned op_type enum into #define list
2880
2881 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2882
2883 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2884 similar instructions -- they've been renamed to "fitoq", etc.
2885 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2886 number of arguments.
2887 * h8300.h: Remove extra ; which produces compiler warning.
2888
2889 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2890
2891 * sparc.h: fix opcode for tsubcctv.
2892
2893 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2894
2895 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2896
2897 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2898
2899 * sparc.h (nop): Made the 'lose' field be even tighter,
2900 so only a standard 'nop' is disassembled as a nop.
2901
2902 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2903
2904 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2905 disassembled as a nop.
2906
2907 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2908
2909 * m68k.h, sparc.h: ANSIfy enums.
2910
2911 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2912
2913 * sparc.h: fix a typo.
2914
2915 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2916
2917 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2918 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2919 vax.h: Renamed from ../<foo>-opcode.h.
2920
2921 \f
2922 Local Variables:
2923 version-control: never
2924 End:
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