1 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
3 * hppa.h (pa_opcodes): Fix mask for depwi.
5 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
7 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
8 an explicit output argument.
10 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
12 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
13 Add a few PA2.0 loads and store variants.
15 1999-09-04 Steve Chamberlain <sac@pobox.com>
19 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
21 * i386.h (i386_regtab): Move %st to top of table, and split off
23 (i386_float_regtab): To here.
25 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
27 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
30 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
33 * hppa.h: Document new completers and args.
34 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
35 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
36 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
39 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
40 hshr, hsub, mixh, mixw, permh.
42 * hppa.h (pa_opcodes): Change completers in instructions to
45 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
46 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
48 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
49 fnegabs to use 'I' instead of 'F'.
51 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
53 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
54 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
55 Alphabetically sort PIII insns.
57 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
59 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
61 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
63 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
64 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
66 * hppa.h: Document 64 bit condition completers.
68 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
70 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
72 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
74 * i386.h (i386_optab): Add DefaultSize modifier to all insns
75 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
76 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
78 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
79 Jeff Law <law@cygnus.com>
81 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
83 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
85 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
86 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
88 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
90 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
92 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
94 * hppa.h (struct pa_opcode): Add new field "flags".
95 (FLAGS_STRICT): Define.
97 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
98 Jeff Law <law@cygnus.com>
100 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
102 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
104 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
106 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
107 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
108 flag to fcomi and friends.
110 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
112 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
113 integer logical instructions.
115 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
117 * m68k.h: Document new formats `E', `G', `H' and new places `N',
120 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
121 and new places `m', `M', `h'.
123 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
125 * hppa.h (pa_opcodes): Add several processor specific system
128 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
130 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
131 "addb", and "addib" to be used by the disassembler.
133 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
135 * i386.h (ReverseModrm): Remove all occurences.
136 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
137 movmskps, pextrw, pmovmskb, maskmovq.
138 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
139 ignore the data size prefix.
141 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
142 Mostly stolen from Doug Ledford <dledford@redhat.com>
144 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
146 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
148 1999-04-14 Doug Evans <devans@casey.cygnus.com>
150 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
151 (CGEN_ATTR_TYPE): Update.
152 (CGEN_ATTR_MASK): Number booleans starting at 0.
153 (CGEN_ATTR_VALUE): Update.
154 (CGEN_INSN_ATTR): Update.
156 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
158 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
161 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
163 * hppa.h (bb, bvb): Tweak opcode/mask.
166 1999-03-22 Doug Evans <devans@casey.cygnus.com>
168 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
169 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
170 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
171 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
172 Delete member max_insn_size.
173 (enum cgen_cpu_open_arg): New enum.
174 (cpu_open): Update prototype.
175 (cpu_open_1): Declare.
176 (cgen_set_cpu): Delete.
178 1999-03-11 Doug Evans <devans@casey.cygnus.com>
180 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
181 (CGEN_OPERAND_NIL): New macro.
182 (CGEN_OPERAND): New member `type'.
183 (@arch@_cgen_operand_table): Delete decl.
184 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
185 (CGEN_OPERAND_TABLE): New struct.
186 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
187 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
188 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
189 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
190 {get,set}_{int,vma}_operand.
191 (@arch@_cgen_cpu_open): New arg `isa'.
192 (cgen_set_cpu): Ditto.
194 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
196 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
198 1999-02-25 Doug Evans <devans@casey.cygnus.com>
200 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
201 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
203 (CGEN_HW_TABLE): New struct.
204 (hw_table): Delete declaration.
205 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
206 to table entry to enum.
207 (CGEN_OPINST): Ditto.
208 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
210 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
212 * alpha.h (AXP_OPCODE_EV6): New.
213 (AXP_OPCODE_NOPAL): Include it.
215 1999-02-09 Doug Evans <devans@casey.cygnus.com>
217 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
218 All uses updated. New members int_insn_p, max_insn_size,
219 parse_operand,insert_operand,extract_operand,print_operand,
220 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
221 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
222 extract_handlers,print_handlers.
223 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
224 (CGEN_ATTR_BOOL_OFFSET): New macro.
225 (CGEN_ATTR_MASK): Subtract it to compute bit number.
226 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
227 (cgen_opcode_handler): Renamed from cgen_base.
228 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
229 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
231 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
232 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
233 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
234 (CGEN_OPCODE,CGEN_IBASE): New types.
235 (CGEN_INSN): Rewrite.
236 (CGEN_{ASM,DIS}_HASH*): Delete.
237 (init_opcode_table,init_ibld_table): Declare.
238 (CGEN_INSN_ATTR): New type.
240 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
242 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
243 (x_FP, d_FP, dls_FP, sldx_FP): Define.
244 Change *Suf definitions to include x and d suffixes.
245 (movsx): Use w_Suf and b_Suf.
247 (movs): Use bwld_Suf.
248 (fld): Change ordering. Use sld_FP.
249 (fild): Add Intel Syntax equivalent of fildq.
252 (fstp): Use sld_FP. Add x_FP version.
253 (fistp): LLongMem version for Intel Syntax.
254 (fcom, fcomp): Use sld_FP.
255 (fadd, fiadd, fsub): Use sld_FP.
257 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
259 1999-01-27 Doug Evans <devans@casey.cygnus.com>
261 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
264 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
266 * hppa.h (bv): Fix mask.
268 1999-01-05 Doug Evans <devans@casey.cygnus.com>
270 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
272 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
273 (CGEN_ATTR_TABLE): New member dfault.
275 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
277 * mips.h (MIPS16_INSN_BRANCH): New.
279 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
281 The following is part of a change made by Edith Epstein
282 <eepstein@sophia.cygnus.com> as part of a project to merge in
283 changes by HP; HP did not create ChangeLog entries.
285 * hppa.h (completer_chars): list of chars to not put a space
288 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
290 * i386.h (i386_optab): Permit w suffix on processor control and
291 status word instructions.
293 1998-11-30 Doug Evans <devans@casey.cygnus.com>
295 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
296 (struct cgen_keyword_entry): Ditto.
297 (struct cgen_operand): Ditto.
298 (CGEN_IFLD): New typedef, with associated access macros.
299 (CGEN_IFMT): New typedef, with associated access macros.
300 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
301 (CGEN_IVALUE): New typedef.
302 (struct cgen_insn): Delete const on syntax,attrs members.
303 `format' now points to format data. Type of `value' is now
305 (struct cgen_opcode_table): New member ifld_table.
307 1998-11-18 Doug Evans <devans@casey.cygnus.com>
309 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
310 (CGEN_OPERAND_INSTANCE): New member `attrs'.
311 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
312 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
313 (cgen_opcode_table): Update type of dis_hash fn.
314 (extract_operand): Update type of `insn_value' arg.
316 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
318 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
320 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
322 * mips.h (INSN_MULT): Added.
324 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
326 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
328 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
330 * cgen.h (CGEN_INSN_INT): New typedef.
331 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
332 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
333 (CGEN_INSN_BYTES_PTR): New typedef.
334 (CGEN_EXTRACT_INFO): New typedef.
335 (cgen_insert_fn,cgen_extract_fn): Update.
336 (cgen_opcode_table): New member `insn_endian'.
337 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
338 (insert_operand,extract_operand): Update.
339 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
341 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
343 * cgen.h (CGEN_ATTR_BOOLS): New macro.
344 (struct CGEN_HW_ENTRY): New member `attrs'.
345 (CGEN_HW_ATTR): New macro.
346 (struct CGEN_OPERAND_INSTANCE): New member `name'.
347 (CGEN_INSN_INVALID_P): New macro.
349 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
353 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
355 From Robert Andrew Dale <rob@nb.net>
356 * i386.h (i386_optab): Add AMD 3DNow! instructions.
357 (AMD_3DNOW_OPCODE): Define.
359 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
361 * d30v.h (EITHER_BUT_PREFER_MU): Define.
363 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
365 * cgen.h (cgen_insn): #if 0 out element `cdx'.
367 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
369 Move all global state data into opcode table struct, and treat
370 opcode table as something that is "opened/closed".
371 * cgen.h (CGEN_OPCODE_DESC): New type.
372 (all fns): New first arg of opcode table descriptor.
373 (cgen_set_parse_operand_fn): Add prototype.
374 (cgen_current_machine,cgen_current_endian): Delete.
375 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
376 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
377 dis_hash_table,dis_hash_table_entries.
378 (opcode_open,opcode_close): Add prototypes.
380 * cgen.h (cgen_insn): New element `cdx'.
382 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
384 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
386 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
388 * mn10300.h: Add "no_match_operands" field for instructions.
389 (MN10300_MAX_OPERANDS): Define.
391 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
393 * cgen.h (cgen_macro_insn_count): Declare.
395 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
397 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
398 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
399 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
400 set_{int,vma}_operand.
402 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
404 * mn10300.h: Add "machine" field for instructions.
405 (MN103, AM30): Define machine types.
407 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
409 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
411 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
413 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
415 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
417 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
419 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
420 those that happen to be implemented on pentiums.
422 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
424 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
425 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
426 with Size16|IgnoreSize or Size32|IgnoreSize.
428 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
430 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
431 (REPE): Rename to REPE_PREFIX_OPCODE.
432 (i386_regtab_end): Remove.
433 (i386_prefixtab, i386_prefixtab_end): Remove.
434 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
436 (MAX_OPCODE_SIZE): Define.
437 (i386_optab_end): Remove.
441 * i386.h (i386_optab): Allow 16 bit displacement for `mov
442 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
443 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
444 data32, dword, and adword prefixes.
445 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
448 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
450 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
452 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
453 register operands, because this is a common idiom. Flag them with
454 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
455 fdivrp because gcc erroneously generates them. Also flag with a
458 * i386.h: Add suffix modifiers to most insns, and tighter operand
459 checks in some cases. Fix a number of UnixWare compatibility
460 issues with float insns. Merge some floating point opcodes, using
461 new FloatMF modifier.
462 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
465 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
466 IgnoreDataSize where appropriate.
468 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
470 * i386.h: (one_byte_segment_defaults): Remove.
471 (two_byte_segment_defaults): Remove.
472 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
474 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
476 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
477 (cgen_hw_lookup_by_num): Declare.
479 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
481 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
482 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
484 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
486 * cgen.h (cgen_asm_init_parse): Delete.
487 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
488 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
490 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
492 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
493 (cgen_asm_finish_insn): Update prototype.
494 (cgen_insn): New members num, data.
495 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
496 dis_hash, dis_hash_table_size moved to ...
497 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
498 All uses updated. New members asm_hash_p, dis_hash_p.
499 (CGEN_MINSN_EXPANSION): New struct.
500 (cgen_expand_macro_insn): Declare.
501 (cgen_macro_insn_count): Declare.
502 (get_insn_operands): Update prototype.
503 (lookup_get_insn_operands): Declare.
505 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
507 * i386.h (i386_optab): Change iclrKludge and imulKludge to
508 regKludge. Add operands types for string instructions.
510 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
512 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
515 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
517 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
520 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
522 * i386.h: Remove NoModrm flag from all insns: it's never checked.
523 Add IsString flag to string instructions.
524 (IS_STRING): Don't define.
525 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
526 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
527 (SS_PREFIX_OPCODE): Define.
529 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
531 * i386.h: Revert March 24 patch; no more LinearAddress.
533 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
535 * i386.h (i386_optab): Remove fwait (9b) from all floating point
536 instructions, and instead add FWait opcode modifier. Add short
537 form of fldenv and fstenv.
538 (FWAIT_OPCODE): Define.
540 * i386.h (i386_optab): Change second operand constraint of `mov
541 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
542 allow legal instructions such as `movl %gs,%esi'
544 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
546 * h8300.h: Various changes to fully bracket initializers.
548 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
550 * i386.h: Set LinearAddress for lidt and lgdt.
552 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
554 * cgen.h (CGEN_BOOL_ATTR): New macro.
556 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
558 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
560 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
562 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
563 (cgen_insn): Record syntax and format entries here, rather than
566 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
568 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
570 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
572 * cgen.h (cgen_insert_fn): Change type of result to const char *.
573 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
574 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
576 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
578 * cgen.h (lookup_insn): New argument alias_p.
580 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
582 Fix rac to accept only a0:
583 * d10v.h (OPERAND_ACC): Split into:
584 (OPERAND_ACC0, OPERAND_ACC1) .
585 (OPERAND_GPR): Define.
587 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
589 * cgen.h (CGEN_FIELDS): Define here.
590 (CGEN_HW_ENTRY): New member `type'.
591 (hw_list): Delete decl.
592 (enum cgen_mode): Declare.
593 (CGEN_OPERAND): New member `hw'.
594 (enum cgen_operand_instance_type): Declare.
595 (CGEN_OPERAND_INSTANCE): New type.
596 (CGEN_INSN): New member `operands'.
597 (CGEN_OPCODE_DATA): Make hw_list const.
598 (get_insn_operands,lookup_insn): Add prototypes for.
600 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
602 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
603 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
604 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
605 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
607 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
609 * cgen.h: Correct typo in comment end marker.
611 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
615 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
617 * cgen.h: Add prototypes for cgen_save_fixups(),
618 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
619 of cgen_asm_finish_insn() to return a char *.
621 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
623 * cgen.h: Formatting changes to improve readability.
625 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
627 * cgen.h (*): Clean up pass over `struct foo' usage.
628 (CGEN_ATTR): Make unsigned char.
629 (CGEN_ATTR_TYPE): Update.
630 (CGEN_ATTR_{ENTRY,TABLE}): New types.
631 (cgen_base): Move member `attrs' to cgen_insn.
632 (CGEN_KEYWORD): New member `null_entry'.
633 (CGEN_{SYNTAX,FORMAT}): New types.
634 (cgen_insn): Format and syntax separated from each other.
636 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
638 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
639 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
640 flags_{used,set} long.
641 (d30v_operand): Make flags field long.
643 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
645 * m68k.h: Fix comment describing operand types.
647 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
649 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
650 everything else after down.
652 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
654 * d10v.h (OPERAND_FLAG): Split into:
655 (OPERAND_FFLAG, OPERAND_CFLAG) .
657 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
659 * mips.h (struct mips_opcode): Changed comments to reflect new
662 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
664 * mips.h: Added to comments a quick-ref list of all assigned
665 operand type characters.
666 (OP_{MASK,SH}_PERFREG): New macros.
668 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
670 * sparc.h: Add '_' and '/' for v9a asr's.
671 Patch from David Miller <davem@vger.rutgers.edu>
673 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
675 * h8300.h: Bit ops with absolute addresses not in the 8 bit
676 area are not available in the base model (H8/300).
678 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
680 * m68k.h: Remove documentation of ` operand specifier.
682 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
684 * m68k.h: Document q and v operand specifiers.
686 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
688 * v850.h (struct v850_opcode): Add processors field.
689 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
690 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
691 (PROCESSOR_V850EA): New bit constants.
693 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
695 Merge changes from Martin Hunt:
697 * d30v.h: Allow up to 64 control registers. Add
700 * d30v.h (LONG_Db): New form for delayed branches.
702 * d30v.h: (LONG_Db): New form for repeati.
704 * d30v.h (SHORT_D2B): New form.
706 * d30v.h (SHORT_A2): New form.
708 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
709 registers are used. Needed for VLIW optimization.
711 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
713 * cgen.h: Move assembler interface section
714 up so cgen_parse_operand_result is defined for cgen_parse_address.
715 (cgen_parse_address): Update prototype.
717 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
719 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
721 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
723 * i386.h (two_byte_segment_defaults): Correct base register 5 in
724 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
727 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
730 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
733 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
734 (JUMP_ON_ECX_ZERO): Remove commented out macro.
736 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
738 * v850.h (V850_NOT_R0): New flag.
740 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
742 * v850.h (struct v850_opcode): Remove flags field.
744 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
746 * v850.h (struct v850_opcode): Add flags field.
747 (struct v850_operand): Extend meaning of 'bits' and 'shift'
749 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
750 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
752 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
756 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
758 * sparc.h (sparc_opcodes): Declare as const.
760 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
762 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
763 uses single or double precision floating point resources.
764 (INSN_NO_ISA, INSN_ISA1): Define.
765 (cpu specific INSN macros): Tweak into bitmasks outside the range
768 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
770 * i386.h: Fix pand opcode.
772 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
774 * mips.h: Widen INSN_ISA and move it to a more convenient
775 bit position. Add INSN_3900.
777 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
779 * mips.h (struct mips_opcode): added new field membership.
781 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
783 * i386.h (movd): only Reg32 is allowed.
785 * i386.h: add fcomp and ud2. From Wayne Scott
786 <wscott@ichips.intel.com>.
788 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
790 * i386.h: Add MMX instructions.
792 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
794 * i386.h: Remove W modifier from conditional move instructions.
796 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
798 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
799 with no arguments to match that generated by the UnixWare
802 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
804 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
805 (cgen_parse_operand_fn): Declare.
806 (cgen_init_parse_operand): Declare.
807 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
809 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
810 (enum cgen_parse_operand_type): New enum.
812 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
814 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
816 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
820 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
822 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
825 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
827 * v850.h (extract): Make unsigned.
829 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
833 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
835 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
836 take a direction bit.
838 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
840 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
842 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
844 * sparc.h: Include <ansidecl.h>. Update function declarations to
845 use prototypes, and to use const when appropriate.
847 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
849 * mn10300.h (MN10300_OPERAND_RELAX): Define.
851 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
853 * d10v.h: Change pre_defined_registers to
854 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
856 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
858 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
859 Change mips_opcodes from const array to a pointer,
860 and change bfd_mips_num_opcodes from const int to int,
861 so that we can increase the size of the mips opcodes table
864 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
866 * d30v.h (FLAG_X): Remove unused flag.
868 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
872 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
874 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
875 (PDS_VALUE): Macro to access value field of predefined symbols.
876 (tic80_next_predefined_symbol): Add prototype.
878 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
880 * tic80.h (tic80_symbol_to_value): Change prototype to match
881 change in function, added class parameter.
883 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
885 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
886 endmask fields, which are somewhat weird in that 0 and 32 are
887 treated exactly the same.
889 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
891 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
892 rather than a constant that is 2**X. Reorder them to put bits for
893 operands that have symbolic names in the upper bits, so they can
894 be packed into an int where the lower bits contain the value that
895 corresponds to that symbolic name.
896 (predefined_symbo): Add struct.
897 (tic80_predefined_symbols): Declare array of translations.
898 (tic80_num_predefined_symbols): Declare size of that array.
899 (tic80_value_to_symbol): Declare function.
900 (tic80_symbol_to_value): Declare function.
902 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
904 * mn10200.h (MN10200_OPERAND_RELAX): Define.
906 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
908 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
909 be the destination register.
911 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
913 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
914 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
915 (TIC80_VECTOR): Define a flag bit for the flags. This one means
916 that the opcode can have two vector instructions in a single
917 32 bit word and we have to encode/decode both.
919 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
921 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
922 TIC80_OPERAND_RELATIVE for PC relative.
923 (TIC80_OPERAND_BASEREL): New flag bit for register
926 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
928 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
930 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
932 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
933 ":s" modifier for scaling.
935 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
937 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
938 (TIC80_OPERAND_M_LI): Ditto
940 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
942 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
943 (TIC80_OPERAND_CC): New define for condition code operand.
944 (TIC80_OPERAND_CR): New define for control register operand.
946 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
948 * tic80.h (struct tic80_opcode): Name changed.
949 (struct tic80_opcode): Remove format field.
950 (struct tic80_operand): Add insertion and extraction functions.
951 (TIC80_OPERAND_*): Remove old bogus values, start adding new
955 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
957 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
958 type IV instruction offsets.
960 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
964 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
966 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
968 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
970 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
971 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
972 * v850.h: Fix comment, v850_operand not powerpc_operand.
974 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
976 * mn10200.h: Flesh out structures and definitions needed by
977 the mn10200 assembler & disassembler.
979 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
981 * mips.h: Add mips16 definitions.
983 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
985 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
987 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
989 * mn10300.h (MN10300_OPERAND_PCREL): Define.
990 (MN10300_OPERAND_MEMADDR): Define.
992 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
994 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
996 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
998 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1000 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1002 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1004 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1006 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1008 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1010 * alpha.h: Don't include "bfd.h"; private relocation types are now
1011 negative to minimize problems with shared libraries. Organize
1012 instruction subsets by AMASK extensions and PALcode
1014 (struct alpha_operand): Move flags slot for better packing.
1016 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1018 * v850.h (V850_OPERAND_RELAX): New operand flag.
1020 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1022 * mn10300.h (FMT_*): Move operand format definitions
1025 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1027 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1029 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1031 * mn10300.h (mn10300_opcode): Add "format" field.
1032 (MN10300_OPERAND_*): Define.
1034 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1036 * mn10x00.h: Delete.
1037 * mn10200.h, mn10300.h: New files.
1039 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1041 * mn10x00.h: New file.
1043 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1045 * v850.h: Add new flag to indicate this instruction uses a PC
1048 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1050 * h8300.h (stmac): Add missing instruction.
1052 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1054 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1057 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1059 * v850.h (V850_OPERAND_EP): Define.
1061 * v850.h (v850_opcode): Add size field.
1063 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1065 * v850.h (v850_operands): Add insert and extract fields, pointers
1066 to functions used to handle unusual operand encoding.
1067 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1068 V850_OPERAND_SIGNED): Defined.
1070 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1072 * v850.h (v850_operands): Add flags field.
1073 (OPERAND_REG, OPERAND_NUM): Defined.
1075 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1079 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1081 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1082 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1083 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1084 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1085 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1088 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1090 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1091 a 3 bit space id instead of a 2 bit space id.
1093 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1095 * d10v.h: Add some additional defines to support the
1096 assembler in determining which operations can be done in parallel.
1098 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1100 * h8300.h (SN): Define.
1101 (eepmov.b): Renamed from "eepmov"
1102 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1105 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1107 * d10v.h (OPERAND_SHIFT): New operand flag.
1109 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1111 * d10v.h: Changes for divs, parallel-only instructions, and
1114 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1116 * d10v.h (pd_reg): Define. Putting the definition here allows
1117 the assembler and disassembler to share the same struct.
1119 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1121 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1122 Williams <steve@icarus.com>.
1124 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1128 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1130 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1132 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1134 * m68k.h (mcf5200): New macro.
1135 Document names of coldfire control registers.
1137 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1139 * h8300.h (SRC_IN_DST): Define.
1141 * h8300.h (UNOP3): Mark the register operand in this insn
1142 as a source operand, not a destination operand.
1143 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1144 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1145 register operand with SRC_IN_DST.
1147 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1149 * alpha.h: New file.
1151 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1153 * rs6k.h: Remove obsolete file.
1155 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1157 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1158 fdivp, and fdivrp. Add ffreep.
1160 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1162 * h8300.h: Reorder various #defines for readability.
1163 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1164 (BITOP): Accept additional (unused) argument. All callers changed.
1167 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1169 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1170 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1171 (BITOP, EBITOP): Handle new H8/S addressing modes for
1173 (UNOP3): Handle new shift/rotate insns on the H8/S.
1174 (insns using exr): New instructions.
1175 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1177 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1179 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1182 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1184 * h8300.h (START): Remove.
1185 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1186 and mov.l insns that can be relaxed.
1188 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1190 * i386.h: Remove Abs32 from lcall.
1192 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1194 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1195 (SLCPOP): New macro.
1196 Mark X,Y opcode letters as in use.
1198 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1200 * sparc.h (F_FLOAT, F_FBR): Define.
1202 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1204 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1206 (ABS8SRC,ABS8DST): Add ABS8MEM.
1207 (add.l): Fix reg+reg variant.
1208 (eepmov.w): Renamed from eepmovw.
1209 (ldc,stc): Fix many cases.
1211 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1213 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1215 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1217 * sparc.h (O): Mark operand letter as in use.
1219 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1221 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1222 Mark operand letters uU as in use.
1224 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1226 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1227 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1228 (SPARC_OPCODE_SUPPORTED): New macro.
1229 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1232 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1234 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1235 declaration consistent with return type in definition.
1237 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1239 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1241 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1243 * i386.h (i386_regtab): Add 80486 test registers.
1245 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1247 * i960.h (I_HX): Define.
1248 (i960_opcodes): Add HX instruction.
1250 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1252 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1255 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1257 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1258 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1259 (bfd_* defines): Delete.
1260 (sparc_opcode_archs): Replaces architecture_pname.
1261 (sparc_opcode_lookup_arch): Declare.
1262 (NUMOPCODES): Delete.
1264 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1266 * sparc.h (enum sparc_architecture): Add v9a.
1267 (ARCHITECTURES_CONFLICT_P): Update.
1269 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1271 * i386.h: Added Pentium Pro instructions.
1273 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1275 * m68k.h: Document new 'W' operand place.
1277 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1279 * hppa.h: Add lci and syncdma instructions.
1281 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1283 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1286 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1288 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1289 assembler's -mcom and -many switches.
1291 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1293 * i386.h: Fix cmpxchg8b extension opcode description.
1295 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1297 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1300 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1302 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1304 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1306 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1308 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1310 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1312 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1314 * m68kmri.h: Remove.
1316 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1317 declarations. Remove F_ALIAS and flag field of struct
1318 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1319 int. Make name and args fields of struct m68k_opcode const.
1321 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1323 * sparc.h (F_NOTV9): Define.
1325 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1327 * mips.h (INSN_4010): Define.
1329 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1331 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1333 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1334 * m68k.h: Fix argument descriptions of coprocessor
1335 instructions to allow only alterable operands where appropriate.
1336 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1337 (m68k_opcode_aliases): Add more aliases.
1339 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1341 * m68k.h: Added explcitly short-sized conditional branches, and a
1342 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1343 svr4-based configurations.
1345 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1347 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1348 * i386.h: added missing Data16/Data32 flags to a few instructions.
1350 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1352 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1353 (OP_MASK_BCC, OP_SH_BCC): Define.
1354 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1355 (OP_MASK_CCC, OP_SH_CCC): Define.
1356 (INSN_READ_FPR_R): Define.
1359 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1361 * m68k.h (enum m68k_architecture): Deleted.
1362 (struct m68k_opcode_alias): New type.
1363 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1364 matching constraints, values and flags. As a side effect of this,
1365 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1366 as I know were never used, now may need re-examining.
1367 (numopcodes): Now const.
1368 (m68k_opcode_aliases, numaliases): New variables.
1370 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1371 m68k_opcode_aliases; update declaration of m68k_opcodes.
1373 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1375 * hppa.h (delay_type): Delete unused enumeration.
1376 (pa_opcode): Replace unused delayed field with an architecture
1378 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1380 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1382 * mips.h (INSN_ISA4): Define.
1384 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1386 * mips.h (M_DLA_AB, M_DLI): Define.
1388 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1390 * hppa.h (fstwx): Fix single-bit error.
1392 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1394 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1396 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1398 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1399 debug registers. From Charles Hannum (mycroft@netbsd.org).
1401 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1403 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1405 * i386.h (MOV_AX_DISP32): New macro.
1406 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1407 of several call/return instructions.
1408 (ADDR_PREFIX_OPCODE): New macro.
1410 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1412 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1414 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1415 it pointer to const char;
1416 (struct vot, field `name'): ditto.
1418 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1420 * vax.h: Supply and properly group all values in end sentinel.
1422 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1424 * mips.h (INSN_ISA, INSN_4650): Define.
1426 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1428 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1429 systems with a separate instruction and data cache, such as the
1430 29040, these instructions take an optional argument.
1432 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1434 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1437 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1439 * mips.h (INSN_STORE_MEMORY): Define.
1441 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1443 * sparc.h: Document new operand type 'x'.
1445 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1447 * i960.h (I_CX2): New instruction category. It includes
1448 instructions available on Cx and Jx processors.
1449 (I_JX): New instruction category, for JX-only instructions.
1450 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1451 Jx-only instructions, in I_JX category.
1453 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1455 * ns32k.h (endop): Made pointer const too.
1457 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1459 * ns32k.h: Drop Q operand type as there is no correct use
1460 for it. Add I and Z operand types which allow better checking.
1462 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1464 * h8300.h (xor.l) :fix bit pattern.
1465 (L_2): New size of operand.
1468 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1470 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1472 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1474 * sparc.h: Include v9 definitions.
1476 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1478 * m68k.h (m68060): Defined.
1479 (m68040up, mfloat, mmmu): Include it.
1480 (struct m68k_opcode): Widen `arch' field.
1481 (m68k_opcodes): Updated for M68060. Removed comments that were
1482 instructions commented out by "JF" years ago.
1484 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1486 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1487 add a one-bit `flags' field.
1488 (F_ALIAS): New macro.
1490 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1492 * h8300.h (dec, inc): Get encoding right.
1494 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1496 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1498 (PPC_OPERAND_SIGNED): Define.
1499 (PPC_OPERAND_SIGNOPT): Define.
1501 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1503 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1504 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1506 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1508 * i386.h: Reverse last change. It'll be handled in gas instead.
1510 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1512 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1513 slower on the 486 and used the implicit shift count despite the
1514 explicit operand. The one-operand form is still available to get
1515 the shorter form with the implicit shift count.
1517 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1519 * hppa.h: Fix typo in fstws arg string.
1521 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1523 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1525 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1527 * ppc.h (PPC_OPCODE_601): Define.
1529 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1531 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1532 (so we can determine valid completers for both addb and addb[tf].)
1534 * hppa.h (xmpyu): No floating point format specifier for the
1537 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1539 * ppc.h (PPC_OPERAND_NEXT): Define.
1540 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1541 (struct powerpc_macro): Define.
1542 (powerpc_macros, powerpc_num_macros): Declare.
1544 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1546 * ppc.h: New file. Header file for PowerPC opcode table.
1548 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1550 * hppa.h: More minor template fixes for sfu and copr (to allow
1551 for easier disassembly).
1553 * hppa.h: Fix templates for all the sfu and copr instructions.
1555 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1557 * i386.h (push): Permit Imm16 operand too.
1559 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1561 * h8300.h (andc): Exists in base arch.
1563 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1565 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1566 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1568 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1570 * hppa.h: Add FP quadword store instructions.
1572 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1574 * mips.h: (M_J_A): Added.
1577 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1579 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1580 <mellon@pepper.ncd.com>.
1582 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1584 * hppa.h: Immediate field in probei instructions is unsigned,
1585 not low-sign extended.
1587 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1589 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1591 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1593 * i386.h: Add "fxch" without operand.
1595 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1597 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1599 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1601 * hppa.h: Add gfw and gfr to the opcode table.
1603 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1605 * m88k.h: extended to handle m88110.
1607 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1609 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1612 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1614 * i960.h (i960_opcodes): Properly bracket initializers.
1616 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1618 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1620 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1622 * m68k.h (two): Protect second argument with parentheses.
1624 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1626 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1627 Deleted old in/out instructions in "#if 0" section.
1629 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1631 * i386.h (i386_optab): Properly bracket initializers.
1633 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1635 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1636 Jeff Law, law@cs.utah.edu).
1638 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1640 * i386.h (lcall): Accept Imm32 operand also.
1642 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1644 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1647 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1649 * mips.h (INSN_*): Changed values. Removed unused definitions.
1650 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1651 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1652 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1653 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1654 (M_*): Added new values for r6000 and r4000 macros.
1655 (ANY_DELAY): Removed.
1657 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1659 * mips.h: Added M_LI_S and M_LI_SS.
1661 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1663 * h8300.h: Get some rare mov.bs correct.
1665 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1667 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1670 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1672 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1673 jump instructions, for use in disassemblers.
1675 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1677 * m88k.h: Make bitfields just unsigned, not unsigned long or
1680 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1682 * hppa.h: New argument type 'y'. Use in various float instructions.
1684 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1686 * hppa.h (break): First immediate field is unsigned.
1688 * hppa.h: Add rfir instruction.
1690 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1692 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1694 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1696 * mips.h: Reworked the hazard information somewhat, and fixed some
1697 bugs in the instruction hazard descriptions.
1699 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1701 * m88k.h: Corrected a couple of opcodes.
1703 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1705 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1706 new version includes instruction hazard information, but is
1707 otherwise reasonably similar.
1709 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1711 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1713 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1715 Patches from Jeff Law, law@cs.utah.edu:
1716 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1717 Make the tables be the same for the following instructions:
1718 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1719 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1720 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1721 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1722 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1723 "fcmp", and "ftest".
1725 * hppa.h: Make new and old tables the same for "break", "mtctl",
1726 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1727 Fix typo in last patch. Collapse several #ifdefs into a
1730 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1731 of the comments up-to-date.
1733 * hppa.h: Update "free list" of letters and update
1734 comments describing each letter's function.
1736 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1738 * h8300.h: checkpoint, includes H8/300-H opcodes.
1740 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1742 * Patches from Jeffrey Law <law@cs.utah.edu>.
1743 * hppa.h: Rework single precision FP
1744 instructions so that they correctly disassemble code
1747 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1749 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1750 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1752 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1754 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1755 gdb will define it for now.
1757 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1759 * sparc.h: Don't end enumerator list with comma.
1761 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1763 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1764 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1765 ("bc2t"): Correct typo.
1766 ("[ls]wc[023]"): Use T rather than t.
1767 ("c[0123]"): Define general coprocessor instructions.
1769 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1771 * m68k.h: Move split point for gcc compilation more towards
1774 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1776 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1777 simply wrong, ics, rfi, & rfsvc were missing).
1778 Add "a" to opr_ext for "bb". Doc fix.
1780 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1782 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1783 * mips.h: Add casts, to suppress warnings about shifting too much.
1784 * m68k.h: Document the placement code '9'.
1786 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1788 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1789 allows callers to break up the large initialized struct full of
1790 opcodes into two half-sized ones. This permits GCC to compile
1791 this module, since it takes exponential space for initializers.
1792 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1794 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1796 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1797 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1798 initialized structs in it.
1800 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1802 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1803 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1804 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1806 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1808 * mips.h: document "i" and "j" operands correctly.
1810 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1812 * mips.h: Removed endianness dependency.
1814 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1816 * h8300.h: include info on number of cycles per instruction.
1818 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1820 * hppa.h: Move handy aliases to the front. Fix masks for extract
1821 and deposit instructions.
1823 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1825 * i386.h: accept shld and shrd both with and without the shift
1826 count argument, which is always %cl.
1828 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1830 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1831 (one_byte_segment_defaults, two_byte_segment_defaults,
1832 i386_prefixtab_end): Ditto.
1834 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1836 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1837 for operand 2; from John Carr, jfc@dsg.dec.com.
1839 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1841 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1842 always use 16-bit offsets. Makes calculated-size jump tables
1845 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1847 * i386.h: Fix one-operand forms of in* and out* patterns.
1849 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1851 * m68k.h: Added CPU32 support.
1853 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1855 * mips.h (break): Disassemble the argument. Patch from
1856 jonathan@cs.stanford.edu (Jonathan Stone).
1858 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1860 * m68k.h: merged Motorola and MIT syntax.
1862 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1864 * m68k.h (pmove): make the tests less strict, the 68k book is
1867 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1869 * m68k.h (m68ec030): Defined as alias for 68030.
1870 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1871 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1872 them. Tightened description of "fmovex" to distinguish it from
1873 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1874 up descriptions that claimed versions were available for chips not
1875 supporting them. Added "pmovefd".
1877 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1879 * m68k.h: fix where the . goes in divull
1881 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1883 * m68k.h: the cas2 instruction is supposed to be written with
1884 indirection on the last two operands, which can be either data or
1885 address registers. Added a new operand type 'r' which accepts
1886 either register type. Added new cases for cas2l and cas2w which
1887 use them. Corrected masks for cas2 which failed to recognize use
1888 of address register.
1890 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1892 * m68k.h: Merged in patches (mostly m68040-specific) from
1893 Colin Smith <colin@wrs.com>.
1895 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1896 base). Also cleaned up duplicates, re-ordered instructions for
1897 the sake of dis-assembling (so aliases come after standard names).
1898 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
1900 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1902 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
1905 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
1907 * sparc.h: Moved tables to BFD library.
1909 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
1911 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
1913 * h8300.h: Finish filling in all the holes in the opcode table,
1914 so that the Lucid C compiler can digest this as well...
1916 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
1918 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
1919 Fix opcodes on various sizes of fild/fist instructions
1920 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
1921 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
1923 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
1925 * h8300.h: Fill in all the holes in the opcode table so that the
1926 losing HPUX C compiler can digest this...
1928 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
1930 * mips.h: Fix decoding of coprocessor instructions, somewhat.
1931 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
1933 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
1935 * sparc.h: Add new architecture variant sparclite; add its scan
1936 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
1938 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
1940 * mips.h: Add some more opcode synonyms (from Frank Yellin,
1943 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
1945 * rs6k.h: New version from IBM (Metin).
1947 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
1949 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
1950 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
1952 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
1954 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
1956 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
1958 * m68k.h (one, two): Cast macro args to unsigned to suppress
1959 complaints from compiler and lint about integer overflow during
1962 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
1964 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
1966 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
1968 * mips.h: Make bitfield layout depend on the HOST compiler,
1969 not on the TARGET system.
1971 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
1973 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
1974 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
1975 <TRANLE@INTELLICORP.COM>.
1977 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
1979 * h8300.h: turned op_type enum into #define list
1981 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
1983 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
1984 similar instructions -- they've been renamed to "fitoq", etc.
1985 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
1986 number of arguments.
1987 * h8300.h: Remove extra ; which produces compiler warning.
1989 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
1991 * sparc.h: fix opcode for tsubcctv.
1993 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
1995 * sparc.h: fba and cba are now aliases for fb and cb respectively.
1997 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
1999 * sparc.h (nop): Made the 'lose' field be even tighter,
2000 so only a standard 'nop' is disassembled as a nop.
2002 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2004 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2005 disassembled as a nop.
2007 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2009 * sparc.h: fix a typo.
2011 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2013 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2014 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2015 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2019 version-control: never