include/opcode/arc.h

   1 /* Opcode table for the ARC.
   2    Copyright 1994, 1995 Free Software Foundation, Inc.
   3    Contributed by Doug Evans (dje@cygnus.com).
   4
   5    This program is free software; you can redistribute it and/or modify
   6    it under the terms of the GNU General Public License as published by
   7    the Free Software Foundation; either version 2, or (at your option)
   8    any later version.
   9
  10    This program is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13    GNU General Public License for more details.
  14
  15    You should have received a copy of the GNU General Public License
  16    along with this program; if not, write to the Free Software
  17    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
  18
  19 /* List of the various cpu types.
  20    The tables currently use bit masks to say whether the instruction or
  21    whatever is supported by a particular cpu.  This lets us have one entry
  22    apply to several cpus.
  23    There may be more ARCs in the future, beyond the current project.  */
  24
  25 /* The `base' cpu must be 0 (table entries are omitted for the base cpu).  */
  26 #define ARC_MACH_BASE 0
  27 #define ARC_MACH_HOST 1
  28 #define ARC_MACH_GRAPHICS 2
  29 #define ARC_MACH_AUDIO 4
  30
  31 /* Mask of number of bits necessary to record cpu type.  */
  32 #define ARC_MACH_MASK 7
  33
  34 /* Type to denote an ARC instruction (at least a 32 bit unsigned long).  */
  35 typedef unsigned long arc_insn;
  36
  37 struct arc_opcode {
  38   char *syntax;                 /* syntax of insn */
  39   unsigned long mask, value;    /* recognize instruction if (op&mask)==value */
  40   int flags;                    /* various flag bits */
  41
  42 /* Values for `flags'.  */
  43
  44 /* Return MACH number, given flag bits.  */
  45 #define ARC_OPCODE_MACH(bits) ((bits) & ARC_MACH_MASK)
  46 };
  47
  48 struct arc_operand_value {
  49   char *name;                   /* eg: "eq" */
  50   short value;                  /* eg: 1 */
  51   unsigned char type;           /* index into `arc_operands' */
  52   unsigned char flags;          /* various flag bits */
  53
  54 /* Values for `flags'.  */
  55
  56 /* Return MACH number, given flag bits.  */
  57 #define ARC_OPVAL_MACH(bits) ((bits) & ARC_MACH_MASK)
  58 };
  59
  60 struct arc_operand {
  61   /* One of the insn format chars.  */
  62   unsigned char fmt;
  63
  64   /* The number of bits in the operand (may be unused for a modifier).  */
  65   unsigned char bits;
  66
  67   /* How far the operand is left shifted in the instruction, or
  68      the modifier's flag bit (may be unused for a modifier.  */
  69   unsigned char shift;
  70
  71   /* Various flag bits.  */
  72   int flags;
  73
  74 /* Values for `flags'.  */
  75
  76 /* This operand is a suffix to the opcode.  */
  77 #define ARC_OPERAND_SUFFIX 1
  78
  79 /* This operand is a relative branch displacement.  The disassembler
  80    prints these symbolically if possible.  */
  81 #define ARC_OPERAND_RELATIVE 2
  82
  83 /* This operand is an absolute branch address.  The disassembler
  84    prints these symbolically if possible.  */
  85 #define ARC_OPERAND_ABSOLUTE 4
  86
  87 /* This operand takes signed values.  */
  88 #define ARC_OPERAND_SIGNED 8
  89
  90 /* This operand takes signed values, but also accepts a full positive
  91    range of values.  That is, if bits is 16, it takes any value from
  92    -0x8000 to 0xffff.  */
  93 #define ARC_OPERAND_SIGNOPT 0x10
  94
  95 /* This operand should be regarded as a negative number for the
  96    purposes of overflow checking (i.e., the normal most negative
  97    number is disallowed and one more than the normal most positive
  98    number is allowed).  This flag will only be set for a signed
  99    operand.  */
 100 #define ARC_OPERAND_NEGATIVE 0x20
 101
 102 /* This operand doesn't really exist.  The program uses these operands
 103    in special ways.  */
 104 #define ARC_OPERAND_FAKE 0x40
 105
 106 /* Modifier values.  */
 107 /* A dot is required before a suffix.  Eg: .le  */
 108 #define ARC_MOD_DOT 0x1000
 109
 110 /* A normal register is allowed (not used, but here for completeness).  */
 111 #define ARC_MOD_REG 0x2000
 112
 113 /* An auxiliary register name is expected.  */
 114 #define ARC_MOD_AUXREG 0x4000
 115
 116 /* Sum of all ARC_MOD_XXX bits.  */
 117 #define ARC_MOD_BITS 0x7000
 118
 119 /* Non-zero if the operand type is really a modifier.  */
 120 #define ARC_MOD_P(X) ((X) & ARC_MOD_BITS)
 121
 122   /* Insertion function.  This is used by the assembler.  To insert an
 123      operand value into an instruction, check this field.
 124
 125      If it is NULL, execute
 126          i |= (p & ((1 << o->bits) - 1)) << o->shift;
 127      (I is the instruction which we are filling in, O is a pointer to
 128      this structure, and OP is the opcode value; this assumes twos
 129      complement arithmetic).
 130
 131      If this field is not NULL, then simply call it with the
 132      instruction and the operand value.  It will return the new value
 133      of the instruction.  If the ERRMSG argument is not NULL, then if
 134      the operand value is illegal, *ERRMSG will be set to a warning
 135      string (the operand will be inserted in any case).  If the
 136      operand value is legal, *ERRMSG will be unchanged.
 137
 138      REG is non-NULL when inserting a register value.  */
 139
 140   arc_insn (*insert) PARAMS ((arc_insn insn,
 141                               const struct arc_operand *operand, int mods,
 142                               const struct arc_operand_value *reg, long value,
 143                               const char **errmsg));
 144
 145   /* Extraction function.  This is used by the disassembler.  To
 146      extract this operand type from an instruction, check this field.
 147
 148      If it is NULL, compute
 149          op = ((i) >> o->shift) & ((1 << o->bits) - 1);
 150          if ((o->flags & ARC_OPERAND_SIGNED) != 0
 151              && (op & (1 << (o->bits - 1))) != 0)
 152            op -= 1 << o->bits;
 153      (I is the instruction, O is a pointer to this structure, and OP
 154      is the result; this assumes twos complement arithmetic).
 155
 156      If this field is not NULL, then simply call it with the
 157      instruction value.  It will return the value of the operand.  If
 158      the INVALID argument is not NULL, *INVALID will be set to
 159      non-zero if this operand type can not actually be extracted from
 160      this operand (i.e., the instruction does not match).  If the
 161      operand is valid, *INVALID will not be changed.
 162
 163      INSN is a pointer to an array of two `arc_insn's.  The first element is
 164      the insn, the second is the limm if present.
 165
 166      Operands that have a printable form like registers and suffixes have
 167      their struct arc_operand_value pointer stored in OPVAL.  */
 168
 169   long (*extract) PARAMS ((arc_insn *insn,
 170                            const struct arc_operand *operand,
 171                            int mods, const struct arc_operand_value **opval,
 172                            int *invalid));
 173 };
 174
 175 /* Bits that say what version of cpu we have.
 176    These should be passed to arc_init_opcode_tables.
 177    At present, all there is is the cpu type.  */
 178
 179 /* MACH number, given value passed to `arc_init_opcode_tables'.  */
 180 #define ARC_HAVE_MACH(bits) ((bits) & ARC_MACH_MASK)
 181
 182 /* Special register values:  */
 183 #define ARC_REG_SHIMM_UPDATE 61
 184 #define ARC_REG_SHIMM 63
 185 #define ARC_REG_LIMM 62
 186
 187 /* Non-zero if REG is a constant marker.  */
 188 #define ARC_REG_CONSTANT_P(REG) ((REG) >= 61)
 189
 190 /* Positions and masks of various fields:  */
 191 #define ARC_SHIFT_REGA 21
 192 #define ARC_SHIFT_REGB 15
 193 #define ARC_SHIFT_REGC 9
 194 #define ARC_MASK_REG 63
 195
 196 /* Non-zero if X will fit in a signed 9 bit field.  */
 197 #define ARC_SHIMM_CONST_P(x) ((long) (x) >= -256 && (long) (x) <= 255)
 198
 199 extern const struct arc_operand arc_operands[];
 200 extern const int arc_operand_count;
 201 extern const struct arc_opcode arc_opcodes[];
 202 extern const int arc_opcodes_count;
 203 extern const struct arc_operand_value arc_suffixes[];
 204 extern const int arc_suffixes_count;
 205 extern const struct arc_operand_value arc_reg_names[];
 206 extern const int arc_reg_names_count;
 207 extern unsigned char arc_operand_map[];
 208
 209 /* Utility fns in arc-opc.c.  */
 210 /* `arc_opcode_init_tables' must be called before `arc_xxx_supported'.  */
 211 void arc_opcode_init_tables PARAMS ((int));
 212 void arc_opcode_init_insert PARAMS ((void));
 213 void arc_opcode_init_extract PARAMS ((void));
 214 int arc_opcode_limm_p PARAMS ((long *));
 215 const struct arc_operand_value *arc_opcode_lookup_suffix PARAMS ((const struct arc_operand *type, int value));
 216 int arc_opcode_supported PARAMS ((const struct arc_opcode *));
 217 int arc_opval_supported PARAMS ((const struct arc_operand_value *));